[linux.git] / arch / ppc / kernel / setup.c

/*
 * Common prep boot and setup code.
 */

#include <linux/module.h>
#include <linux/string.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/delay.h>
#include <linux/initrd.h>
#include <linux/ide.h>
#include <linux/screen_info.h>
#include <linux/bootmem.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/cpu.h>
#include <linux/console.h>

#include <asm/residual.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/processor.h>
#include <asm/pgtable.h>
#include <asm/bootinfo.h>
#include <asm/setup.h>
#include <asm/amigappc.h>
#include <asm/smp.h>
#include <asm/elf.h>
#include <asm/cputable.h>
#include <asm/bootx.h>
#include <asm/btext.h>
#include <asm/machdep.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/sections.h>
#include <asm/nvram.h>
#include <asm/xmon.h>
#include <asm/ocp.h>
#include <asm/prom.h>

#define USES_PPC_SYS (defined(CONFIG_85xx) || defined(CONFIG_83xx) || \
		      defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
		      defined(CONFIG_PPC_MPC52xx))

#if USES_PPC_SYS
#include <asm/ppc_sys.h>
#endif

#if defined CONFIG_KGDB
#include <asm/kgdb.h>
#endif

extern void platform_init(unsigned long r3, unsigned long r4,
		unsigned long r5, unsigned long r6, unsigned long r7);
extern void reloc_got2(unsigned long offset);

extern void ppc6xx_idle(void);
extern void power4_idle(void);

extern boot_infos_t *boot_infos;
struct ide_machdep_calls ppc_ide_md;

/* Used with the BI_MEMSIZE bootinfo parameter to store the memory
   size value reported by the boot loader. */
unsigned long boot_mem_size;

unsigned long ISA_DMA_THRESHOLD;
unsigned int DMA_MODE_READ;
unsigned int DMA_MODE_WRITE;

#ifdef CONFIG_PPC_PREP
extern void prep_init(unsigned long r3, unsigned long r4,
		unsigned long r5, unsigned long r6, unsigned long r7);

dev_t boot_dev;
#endif /* CONFIG_PPC_PREP */

int have_of;
EXPORT_SYMBOL(have_of);

#ifdef __DO_IRQ_CANON
int ppc_do_canonicalize_irqs;
EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
#endif

#ifdef CONFIG_VGA_CONSOLE
unsigned long vgacon_remap_base;
#endif

struct machdep_calls ppc_md;

/*
 * These are used in binfmt_elf.c to put aux entries on the stack
 * for each elf executable being started.
 */
int dcache_bsize;
int icache_bsize;
int ucache_bsize;

#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_FB_VGA16) || \
    defined(CONFIG_FB_VGA16_MODULE) || defined(CONFIG_FB_VESA)
struct screen_info screen_info = {
	0, 25,			/* orig-x, orig-y */
	0,			/* unused */
	0,			/* orig-video-page */
	0,			/* orig-video-mode */
	80,			/* orig-video-cols */
	0,0,0,			/* ega_ax, ega_bx, ega_cx */
	25,			/* orig-video-lines */
	1,			/* orig-video-isVGA */
	16			/* orig-video-points */
};
#endif /* CONFIG_VGA_CONSOLE || CONFIG_FB_VGA16 || CONFIG_FB_VESA */

void machine_restart(char *cmd)
{
#ifdef CONFIG_NVRAM
	nvram_sync();
#endif
	ppc_md.restart(cmd);
}

static void ppc_generic_power_off(void)
{
	ppc_md.power_off();
}

void machine_halt(void)
{
#ifdef CONFIG_NVRAM
	nvram_sync();
#endif
	ppc_md.halt();
}

void (*pm_power_off)(void) = ppc_generic_power_off;

void machine_power_off(void)
{
#ifdef CONFIG_NVRAM
	nvram_sync();
#endif
	if (pm_power_off)
		pm_power_off();
	ppc_generic_power_off();
}

#ifdef CONFIG_TAU
extern u32 cpu_temp(unsigned long cpu);
extern u32 cpu_temp_both(unsigned long cpu);
#endif /* CONFIG_TAU */

int show_cpuinfo(struct seq_file *m, void *v)
{
	int i = (int) v - 1;
	int err = 0;
	unsigned int pvr;
	unsigned short maj, min;
	unsigned long lpj;

	if (i >= NR_CPUS) {
		/* Show summary information */
#ifdef CONFIG_SMP
		unsigned long bogosum = 0;
		for_each_online_cpu(i)
			bogosum += cpu_data[i].loops_per_jiffy;
		seq_printf(m, "total bogomips\t: %lu.%02lu\n",
			   bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
#endif /* CONFIG_SMP */

		if (ppc_md.show_cpuinfo != NULL)
			err = ppc_md.show_cpuinfo(m);
		return err;
	}

#ifdef CONFIG_SMP
	if (!cpu_online(i))
		return 0;
	pvr = cpu_data[i].pvr;
	lpj = cpu_data[i].loops_per_jiffy;
#else
	pvr = mfspr(SPRN_PVR);
	lpj = loops_per_jiffy;
#endif

	seq_printf(m, "processor\t: %d\n", i);
	seq_printf(m, "cpu\t\t: ");

	if (cur_cpu_spec->pvr_mask)
		seq_printf(m, "%s", cur_cpu_spec->cpu_name);
	else
		seq_printf(m, "unknown (%08x)", pvr);
#ifdef CONFIG_ALTIVEC
	if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
		seq_printf(m, ", altivec supported");
#endif
	seq_printf(m, "\n");

#ifdef CONFIG_TAU
	if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
#ifdef CONFIG_TAU_AVERAGE
		/* more straightforward, but potentially misleading */
		seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
			   cpu_temp(i));
#else
		/* show the actual temp sensor range */
		u32 temp;
		temp = cpu_temp_both(i);
		seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
			   temp & 0xff, temp >> 16);
#endif
	}
#endif /* CONFIG_TAU */

	if (ppc_md.show_percpuinfo != NULL) {
		err = ppc_md.show_percpuinfo(m, i);
		if (err)
			return err;
	}

	/* If we are a Freescale core do a simple check so
	 * we dont have to keep adding cases in the future */
	if ((PVR_VER(pvr) & 0x8000) == 0x8000) {
		maj = PVR_MAJ(pvr);
		min = PVR_MIN(pvr);
	} else {
		switch (PVR_VER(pvr)) {
			case 0x0020:	/* 403 family */
				maj = PVR_MAJ(pvr) + 1;
				min = PVR_MIN(pvr);
				break;
			case 0x1008:	/* 740P/750P ?? */
				maj = ((pvr >> 8) & 0xFF) - 1;
				min = pvr & 0xFF;
				break;
			default:
				maj = (pvr >> 8) & 0xFF;
				min = pvr & 0xFF;
				break;
		}
	}

	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
		   maj, min, PVR_VER(pvr), PVR_REV(pvr));

	seq_printf(m, "bogomips\t: %lu.%02lu\n",
		   lpj / (500000/HZ), (lpj / (5000/HZ)) % 100);

#if USES_PPC_SYS
	if (cur_ppc_sys_spec->ppc_sys_name)
		seq_printf(m, "chipset\t\t: %s\n",
			cur_ppc_sys_spec->ppc_sys_name);
#endif

#ifdef CONFIG_SMP
	seq_printf(m, "\n");
#endif

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	int i = *pos;

	return i <= NR_CPUS? (void *) (i + 1): NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_start(m, pos);
}

static void c_stop(struct seq_file *m, void *v)
{
}

struct seq_operations cpuinfo_op = {
	.start =c_start,
	.next =	c_next,
	.stop =	c_stop,
	.show =	show_cpuinfo,
};

/*
 * We're called here very early in the boot.  We determine the machine
 * type and call the appropriate low-level setup functions.
 *  -- Cort <[email protected]>
 *
 * Note that the kernel may be running at an address which is different
 * from the address that it was linked at, so we must use RELOC/PTRRELOC
 * to access static data (including strings).  -- paulus
 */
__init
unsigned long
early_init(int r3, int r4, int r5)
{
 	unsigned long phys;
	unsigned long offset = reloc_offset();
	struct cpu_spec *spec;

 	/* Default */
 	phys = offset + KERNELBASE;

	/* First zero the BSS -- use memset, some arches don't have
	 * caches on yet */
	memset_io(PTRRELOC(&__bss_start), 0, _end - __bss_start);

	/*
	 * Identify the CPU type and fix up code sections
	 * that depend on which cpu we have.
	 */
	spec = identify_cpu(offset, mfspr(SPRN_PVR));
	do_feature_fixups(spec->cpu_features,
			  PTRRELOC(&__start___ftr_fixup),
			  PTRRELOC(&__stop___ftr_fixup));

	return phys;
}

#ifdef CONFIG_PPC_PREP
/*
 * The PPC_PREP version of platform_init...
 */
void __init
platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
	      unsigned long r6, unsigned long r7)
{
#ifdef CONFIG_BOOTX_TEXT
	if (boot_text_mapped) {
		btext_clearscreen();
		btext_welcome();
	}
#endif

	parse_bootinfo(find_bootinfo());

	prep_init(r3, r4, r5, r6, r7);
}
#endif /* CONFIG_PPC_PREP */

struct bi_record *find_bootinfo(void)
{
	struct bi_record *rec;

	rec = (struct bi_record *)_ALIGN((ulong)__bss_start+(1<<20)-1,(1<<20));
	if ( rec->tag != BI_FIRST ) {
		/*
		 * This 0x10000 offset is a terrible hack but it will go away when
		 * we have the bootloader handle all the relocation and
		 * prom calls -- Cort
		 */
		rec = (struct bi_record *)_ALIGN((ulong)__bss_start+0x10000+(1<<20)-1,(1<<20));
		if ( rec->tag != BI_FIRST )
			return NULL;
	}
	return rec;
}

void parse_bootinfo(struct bi_record *rec)
{
	if (rec == NULL || rec->tag != BI_FIRST)
		return;
	while (rec->tag != BI_LAST) {
		ulong *data = rec->data;
		switch (rec->tag) {
		case BI_CMD_LINE:
			strlcpy(cmd_line, (void *)data, sizeof(cmd_line));
			break;
#ifdef CONFIG_BLK_DEV_INITRD
		case BI_INITRD:
			initrd_start = data[0] + KERNELBASE;
			initrd_end = data[0] + data[1] + KERNELBASE;
			break;
#endif /* CONFIG_BLK_DEV_INITRD */
		case BI_MEMSIZE:
			boot_mem_size = data[0];
			break;
		}
		rec = (struct bi_record *)((ulong)rec + rec->size);
	}
}

/*
 * Find out what kind of machine we're on and save any data we need
 * from the early boot process (devtree is copied on pmac by prom_init()).
 * This is called very early on the boot process, after a minimal
 * MMU environment has been set up but before MMU_init is called.
 */
void __init
machine_init(unsigned long r3, unsigned long r4, unsigned long r5,
	     unsigned long r6, unsigned long r7)
{
#ifdef CONFIG_CMDLINE
	strlcpy(cmd_line, CONFIG_CMDLINE, sizeof(cmd_line));
#endif /* CONFIG_CMDLINE */

#ifdef CONFIG_6xx
	ppc_md.power_save = ppc6xx_idle;
#endif

	platform_init(r3, r4, r5, r6, r7);

	if (ppc_md.progress)
		ppc_md.progress("id mach(): done", 0x200);
}
#ifdef CONFIG_BOOKE_WDT
/* Checks wdt=x and wdt_period=xx command-line option */
int __init early_parse_wdt(char *p)
{
	if (p && strncmp(p, "0", 1) != 0)
	       booke_wdt_enabled = 1;

	return 0;
}
early_param("wdt", early_parse_wdt);

int __init early_parse_wdt_period (char *p)
{
	if (p)
		booke_wdt_period = simple_strtoul(p, NULL, 0);

	return 0;
}
early_param("wdt_period", early_parse_wdt_period);
#endif	/* CONFIG_BOOKE_WDT */

/* Checks "l2cr=xxxx" command-line option */
int __init ppc_setup_l2cr(char *str)
{
	if (cpu_has_feature(CPU_FTR_L2CR)) {
		unsigned long val = simple_strtoul(str, NULL, 0);
		printk(KERN_INFO "l2cr set to %lx\n", val);
		_set_L2CR(0);		/* force invalidate by disable cache */
		_set_L2CR(val);		/* and enable it */
	}
	return 1;
}
__setup("l2cr=", ppc_setup_l2cr);

#ifdef CONFIG_GENERIC_NVRAM

/* Generic nvram hooks used by drivers/char/gen_nvram.c */
unsigned char nvram_read_byte(int addr)
{
	if (ppc_md.nvram_read_val)
		return ppc_md.nvram_read_val(addr);
	return 0xff;
}
EXPORT_SYMBOL(nvram_read_byte);

void nvram_write_byte(unsigned char val, int addr)
{
	if (ppc_md.nvram_write_val)
		ppc_md.nvram_write_val(addr, val);
}
EXPORT_SYMBOL(nvram_write_byte);

void nvram_sync(void)
{
	if (ppc_md.nvram_sync)
		ppc_md.nvram_sync();
}
EXPORT_SYMBOL(nvram_sync);

#endif /* CONFIG_NVRAM */

static struct cpu cpu_devices[NR_CPUS];

int __init ppc_init(void)
{
	int i;

	/* clear the progress line */
	if ( ppc_md.progress ) ppc_md.progress("             ", 0xffff);

	/* register CPU devices */
	for_each_possible_cpu(i)
		register_cpu(&cpu_devices[i], i);

	/* call platform init */
	if (ppc_md.init != NULL) {
		ppc_md.init();
	}
	return 0;
}

arch_initcall(ppc_init);

/* Warning, IO base is not yet inited */
void __init setup_arch(char **cmdline_p)
{
	extern char *klimit;
	extern void do_init_bootmem(void);

	/* so udelay does something sensible, assume <= 1000 bogomips */
	loops_per_jiffy = 500000000 / HZ;

	if (ppc_md.init_early)
		ppc_md.init_early();

#ifdef CONFIG_XMON
	xmon_init(1);
	if (strstr(cmd_line, "xmon"))
		xmon(NULL);
#endif /* CONFIG_XMON */
	if ( ppc_md.progress ) ppc_md.progress("setup_arch: enter", 0x3eab);

#if defined(CONFIG_KGDB)
	if (ppc_md.kgdb_map_scc)
		ppc_md.kgdb_map_scc();
	set_debug_traps();
	if (strstr(cmd_line, "gdb")) {
		if (ppc_md.progress)
			ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
		printk("kgdb breakpoint activated\n");
		breakpoint();
	}
#endif

	/*
	 * Set cache line size based on type of cpu as a default.
	 * Systems with OF can look in the properties on the cpu node(s)
	 * for a possibly more accurate value.
	 */
	if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
		dcache_bsize = cur_cpu_spec->dcache_bsize;
		icache_bsize = cur_cpu_spec->icache_bsize;
		ucache_bsize = 0;
	} else
		ucache_bsize = dcache_bsize = icache_bsize
			= cur_cpu_spec->dcache_bsize;

	/* reboot on panic */
	panic_timeout = 180;

	init_mm.start_code = PAGE_OFFSET;
	init_mm.end_code = (unsigned long) _etext;
	init_mm.end_data = (unsigned long) _edata;
	init_mm.brk = (unsigned long) klimit;

	/* Save unparsed command line copy for /proc/cmdline */
	strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
	*cmdline_p = cmd_line;

	parse_early_param();

	/* set up the bootmem stuff with available memory */
	do_init_bootmem();
	if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);

#ifdef CONFIG_PPC_OCP
	/* Initialize OCP device list */
	ocp_early_init();
	if ( ppc_md.progress ) ppc_md.progress("ocp: exit", 0x3eab);
#endif

#ifdef CONFIG_DUMMY_CONSOLE
	conswitchp = &dummy_con;
#endif

	ppc_md.setup_arch();
	if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);

	paging_init();
}
Commit	Line	Data
1da177e4	1	/*
0a26b136	2	* Common prep boot and setup code.
1da177e4 LT	3	*/
1da177e4 LT	4
1da177e4 LT	5	#include <linux/module.h>
	6	#include <linux/string.h>
	7	#include <linux/sched.h>
	8	#include <linux/init.h>
	9	#include <linux/kernel.h>
	10	#include <linux/reboot.h>
	11	#include <linux/delay.h>
	12	#include <linux/initrd.h>
	13	#include <linux/ide.h>
894673ee	14	#include <linux/screen_info.h>
1da177e4 LT	15	#include <linux/bootmem.h>
	16	#include <linux/seq_file.h>
	17	#include <linux/root_dev.h>
	18	#include <linux/cpu.h>
	19	#include <linux/console.h>
	20
	21	#include <asm/residual.h>
	22	#include <asm/io.h>
	23	#include <asm/prom.h>
	24	#include <asm/processor.h>
	25	#include <asm/pgtable.h>
	26	#include <asm/bootinfo.h>
	27	#include <asm/setup.h>
	28	#include <asm/amigappc.h>
	29	#include <asm/smp.h>
	30	#include <asm/elf.h>
	31	#include <asm/cputable.h>
	32	#include <asm/bootx.h>
	33	#include <asm/btext.h>
	34	#include <asm/machdep.h>
	35	#include <asm/uaccess.h>
	36	#include <asm/system.h>
1da177e4 LT	37	#include <asm/sections.h>
	38	#include <asm/nvram.h>
	39	#include <asm/xmon.h>
	40	#include <asm/ocp.h>
42c4aaad	41	#include <asm/prom.h>
1da177e4	42
8e8fff09 KG	43	#define USES_PPC_SYS (defined(CONFIG_85xx) \|\| defined(CONFIG_83xx) \|\| \
	44	defined(CONFIG_MPC10X_BRIDGE) \|\| defined(CONFIG_8260) \|\| \
	45	defined(CONFIG_PPC_MPC52xx))
	46
	47	#if USES_PPC_SYS
1da177e4 LT	48	#include <asm/ppc_sys.h>
	49	#endif
	50
	51	#if defined CONFIG_KGDB
	52	#include <asm/kgdb.h>
	53	#endif
	54
	55	extern void platform_init(unsigned long r3, unsigned long r4,
	56	unsigned long r5, unsigned long r6, unsigned long r7);
1da177e4 LT	57	extern void reloc_got2(unsigned long offset);
	58
	59	extern void ppc6xx_idle(void);
	60	extern void power4_idle(void);
	61
	62	extern boot_infos_t *boot_infos;
	63	struct ide_machdep_calls ppc_ide_md;
1da177e4 LT	64
	65	/* Used with the BI_MEMSIZE bootinfo parameter to store the memory
	66	size value reported by the boot loader. */
	67	unsigned long boot_mem_size;
	68
	69	unsigned long ISA_DMA_THRESHOLD;
b8f114db JL	70	unsigned int DMA_MODE_READ;
b8f114db JL	71	unsigned int DMA_MODE_WRITE;
1da177e4	72
0a26b136	73	#ifdef CONFIG_PPC_PREP
1da177e4 LT	74	extern void prep_init(unsigned long r3, unsigned long r4,
1da177e4 LT	75	unsigned long r5, unsigned long r6, unsigned long r7);
14cf11af PM	76
14cf11af PM	77	dev_t boot_dev;
0a26b136	78	#endif /* CONFIG_PPC_PREP */
1da177e4	79
fd582ec8 PM	80	int have_of;
	81	EXPORT_SYMBOL(have_of);
	82
35d81a4b PM	83	#ifdef __DO_IRQ_CANON
	84	int ppc_do_canonicalize_irqs;
	85	EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
	86	#endif
	87
1da177e4 LT	88	#ifdef CONFIG_VGA_CONSOLE
	89	unsigned long vgacon_remap_base;
	90	#endif
	91
	92	struct machdep_calls ppc_md;
	93
	94	/*
	95	* These are used in binfmt_elf.c to put aux entries on the stack
	96	* for each elf executable being started.
	97	*/
	98	int dcache_bsize;
	99	int icache_bsize;
	100	int ucache_bsize;
	101
	102	#if defined(CONFIG_VGA_CONSOLE) \|\| defined(CONFIG_FB_VGA16) \|\| \
	103	defined(CONFIG_FB_VGA16_MODULE) \|\| defined(CONFIG_FB_VESA)
	104	struct screen_info screen_info = {
	105	0, 25, /* orig-x, orig-y */
	106	0, /* unused */
	107	0, /* orig-video-page */
	108	0, /* orig-video-mode */
	109	80, /* orig-video-cols */
	110	0,0,0, /* ega_ax, ega_bx, ega_cx */
	111	25, /* orig-video-lines */
	112	1, /* orig-video-isVGA */
	113	16 /* orig-video-points */
	114	};
	115	#endif /* CONFIG_VGA_CONSOLE \|\| CONFIG_FB_VGA16 \|\| CONFIG_FB_VESA */
	116
	117	void machine_restart(char *cmd)
	118	{
	119	#ifdef CONFIG_NVRAM
	120	nvram_sync();
	121	#endif
	122	ppc_md.restart(cmd);
	123	}
	124
477bcae4	125	static void ppc_generic_power_off(void)
1da177e4	126	{
1da177e4 LT	127	ppc_md.power_off();
	128	}
	129
1da177e4 LT	130	void machine_halt(void)
	131	{
	132	#ifdef CONFIG_NVRAM
	133	nvram_sync();
	134	#endif
	135	ppc_md.halt();
	136	}
	137
477bcae4 CM	138	void (*pm_power_off)(void) = ppc_generic_power_off;
	139
	140	void machine_power_off(void)
	141	{
	142	#ifdef CONFIG_NVRAM
	143	nvram_sync();
	144	#endif
	145	if (pm_power_off)
	146	pm_power_off();
	147	ppc_generic_power_off();
	148	}
1da177e4 LT	149
	150	#ifdef CONFIG_TAU
	151	extern u32 cpu_temp(unsigned long cpu);
	152	extern u32 cpu_temp_both(unsigned long cpu);
	153	#endif /* CONFIG_TAU */
	154
	155	int show_cpuinfo(struct seq_file m, void v)
	156	{
	157	int i = (int) v - 1;
	158	int err = 0;
	159	unsigned int pvr;
	160	unsigned short maj, min;
	161	unsigned long lpj;
	162
	163	if (i >= NR_CPUS) {
	164	/* Show summary information */
	165	#ifdef CONFIG_SMP
	166	unsigned long bogosum = 0;
394e3902 AM	167	for_each_online_cpu(i)
394e3902 AM	168	bogosum += cpu_data[i].loops_per_jiffy;
1da177e4 LT	169	seq_printf(m, "total bogomips\t: %lu.%02lu\n",
	170	bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
	171	#endif /* CONFIG_SMP */
	172
	173	if (ppc_md.show_cpuinfo != NULL)
	174	err = ppc_md.show_cpuinfo(m);
	175	return err;
	176	}
	177
	178	#ifdef CONFIG_SMP
	179	if (!cpu_online(i))
	180	return 0;
	181	pvr = cpu_data[i].pvr;
	182	lpj = cpu_data[i].loops_per_jiffy;
	183	#else
	184	pvr = mfspr(SPRN_PVR);
	185	lpj = loops_per_jiffy;
	186	#endif
	187
	188	seq_printf(m, "processor\t: %d\n", i);
	189	seq_printf(m, "cpu\t\t: ");
	190
400d2212 KG	191	if (cur_cpu_spec->pvr_mask)
400d2212 KG	192	seq_printf(m, "%s", cur_cpu_spec->cpu_name);
1da177e4 LT	193	else
	194	seq_printf(m, "unknown (%08x)", pvr);
	195	#ifdef CONFIG_ALTIVEC
400d2212	196	if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
1da177e4 LT	197	seq_printf(m, ", altivec supported");
	198	#endif
	199	seq_printf(m, "\n");
	200
	201	#ifdef CONFIG_TAU
400d2212	202	if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
1da177e4 LT	203	#ifdef CONFIG_TAU_AVERAGE
	204	/* more straightforward, but potentially misleading */
	205	seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
	206	cpu_temp(i));
	207	#else
	208	/* show the actual temp sensor range */
	209	u32 temp;
	210	temp = cpu_temp_both(i);
	211	seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
	212	temp & 0xff, temp >> 16);
	213	#endif
	214	}
	215	#endif /* CONFIG_TAU */
	216
	217	if (ppc_md.show_percpuinfo != NULL) {
	218	err = ppc_md.show_percpuinfo(m, i);
	219	if (err)
	220	return err;
	221	}
	222
696c2b9f KG	223	/* If we are a Freescale core do a simple check so
	224	* we dont have to keep adding cases in the future */
	225	if ((PVR_VER(pvr) & 0x8000) == 0x8000) {
1da177e4 LT	226	maj = PVR_MAJ(pvr);
1da177e4 LT	227	min = PVR_MIN(pvr);
696c2b9f KG	228	} else {
	229	switch (PVR_VER(pvr)) {
	230	case 0x0020: /* 403 family */
	231	maj = PVR_MAJ(pvr) + 1;
	232	min = PVR_MIN(pvr);
	233	break;
	234	case 0x1008: /* 740P/750P ?? */
	235	maj = ((pvr >> 8) & 0xFF) - 1;
	236	min = pvr & 0xFF;
	237	break;
	238	default:
	239	maj = (pvr >> 8) & 0xFF;
	240	min = pvr & 0xFF;
	241	break;
	242	}
1da177e4 LT	243	}
	244
	245	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
	246	maj, min, PVR_VER(pvr), PVR_REV(pvr));
	247
	248	seq_printf(m, "bogomips\t: %lu.%02lu\n",
	249	lpj / (500000/HZ), (lpj / (5000/HZ)) % 100);
	250
8e8fff09	251	#if USES_PPC_SYS
1da177e4 LT	252	if (cur_ppc_sys_spec->ppc_sys_name)
	253	seq_printf(m, "chipset\t\t: %s\n",
	254	cur_ppc_sys_spec->ppc_sys_name);
	255	#endif
	256
	257	#ifdef CONFIG_SMP
	258	seq_printf(m, "\n");
	259	#endif
	260
	261	return 0;
	262	}
	263
	264	static void c_start(struct seq_file m, loff_t *pos)
	265	{
	266	int i = *pos;
	267
	268	return i <= NR_CPUS? (void *) (i + 1): NULL;
	269	}
	270
	271	static void c_next(struct seq_file m, void v, loff_t pos)
	272	{
	273	++*pos;
	274	return c_start(m, pos);
	275	}
	276
	277	static void c_stop(struct seq_file m, void v)
	278	{
	279	}
	280
	281	struct seq_operations cpuinfo_op = {
	282	.start =c_start,
	283	.next = c_next,
	284	.stop = c_stop,
	285	.show = show_cpuinfo,
	286	};
	287
	288	/*
	289	* We're called here very early in the boot. We determine the machine
	290	* type and call the appropriate low-level setup functions.
	291	* -- Cort <[email protected]>
	292	*
	293	* Note that the kernel may be running at an address which is different
	294	* from the address that it was linked at, so we must use RELOC/PTRRELOC
	295	* to access static data (including strings). -- paulus
	296	*/
	297	__init
	298	unsigned long
	299	early_init(int r3, int r4, int r5)
	300	{
	301	unsigned long phys;
	302	unsigned long offset = reloc_offset();
42c4aaad	303	struct cpu_spec *spec;
1da177e4 LT	304
	305	/* Default */
	306	phys = offset + KERNELBASE;
	307
	308	/* First zero the BSS -- use memset, some arches don't have
	309	* caches on yet */
	310	memset_io(PTRRELOC(&__bss_start), 0, _end - __bss_start);
	311
	312	/*
	313	* Identify the CPU type and fix up code sections
	314	* that depend on which cpu we have.
	315	*/
974a76f5	316	spec = identify_cpu(offset, mfspr(SPRN_PVR));
0909c8c2	317	do_feature_fixups(spec->cpu_features,
42c4aaad BH	318	PTRRELOC(&__start___ftr_fixup),
42c4aaad BH	319	PTRRELOC(&__stop___ftr_fixup));
1da177e4	320
1da177e4 LT	321	return phys;
	322	}
	323
0a26b136	324	#ifdef CONFIG_PPC_PREP
1da177e4	325	/*
0a26b136	326	* The PPC_PREP version of platform_init...
1da177e4 LT	327	*/
	328	void __init
	329	platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
	330	unsigned long r6, unsigned long r7)
	331	{
	332	#ifdef CONFIG_BOOTX_TEXT
	333	if (boot_text_mapped) {
	334	btext_clearscreen();
	335	btext_welcome();
	336	}
	337	#endif
	338
	339	parse_bootinfo(find_bootinfo());
	340
0a26b136	341	prep_init(r3, r4, r5, r6, r7);
1da177e4	342	}
0a26b136	343	#endif /* CONFIG_PPC_PREP */
1da177e4 LT	344
	345	struct bi_record *find_bootinfo(void)
	346	{
	347	struct bi_record *rec;
	348
	349	rec = (struct bi_record *)_ALIGN((ulong)__bss_start+(1<<20)-1,(1<<20));
	350	if ( rec->tag != BI_FIRST ) {
	351	/*
	352	* This 0x10000 offset is a terrible hack but it will go away when
	353	* we have the bootloader handle all the relocation and
	354	* prom calls -- Cort
	355	*/
	356	rec = (struct bi_record *)_ALIGN((ulong)__bss_start+0x10000+(1<<20)-1,(1<<20));
	357	if ( rec->tag != BI_FIRST )
	358	return NULL;
	359	}
	360	return rec;
	361	}
	362
	363	void parse_bootinfo(struct bi_record *rec)
	364	{
	365	if (rec == NULL \|\| rec->tag != BI_FIRST)
	366	return;
	367	while (rec->tag != BI_LAST) {
	368	ulong *data = rec->data;
	369	switch (rec->tag) {
	370	case BI_CMD_LINE:
	371	strlcpy(cmd_line, (void *)data, sizeof(cmd_line));
	372	break;
1da177e4 LT	373	#ifdef CONFIG_BLK_DEV_INITRD
	374	case BI_INITRD:
	375	initrd_start = data[0] + KERNELBASE;
	376	initrd_end = data[0] + data[1] + KERNELBASE;
	377	break;
	378	#endif /* CONFIG_BLK_DEV_INITRD */
1da177e4 LT	379	case BI_MEMSIZE:
	380	boot_mem_size = data[0];
	381	break;
	382	}
	383	rec = (struct bi_record *)((ulong)rec + rec->size);
	384	}
	385	}
	386
	387	/*
	388	* Find out what kind of machine we're on and save any data we need
	389	* from the early boot process (devtree is copied on pmac by prom_init()).
	390	* This is called very early on the boot process, after a minimal
	391	* MMU environment has been set up but before MMU_init is called.
	392	*/
	393	void __init
	394	machine_init(unsigned long r3, unsigned long r4, unsigned long r5,
	395	unsigned long r6, unsigned long r7)
	396	{
	397	#ifdef CONFIG_CMDLINE
	398	strlcpy(cmd_line, CONFIG_CMDLINE, sizeof(cmd_line));
	399	#endif /* CONFIG_CMDLINE */
	400
	401	#ifdef CONFIG_6xx
	402	ppc_md.power_save = ppc6xx_idle;
	403	#endif
1da177e4 LT	404
	405	platform_init(r3, r4, r5, r6, r7);
	406
	407	if (ppc_md.progress)
	408	ppc_md.progress("id mach(): done", 0x200);
	409	}
a2f40ccd KG	410	#ifdef CONFIG_BOOKE_WDT
	411	/* Checks wdt=x and wdt_period=xx command-line option */
	412	int __init early_parse_wdt(char *p)
	413	{
a2f40ccd	414	if (p && strncmp(p, "0", 1) != 0)
39cdc4bf	415	booke_wdt_enabled = 1;
a2f40ccd KG	416
	417	return 0;
	418	}
	419	early_param("wdt", early_parse_wdt);
	420
	421	int __init early_parse_wdt_period (char *p)
	422	{
a2f40ccd	423	if (p)
39cdc4bf	424	booke_wdt_period = simple_strtoul(p, NULL, 0);
a2f40ccd KG	425
	426	return 0;
	427	}
	428	early_param("wdt_period", early_parse_wdt_period);
	429	#endif /* CONFIG_BOOKE_WDT */
1da177e4 LT	430
	431	/* Checks "l2cr=xxxx" command-line option */
	432	int __init ppc_setup_l2cr(char *str)
	433	{
	434	if (cpu_has_feature(CPU_FTR_L2CR)) {
	435	unsigned long val = simple_strtoul(str, NULL, 0);
	436	printk(KERN_INFO "l2cr set to %lx\n", val);
	437	_set_L2CR(0); /* force invalidate by disable cache */
	438	_set_L2CR(val); /* and enable it */
	439	}
	440	return 1;
	441	}
	442	__setup("l2cr=", ppc_setup_l2cr);
	443
	444	#ifdef CONFIG_GENERIC_NVRAM
	445
	446	/* Generic nvram hooks used by drivers/char/gen_nvram.c */
	447	unsigned char nvram_read_byte(int addr)
	448	{
	449	if (ppc_md.nvram_read_val)
	450	return ppc_md.nvram_read_val(addr);
	451	return 0xff;
	452	}
	453	EXPORT_SYMBOL(nvram_read_byte);
	454
	455	void nvram_write_byte(unsigned char val, int addr)
	456	{
	457	if (ppc_md.nvram_write_val)
	458	ppc_md.nvram_write_val(addr, val);
	459	}
	460	EXPORT_SYMBOL(nvram_write_byte);
	461
	462	void nvram_sync(void)
	463	{
	464	if (ppc_md.nvram_sync)
	465	ppc_md.nvram_sync();
	466	}
	467	EXPORT_SYMBOL(nvram_sync);
	468
	469	#endif /* CONFIG_NVRAM */
	470
	471	static struct cpu cpu_devices[NR_CPUS];
	472
	473	int __init ppc_init(void)
	474	{
	475	int i;
	476
	477	/* clear the progress line */
	478	if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
	479
	480	/* register CPU devices */
b848e0a0	481	for_each_possible_cpu(i)
76b67ed9	482	register_cpu(&cpu_devices[i], i);
1da177e4 LT	483
	484	/* call platform init */
	485	if (ppc_md.init != NULL) {
	486	ppc_md.init();
	487	}
	488	return 0;
	489	}
	490
	491	arch_initcall(ppc_init);
	492
	493	/* Warning, IO base is not yet inited */
	494	void __init setup_arch(char **cmdline_p)
	495	{
	496	extern char *klimit;
	497	extern void do_init_bootmem(void);
	498
	499	/* so udelay does something sensible, assume <= 1000 bogomips */
	500	loops_per_jiffy = 500000000 / HZ;
	501
51d3082f BH	502	if (ppc_md.init_early)
	503	ppc_md.init_early();
	504
1da177e4	505	#ifdef CONFIG_XMON
fd582ec8	506	xmon_init(1);
1da177e4 LT	507	if (strstr(cmd_line, "xmon"))
	508	xmon(NULL);
	509	#endif /* CONFIG_XMON */
	510	if ( ppc_md.progress ) ppc_md.progress("setup_arch: enter", 0x3eab);
	511
	512	#if defined(CONFIG_KGDB)
	513	if (ppc_md.kgdb_map_scc)
	514	ppc_md.kgdb_map_scc();
	515	set_debug_traps();
	516	if (strstr(cmd_line, "gdb")) {
	517	if (ppc_md.progress)
	518	ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
	519	printk("kgdb breakpoint activated\n");
	520	breakpoint();
	521	}
	522	#endif
	523
	524	/*
	525	* Set cache line size based on type of cpu as a default.
	526	* Systems with OF can look in the properties on the cpu node(s)
	527	* for a possibly more accurate value.
	528	*/
	529	if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
400d2212 KG	530	dcache_bsize = cur_cpu_spec->dcache_bsize;
400d2212 KG	531	icache_bsize = cur_cpu_spec->icache_bsize;
1da177e4 LT	532	ucache_bsize = 0;
	533	} else
	534	ucache_bsize = dcache_bsize = icache_bsize
400d2212	535	= cur_cpu_spec->dcache_bsize;
1da177e4 LT	536
	537	/* reboot on panic */
	538	panic_timeout = 180;
	539
	540	init_mm.start_code = PAGE_OFFSET;
	541	init_mm.end_code = (unsigned long) _etext;
	542	init_mm.end_data = (unsigned long) _edata;
	543	init_mm.brk = (unsigned long) klimit;
	544
	545	/* Save unparsed command line copy for /proc/cmdline */
	546	strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
	547	*cmdline_p = cmd_line;
	548
19bbdf0e PM	549	parse_early_param();
19bbdf0e PM	550
1da177e4 LT	551	/* set up the bootmem stuff with available memory */
	552	do_init_bootmem();
	553	if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
	554
	555	#ifdef CONFIG_PPC_OCP
	556	/* Initialize OCP device list */
	557	ocp_early_init();
	558	if ( ppc_md.progress ) ppc_md.progress("ocp: exit", 0x3eab);
	559	#endif
	560
	561	#ifdef CONFIG_DUMMY_CONSOLE
	562	conswitchp = &dummy_con;
	563	#endif
	564
	565	ppc_md.setup_arch();
	566	if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
	567
	568	paging_init();
1da177e4	569	}