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[linux.git] / drivers / iio / resolver / ad2s1200.c
CommitLineData
ffd7a62f 1/*
10e4a52b
JC
2 * ad2s1200.c simple support for the ADI Resolver to Digital Converters:
3 * AD2S1200/1205
ffd7a62f 4 *
9c3e81ab 5 * Copyright (c) 2018-2018 David Veenstra <[email protected]>
ffd7a62f
GY
6 * Copyright (c) 2010-2010 Analog Devices Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
ffd7a62f 11 */
d99066e6 12
972c0c3a 13#include <linux/bitops.h>
ffd7a62f 14#include <linux/delay.h>
972c0c3a 15#include <linux/device.h>
ffd7a62f 16#include <linux/gpio.h>
5af93e6a 17#include <linux/gpio/consumer.h>
99c97852 18#include <linux/module.h>
972c0c3a
DV
19#include <linux/mutex.h>
20#include <linux/spi/spi.h>
21#include <linux/sysfs.h>
22#include <linux/types.h>
ffd7a62f 23
06458e27
JC
24#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h>
ffd7a62f 26
10e4a52b 27#define DRV_NAME "ad2s1200"
ffd7a62f 28
ffd7a62f 29/* input clock on serial interface */
10e4a52b 30#define AD2S1200_HZ 8192000
ffd7a62f 31/* clock period in nano second */
cdd6dee0 32#define AD2S1200_TSCLK (1000000000 / AD2S1200_HZ)
ffd7a62f 33
bc683b47
DV
34/**
35 * struct ad2s1200_state - driver instance specific data.
36 * @lock: protects both the GPIO pins and the rx buffer.
37 * @sdev: spi device.
38 * @sample: GPIO pin SAMPLE.
39 * @rdvel: GPIO pin RDVEL.
40 * @rx: buffer for spi transfers.
41 */
10e4a52b 42struct ad2s1200_state {
ffd7a62f 43 struct mutex lock;
ffd7a62f 44 struct spi_device *sdev;
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45 struct gpio_desc *sample;
46 struct gpio_desc *rdvel;
0bd3d338 47 __be16 rx ____cacheline_aligned;
ffd7a62f
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48};
49
9c5ed829 50static int ad2s1200_read_raw(struct iio_dev *indio_dev,
ae6394aa
ERR
51 struct iio_chan_spec const *chan,
52 int *val,
53 int *val2,
54 long m)
ffd7a62f 55{
05982255 56 struct ad2s1200_state *st = iio_priv(indio_dev);
c1b6a7d7 57 int ret;
ffd7a62f 58
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59 switch (m) {
60 case IIO_CHAN_INFO_SCALE:
61 switch (chan->type) {
f9db7370
DV
62 case IIO_ANGL:
63 /* 2 * Pi / (2^12 - 1) ~= 0.001534355 */
64 *val = 0;
65 *val2 = 1534355;
66 return IIO_VAL_INT_PLUS_NANO;
d3e6ed84
DV
67 case IIO_ANGL_VEL:
68 /* 2 * Pi ~= 6.283185 */
69 *val = 6;
70 *val2 = 283185;
71 return IIO_VAL_INT_PLUS_MICRO;
72 default:
73 return -EINVAL;
74 }
75 break;
76 case IIO_CHAN_INFO_RAW:
77 mutex_lock(&st->lock);
78 gpiod_set_value(st->sample, 0);
79
80 /* delay (6 * AD2S1200_TSCLK + 20) nano seconds */
81 udelay(1);
82 gpiod_set_value(st->sample, 1);
83 gpiod_set_value(st->rdvel, !!(chan->type == IIO_ANGL));
84
85 ret = spi_read(st->sdev, &st->rx, 2);
86 if (ret < 0) {
87 mutex_unlock(&st->lock);
88 return ret;
89 }
90
91 switch (chan->type) {
92 case IIO_ANGL:
93 *val = be16_to_cpup(&st->rx) >> 4;
94 break;
95 case IIO_ANGL_VEL:
96 *val = sign_extend32(be16_to_cpup(&st->rx) >> 4, 11);
97 break;
98 default:
99 mutex_unlock(&st->lock);
100 return -EINVAL;
101 }
102
103 /* delay (2 * AD2S1200_TSCLK + 20) ns for sample pulse */
104 udelay(1);
9c5ed829 105 mutex_unlock(&st->lock);
9c5ed829 106
d3e6ed84 107 return IIO_VAL_INT;
9c5ed829 108 default:
d3e6ed84 109 break;
8f2bd836 110 }
d99066e6 111
d3e6ed84 112 return -EINVAL;
ffd7a62f
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113}
114
9c5ed829
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115static const struct iio_chan_spec ad2s1200_channels[] = {
116 {
117 .type = IIO_ANGL,
118 .indexed = 1,
119 .channel = 0,
910b51f3 120 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
f9db7370 121 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
9c5ed829
JC
122 }, {
123 .type = IIO_ANGL_VEL,
124 .indexed = 1,
125 .channel = 0,
910b51f3 126 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
d3e6ed84 127 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
9c5ed829 128 }
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129};
130
10e4a52b 131static const struct iio_info ad2s1200_info = {
67cba026 132 .read_raw = ad2s1200_read_raw,
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JC
133};
134
4ae1c61f 135static int ad2s1200_probe(struct spi_device *spi)
ffd7a62f 136{
10e4a52b 137 struct ad2s1200_state *st;
8f2bd836 138 struct iio_dev *indio_dev;
1946980b 139 int ret;
d99066e6 140
8d1b0b48
SK
141 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
142 if (!indio_dev)
143 return -ENOMEM;
d99066e6 144
8f2bd836
JC
145 spi_set_drvdata(spi, indio_dev);
146 st = iio_priv(indio_dev);
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147 mutex_init(&st->lock);
148 st->sdev = spi;
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DV
149
150 st->sample = devm_gpiod_get(&spi->dev, "adi,sample", GPIOD_OUT_LOW);
151 if (IS_ERR(st->sample)) {
152 dev_err(&spi->dev, "Failed to claim SAMPLE gpio: err=%ld\n",
153 PTR_ERR(st->sample));
154 return PTR_ERR(st->sample);
155 }
156
157 st->rdvel = devm_gpiod_get(&spi->dev, "adi,rdvel", GPIOD_OUT_LOW);
158 if (IS_ERR(st->rdvel)) {
159 dev_err(&spi->dev, "Failed to claim RDVEL gpio: err=%ld\n",
160 PTR_ERR(st->rdvel));
161 return PTR_ERR(st->rdvel);
162 }
ffd7a62f 163
8f2bd836 164 indio_dev->dev.parent = &spi->dev;
10e4a52b 165 indio_dev->info = &ad2s1200_info;
8f2bd836 166 indio_dev->modes = INDIO_DIRECT_MODE;
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167 indio_dev->channels = ad2s1200_channels;
168 indio_dev->num_channels = ARRAY_SIZE(ad2s1200_channels);
10e4a52b 169 indio_dev->name = spi_get_device_id(spi)->name;
ffd7a62f 170
10e4a52b 171 spi->max_speed_hz = AD2S1200_HZ;
ffd7a62f 172 spi->mode = SPI_MODE_3;
94cdefa8
DV
173 ret = spi_setup(spi);
174
175 if (ret < 0) {
176 dev_err(&spi->dev, "spi_setup failed!\n");
177 return ret;
178 }
ffd7a62f 179
94cdefa8 180 return devm_iio_device_register(&spi->dev, indio_dev);
ffd7a62f
GY
181}
182
2363c010
DV
183static const struct of_device_id ad2s1200_of_match[] = {
184 { .compatible = "adi,ad2s1200", },
185 { .compatible = "adi,ad2s1205", },
186 { }
187};
188MODULE_DEVICE_TABLE(of, ad2s1200_of_match);
189
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JC
190static const struct spi_device_id ad2s1200_id[] = {
191 { "ad2s1200" },
192 { "ad2s1205" },
193 {}
194};
55e4390c 195MODULE_DEVICE_TABLE(spi, ad2s1200_id);
10e4a52b
JC
196
197static struct spi_driver ad2s1200_driver = {
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198 .driver = {
199 .name = DRV_NAME,
2363c010 200 .of_match_table = of_match_ptr(ad2s1200_of_match),
ffd7a62f 201 },
10e4a52b 202 .probe = ad2s1200_probe,
10e4a52b 203 .id_table = ad2s1200_id,
ffd7a62f 204};
ae6ae6fe 205module_spi_driver(ad2s1200_driver);
ffd7a62f 206
9c3e81ab 207MODULE_AUTHOR("David Veenstra <[email protected]>");
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208MODULE_AUTHOR("Graff Yang <[email protected]>");
209MODULE_DESCRIPTION("Analog Devices AD2S1200/1205 Resolver to Digital SPI driver");
210MODULE_LICENSE("GPL v2");
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