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669a5db4 JG |
1 | /* |
2 | * ata_generic.c - Generic PATA/SATA controller driver. | |
3 | * Copyright 2005 Red Hat Inc <[email protected]>, all rights reserved. | |
4 | * | |
85cd7251 | 5 | * Elements from ide/pci/generic.c |
669a5db4 JG |
6 | * Copyright (C) 2001-2002 Andre Hedrick <[email protected]> |
7 | * Portions (C) Copyright 2002 Red Hat Inc <[email protected]> | |
8 | * | |
9 | * May be copied or modified under the terms of the GNU General Public License | |
85cd7251 | 10 | * |
669a5db4 JG |
11 | * Driver for PCI IDE interfaces implementing the standard bus mastering |
12 | * interface functionality. This assumes the BIOS did the drive set up and | |
13 | * tuning for us. By default we do not grab all IDE class devices as they | |
14 | * may have other drivers or need fixups to avoid problems. Instead we keep | |
15 | * a default list of stuff without documentation/driver that appears to | |
85cd7251 | 16 | * work. |
669a5db4 JG |
17 | */ |
18 | ||
19 | #include <linux/kernel.h> | |
20 | #include <linux/module.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/blkdev.h> | |
24 | #include <linux/delay.h> | |
25 | #include <scsi/scsi_host.h> | |
26 | #include <linux/libata.h> | |
27 | ||
28 | #define DRV_NAME "ata_generic" | |
2a3103ce | 29 | #define DRV_VERSION "0.2.13" |
669a5db4 JG |
30 | |
31 | /* | |
32 | * A generic parallel ATA driver using libata | |
33 | */ | |
34 | ||
669a5db4 JG |
35 | /** |
36 | * generic_set_mode - mode setting | |
0260731f | 37 | * @link: link to set up |
b229a7b0 | 38 | * @unused: returned device on error |
669a5db4 JG |
39 | * |
40 | * Use a non standard set_mode function. We don't want to be tuned. | |
41 | * The BIOS configured everything. Our job is not to fiddle. We | |
42 | * read the dma enabled bits from the PCI configuration of the device | |
85cd7251 | 43 | * and respect them. |
669a5db4 | 44 | */ |
85cd7251 | 45 | |
0260731f | 46 | static int generic_set_mode(struct ata_link *link, struct ata_device **unused) |
669a5db4 | 47 | { |
0260731f | 48 | struct ata_port *ap = link->ap; |
669a5db4 | 49 | int dma_enabled = 0; |
f58229f8 | 50 | struct ata_device *dev; |
669a5db4 JG |
51 | |
52 | /* Bits 5 and 6 indicate if DMA is active on master/slave */ | |
53 | if (ap->ioaddr.bmdma_addr) | |
d6f4d5ea | 54 | dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
85cd7251 | 55 | |
0260731f | 56 | ata_link_for_each_dev(dev, link) { |
9666f400 | 57 | if (ata_dev_enabled(dev)) { |
669a5db4 JG |
58 | /* We don't really care */ |
59 | dev->pio_mode = XFER_PIO_0; | |
60 | dev->dma_mode = XFER_MW_DMA_0; | |
85cd7251 | 61 | /* We do need the right mode information for DMA or PIO |
669a5db4 | 62 | and this comes from the current configuration flags */ |
f58229f8 | 63 | if (dma_enabled & (1 << (5 + dev->devno))) { |
616ece2e | 64 | ata_id_to_dma_mode(dev, XFER_MW_DMA_0); |
669a5db4 JG |
65 | dev->flags &= ~ATA_DFLAG_PIO; |
66 | } else { | |
616ece2e | 67 | ata_dev_printk(dev, KERN_INFO, "configured for PIO\n"); |
669a5db4 JG |
68 | dev->xfer_mode = XFER_PIO_0; |
69 | dev->xfer_shift = ATA_SHIFT_PIO; | |
70 | dev->flags |= ATA_DFLAG_PIO; | |
71 | } | |
72 | } | |
73 | } | |
b229a7b0 | 74 | return 0; |
669a5db4 JG |
75 | } |
76 | ||
77 | static struct scsi_host_template generic_sht = { | |
78 | .module = THIS_MODULE, | |
79 | .name = DRV_NAME, | |
80 | .ioctl = ata_scsi_ioctl, | |
81 | .queuecommand = ata_scsi_queuecmd, | |
82 | .can_queue = ATA_DEF_QUEUE, | |
83 | .this_id = ATA_SHT_THIS_ID, | |
84 | .sg_tablesize = LIBATA_MAX_PRD, | |
669a5db4 JG |
85 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
86 | .emulated = ATA_SHT_EMULATED, | |
87 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
88 | .proc_name = DRV_NAME, | |
89 | .dma_boundary = ATA_DMA_BOUNDARY, | |
90 | .slave_configure = ata_scsi_slave_config, | |
afdfe899 | 91 | .slave_destroy = ata_scsi_slave_destroy, |
669a5db4 JG |
92 | .bios_param = ata_std_bios_param, |
93 | }; | |
94 | ||
95 | static struct ata_port_operations generic_port_ops = { | |
96 | .set_mode = generic_set_mode, | |
85cd7251 | 97 | |
669a5db4 JG |
98 | .tf_load = ata_tf_load, |
99 | .tf_read = ata_tf_read, | |
100 | .check_status = ata_check_status, | |
101 | .exec_command = ata_exec_command, | |
102 | .dev_select = ata_std_dev_select, | |
103 | ||
104 | .bmdma_setup = ata_bmdma_setup, | |
105 | .bmdma_start = ata_bmdma_start, | |
106 | .bmdma_stop = ata_bmdma_stop, | |
107 | .bmdma_status = ata_bmdma_status, | |
85cd7251 | 108 | |
0d5ff566 | 109 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
110 | |
111 | .freeze = ata_bmdma_freeze, | |
112 | .thaw = ata_bmdma_thaw, | |
eb4a2c7f | 113 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 114 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
eb4a2c7f | 115 | .cable_detect = ata_cable_unknown, |
669a5db4 JG |
116 | |
117 | .qc_prep = ata_qc_prep, | |
118 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 119 | |
669a5db4 JG |
120 | .irq_handler = ata_interrupt, |
121 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 122 | .irq_on = ata_irq_on, |
669a5db4 | 123 | |
81ad1837 | 124 | .port_start = ata_sff_port_start, |
85cd7251 JG |
125 | }; |
126 | ||
669a5db4 JG |
127 | static int all_generic_ide; /* Set to claim all devices */ |
128 | ||
129 | /** | |
130 | * ata_generic_init - attach generic IDE | |
131 | * @dev: PCI device found | |
132 | * @id: match entry | |
133 | * | |
134 | * Called each time a matching IDE interface is found. We check if the | |
85cd7251 | 135 | * interface is one we wish to claim and if so we perform any chip |
669a5db4 JG |
136 | * specific hacks then let the ATA layer do the heavy lifting. |
137 | */ | |
85cd7251 | 138 | |
669a5db4 JG |
139 | static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
140 | { | |
141 | u16 command; | |
1626aeb8 | 142 | static const struct ata_port_info info = { |
669a5db4 | 143 | .sht = &generic_sht, |
1d2808fd | 144 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
145 | .pio_mask = 0x1f, |
146 | .mwdma_mask = 0x07, | |
bf6263a8 | 147 | .udma_mask = ATA_UDMA5, |
669a5db4 JG |
148 | .port_ops = &generic_port_ops |
149 | }; | |
1626aeb8 | 150 | const struct ata_port_info *ppi[] = { &info, NULL }; |
85cd7251 | 151 | |
669a5db4 JG |
152 | /* Don't use the generic entry unless instructed to do so */ |
153 | if (id->driver_data == 1 && all_generic_ide == 0) | |
154 | return -ENODEV; | |
155 | ||
156 | /* Devices that need care */ | |
157 | if (dev->vendor == PCI_VENDOR_ID_UMC && | |
158 | dev->device == PCI_DEVICE_ID_UMC_UM8886A && | |
159 | (!(PCI_FUNC(dev->devfn) & 1))) | |
160 | return -ENODEV; | |
161 | ||
162 | if (dev->vendor == PCI_VENDOR_ID_OPTI && | |
163 | dev->device == PCI_DEVICE_ID_OPTI_82C558 && | |
164 | (!(PCI_FUNC(dev->devfn) & 1))) | |
165 | return -ENODEV; | |
166 | ||
167 | /* Don't re-enable devices in generic mode or we will break some | |
168 | motherboards with disabled and unused IDE controllers */ | |
169 | pci_read_config_word(dev, PCI_COMMAND, &command); | |
170 | if (!(command & PCI_COMMAND_IO)) | |
171 | return -ENODEV; | |
85cd7251 | 172 | |
669a5db4 JG |
173 | if (dev->vendor == PCI_VENDOR_ID_AL) |
174 | ata_pci_clear_simplex(dev); | |
175 | ||
1626aeb8 | 176 | return ata_pci_init_one(dev, ppi); |
669a5db4 JG |
177 | } |
178 | ||
179 | static struct pci_device_id ata_generic[] = { | |
180 | { PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), }, | |
181 | { PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), }, | |
85cd7251 | 182 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8673F), }, |
669a5db4 JG |
183 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886A), }, |
184 | { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF), }, | |
185 | { PCI_DEVICE(PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), }, | |
186 | { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), }, | |
187 | { PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), }, | |
188 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO), }, | |
189 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), }, | |
190 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), }, | |
191 | /* Must come last. If you add entries adjust this table appropriately */ | |
192 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 1}, | |
193 | { 0, }, | |
194 | }; | |
195 | ||
196 | static struct pci_driver ata_generic_pci_driver = { | |
197 | .name = DRV_NAME, | |
198 | .id_table = ata_generic, | |
199 | .probe = ata_generic_init_one, | |
30ced0f0 | 200 | .remove = ata_pci_remove_one, |
438ac6d5 | 201 | #ifdef CONFIG_PM |
30ced0f0 AC |
202 | .suspend = ata_pci_device_suspend, |
203 | .resume = ata_pci_device_resume, | |
438ac6d5 | 204 | #endif |
669a5db4 JG |
205 | }; |
206 | ||
207 | static int __init ata_generic_init(void) | |
208 | { | |
3f03c671 | 209 | return pci_register_driver(&ata_generic_pci_driver); |
669a5db4 JG |
210 | } |
211 | ||
212 | ||
213 | static void __exit ata_generic_exit(void) | |
214 | { | |
215 | pci_unregister_driver(&ata_generic_pci_driver); | |
216 | } | |
217 | ||
218 | ||
219 | MODULE_AUTHOR("Alan Cox"); | |
220 | MODULE_DESCRIPTION("low-level driver for generic ATA"); | |
221 | MODULE_LICENSE("GPL"); | |
222 | MODULE_DEVICE_TABLE(pci, ata_generic); | |
223 | MODULE_VERSION(DRV_VERSION); | |
224 | ||
225 | module_init(ata_generic_init); | |
226 | module_exit(ata_generic_exit); | |
227 | ||
228 | module_param(all_generic_ide, int, 0); |