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Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
[linux.git] / drivers / net / cnic.c
CommitLineData
a4636960
MC		 1/* cnic.c: Broadcom CNIC core network driver.
2 *
3 * Copyright (c) 2006-2009 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Original skeleton written by: John(Zongxi) Chen ([email protected])
10 * Modified and maintained by: Michael Chan <[email protected]>
11 */
12
13#include <linux/module.h>
14
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/slab.h>
19#include <linux/pci.h>
20#include <linux/init.h>
21#include <linux/netdevice.h>
22#include <linux/uio_driver.h>
23#include <linux/in.h>
24#include <linux/dma-mapping.h>
25#include <linux/delay.h>
26#include <linux/ethtool.h>
27#include <linux/if_vlan.h>
28#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
29#define BCM_VLAN 1
30#endif
31#include <net/ip.h>
32#include <net/tcp.h>
33#include <net/route.h>
34#include <net/ipv6.h>
35#include <net/ip6_route.h>
c05e85a0 36#include <net/ip6_checksum.h>
a4636960
MC		 37#include <scsi/iscsi_if.h>
38
39#include "cnic_if.h"
40#include "bnx2.h"
e2513065
MC		 41#include "bnx2x_reg.h"
42#include "bnx2x_fw_defs.h"
43#include "bnx2x_hsi.h"
44#include "../scsi/bnx2i/57xx_iscsi_constants.h"
45#include "../scsi/bnx2i/57xx_iscsi_hsi.h"
a4636960
MC		 46#include "cnic.h"
47#include "cnic_defs.h"
48
49#define DRV_MODULE_NAME "cnic"
50#define PFX DRV_MODULE_NAME ": "
51
52static char version[] __devinitdata =
53 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
54
55MODULE_AUTHOR("Michael Chan <[email protected]> and John(Zongxi) "
56 "Chen ([email protected]");
57MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
58MODULE_LICENSE("GPL");
59MODULE_VERSION(CNIC_MODULE_VERSION);
60
61static LIST_HEAD(cnic_dev_list);
62static DEFINE_RWLOCK(cnic_dev_lock);
63static DEFINE_MUTEX(cnic_lock);
64
65static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
66
67static int cnic_service_bnx2(void *, void *);
71034ba8 68static int cnic_service_bnx2x(void *, void *);
a4636960
MC		 69static int cnic_ctl(void *, struct cnic_ctl_info *);
70
71static struct cnic_ops cnic_bnx2_ops = {
72 .cnic_owner = THIS_MODULE,
73 .cnic_handler = cnic_service_bnx2,
74 .cnic_ctl = cnic_ctl,
75};
76
71034ba8
MC		 77static struct cnic_ops cnic_bnx2x_ops = {
78 .cnic_owner = THIS_MODULE,
79 .cnic_handler = cnic_service_bnx2x,
80 .cnic_ctl = cnic_ctl,
81};
82
86b53606
MC		 83static void cnic_shutdown_rings(struct cnic_dev *);
84static void cnic_init_rings(struct cnic_dev *);
a4636960
MC		 85static int cnic_cm_set_pg(struct cnic_sock *);
86
87static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
88{
89 struct cnic_dev *dev = uinfo->priv;
90 struct cnic_local *cp = dev->cnic_priv;
91
92 if (!capable(CAP_NET_ADMIN))
93 return -EPERM;
94
95 if (cp->uio_dev != -1)
96 return -EBUSY;
97
86b53606
MC		 98 rtnl_lock();
99 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
100 rtnl_unlock();
101 return -ENODEV;
102 }
103
a4636960
MC		 104 cp->uio_dev = iminor(inode);
105
86b53606
MC		 106 cnic_init_rings(dev);
107 rtnl_unlock();
a4636960
MC		 108
109 return 0;
110}
111
112static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
113{
114 struct cnic_dev *dev = uinfo->priv;
115 struct cnic_local *cp = dev->cnic_priv;
116
86b53606 117 cnic_shutdown_rings(dev);
6ef57a0e 118
a4636960
MC		 119 cp->uio_dev = -1;
120 return 0;
121}
122
123static inline void cnic_hold(struct cnic_dev *dev)
124{
125 atomic_inc(&dev->ref_count);
126}
127
128static inline void cnic_put(struct cnic_dev *dev)
129{
130 atomic_dec(&dev->ref_count);
131}
132
133static inline void csk_hold(struct cnic_sock *csk)
134{
135 atomic_inc(&csk->ref_count);
136}
137
138static inline void csk_put(struct cnic_sock *csk)
139{
140 atomic_dec(&csk->ref_count);
141}
142
143static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
144{
145 struct cnic_dev *cdev;
146
147 read_lock(&cnic_dev_lock);
148 list_for_each_entry(cdev, &cnic_dev_list, list) {
149 if (netdev == cdev->netdev) {
150 cnic_hold(cdev);
151 read_unlock(&cnic_dev_lock);
152 return cdev;
153 }
154 }
155 read_unlock(&cnic_dev_lock);
156 return NULL;
157}
158
7fc1ece4
MC		 159static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
160{
161 atomic_inc(&ulp_ops->ref_count);
162}
163
164static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
165{
166 atomic_dec(&ulp_ops->ref_count);
167}
168
a4636960
MC		 169static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
170{
171 struct cnic_local *cp = dev->cnic_priv;
172 struct cnic_eth_dev *ethdev = cp->ethdev;
173 struct drv_ctl_info info;
174 struct drv_ctl_io *io = &info.data.io;
175
176 info.cmd = DRV_CTL_CTX_WR_CMD;
177 io->cid_addr = cid_addr;
178 io->offset = off;
179 io->data = val;
180 ethdev->drv_ctl(dev->netdev, &info);
181}
182
71034ba8
MC		 183static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
184{
185 struct cnic_local *cp = dev->cnic_priv;
186 struct cnic_eth_dev *ethdev = cp->ethdev;
187 struct drv_ctl_info info;
188 struct drv_ctl_io *io = &info.data.io;
189
190 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
191 io->offset = off;
192 io->dma_addr = addr;
193 ethdev->drv_ctl(dev->netdev, &info);
194}
195
196static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
197{
198 struct cnic_local *cp = dev->cnic_priv;
199 struct cnic_eth_dev *ethdev = cp->ethdev;
200 struct drv_ctl_info info;
201 struct drv_ctl_l2_ring *ring = &info.data.ring;
202
203 if (start)
204 info.cmd = DRV_CTL_START_L2_CMD;
205 else
206 info.cmd = DRV_CTL_STOP_L2_CMD;
207
208 ring->cid = cid;
209 ring->client_id = cl_id;
210 ethdev->drv_ctl(dev->netdev, &info);
211}
212
a4636960
MC		 213static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
214{
215 struct cnic_local *cp = dev->cnic_priv;
216 struct cnic_eth_dev *ethdev = cp->ethdev;
217 struct drv_ctl_info info;
218 struct drv_ctl_io *io = &info.data.io;
219
220 info.cmd = DRV_CTL_IO_WR_CMD;
221 io->offset = off;
222 io->data = val;
223 ethdev->drv_ctl(dev->netdev, &info);
224}
225
226static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
227{
228 struct cnic_local *cp = dev->cnic_priv;
229 struct cnic_eth_dev *ethdev = cp->ethdev;
230 struct drv_ctl_info info;
231 struct drv_ctl_io *io = &info.data.io;
232
233 info.cmd = DRV_CTL_IO_RD_CMD;
234 io->offset = off;
235 ethdev->drv_ctl(dev->netdev, &info);
236 return io->data;
237}
238
239static int cnic_in_use(struct cnic_sock *csk)
240{
241 return test_bit(SK_F_INUSE, &csk->flags);
242}
243
244static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
245{
246 struct cnic_local *cp = dev->cnic_priv;
247 struct cnic_eth_dev *ethdev = cp->ethdev;
248 struct drv_ctl_info info;
249
250 info.cmd = DRV_CTL_COMPLETION_CMD;
251 info.data.comp.comp_count = count;
252 ethdev->drv_ctl(dev->netdev, &info);
253}
254
71034ba8
MC		 255static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
256{
257 u32 i;
258
259 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
260 if (cp->ctx_tbl[i].cid == cid) {
261 *l5_cid = i;
262 return 0;
263 }
264 }
265 return -EINVAL;
266}
267
a4636960
MC		 268static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
269 struct cnic_sock *csk)
270{
271 struct iscsi_path path_req;
272 char *buf = NULL;
273 u16 len = 0;
274 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
275 struct cnic_ulp_ops *ulp_ops;
276
277 if (cp->uio_dev == -1)
278 return -ENODEV;
279
280 if (csk) {
281 len = sizeof(path_req);
282 buf = (char *) &path_req;
283 memset(&path_req, 0, len);
284
285 msg_type = ISCSI_KEVENT_PATH_REQ;
286 path_req.handle = (u64) csk->l5_cid;
287 if (test_bit(SK_F_IPV6, &csk->flags)) {
288 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
289 sizeof(struct in6_addr));
290 path_req.ip_addr_len = 16;
291 } else {
292 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
293 sizeof(struct in_addr));
294 path_req.ip_addr_len = 4;
295 }
296 path_req.vlan_id = csk->vlan_id;
297 path_req.pmtu = csk->mtu;
298 }
299
300 rcu_read_lock();
6d7760a8 301 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
a4636960
MC		 302 if (ulp_ops)
303 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
304 rcu_read_unlock();
305 return 0;
306}
307
308static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
309 char *buf, u16 len)
310{
311 int rc = -EINVAL;
312
313 switch (msg_type) {
314 case ISCSI_UEVENT_PATH_UPDATE: {
315 struct cnic_local *cp;
316 u32 l5_cid;
317 struct cnic_sock *csk;
318 struct iscsi_path *path_resp;
319
320 if (len < sizeof(*path_resp))
321 break;
322
323 path_resp = (struct iscsi_path *) buf;
324 cp = dev->cnic_priv;
325 l5_cid = (u32) path_resp->handle;
326 if (l5_cid >= MAX_CM_SK_TBL_SZ)
327 break;
328
329 csk = &cp->csk_tbl[l5_cid];
330 csk_hold(csk);
331 if (cnic_in_use(csk)) {
332 memcpy(csk->ha, path_resp->mac_addr, 6);
333 if (test_bit(SK_F_IPV6, &csk->flags))
334 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
335 sizeof(struct in6_addr));
336 else
337 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
338 sizeof(struct in_addr));
339 if (is_valid_ether_addr(csk->ha))
340 cnic_cm_set_pg(csk);
341 }
342 csk_put(csk);
343 rc = 0;
344 }
345 }
346
347 return rc;
348}
349
350static int cnic_offld_prep(struct cnic_sock *csk)
351{
352 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
353 return 0;
354
355 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
356 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
357 return 0;
358 }
359
360 return 1;
361}
362
363static int cnic_close_prep(struct cnic_sock *csk)
364{
365 clear_bit(SK_F_CONNECT_START, &csk->flags);
366 smp_mb__after_clear_bit();
367
368 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
369 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
370 msleep(1);
371
372 return 1;
373 }
374 return 0;
375}
376
377static int cnic_abort_prep(struct cnic_sock *csk)
378{
379 clear_bit(SK_F_CONNECT_START, &csk->flags);
380 smp_mb__after_clear_bit();
381
382 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
383 msleep(1);
384
385 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
386 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
387 return 1;
388 }
389
390 return 0;
391}
392
6d7760a8
MC		 393static void cnic_uio_stop(void)
394{
395 struct cnic_dev *dev;
396
397 read_lock(&cnic_dev_lock);
398 list_for_each_entry(dev, &cnic_dev_list, list) {
399 struct cnic_local *cp = dev->cnic_priv;
400
401 if (cp->cnic_uinfo)
402 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
403 }
404 read_unlock(&cnic_dev_lock);
405}
406
a4636960
MC		 407int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
408{
409 struct cnic_dev *dev;
410
0d37f36f 411 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
a4636960
MC		 412 printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
413 ulp_type);
414 return -EINVAL;
415 }
416 mutex_lock(&cnic_lock);
417 if (cnic_ulp_tbl[ulp_type]) {
418 printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
419 "been registered\n", ulp_type);
420 mutex_unlock(&cnic_lock);
421 return -EBUSY;
422 }
423
424 read_lock(&cnic_dev_lock);
425 list_for_each_entry(dev, &cnic_dev_list, list) {
426 struct cnic_local *cp = dev->cnic_priv;
427
428 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
429 }
430 read_unlock(&cnic_dev_lock);
431
7fc1ece4 432 atomic_set(&ulp_ops->ref_count, 0);
a4636960
MC		 433 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
434 mutex_unlock(&cnic_lock);
435
436 /* Prevent race conditions with netdev_event */
437 rtnl_lock();
438 read_lock(&cnic_dev_lock);
439 list_for_each_entry(dev, &cnic_dev_list, list) {
440 struct cnic_local *cp = dev->cnic_priv;
441
442 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
443 ulp_ops->cnic_init(dev);
444 }
445 read_unlock(&cnic_dev_lock);
446 rtnl_unlock();
447
448 return 0;
449}
450
451int cnic_unregister_driver(int ulp_type)
452{
453 struct cnic_dev *dev;
7fc1ece4
MC		 454 struct cnic_ulp_ops *ulp_ops;
455 int i = 0;
a4636960 456
0d37f36f 457 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
a4636960
MC		 458 printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
459 ulp_type);
460 return -EINVAL;
461 }
462 mutex_lock(&cnic_lock);
7fc1ece4
MC		 463 ulp_ops = cnic_ulp_tbl[ulp_type];
464 if (!ulp_ops) {
a4636960
MC		 465 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
466 "been registered\n", ulp_type);
467 goto out_unlock;
468 }
469 read_lock(&cnic_dev_lock);
470 list_for_each_entry(dev, &cnic_dev_list, list) {
471 struct cnic_local *cp = dev->cnic_priv;
472
473 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
474 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
475 "still has devices registered\n", ulp_type);
476 read_unlock(&cnic_dev_lock);
477 goto out_unlock;
478 }
479 }
480 read_unlock(&cnic_dev_lock);
481
6d7760a8
MC		 482 if (ulp_type == CNIC_ULP_ISCSI)
483 cnic_uio_stop();
484
a4636960
MC		 485 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
486
487 mutex_unlock(&cnic_lock);
488 synchronize_rcu();
7fc1ece4
MC		 489 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
490 msleep(100);
491 i++;
492 }
493
494 if (atomic_read(&ulp_ops->ref_count) != 0)
495 printk(KERN_WARNING PFX "%s: Failed waiting for ref count to go"
496 " to zero.\n", dev->netdev->name);
a4636960
MC		 497 return 0;
498
499out_unlock:
500 mutex_unlock(&cnic_lock);
501 return -EINVAL;
502}
503
504static int cnic_start_hw(struct cnic_dev *);
505static void cnic_stop_hw(struct cnic_dev *);
506
507static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
508 void *ulp_ctx)
509{
510 struct cnic_local *cp = dev->cnic_priv;
511 struct cnic_ulp_ops *ulp_ops;
512
0d37f36f 513 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
a4636960
MC		 514 printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
515 ulp_type);
516 return -EINVAL;
517 }
518 mutex_lock(&cnic_lock);
519 if (cnic_ulp_tbl[ulp_type] == NULL) {
520 printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
521 "has not been registered\n", ulp_type);
522 mutex_unlock(&cnic_lock);
523 return -EAGAIN;
524 }
525 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
526 printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
527 "been registered to this device\n", ulp_type);
528 mutex_unlock(&cnic_lock);
529 return -EBUSY;
530 }
531
532 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
533 cp->ulp_handle[ulp_type] = ulp_ctx;
534 ulp_ops = cnic_ulp_tbl[ulp_type];
535 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
536 cnic_hold(dev);
537
538 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
539 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
540 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
541
542 mutex_unlock(&cnic_lock);
543
544 return 0;
545
546}
547EXPORT_SYMBOL(cnic_register_driver);
548
549static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
550{
551 struct cnic_local *cp = dev->cnic_priv;
681dbd71 552 int i = 0;
a4636960 553
0d37f36f 554 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
a4636960
MC		 555 printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
556 ulp_type);
557 return -EINVAL;
558 }
559 mutex_lock(&cnic_lock);
560 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
561 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
562 cnic_put(dev);
563 } else {
564 printk(KERN_ERR PFX "cnic_unregister_device: device not "
565 "registered to this ulp type %d\n", ulp_type);
566 mutex_unlock(&cnic_lock);
567 return -EINVAL;
568 }
569 mutex_unlock(&cnic_lock);
570
571 synchronize_rcu();
572
681dbd71
MC		 573 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
574 i < 20) {
575 msleep(100);
576 i++;
577 }
578 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
579 printk(KERN_WARNING PFX "%s: Failed waiting for ULP up call"
580 " to complete.\n", dev->netdev->name);
581
a4636960
MC		 582 return 0;
583}
584EXPORT_SYMBOL(cnic_unregister_driver);
585
586static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
587{
588 id_tbl->start = start_id;
589 id_tbl->max = size;
590 id_tbl->next = 0;
591 spin_lock_init(&id_tbl->lock);
592 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
593 if (!id_tbl->table)
594 return -ENOMEM;
595
596 return 0;
597}
598
599static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
600{
601 kfree(id_tbl->table);
602 id_tbl->table = NULL;
603}
604
605static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
606{
607 int ret = -1;
608
609 id -= id_tbl->start;
610 if (id >= id_tbl->max)
611 return ret;
612
613 spin_lock(&id_tbl->lock);
614 if (!test_bit(id, id_tbl->table)) {
615 set_bit(id, id_tbl->table);
616 ret = 0;
617 }
618 spin_unlock(&id_tbl->lock);
619 return ret;
620}
621
622/* Returns -1 if not successful */
623static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
624{
625 u32 id;
626
627 spin_lock(&id_tbl->lock);
628 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
629 if (id >= id_tbl->max) {
630 id = -1;
631 if (id_tbl->next != 0) {
632 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
633 if (id >= id_tbl->next)
634 id = -1;
635 }
636 }
637
638 if (id < id_tbl->max) {
639 set_bit(id, id_tbl->table);
640 id_tbl->next = (id + 1) & (id_tbl->max - 1);
641 id += id_tbl->start;
642 }
643
644 spin_unlock(&id_tbl->lock);
645
646 return id;
647}
648
649static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
650{
651 if (id == -1)
652 return;
653
654 id -= id_tbl->start;
655 if (id >= id_tbl->max)
656 return;
657
658 clear_bit(id, id_tbl->table);
659}
660
661static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
662{
663 int i;
664
665 if (!dma->pg_arr)
666 return;
667
668 for (i = 0; i < dma->num_pages; i++) {
669 if (dma->pg_arr[i]) {
3248e168
MC		 670 dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
671 dma->pg_arr[i], dma->pg_map_arr[i]);
a4636960
MC		 672 dma->pg_arr[i] = NULL;
673 }
674 }
675 if (dma->pgtbl) {
3248e168
MC		 676 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
677 dma->pgtbl, dma->pgtbl_map);
a4636960
MC		 678 dma->pgtbl = NULL;
679 }
680 kfree(dma->pg_arr);
681 dma->pg_arr = NULL;
682 dma->num_pages = 0;
683}
684
685static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
686{
687 int i;
688 u32 *page_table = dma->pgtbl;
689
690 for (i = 0; i < dma->num_pages; i++) {
691 /* Each entry needs to be in big endian format. */
692 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
693 page_table++;
694 *page_table = (u32) dma->pg_map_arr[i];
695 page_table++;
696 }
697}
698
71034ba8
MC		 699static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
700{
701 int i;
702 u32 *page_table = dma->pgtbl;
703
704 for (i = 0; i < dma->num_pages; i++) {
705 /* Each entry needs to be in little endian format. */
706 *page_table = dma->pg_map_arr[i] & 0xffffffff;
707 page_table++;
708 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
709 page_table++;
710 }
711}
712
a4636960
MC		 713static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
714 int pages, int use_pg_tbl)
715{
716 int i, size;
717 struct cnic_local *cp = dev->cnic_priv;
718
719 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
720 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
721 if (dma->pg_arr == NULL)
722 return -ENOMEM;
723
724 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
725 dma->num_pages = pages;
726
727 for (i = 0; i < pages; i++) {
3248e168
MC		 728 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
729 BCM_PAGE_SIZE,
730 &dma->pg_map_arr[i],
731 GFP_ATOMIC);
a4636960
MC		 732 if (dma->pg_arr[i] == NULL)
733 goto error;
734 }
735 if (!use_pg_tbl)
736 return 0;
737
738 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
739 ~(BCM_PAGE_SIZE - 1);
3248e168
MC		 740 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
741 &dma->pgtbl_map, GFP_ATOMIC);
a4636960
MC		 742 if (dma->pgtbl == NULL)
743 goto error;
744
745 cp->setup_pgtbl(dev, dma);
746
747 return 0;
748
749error:
750 cnic_free_dma(dev, dma);
751 return -ENOMEM;
752}
753
86b53606
MC		 754static void cnic_free_context(struct cnic_dev *dev)
755{
756 struct cnic_local *cp = dev->cnic_priv;
757 int i;
758
759 for (i = 0; i < cp->ctx_blks; i++) {
760 if (cp->ctx_arr[i].ctx) {
3248e168
MC		 761 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
762 cp->ctx_arr[i].ctx,
763 cp->ctx_arr[i].mapping);
86b53606
MC		 764 cp->ctx_arr[i].ctx = NULL;
765 }
766 }
767}
768
a4636960
MC		 769static void cnic_free_resc(struct cnic_dev *dev)
770{
771 struct cnic_local *cp = dev->cnic_priv;
772 int i = 0;
773
774 if (cp->cnic_uinfo) {
a4636960
MC		 775 while (cp->uio_dev != -1 && i < 15) {
776 msleep(100);
777 i++;
778 }
779 uio_unregister_device(cp->cnic_uinfo);
780 kfree(cp->cnic_uinfo);
781 cp->cnic_uinfo = NULL;
782 }
783
784 if (cp->l2_buf) {
3248e168
MC		 785 dma_free_coherent(&dev->pcidev->dev, cp->l2_buf_size,
786 cp->l2_buf, cp->l2_buf_map);
a4636960
MC		 787 cp->l2_buf = NULL;
788 }
789
790 if (cp->l2_ring) {
3248e168
MC		 791 dma_free_coherent(&dev->pcidev->dev, cp->l2_ring_size,
792 cp->l2_ring, cp->l2_ring_map);
a4636960
MC		 793 cp->l2_ring = NULL;
794 }
795
86b53606 796 cnic_free_context(dev);
a4636960
MC		 797 kfree(cp->ctx_arr);
798 cp->ctx_arr = NULL;
799 cp->ctx_blks = 0;
800
801 cnic_free_dma(dev, &cp->gbl_buf_info);
802 cnic_free_dma(dev, &cp->conn_buf_info);
803 cnic_free_dma(dev, &cp->kwq_info);
71034ba8 804 cnic_free_dma(dev, &cp->kwq_16_data_info);
a4636960
MC		 805 cnic_free_dma(dev, &cp->kcq_info);
806 kfree(cp->iscsi_tbl);
807 cp->iscsi_tbl = NULL;
808 kfree(cp->ctx_tbl);
809 cp->ctx_tbl = NULL;
810
811 cnic_free_id_tbl(&cp->cid_tbl);
812}
813
814static int cnic_alloc_context(struct cnic_dev *dev)
815{
816 struct cnic_local *cp = dev->cnic_priv;
817
818 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
819 int i, k, arr_size;
820
821 cp->ctx_blk_size = BCM_PAGE_SIZE;
822 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
823 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
824 sizeof(struct cnic_ctx);
825 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
826 if (cp->ctx_arr == NULL)
827 return -ENOMEM;
828
829 k = 0;
830 for (i = 0; i < 2; i++) {
831 u32 j, reg, off, lo, hi;
832
833 if (i == 0)
834 off = BNX2_PG_CTX_MAP;
835 else
836 off = BNX2_ISCSI_CTX_MAP;
837
838 reg = cnic_reg_rd_ind(dev, off);
839 lo = reg >> 16;
840 hi = reg & 0xffff;
841 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
842 cp->ctx_arr[k].cid = j;
843 }
844
845 cp->ctx_blks = k;
846 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
847 cp->ctx_blks = 0;
848 return -ENOMEM;
849 }
850
851 for (i = 0; i < cp->ctx_blks; i++) {
852 cp->ctx_arr[i].ctx =
3248e168
MC		 853 dma_alloc_coherent(&dev->pcidev->dev,
854 BCM_PAGE_SIZE,
855 &cp->ctx_arr[i].mapping,
856 GFP_KERNEL);
a4636960
MC		 857 if (cp->ctx_arr[i].ctx == NULL)
858 return -ENOMEM;
859 }
860 }
861 return 0;
862}
863
ec0248ea
MC		 864static int cnic_alloc_l2_rings(struct cnic_dev *dev, int pages)
865{
866 struct cnic_local *cp = dev->cnic_priv;
867
868 cp->l2_ring_size = pages * BCM_PAGE_SIZE;
3248e168
MC		 869 cp->l2_ring = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_ring_size,
870 &cp->l2_ring_map,
871 GFP_KERNEL | __GFP_COMP);
ec0248ea
MC		 872 if (!cp->l2_ring)
873 return -ENOMEM;
874
875 cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
876 cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
3248e168
MC		 877 cp->l2_buf = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_buf_size,
878 &cp->l2_buf_map,
879 GFP_KERNEL | __GFP_COMP);
ec0248ea
MC		 880 if (!cp->l2_buf)
881 return -ENOMEM;
882
883 return 0;
884}
885
5e9b2dbf 886static int cnic_alloc_uio(struct cnic_dev *dev) {
a4636960
MC		 887 struct cnic_local *cp = dev->cnic_priv;
888 struct uio_info *uinfo;
889 int ret;
890
a4636960
MC		 891 uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
892 if (!uinfo)
5e9b2dbf 893 return -ENOMEM;
a4636960
MC		 894
895 uinfo->mem[0].addr = dev->netdev->base_addr;
896 uinfo->mem[0].internal_addr = dev->regview;
897 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
898 uinfo->mem[0].memtype = UIO_MEM_PHYS;
899
5e9b2dbf 900 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
86b53606 901 uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
5e9b2dbf
MC		 902 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
903 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
904 else
905 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
906
907 uinfo->name = "bnx2_cnic";
71034ba8
MC		 908 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
909 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
910 PAGE_MASK;
911 uinfo->mem[1].size = sizeof(struct host_def_status_block);
912
913 uinfo->name = "bnx2x_cnic";
5e9b2dbf
MC		 914 }
915
a4636960
MC		 916 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
917
918 uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
919 uinfo->mem[2].size = cp->l2_ring_size;
920 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
921
922 uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
923 uinfo->mem[3].size = cp->l2_buf_size;
924 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
925
a4636960
MC		 926 uinfo->version = CNIC_MODULE_VERSION;
927 uinfo->irq = UIO_IRQ_CUSTOM;
928
929 uinfo->open = cnic_uio_open;
930 uinfo->release = cnic_uio_close;
931
932 uinfo->priv = dev;
933
934 ret = uio_register_device(&dev->pcidev->dev, uinfo);
935 if (ret) {
936 kfree(uinfo);
5e9b2dbf 937 return ret;
a4636960
MC		 938 }
939
940 cp->cnic_uinfo = uinfo;
5e9b2dbf
MC		 941 return 0;
942}
943
944static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
945{
946 struct cnic_local *cp = dev->cnic_priv;
947 int ret;
948
949 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
950 if (ret)
951 goto error;
952 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
953
954 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
955 if (ret)
956 goto error;
957 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
958
959 ret = cnic_alloc_context(dev);
960 if (ret)
961 goto error;
962
963 ret = cnic_alloc_l2_rings(dev, 2);
964 if (ret)
965 goto error;
966
967 ret = cnic_alloc_uio(dev);
968 if (ret)
969 goto error;
a4636960
MC		 970
971 return 0;
972
973error:
974 cnic_free_resc(dev);
975 return ret;
976}
977
71034ba8
MC		 978static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
979{
980 struct cnic_local *cp = dev->cnic_priv;
981 struct cnic_eth_dev *ethdev = cp->ethdev;
982 int ctx_blk_size = cp->ethdev->ctx_blk_size;
983 int total_mem, blks, i, cid_space;
984
985 if (BNX2X_ISCSI_START_CID < ethdev->starting_cid)
986 return -EINVAL;
987
988 cid_space = MAX_ISCSI_TBL_SZ +
989 (BNX2X_ISCSI_START_CID - ethdev->starting_cid);
990
991 total_mem = BNX2X_CONTEXT_MEM_SIZE * cid_space;
992 blks = total_mem / ctx_blk_size;
993 if (total_mem % ctx_blk_size)
994 blks++;
995
996 if (blks > cp->ethdev->ctx_tbl_len)
997 return -ENOMEM;
998
999 cp->ctx_arr = kzalloc(blks * sizeof(struct cnic_ctx), GFP_KERNEL);
1000 if (cp->ctx_arr == NULL)
1001 return -ENOMEM;
1002
1003 cp->ctx_blks = blks;
1004 cp->ctx_blk_size = ctx_blk_size;
1005 if (BNX2X_CHIP_IS_E1H(cp->chip_id))
1006 cp->ctx_align = 0;
1007 else
1008 cp->ctx_align = ctx_blk_size;
1009
1010 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1011
1012 for (i = 0; i < blks; i++) {
1013 cp->ctx_arr[i].ctx =
3248e168
MC		 1014 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1015 &cp->ctx_arr[i].mapping,
1016 GFP_KERNEL);
71034ba8
MC		 1017 if (cp->ctx_arr[i].ctx == NULL)
1018 return -ENOMEM;
1019
1020 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1021 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1022 cnic_free_context(dev);
1023 cp->ctx_blk_size += cp->ctx_align;
1024 i = -1;
1025 continue;
1026 }
1027 }
1028 }
1029 return 0;
1030}
1031
1032static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1033{
1034 struct cnic_local *cp = dev->cnic_priv;
1035 int i, j, n, ret, pages;
1036 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1037
1038 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1039 GFP_KERNEL);
1040 if (!cp->iscsi_tbl)
1041 goto error;
1042
1043 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1044 MAX_CNIC_L5_CONTEXT, GFP_KERNEL);
1045 if (!cp->ctx_tbl)
1046 goto error;
1047
1048 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1049 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1050 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1051 }
1052
1053 pages = PAGE_ALIGN(MAX_CNIC_L5_CONTEXT * CNIC_KWQ16_DATA_SIZE) /
1054 PAGE_SIZE;
1055
1056 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1057 if (ret)
1058 return -ENOMEM;
1059
1060 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1061 for (i = 0, j = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1062 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1063
1064 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1065 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1066 off;
1067
1068 if ((i % n) == (n - 1))
1069 j++;
1070 }
1071
1072 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 0);
1073 if (ret)
1074 goto error;
1075 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
1076
1077 for (i = 0; i < KCQ_PAGE_CNT; i++) {
1078 struct bnx2x_bd_chain_next *next =
1079 (struct bnx2x_bd_chain_next *)
1080 &cp->kcq[i][MAX_KCQE_CNT];
1081 int j = i + 1;
1082
1083 if (j >= KCQ_PAGE_CNT)
1084 j = 0;
1085 next->addr_hi = (u64) cp->kcq_info.pg_map_arr[j] >> 32;
1086 next->addr_lo = cp->kcq_info.pg_map_arr[j] & 0xffffffff;
1087 }
1088
1089 pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1090 BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1091 ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1092 if (ret)
1093 goto error;
1094
1095 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1096 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1097 if (ret)
1098 goto error;
1099
1100 ret = cnic_alloc_bnx2x_context(dev);
1101 if (ret)
1102 goto error;
1103
1104 cp->bnx2x_status_blk = cp->status_blk;
1105 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1106
1107 cp->l2_rx_ring_size = 15;
1108
1109 ret = cnic_alloc_l2_rings(dev, 4);
1110 if (ret)
1111 goto error;
1112
1113 ret = cnic_alloc_uio(dev);
1114 if (ret)
1115 goto error;
1116
1117 return 0;
1118
1119error:
1120 cnic_free_resc(dev);
1121 return -ENOMEM;
1122}
1123
a4636960
MC		 1124static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1125{
1126 return cp->max_kwq_idx -
1127 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1128}
1129
1130static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1131 u32 num_wqes)
1132{
1133 struct cnic_local *cp = dev->cnic_priv;
1134 struct kwqe *prod_qe;
1135 u16 prod, sw_prod, i;
1136
1137 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1138 return -EAGAIN; /* bnx2 is down */
1139
1140 spin_lock_bh(&cp->cnic_ulp_lock);
1141 if (num_wqes > cnic_kwq_avail(cp) &&
1142 !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
1143 spin_unlock_bh(&cp->cnic_ulp_lock);
1144 return -EAGAIN;
1145 }
1146
1147 cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
1148
1149 prod = cp->kwq_prod_idx;
1150 sw_prod = prod & MAX_KWQ_IDX;
1151 for (i = 0; i < num_wqes; i++) {
1152 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1153 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1154 prod++;
1155 sw_prod = prod & MAX_KWQ_IDX;
1156 }
1157 cp->kwq_prod_idx = prod;
1158
1159 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1160
1161 spin_unlock_bh(&cp->cnic_ulp_lock);
1162 return 0;
1163}
1164
71034ba8
MC		 1165static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1166 union l5cm_specific_data *l5_data)
1167{
1168 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1169 dma_addr_t map;
1170
1171 map = ctx->kwqe_data_mapping;
1172 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1173 l5_data->phy_address.hi = (u64) map >> 32;
1174 return ctx->kwqe_data;
1175}
1176
1177static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1178 u32 type, union l5cm_specific_data *l5_data)
1179{
1180 struct cnic_local *cp = dev->cnic_priv;
1181 struct l5cm_spe kwqe;
1182 struct kwqe_16 *kwq[1];
1183 int ret;
1184
1185 kwqe.hdr.conn_and_cmd_data =
1186 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1187 BNX2X_HW_CID(cid, cp->func)));
1188 kwqe.hdr.type = cpu_to_le16(type);
1189 kwqe.hdr.reserved = 0;
1190 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1191 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1192
1193 kwq[0] = (struct kwqe_16 *) &kwqe;
1194
1195 spin_lock_bh(&cp->cnic_ulp_lock);
1196 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1197 spin_unlock_bh(&cp->cnic_ulp_lock);
1198
1199 if (ret == 1)
1200 return 0;
1201
1202 return -EBUSY;
1203}
1204
1205static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1206 struct kcqe *cqes[], u32 num_cqes)
1207{
1208 struct cnic_local *cp = dev->cnic_priv;
1209 struct cnic_ulp_ops *ulp_ops;
1210
1211 rcu_read_lock();
1212 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1213 if (likely(ulp_ops)) {
1214 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1215 cqes, num_cqes);
1216 }
1217 rcu_read_unlock();
1218}
1219
1220static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1221{
1222 struct cnic_local *cp = dev->cnic_priv;
1223 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1224 int func = cp->func, pages;
1225 int hq_bds;
1226
1227 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1228 cp->num_ccells = req1->num_ccells_per_conn;
1229 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1230 cp->num_iscsi_tasks;
1231 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1232 BNX2X_ISCSI_R2TQE_SIZE;
1233 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1234 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1235 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1236 cp->num_cqs = req1->num_cqs;
1237
1238 if (!dev->max_iscsi_conn)
1239 return 0;
1240
1241 /* init Tstorm RAM */
1242 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(func),
1243 req1->rq_num_wqes);
1244 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1245 PAGE_SIZE);
1246 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1247 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1248 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1249 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1250 req1->num_tasks_per_conn);
1251
1252 /* init Ustorm RAM */
1253 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1254 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(func),
1255 req1->rq_buffer_size);
1256 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1257 PAGE_SIZE);
1258 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1259 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1260 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1261 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1262 req1->num_tasks_per_conn);
1263 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(func),
1264 req1->rq_num_wqes);
1265 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(func),
1266 req1->cq_num_wqes);
1267 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1268 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1269
1270 /* init Xstorm RAM */
1271 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1272 PAGE_SIZE);
1273 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1274 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1275 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1276 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1277 req1->num_tasks_per_conn);
1278 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1279 hq_bds);
1280 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(func),
1281 req1->num_tasks_per_conn);
1282 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1283 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1284
1285 /* init Cstorm RAM */
1286 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1287 PAGE_SIZE);
1288 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1289 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1290 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1291 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1292 req1->num_tasks_per_conn);
1293 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(func),
1294 req1->cq_num_wqes);
1295 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1296 hq_bds);
1297
1298 return 0;
1299}
1300
1301static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1302{
1303 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1304 struct cnic_local *cp = dev->cnic_priv;
1305 int func = cp->func;
1306 struct iscsi_kcqe kcqe;
1307 struct kcqe *cqes[1];
1308
1309 memset(&kcqe, 0, sizeof(kcqe));
1310 if (!dev->max_iscsi_conn) {
1311 kcqe.completion_status =
1312 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1313 goto done;
1314 }
1315
1316 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1317 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1318 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1319 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1320 req2->error_bit_map[1]);
1321
1322 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1323 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1324 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1325 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1326 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1327 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1328 req2->error_bit_map[1]);
1329
1330 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1331 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1332
1333 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1334
1335done:
1336 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1337 cqes[0] = (struct kcqe *) &kcqe;
1338 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1339
1340 return 0;
1341}
1342
1343static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1344{
1345 struct cnic_local *cp = dev->cnic_priv;
1346 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1347
1348 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1349 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1350
1351 cnic_free_dma(dev, &iscsi->hq_info);
1352 cnic_free_dma(dev, &iscsi->r2tq_info);
1353 cnic_free_dma(dev, &iscsi->task_array_info);
1354 }
1355 cnic_free_id(&cp->cid_tbl, ctx->cid);
1356 ctx->cid = 0;
1357}
1358
1359static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1360{
1361 u32 cid;
1362 int ret, pages;
1363 struct cnic_local *cp = dev->cnic_priv;
1364 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1365 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1366
1367 cid = cnic_alloc_new_id(&cp->cid_tbl);
1368 if (cid == -1) {
1369 ret = -ENOMEM;
1370 goto error;
1371 }
1372
1373 ctx->cid = cid;
1374 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1375
1376 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1377 if (ret)
1378 goto error;
1379
1380 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1381 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1382 if (ret)
1383 goto error;
1384
1385 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1386 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1387 if (ret)
1388 goto error;
1389
1390 return 0;
1391
1392error:
1393 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1394 return ret;
1395}
1396
1397static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1398 struct regpair *ctx_addr)
1399{
1400 struct cnic_local *cp = dev->cnic_priv;
1401 struct cnic_eth_dev *ethdev = cp->ethdev;
1402 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1403 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1404 unsigned long align_off = 0;
1405 dma_addr_t ctx_map;
1406 void *ctx;
1407
1408 if (cp->ctx_align) {
1409 unsigned long mask = cp->ctx_align - 1;
1410
1411 if (cp->ctx_arr[blk].mapping & mask)
1412 align_off = cp->ctx_align -
1413 (cp->ctx_arr[blk].mapping & mask);
1414 }
1415 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1416 (off * BNX2X_CONTEXT_MEM_SIZE);
1417 ctx = cp->ctx_arr[blk].ctx + align_off +
1418 (off * BNX2X_CONTEXT_MEM_SIZE);
1419 if (init)
1420 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1421
1422 ctx_addr->lo = ctx_map & 0xffffffff;
1423 ctx_addr->hi = (u64) ctx_map >> 32;
1424 return ctx;
1425}
1426
1427static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1428 u32 num)
1429{
1430 struct cnic_local *cp = dev->cnic_priv;
1431 struct iscsi_kwqe_conn_offload1 *req1 =
1432 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1433 struct iscsi_kwqe_conn_offload2 *req2 =
1434 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1435 struct iscsi_kwqe_conn_offload3 *req3;
1436 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1437 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1438 u32 cid = ctx->cid;
1439 u32 hw_cid = BNX2X_HW_CID(cid, cp->func);
1440 struct iscsi_context *ictx;
1441 struct regpair context_addr;
1442 int i, j, n = 2, n_max;
1443
1444 ctx->ctx_flags = 0;
1445 if (!req2->num_additional_wqes)
1446 return -EINVAL;
1447
1448 n_max = req2->num_additional_wqes + 2;
1449
1450 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1451 if (ictx == NULL)
1452 return -ENOMEM;
1453
1454 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1455
1456 ictx->xstorm_ag_context.hq_prod = 1;
1457
1458 ictx->xstorm_st_context.iscsi.first_burst_length =
1459 ISCSI_DEF_FIRST_BURST_LEN;
1460 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1461 ISCSI_DEF_MAX_RECV_SEG_LEN;
1462 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1463 req1->sq_page_table_addr_lo;
1464 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1465 req1->sq_page_table_addr_hi;
1466 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1467 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1468 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1469 iscsi->hq_info.pgtbl_map & 0xffffffff;
1470 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1471 (u64) iscsi->hq_info.pgtbl_map >> 32;
1472 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1473 iscsi->hq_info.pgtbl[0];
1474 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1475 iscsi->hq_info.pgtbl[1];
1476 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1477 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1478 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1479 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1480 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1481 iscsi->r2tq_info.pgtbl[0];
1482 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1483 iscsi->r2tq_info.pgtbl[1];
1484 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1485 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1486 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1487 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1488 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1489 BNX2X_ISCSI_PBL_NOT_CACHED;
1490 ictx->xstorm_st_context.iscsi.flags.flags |=
1491 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1492 ictx->xstorm_st_context.iscsi.flags.flags |=
1493 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1494
1495 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1496 /* TSTORM requires the base address of RQ DB & not PTE */
1497 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1498 req2->rq_page_table_addr_lo & PAGE_MASK;
1499 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1500 req2->rq_page_table_addr_hi;
1501 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1502 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1503 ictx->tstorm_st_context.tcp.flags2 |=
1504 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1505
1506 ictx->timers_context.flags |= ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1507
1508 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
15971c3c 1509 req2->rq_page_table_addr_lo;
71034ba8 1510 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
15971c3c 1511 req2->rq_page_table_addr_hi;
71034ba8
MC		 1512 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1513 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1514 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1515 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1516 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1517 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1518 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1519 iscsi->r2tq_info.pgtbl[0];
1520 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1521 iscsi->r2tq_info.pgtbl[1];
1522 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1523 req1->cq_page_table_addr_lo;
1524 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1525 req1->cq_page_table_addr_hi;
1526 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1527 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1528 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1529 ictx->ustorm_st_context.task_pbe_cache_index =
1530 BNX2X_ISCSI_PBL_NOT_CACHED;
1531 ictx->ustorm_st_context.task_pdu_cache_index =
1532 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1533
1534 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1535 if (j == 3) {
1536 if (n >= n_max)
1537 break;
1538 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1539 j = 0;
1540 }
1541 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1542 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1543 req3->qp_first_pte[j].hi;
1544 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1545 req3->qp_first_pte[j].lo;
1546 }
1547
1548 ictx->ustorm_st_context.task_pbl_base.lo =
1549 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1550 ictx->ustorm_st_context.task_pbl_base.hi =
1551 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1552 ictx->ustorm_st_context.tce_phy_addr.lo =
1553 iscsi->task_array_info.pgtbl[0];
1554 ictx->ustorm_st_context.tce_phy_addr.hi =
1555 iscsi->task_array_info.pgtbl[1];
1556 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1557 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1558 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1559 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1560 ISCSI_DEF_MAX_BURST_LEN;
1561 ictx->ustorm_st_context.negotiated_rx |=
1562 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1563 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1564
1565 ictx->cstorm_st_context.hq_pbl_base.lo =
1566 iscsi->hq_info.pgtbl_map & 0xffffffff;
1567 ictx->cstorm_st_context.hq_pbl_base.hi =
1568 (u64) iscsi->hq_info.pgtbl_map >> 32;
1569 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1570 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1571 ictx->cstorm_st_context.task_pbl_base.lo =
1572 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1573 ictx->cstorm_st_context.task_pbl_base.hi =
1574 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1575 /* CSTORM and USTORM initialization is different, CSTORM requires
1576 * CQ DB base & not PTE addr */
1577 ictx->cstorm_st_context.cq_db_base.lo =
1578 req1->cq_page_table_addr_lo & PAGE_MASK;
1579 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1580 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1581 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1582 for (i = 0; i < cp->num_cqs; i++) {
1583 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1584 ISCSI_INITIAL_SN;
1585 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1586 ISCSI_INITIAL_SN;
1587 }
1588
1589 ictx->xstorm_ag_context.cdu_reserved =
1590 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1591 ISCSI_CONNECTION_TYPE);
1592 ictx->ustorm_ag_context.cdu_usage =
1593 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1594 ISCSI_CONNECTION_TYPE);
1595 return 0;
1596
1597}
1598
1599static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1600 u32 num, int *work)
1601{
1602 struct iscsi_kwqe_conn_offload1 *req1;
1603 struct iscsi_kwqe_conn_offload2 *req2;
1604 struct cnic_local *cp = dev->cnic_priv;
1605 struct iscsi_kcqe kcqe;
1606 struct kcqe *cqes[1];
1607 u32 l5_cid;
1608 int ret;
1609
1610 if (num < 2) {
1611 *work = num;
1612 return -EINVAL;
1613 }
1614
1615 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1616 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1617 if ((num - 2) < req2->num_additional_wqes) {
1618 *work = num;
1619 return -EINVAL;
1620 }
1621 *work = 2 + req2->num_additional_wqes;;
1622
1623 l5_cid = req1->iscsi_conn_id;
1624 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1625 return -EINVAL;
1626
1627 memset(&kcqe, 0, sizeof(kcqe));
1628 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1629 kcqe.iscsi_conn_id = l5_cid;
1630 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1631
1632 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1633 atomic_dec(&cp->iscsi_conn);
1634 ret = 0;
1635 goto done;
1636 }
1637 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1638 if (ret) {
1639 atomic_dec(&cp->iscsi_conn);
1640 ret = 0;
1641 goto done;
1642 }
1643 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1644 if (ret < 0) {
1645 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1646 atomic_dec(&cp->iscsi_conn);
1647 goto done;
1648 }
1649
1650 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1651 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp->ctx_tbl[l5_cid].cid,
1652 cp->func);
1653
1654done:
1655 cqes[0] = (struct kcqe *) &kcqe;
1656 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1657 return ret;
1658}
1659
1660
1661static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1662{
1663 struct cnic_local *cp = dev->cnic_priv;
1664 struct iscsi_kwqe_conn_update *req =
1665 (struct iscsi_kwqe_conn_update *) kwqe;
1666 void *data;
1667 union l5cm_specific_data l5_data;
1668 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1669 int ret;
1670
1671 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1672 return -EINVAL;
1673
1674 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1675 if (!data)
1676 return -ENOMEM;
1677
1678 memcpy(data, kwqe, sizeof(struct kwqe));
1679
1680 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1681 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1682 return ret;
1683}
1684
1685static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1686{
1687 struct cnic_local *cp = dev->cnic_priv;
1688 struct iscsi_kwqe_conn_destroy *req =
1689 (struct iscsi_kwqe_conn_destroy *) kwqe;
1690 union l5cm_specific_data l5_data;
1691 u32 l5_cid = req->reserved0;
1692 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1693 int ret = 0;
1694 struct iscsi_kcqe kcqe;
1695 struct kcqe *cqes[1];
1696
1697 if (!(ctx->ctx_flags & CTX_FL_OFFLD_START))
1698 goto skip_cfc_delete;
1699
1700 while (!time_after(jiffies, ctx->timestamp + (2 * HZ)))
1701 msleep(250);
1702
1703 init_waitqueue_head(&ctx->waitq);
1704 ctx->wait_cond = 0;
1705 memset(&l5_data, 0, sizeof(l5_data));
1706 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL,
1707 req->context_id,
1708 ETH_CONNECTION_TYPE |
1709 (1 << SPE_HDR_COMMON_RAMROD_SHIFT),
1710 &l5_data);
1711 if (ret == 0)
1712 wait_event(ctx->waitq, ctx->wait_cond);
1713
1714skip_cfc_delete:
1715 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1716
1717 atomic_dec(&cp->iscsi_conn);
1718
1719 memset(&kcqe, 0, sizeof(kcqe));
1720 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1721 kcqe.iscsi_conn_id = l5_cid;
1722 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1723 kcqe.iscsi_conn_context_id = req->context_id;
1724
1725 cqes[0] = (struct kcqe *) &kcqe;
1726 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1727
1728 return ret;
1729}
1730
1731static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1732 struct l4_kwq_connect_req1 *kwqe1,
1733 struct l4_kwq_connect_req3 *kwqe3,
1734 struct l5cm_active_conn_buffer *conn_buf)
1735{
1736 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1737 struct l5cm_xstorm_conn_buffer *xstorm_buf =
1738 &conn_buf->xstorm_conn_buffer;
1739 struct l5cm_tstorm_conn_buffer *tstorm_buf =
1740 &conn_buf->tstorm_conn_buffer;
1741 struct regpair context_addr;
1742 u32 cid = BNX2X_SW_CID(kwqe1->cid);
1743 struct in6_addr src_ip, dst_ip;
1744 int i;
1745 u32 *addrp;
1746
1747 addrp = (u32 *) &conn_addr->local_ip_addr;
1748 for (i = 0; i < 4; i++, addrp++)
1749 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1750
1751 addrp = (u32 *) &conn_addr->remote_ip_addr;
1752 for (i = 0; i < 4; i++, addrp++)
1753 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1754
1755 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1756
1757 xstorm_buf->context_addr.hi = context_addr.hi;
1758 xstorm_buf->context_addr.lo = context_addr.lo;
1759 xstorm_buf->mss = 0xffff;
1760 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1761 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1762 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1763 xstorm_buf->pseudo_header_checksum =
1764 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1765
1766 if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1767 tstorm_buf->params |=
1768 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1769 if (kwqe3->ka_timeout) {
1770 tstorm_buf->ka_enable = 1;
1771 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1772 tstorm_buf->ka_interval = kwqe3->ka_interval;
1773 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1774 }
1775 tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1776 tstorm_buf->snd_buf = kwqe3->snd_buf;
1777 tstorm_buf->max_rt_time = 0xffffffff;
1778}
1779
1780static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1781{
1782 struct cnic_local *cp = dev->cnic_priv;
1783 int func = CNIC_FUNC(cp);
1784 u8 *mac = dev->mac_addr;
1785
1786 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1787 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(func), mac[0]);
1788 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1789 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(func), mac[1]);
1790 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1791 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(func), mac[2]);
1792 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1793 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(func), mac[3]);
1794 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1795 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(func), mac[4]);
1796 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1797 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(func), mac[5]);
1798
1799 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1800 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func), mac[5]);
1801 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1802 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1803 mac[4]);
1804 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1805 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func), mac[3]);
1806 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1807 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1808 mac[2]);
1809 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1810 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 2,
1811 mac[1]);
1812 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1813 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 3,
1814 mac[0]);
1815}
1816
1817static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1818{
1819 struct cnic_local *cp = dev->cnic_priv;
1820 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1821 u16 tstorm_flags = 0;
1822
1823 if (tcp_ts) {
1824 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1825 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1826 }
1827
1828 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1829 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), xstorm_flags);
1830
1831 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1832 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), tstorm_flags);
1833}
1834
1835static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1836 u32 num, int *work)
1837{
1838 struct cnic_local *cp = dev->cnic_priv;
1839 struct l4_kwq_connect_req1 *kwqe1 =
1840 (struct l4_kwq_connect_req1 *) wqes[0];
1841 struct l4_kwq_connect_req3 *kwqe3;
1842 struct l5cm_active_conn_buffer *conn_buf;
1843 struct l5cm_conn_addr_params *conn_addr;
1844 union l5cm_specific_data l5_data;
1845 u32 l5_cid = kwqe1->pg_cid;
1846 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1847 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1848 int ret;
1849
1850 if (num < 2) {
1851 *work = num;
1852 return -EINVAL;
1853 }
1854
1855 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
1856 *work = 3;
1857 else
1858 *work = 2;
1859
1860 if (num < *work) {
1861 *work = num;
1862 return -EINVAL;
1863 }
1864
1865 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
1866 printk(KERN_ERR PFX "%s: conn_buf size too big\n",
1867 dev->netdev->name);
1868 return -ENOMEM;
1869 }
1870 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1871 if (!conn_buf)
1872 return -ENOMEM;
1873
1874 memset(conn_buf, 0, sizeof(*conn_buf));
1875
1876 conn_addr = &conn_buf->conn_addr_buf;
1877 conn_addr->remote_addr_0 = csk->ha[0];
1878 conn_addr->remote_addr_1 = csk->ha[1];
1879 conn_addr->remote_addr_2 = csk->ha[2];
1880 conn_addr->remote_addr_3 = csk->ha[3];
1881 conn_addr->remote_addr_4 = csk->ha[4];
1882 conn_addr->remote_addr_5 = csk->ha[5];
1883
1884 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
1885 struct l4_kwq_connect_req2 *kwqe2 =
1886 (struct l4_kwq_connect_req2 *) wqes[1];
1887
1888 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
1889 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
1890 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
1891
1892 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
1893 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
1894 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
1895 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
1896 }
1897 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
1898
1899 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
1900 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
1901 conn_addr->local_tcp_port = kwqe1->src_port;
1902 conn_addr->remote_tcp_port = kwqe1->dst_port;
1903
1904 conn_addr->pmtu = kwqe3->pmtu;
1905 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
1906
1907 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1908 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->func), csk->vlan_id);
1909
1910 cnic_bnx2x_set_tcp_timestamp(dev,
1911 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
1912
1913 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
1914 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1915 if (!ret)
1916 ctx->ctx_flags |= CTX_FL_OFFLD_START;
1917
1918 return ret;
1919}
1920
1921static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
1922{
1923 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
1924 union l5cm_specific_data l5_data;
1925 int ret;
1926
1927 memset(&l5_data, 0, sizeof(l5_data));
1928 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
1929 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1930 return ret;
1931}
1932
1933static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
1934{
1935 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
1936 union l5cm_specific_data l5_data;
1937 int ret;
1938
1939 memset(&l5_data, 0, sizeof(l5_data));
1940 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
1941 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1942 return ret;
1943}
1944static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1945{
1946 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
1947 struct l4_kcq kcqe;
1948 struct kcqe *cqes[1];
1949
1950 memset(&kcqe, 0, sizeof(kcqe));
1951 kcqe.pg_host_opaque = req->host_opaque;
1952 kcqe.pg_cid = req->host_opaque;
1953 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
1954 cqes[0] = (struct kcqe *) &kcqe;
1955 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1956 return 0;
1957}
1958
1959static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1960{
1961 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
1962 struct l4_kcq kcqe;
1963 struct kcqe *cqes[1];
1964
1965 memset(&kcqe, 0, sizeof(kcqe));
1966 kcqe.pg_host_opaque = req->pg_host_opaque;
1967 kcqe.pg_cid = req->pg_cid;
1968 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
1969 cqes[0] = (struct kcqe *) &kcqe;
1970 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1971 return 0;
1972}
1973
1974static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1975 u32 num_wqes)
1976{
1977 int i, work, ret;
1978 u32 opcode;
1979 struct kwqe *kwqe;
1980
1981 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1982 return -EAGAIN; /* bnx2 is down */
1983
1984 for (i = 0; i < num_wqes; ) {
1985 kwqe = wqes[i];
1986 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
1987 work = 1;
1988
1989 switch (opcode) {
1990 case ISCSI_KWQE_OPCODE_INIT1:
1991 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
1992 break;
1993 case ISCSI_KWQE_OPCODE_INIT2:
1994 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
1995 break;
1996 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
1997 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
1998 num_wqes - i, &work);
1999 break;
2000 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2001 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2002 break;
2003 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2004 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2005 break;
2006 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2007 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2008 &work);
2009 break;
2010 case L4_KWQE_OPCODE_VALUE_CLOSE:
2011 ret = cnic_bnx2x_close(dev, kwqe);
2012 break;
2013 case L4_KWQE_OPCODE_VALUE_RESET:
2014 ret = cnic_bnx2x_reset(dev, kwqe);
2015 break;
2016 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2017 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2018 break;
2019 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2020 ret = cnic_bnx2x_update_pg(dev, kwqe);
2021 break;
2022 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2023 ret = 0;
2024 break;
2025 default:
2026 ret = 0;
2027 printk(KERN_ERR PFX "%s: Unknown type of KWQE(0x%x)\n",
2028 dev->netdev->name, opcode);
2029 break;
2030 }
2031 if (ret < 0)
2032 printk(KERN_ERR PFX "%s: KWQE(0x%x) failed\n",
2033 dev->netdev->name, opcode);
2034 i += work;
2035 }
2036 return 0;
2037}
2038
a4636960
MC		 2039static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2040{
2041 struct cnic_local *cp = dev->cnic_priv;
2042 int i, j;
2043
2044 i = 0;
2045 j = 1;
2046 while (num_cqes) {
2047 struct cnic_ulp_ops *ulp_ops;
2048 int ulp_type;
2049 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2050 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
2051
2052 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2053 cnic_kwq_completion(dev, 1);
2054
2055 while (j < num_cqes) {
2056 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2057
2058 if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
2059 break;
2060
2061 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2062 cnic_kwq_completion(dev, 1);
2063 j++;
2064 }
2065
2066 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2067 ulp_type = CNIC_ULP_RDMA;
2068 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2069 ulp_type = CNIC_ULP_ISCSI;
2070 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2071 ulp_type = CNIC_ULP_L4;
2072 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2073 goto end;
2074 else {
2075 printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
2076 dev->netdev->name, kcqe_op_flag);
2077 goto end;
2078 }
2079
2080 rcu_read_lock();
2081 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2082 if (likely(ulp_ops)) {
2083 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2084 cp->completed_kcq + i, j);
2085 }
2086 rcu_read_unlock();
2087end:
2088 num_cqes -= j;
2089 i += j;
2090 j = 1;
2091 }
2092 return;
2093}
2094
71034ba8
MC		 2095static u16 cnic_bnx2_next_idx(u16 idx)
2096{
2097 return idx + 1;
2098}
2099
2100static u16 cnic_bnx2_hw_idx(u16 idx)
2101{
2102 return idx;
2103}
2104
2105static u16 cnic_bnx2x_next_idx(u16 idx)
a4636960 2106{
71034ba8
MC		 2107 idx++;
2108 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2109 idx++;
2110
2111 return idx;
a4636960
MC		 2112}
2113
71034ba8 2114static u16 cnic_bnx2x_hw_idx(u16 idx)
a4636960 2115{
71034ba8
MC		 2116 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2117 idx++;
a4636960
MC		 2118 return idx;
2119}
2120
2121static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
2122{
2123 struct cnic_local *cp = dev->cnic_priv;
2124 u16 i, ri, last;
2125 struct kcqe *kcqe;
2126 int kcqe_cnt = 0, last_cnt = 0;
2127
2128 i = ri = last = *sw_prod;
2129 ri &= MAX_KCQ_IDX;
2130
2131 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2132 kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2133 cp->completed_kcq[kcqe_cnt++] = kcqe;
2134 i = cp->next_idx(i);
2135 ri = i & MAX_KCQ_IDX;
2136 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2137 last_cnt = kcqe_cnt;
2138 last = i;
2139 }
2140 }
2141
2142 *sw_prod = last;
2143 return last_cnt;
2144}
2145
86b53606 2146static void cnic_chk_pkt_rings(struct cnic_local *cp)
a4636960
MC		 2147{
2148 u16 rx_cons = *cp->rx_cons_ptr;
2149 u16 tx_cons = *cp->tx_cons_ptr;
2150
2151 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2152 cp->tx_cons = tx_cons;
2153 cp->rx_cons = rx_cons;
71034ba8 2154
a4636960
MC		 2155 uio_event_notify(cp->cnic_uinfo);
2156 }
2157}
2158
2159static int cnic_service_bnx2(void *data, void *status_blk)
2160{
2161 struct cnic_dev *dev = data;
2162 struct status_block *sblk = status_blk;
2163 struct cnic_local *cp = dev->cnic_priv;
2164 u32 status_idx = sblk->status_idx;
2165 u16 hw_prod, sw_prod;
2166 int kcqe_cnt;
2167
2168 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2169 return status_idx;
2170
2171 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2172
2173 hw_prod = sblk->status_completion_producer_index;
2174 sw_prod = cp->kcq_prod_idx;
2175 while (sw_prod != hw_prod) {
2176 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2177 if (kcqe_cnt == 0)
2178 goto done;
2179
2180 service_kcqes(dev, kcqe_cnt);
2181
2182 /* Tell compiler that status_blk fields can change. */
2183 barrier();
2184 if (status_idx != sblk->status_idx) {
2185 status_idx = sblk->status_idx;
2186 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2187 hw_prod = sblk->status_completion_producer_index;
2188 } else
2189 break;
2190 }
2191
2192done:
2193 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2194
2195 cp->kcq_prod_idx = sw_prod;
2196
86b53606 2197 cnic_chk_pkt_rings(cp);
a4636960
MC		 2198 return status_idx;
2199}
2200
2201static void cnic_service_bnx2_msix(unsigned long data)
2202{
2203 struct cnic_dev *dev = (struct cnic_dev *) data;
2204 struct cnic_local *cp = dev->cnic_priv;
2205 struct status_block_msix *status_blk = cp->bnx2_status_blk;
2206 u32 status_idx = status_blk->status_idx;
2207 u16 hw_prod, sw_prod;
2208 int kcqe_cnt;
2209
2210 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2211
2212 hw_prod = status_blk->status_completion_producer_index;
2213 sw_prod = cp->kcq_prod_idx;
2214 while (sw_prod != hw_prod) {
2215 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2216 if (kcqe_cnt == 0)
2217 goto done;
2218
2219 service_kcqes(dev, kcqe_cnt);
2220
2221 /* Tell compiler that status_blk fields can change. */
2222 barrier();
2223 if (status_idx != status_blk->status_idx) {
2224 status_idx = status_blk->status_idx;
2225 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2226 hw_prod = status_blk->status_completion_producer_index;
2227 } else
2228 break;
2229 }
2230
2231done:
2232 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2233 cp->kcq_prod_idx = sw_prod;
2234
86b53606 2235 cnic_chk_pkt_rings(cp);
a4636960
MC		 2236
2237 cp->last_status_idx = status_idx;
2238 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2239 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2240}
2241
2242static irqreturn_t cnic_irq(int irq, void *dev_instance)
2243{
2244 struct cnic_dev *dev = dev_instance;
2245 struct cnic_local *cp = dev->cnic_priv;
2246 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
2247
2248 if (cp->ack_int)
2249 cp->ack_int(dev);
2250
2251 prefetch(cp->status_blk);
2252 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2253
2254 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2255 tasklet_schedule(&cp->cnic_irq_task);
2256
2257 return IRQ_HANDLED;
2258}
2259
71034ba8
MC		 2260static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2261 u16 index, u8 op, u8 update)
2262{
2263 struct cnic_local *cp = dev->cnic_priv;
2264 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2265 COMMAND_REG_INT_ACK);
2266 struct igu_ack_register igu_ack;
2267
2268 igu_ack.status_block_index = index;
2269 igu_ack.sb_id_and_flags =
2270 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2271 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2272 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2273 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2274
2275 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2276}
2277
2278static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2279{
2280 struct cnic_local *cp = dev->cnic_priv;
2281
2282 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID, 0,
2283 IGU_INT_DISABLE, 0);
2284}
2285
2286static void cnic_service_bnx2x_bh(unsigned long data)
2287{
2288 struct cnic_dev *dev = (struct cnic_dev *) data;
2289 struct cnic_local *cp = dev->cnic_priv;
2290 u16 hw_prod, sw_prod;
2291 struct cstorm_status_block_c *sblk =
2292 &cp->bnx2x_status_blk->c_status_block;
2293 u32 status_idx = sblk->status_block_index;
2294 int kcqe_cnt;
2295
2296 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2297 return;
2298
2299 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2300 hw_prod = cp->hw_idx(hw_prod);
2301 sw_prod = cp->kcq_prod_idx;
2302 while (sw_prod != hw_prod) {
2303 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2304 if (kcqe_cnt == 0)
2305 goto done;
2306
2307 service_kcqes(dev, kcqe_cnt);
2308
2309 /* Tell compiler that sblk fields can change. */
2310 barrier();
2311 if (status_idx == sblk->status_block_index)
2312 break;
2313
2314 status_idx = sblk->status_block_index;
2315 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2316 hw_prod = cp->hw_idx(hw_prod);
2317 }
2318
2319done:
2320 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod + MAX_KCQ_IDX);
2321 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID,
2322 status_idx, IGU_INT_ENABLE, 1);
2323
2324 cp->kcq_prod_idx = sw_prod;
2325 return;
2326}
2327
2328static int cnic_service_bnx2x(void *data, void *status_blk)
2329{
2330 struct cnic_dev *dev = data;
2331 struct cnic_local *cp = dev->cnic_priv;
2332 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
2333
2334 prefetch(cp->status_blk);
2335 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2336
2337 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2338 tasklet_schedule(&cp->cnic_irq_task);
2339
2340 cnic_chk_pkt_rings(cp);
2341
2342 return 0;
2343}
2344
a4636960
MC		 2345static void cnic_ulp_stop(struct cnic_dev *dev)
2346{
2347 struct cnic_local *cp = dev->cnic_priv;
2348 int if_type;
2349
6d7760a8
MC		 2350 if (cp->cnic_uinfo)
2351 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2352
a4636960
MC		 2353 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2354 struct cnic_ulp_ops *ulp_ops;
2355
681dbd71
MC		 2356 mutex_lock(&cnic_lock);
2357 ulp_ops = cp->ulp_ops[if_type];
2358 if (!ulp_ops) {
2359 mutex_unlock(&cnic_lock);
a4636960 2360 continue;
681dbd71
MC		 2361 }
2362 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2363 mutex_unlock(&cnic_lock);
a4636960
MC		 2364
2365 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2366 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
681dbd71
MC		 2367
2368 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
a4636960 2369 }
a4636960
MC		 2370}
2371
2372static void cnic_ulp_start(struct cnic_dev *dev)
2373{
2374 struct cnic_local *cp = dev->cnic_priv;
2375 int if_type;
2376
a4636960
MC		 2377 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2378 struct cnic_ulp_ops *ulp_ops;
2379
681dbd71
MC		 2380 mutex_lock(&cnic_lock);
2381 ulp_ops = cp->ulp_ops[if_type];
2382 if (!ulp_ops || !ulp_ops->cnic_start) {
2383 mutex_unlock(&cnic_lock);
a4636960 2384 continue;
681dbd71
MC		 2385 }
2386 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2387 mutex_unlock(&cnic_lock);
a4636960
MC		 2388
2389 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2390 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
681dbd71
MC		 2391
2392 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
a4636960 2393 }
a4636960
MC		 2394}
2395
2396static int cnic_ctl(void *data, struct cnic_ctl_info *info)
2397{
2398 struct cnic_dev *dev = data;
2399
2400 switch (info->cmd) {
2401 case CNIC_CTL_STOP_CMD:
2402 cnic_hold(dev);
a4636960
MC		 2403
2404 cnic_ulp_stop(dev);
2405 cnic_stop_hw(dev);
2406
a4636960
MC		 2407 cnic_put(dev);
2408 break;
2409 case CNIC_CTL_START_CMD:
2410 cnic_hold(dev);
a4636960
MC		 2411
2412 if (!cnic_start_hw(dev))
2413 cnic_ulp_start(dev);
2414
a4636960
MC		 2415 cnic_put(dev);
2416 break;
71034ba8
MC		 2417 case CNIC_CTL_COMPLETION_CMD: {
2418 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
2419 u32 l5_cid;
2420 struct cnic_local *cp = dev->cnic_priv;
2421
2422 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
2423 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2424
2425 ctx->wait_cond = 1;
2426 wake_up(&ctx->waitq);
2427 }
2428 break;
2429 }
a4636960
MC		 2430 default:
2431 return -EINVAL;
2432 }
2433 return 0;
2434}
2435
2436static void cnic_ulp_init(struct cnic_dev *dev)
2437{
2438 int i;
2439 struct cnic_local *cp = dev->cnic_priv;
2440
a4636960
MC		 2441 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2442 struct cnic_ulp_ops *ulp_ops;
2443
7fc1ece4
MC		 2444 mutex_lock(&cnic_lock);
2445 ulp_ops = cnic_ulp_tbl[i];
2446 if (!ulp_ops || !ulp_ops->cnic_init) {
2447 mutex_unlock(&cnic_lock);
a4636960 2448 continue;
7fc1ece4
MC		 2449 }
2450 ulp_get(ulp_ops);
2451 mutex_unlock(&cnic_lock);
a4636960
MC		 2452
2453 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2454 ulp_ops->cnic_init(dev);
2455
7fc1ece4 2456 ulp_put(ulp_ops);
a4636960 2457 }
a4636960
MC		 2458}
2459
2460static void cnic_ulp_exit(struct cnic_dev *dev)
2461{
2462 int i;
2463 struct cnic_local *cp = dev->cnic_priv;
2464
a4636960
MC		 2465 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2466 struct cnic_ulp_ops *ulp_ops;
2467
7fc1ece4
MC		 2468 mutex_lock(&cnic_lock);
2469 ulp_ops = cnic_ulp_tbl[i];
2470 if (!ulp_ops || !ulp_ops->cnic_exit) {
2471 mutex_unlock(&cnic_lock);
a4636960 2472 continue;
7fc1ece4
MC		 2473 }
2474 ulp_get(ulp_ops);
2475 mutex_unlock(&cnic_lock);
a4636960
MC		 2476
2477 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2478 ulp_ops->cnic_exit(dev);
2479
7fc1ece4 2480 ulp_put(ulp_ops);
a4636960 2481 }
a4636960
MC		 2482}
2483
2484static int cnic_cm_offload_pg(struct cnic_sock *csk)
2485{
2486 struct cnic_dev *dev = csk->dev;
2487 struct l4_kwq_offload_pg *l4kwqe;
2488 struct kwqe *wqes[1];
2489
2490 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
2491 memset(l4kwqe, 0, sizeof(*l4kwqe));
2492 wqes[0] = (struct kwqe *) l4kwqe;
2493
2494 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
2495 l4kwqe->flags =
2496 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
2497 l4kwqe->l2hdr_nbytes = ETH_HLEN;
2498
2499 l4kwqe->da0 = csk->ha[0];
2500 l4kwqe->da1 = csk->ha[1];
2501 l4kwqe->da2 = csk->ha[2];
2502 l4kwqe->da3 = csk->ha[3];
2503 l4kwqe->da4 = csk->ha[4];
2504 l4kwqe->da5 = csk->ha[5];
2505
2506 l4kwqe->sa0 = dev->mac_addr[0];
2507 l4kwqe->sa1 = dev->mac_addr[1];
2508 l4kwqe->sa2 = dev->mac_addr[2];
2509 l4kwqe->sa3 = dev->mac_addr[3];
2510 l4kwqe->sa4 = dev->mac_addr[4];
2511 l4kwqe->sa5 = dev->mac_addr[5];
2512
2513 l4kwqe->etype = ETH_P_IP;
2514 l4kwqe->ipid_count = DEF_IPID_COUNT;
2515 l4kwqe->host_opaque = csk->l5_cid;
2516
2517 if (csk->vlan_id) {
2518 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
2519 l4kwqe->vlan_tag = csk->vlan_id;
2520 l4kwqe->l2hdr_nbytes += 4;
2521 }
2522
2523 return dev->submit_kwqes(dev, wqes, 1);
2524}
2525
2526static int cnic_cm_update_pg(struct cnic_sock *csk)
2527{
2528 struct cnic_dev *dev = csk->dev;
2529 struct l4_kwq_update_pg *l4kwqe;
2530 struct kwqe *wqes[1];
2531
2532 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
2533 memset(l4kwqe, 0, sizeof(*l4kwqe));
2534 wqes[0] = (struct kwqe *) l4kwqe;
2535
2536 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
2537 l4kwqe->flags =
2538 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
2539 l4kwqe->pg_cid = csk->pg_cid;
2540
2541 l4kwqe->da0 = csk->ha[0];
2542 l4kwqe->da1 = csk->ha[1];
2543 l4kwqe->da2 = csk->ha[2];
2544 l4kwqe->da3 = csk->ha[3];
2545 l4kwqe->da4 = csk->ha[4];
2546 l4kwqe->da5 = csk->ha[5];
2547
2548 l4kwqe->pg_host_opaque = csk->l5_cid;
2549 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
2550
2551 return dev->submit_kwqes(dev, wqes, 1);
2552}
2553
2554static int cnic_cm_upload_pg(struct cnic_sock *csk)
2555{
2556 struct cnic_dev *dev = csk->dev;
2557 struct l4_kwq_upload *l4kwqe;
2558 struct kwqe *wqes[1];
2559
2560 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
2561 memset(l4kwqe, 0, sizeof(*l4kwqe));
2562 wqes[0] = (struct kwqe *) l4kwqe;
2563
2564 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
2565 l4kwqe->flags =
2566 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
2567 l4kwqe->cid = csk->pg_cid;
2568
2569 return dev->submit_kwqes(dev, wqes, 1);
2570}
2571
2572static int cnic_cm_conn_req(struct cnic_sock *csk)
2573{
2574 struct cnic_dev *dev = csk->dev;
2575 struct l4_kwq_connect_req1 *l4kwqe1;
2576 struct l4_kwq_connect_req2 *l4kwqe2;
2577 struct l4_kwq_connect_req3 *l4kwqe3;
2578 struct kwqe *wqes[3];
2579 u8 tcp_flags = 0;
2580 int num_wqes = 2;
2581
2582 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
2583 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
2584 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
2585 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
2586 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
2587 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
2588
2589 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
2590 l4kwqe3->flags =
2591 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
2592 l4kwqe3->ka_timeout = csk->ka_timeout;
2593 l4kwqe3->ka_interval = csk->ka_interval;
2594 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
2595 l4kwqe3->tos = csk->tos;
2596 l4kwqe3->ttl = csk->ttl;
2597 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
2598 l4kwqe3->pmtu = csk->mtu;
2599 l4kwqe3->rcv_buf = csk->rcv_buf;
2600 l4kwqe3->snd_buf = csk->snd_buf;
2601 l4kwqe3->seed = csk->seed;
2602
2603 wqes[0] = (struct kwqe *) l4kwqe1;
2604 if (test_bit(SK_F_IPV6, &csk->flags)) {
2605 wqes[1] = (struct kwqe *) l4kwqe2;
2606 wqes[2] = (struct kwqe *) l4kwqe3;
2607 num_wqes = 3;
2608
2609 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
2610 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
2611 l4kwqe2->flags =
2612 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
2613 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
2614 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
2615 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
2616 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
2617 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
2618 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
2619 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
2620 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
2621 sizeof(struct tcphdr);
2622 } else {
2623 wqes[1] = (struct kwqe *) l4kwqe3;
2624 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
2625 sizeof(struct tcphdr);
2626 }
2627
2628 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
2629 l4kwqe1->flags =
2630 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
2631 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
2632 l4kwqe1->cid = csk->cid;
2633 l4kwqe1->pg_cid = csk->pg_cid;
2634 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
2635 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
2636 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
2637 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
2638 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
2639 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
2640 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
2641 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
2642 if (csk->tcp_flags & SK_TCP_NAGLE)
2643 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
2644 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
2645 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
2646 if (csk->tcp_flags & SK_TCP_SACK)
2647 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
2648 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
2649 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
2650
2651 l4kwqe1->tcp_flags = tcp_flags;
2652
2653 return dev->submit_kwqes(dev, wqes, num_wqes);
2654}
2655
2656static int cnic_cm_close_req(struct cnic_sock *csk)
2657{
2658 struct cnic_dev *dev = csk->dev;
2659 struct l4_kwq_close_req *l4kwqe;
2660 struct kwqe *wqes[1];
2661
2662 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
2663 memset(l4kwqe, 0, sizeof(*l4kwqe));
2664 wqes[0] = (struct kwqe *) l4kwqe;
2665
2666 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
2667 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
2668 l4kwqe->cid = csk->cid;
2669
2670 return dev->submit_kwqes(dev, wqes, 1);
2671}
2672
2673static int cnic_cm_abort_req(struct cnic_sock *csk)
2674{
2675 struct cnic_dev *dev = csk->dev;
2676 struct l4_kwq_reset_req *l4kwqe;
2677 struct kwqe *wqes[1];
2678
2679 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
2680 memset(l4kwqe, 0, sizeof(*l4kwqe));
2681 wqes[0] = (struct kwqe *) l4kwqe;
2682
2683 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
2684 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
2685 l4kwqe->cid = csk->cid;
2686
2687 return dev->submit_kwqes(dev, wqes, 1);
2688}
2689
2690static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
2691 u32 l5_cid, struct cnic_sock **csk, void *context)
2692{
2693 struct cnic_local *cp = dev->cnic_priv;
2694 struct cnic_sock *csk1;
2695
2696 if (l5_cid >= MAX_CM_SK_TBL_SZ)
2697 return -EINVAL;
2698
2699 csk1 = &cp->csk_tbl[l5_cid];
2700 if (atomic_read(&csk1->ref_count))
2701 return -EAGAIN;
2702
2703 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
2704 return -EBUSY;
2705
2706 csk1->dev = dev;
2707 csk1->cid = cid;
2708 csk1->l5_cid = l5_cid;
2709 csk1->ulp_type = ulp_type;
2710 csk1->context = context;
2711
2712 csk1->ka_timeout = DEF_KA_TIMEOUT;
2713 csk1->ka_interval = DEF_KA_INTERVAL;
2714 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
2715 csk1->tos = DEF_TOS;
2716 csk1->ttl = DEF_TTL;
2717 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
2718 csk1->rcv_buf = DEF_RCV_BUF;
2719 csk1->snd_buf = DEF_SND_BUF;
2720 csk1->seed = DEF_SEED;
2721
2722 *csk = csk1;
2723 return 0;
2724}
2725
2726static void cnic_cm_cleanup(struct cnic_sock *csk)
2727{
2728 if (csk->src_port) {
2729 struct cnic_dev *dev = csk->dev;
2730 struct cnic_local *cp = dev->cnic_priv;
2731
2732 cnic_free_id(&cp->csk_port_tbl, csk->src_port);
2733 csk->src_port = 0;
2734 }
2735}
2736
2737static void cnic_close_conn(struct cnic_sock *csk)
2738{
2739 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
2740 cnic_cm_upload_pg(csk);
2741 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
2742 }
2743 cnic_cm_cleanup(csk);
2744}
2745
2746static int cnic_cm_destroy(struct cnic_sock *csk)
2747{
2748 if (!cnic_in_use(csk))
2749 return -EINVAL;
2750
2751 csk_hold(csk);
2752 clear_bit(SK_F_INUSE, &csk->flags);
2753 smp_mb__after_clear_bit();
2754 while (atomic_read(&csk->ref_count) != 1)
2755 msleep(1);
2756 cnic_cm_cleanup(csk);
2757
2758 csk->flags = 0;
2759 csk_put(csk);
2760 return 0;
2761}
2762
2763static inline u16 cnic_get_vlan(struct net_device *dev,
2764 struct net_device **vlan_dev)
2765{
2766 if (dev->priv_flags & IFF_802_1Q_VLAN) {
2767 *vlan_dev = vlan_dev_real_dev(dev);
2768 return vlan_dev_vlan_id(dev);
2769 }
2770 *vlan_dev = dev;
2771 return 0;
2772}
2773
2774static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
2775 struct dst_entry **dst)
2776{
faea56c9 2777#if defined(CONFIG_INET)
a4636960
MC		 2778 struct flowi fl;
2779 int err;
2780 struct rtable *rt;
2781
2782 memset(&fl, 0, sizeof(fl));
2783 fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
2784
2785 err = ip_route_output_key(&init_net, &rt, &fl);
2786 if (!err)
2787 *dst = &rt->u.dst;
2788 return err;
faea56c9
RD		 2789#else
2790 return -ENETUNREACH;
2791#endif
a4636960
MC		 2792}
2793
2794static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
2795 struct dst_entry **dst)
2796{
faea56c9 2797#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
a4636960
MC		 2798 struct flowi fl;
2799
2800 memset(&fl, 0, sizeof(fl));
2801 ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
2802 if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
2803 fl.oif = dst_addr->sin6_scope_id;
2804
2805 *dst = ip6_route_output(&init_net, NULL, &fl);
2806 if (*dst)
2807 return 0;
2808#endif
2809
2810 return -ENETUNREACH;
2811}
2812
2813static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
2814 int ulp_type)
2815{
2816 struct cnic_dev *dev = NULL;
2817 struct dst_entry *dst;
2818 struct net_device *netdev = NULL;
2819 int err = -ENETUNREACH;
2820
2821 if (dst_addr->sin_family == AF_INET)
2822 err = cnic_get_v4_route(dst_addr, &dst);
2823 else if (dst_addr->sin_family == AF_INET6) {
2824 struct sockaddr_in6 *dst_addr6 =
2825 (struct sockaddr_in6 *) dst_addr;
2826
2827 err = cnic_get_v6_route(dst_addr6, &dst);
2828 } else
2829 return NULL;
2830
2831 if (err)
2832 return NULL;
2833
2834 if (!dst->dev)
2835 goto done;
2836
2837 cnic_get_vlan(dst->dev, &netdev);
2838
2839 dev = cnic_from_netdev(netdev);
2840
2841done:
2842 dst_release(dst);
2843 if (dev)
2844 cnic_put(dev);
2845 return dev;
2846}
2847
2848static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2849{
2850 struct cnic_dev *dev = csk->dev;
2851 struct cnic_local *cp = dev->cnic_priv;
2852
2853 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
2854}
2855
2856static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2857{
2858 struct cnic_dev *dev = csk->dev;
2859 struct cnic_local *cp = dev->cnic_priv;
2860 int is_v6, err, rc = -ENETUNREACH;
2861 struct dst_entry *dst;
2862 struct net_device *realdev;
2863 u32 local_port;
2864
2865 if (saddr->local.v6.sin6_family == AF_INET6 &&
2866 saddr->remote.v6.sin6_family == AF_INET6)
2867 is_v6 = 1;
2868 else if (saddr->local.v4.sin_family == AF_INET &&
2869 saddr->remote.v4.sin_family == AF_INET)
2870 is_v6 = 0;
2871 else
2872 return -EINVAL;
2873
2874 clear_bit(SK_F_IPV6, &csk->flags);
2875
2876 if (is_v6) {
faea56c9 2877#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
a4636960
MC		 2878 set_bit(SK_F_IPV6, &csk->flags);
2879 err = cnic_get_v6_route(&saddr->remote.v6, &dst);
2880 if (err)
2881 return err;
2882
2883 if (!dst || dst->error || !dst->dev)
2884 goto err_out;
2885
2886 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
2887 sizeof(struct in6_addr));
2888 csk->dst_port = saddr->remote.v6.sin6_port;
2889 local_port = saddr->local.v6.sin6_port;
2890#else
2891 return rc;
2892#endif
2893
2894 } else {
2895 err = cnic_get_v4_route(&saddr->remote.v4, &dst);
2896 if (err)
2897 return err;
2898
2899 if (!dst || dst->error || !dst->dev)
2900 goto err_out;
2901
2902 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
2903 csk->dst_port = saddr->remote.v4.sin_port;
2904 local_port = saddr->local.v4.sin_port;
2905 }
2906
2907 csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
2908 if (realdev != dev->netdev)
2909 goto err_out;
2910
2911 if (local_port >= CNIC_LOCAL_PORT_MIN &&
2912 local_port < CNIC_LOCAL_PORT_MAX) {
2913 if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
2914 local_port = 0;
2915 } else
2916 local_port = 0;
2917
2918 if (!local_port) {
2919 local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
2920 if (local_port == -1) {
2921 rc = -ENOMEM;
2922 goto err_out;
2923 }
2924 }
2925 csk->src_port = local_port;
2926
2927 csk->mtu = dst_mtu(dst);
2928 rc = 0;
2929
2930err_out:
2931 dst_release(dst);
2932 return rc;
2933}
2934
2935static void cnic_init_csk_state(struct cnic_sock *csk)
2936{
2937 csk->state = 0;
2938 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
2939 clear_bit(SK_F_CLOSING, &csk->flags);
2940}
2941
2942static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2943{
2944 int err = 0;
2945
2946 if (!cnic_in_use(csk))
2947 return -EINVAL;
2948
2949 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
2950 return -EINVAL;
2951
2952 cnic_init_csk_state(csk);
2953
2954 err = cnic_get_route(csk, saddr);
2955 if (err)
2956 goto err_out;
2957
2958 err = cnic_resolve_addr(csk, saddr);
2959 if (!err)
2960 return 0;
2961
2962err_out:
2963 clear_bit(SK_F_CONNECT_START, &csk->flags);
2964 return err;
2965}
2966
2967static int cnic_cm_abort(struct cnic_sock *csk)
2968{
2969 struct cnic_local *cp = csk->dev->cnic_priv;
2970 u32 opcode;
2971
2972 if (!cnic_in_use(csk))
2973 return -EINVAL;
2974
2975 if (cnic_abort_prep(csk))
2976 return cnic_cm_abort_req(csk);
2977
2978 /* Getting here means that we haven't started connect, or
2979 * connect was not successful.
2980 */
2981
2982 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2983 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
2984 opcode = csk->state;
2985 else
2986 opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
2987 cp->close_conn(csk, opcode);
2988
2989 return 0;
2990}
2991
2992static int cnic_cm_close(struct cnic_sock *csk)
2993{
2994 if (!cnic_in_use(csk))
2995 return -EINVAL;
2996
2997 if (cnic_close_prep(csk)) {
2998 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2999 return cnic_cm_close_req(csk);
3000 }
3001 return 0;
3002}
3003
3004static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3005 u8 opcode)
3006{
3007 struct cnic_ulp_ops *ulp_ops;
3008 int ulp_type = csk->ulp_type;
3009
3010 rcu_read_lock();
3011 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3012 if (ulp_ops) {
3013 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3014 ulp_ops->cm_connect_complete(csk);
3015 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3016 ulp_ops->cm_close_complete(csk);
3017 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3018 ulp_ops->cm_remote_abort(csk);
3019 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3020 ulp_ops->cm_abort_complete(csk);
3021 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3022 ulp_ops->cm_remote_close(csk);
3023 }
3024 rcu_read_unlock();
3025}
3026
3027static int cnic_cm_set_pg(struct cnic_sock *csk)
3028{
3029 if (cnic_offld_prep(csk)) {
3030 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3031 cnic_cm_update_pg(csk);
3032 else
3033 cnic_cm_offload_pg(csk);
3034 }
3035 return 0;
3036}
3037
3038static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3039{
3040 struct cnic_local *cp = dev->cnic_priv;
3041 u32 l5_cid = kcqe->pg_host_opaque;
3042 u8 opcode = kcqe->op_code;
3043 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3044
3045 csk_hold(csk);
3046 if (!cnic_in_use(csk))
3047 goto done;
3048
3049 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3050 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3051 goto done;
3052 }
3053 csk->pg_cid = kcqe->pg_cid;
3054 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3055 cnic_cm_conn_req(csk);
3056
3057done:
3058 csk_put(csk);
3059}
3060
3061static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3062{
3063 struct cnic_local *cp = dev->cnic_priv;
3064 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3065 u8 opcode = l4kcqe->op_code;
3066 u32 l5_cid;
3067 struct cnic_sock *csk;
3068
3069 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3070 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3071 cnic_cm_process_offld_pg(dev, l4kcqe);
3072 return;
3073 }
3074
3075 l5_cid = l4kcqe->conn_id;
3076 if (opcode & 0x80)
3077 l5_cid = l4kcqe->cid;
3078 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3079 return;
3080
3081 csk = &cp->csk_tbl[l5_cid];
3082 csk_hold(csk);
3083
3084 if (!cnic_in_use(csk)) {
3085 csk_put(csk);
3086 return;
3087 }
3088
3089 switch (opcode) {
3090 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3091 if (l4kcqe->status == 0)
3092 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3093
3094 smp_mb__before_clear_bit();
3095 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3096 cnic_cm_upcall(cp, csk, opcode);
3097 break;
3098
3099 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3100 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
3101 csk->state = opcode;
3102 /* fall through */
3103 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3104 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
71034ba8
MC		 3105 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3106 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
a4636960
MC		 3107 cp->close_conn(csk, opcode);
3108 break;
3109
3110 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3111 cnic_cm_upcall(cp, csk, opcode);
3112 break;
3113 }
3114 csk_put(csk);
3115}
3116
3117static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3118{
3119 struct cnic_dev *dev = data;
3120 int i;
3121
3122 for (i = 0; i < num; i++)
3123 cnic_cm_process_kcqe(dev, kcqe[i]);
3124}
3125
3126static struct cnic_ulp_ops cm_ulp_ops = {
3127 .indicate_kcqes = cnic_cm_indicate_kcqe,
3128};
3129
3130static void cnic_cm_free_mem(struct cnic_dev *dev)
3131{
3132 struct cnic_local *cp = dev->cnic_priv;
3133
3134 kfree(cp->csk_tbl);
3135 cp->csk_tbl = NULL;
3136 cnic_free_id_tbl(&cp->csk_port_tbl);
3137}
3138
3139static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3140{
3141 struct cnic_local *cp = dev->cnic_priv;
3142
3143 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3144 GFP_KERNEL);
3145 if (!cp->csk_tbl)
3146 return -ENOMEM;
3147
3148 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3149 CNIC_LOCAL_PORT_MIN)) {
3150 cnic_cm_free_mem(dev);
3151 return -ENOMEM;
3152 }
3153 return 0;
3154}
3155
3156static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3157{
3158 if ((opcode == csk->state) ||
3159 (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
3160 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
3161 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
3162 return 1;
3163 }
3164 return 0;
3165}
3166
3167static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3168{
3169 struct cnic_dev *dev = csk->dev;
3170 struct cnic_local *cp = dev->cnic_priv;
3171
3172 clear_bit(SK_F_CONNECT_START, &csk->flags);
3173 if (cnic_ready_to_close(csk, opcode)) {
3174 cnic_close_conn(csk);
3175 cnic_cm_upcall(cp, csk, opcode);
3176 }
3177}
3178
3179static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3180{
3181}
3182
3183static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3184{
3185 u32 seed;
3186
3187 get_random_bytes(&seed, 4);
3188 cnic_ctx_wr(dev, 45, 0, seed);
3189 return 0;
3190}
3191
71034ba8
MC		 3192static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3193{
3194 struct cnic_dev *dev = csk->dev;
3195 struct cnic_local *cp = dev->cnic_priv;
3196 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3197 union l5cm_specific_data l5_data;
3198 u32 cmd = 0;
3199 int close_complete = 0;
3200
3201 switch (opcode) {
3202 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3203 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3204 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3205 if (cnic_ready_to_close(csk, opcode))
3206 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3207 break;
3208 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3209 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3210 break;
3211 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3212 close_complete = 1;
3213 break;
3214 }
3215 if (cmd) {
3216 memset(&l5_data, 0, sizeof(l5_data));
3217
3218 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3219 &l5_data);
3220 } else if (close_complete) {
3221 ctx->timestamp = jiffies;
3222 cnic_close_conn(csk);
3223 cnic_cm_upcall(cp, csk, csk->state);
3224 }
3225}
3226
3227static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3228{
3229}
3230
3231static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3232{
3233 struct cnic_local *cp = dev->cnic_priv;
3234 int func = CNIC_FUNC(cp);
3235
3236 cnic_init_bnx2x_mac(dev);
3237 cnic_bnx2x_set_tcp_timestamp(dev, 1);
3238
3239 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3240 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(func), 0);
3241
3242 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3243 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(func), 1);
3244 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3245 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(func),
3246 DEF_MAX_DA_COUNT);
3247
3248 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3249 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(func), DEF_TTL);
3250 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3251 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(func), DEF_TOS);
3252 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3253 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(func), 2);
3254 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3255 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(func), DEF_SWS_TIMER);
3256
3257 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(func),
3258 DEF_MAX_CWND);
3259 return 0;
3260}
3261
a4636960
MC		 3262static int cnic_cm_open(struct cnic_dev *dev)
3263{
3264 struct cnic_local *cp = dev->cnic_priv;
3265 int err;
3266
3267 err = cnic_cm_alloc_mem(dev);
3268 if (err)
3269 return err;
3270
3271 err = cp->start_cm(dev);
3272
3273 if (err)
3274 goto err_out;
3275
3276 dev->cm_create = cnic_cm_create;
3277 dev->cm_destroy = cnic_cm_destroy;
3278 dev->cm_connect = cnic_cm_connect;
3279 dev->cm_abort = cnic_cm_abort;
3280 dev->cm_close = cnic_cm_close;
3281 dev->cm_select_dev = cnic_cm_select_dev;
3282
3283 cp->ulp_handle[CNIC_ULP_L4] = dev;
3284 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
3285 return 0;
3286
3287err_out:
3288 cnic_cm_free_mem(dev);
3289 return err;
3290}
3291
3292static int cnic_cm_shutdown(struct cnic_dev *dev)
3293{
3294 struct cnic_local *cp = dev->cnic_priv;
3295 int i;
3296
3297 cp->stop_cm(dev);
3298
3299 if (!cp->csk_tbl)
3300 return 0;
3301
3302 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
3303 struct cnic_sock *csk = &cp->csk_tbl[i];
3304
3305 clear_bit(SK_F_INUSE, &csk->flags);
3306 cnic_cm_cleanup(csk);
3307 }
3308 cnic_cm_free_mem(dev);
3309
3310 return 0;
3311}
3312
3313static void cnic_init_context(struct cnic_dev *dev, u32 cid)
3314{
3315 struct cnic_local *cp = dev->cnic_priv;
3316 u32 cid_addr;
3317 int i;
3318
3319 if (CHIP_NUM(cp) == CHIP_NUM_5709)
3320 return;
3321
3322 cid_addr = GET_CID_ADDR(cid);
3323
3324 for (i = 0; i < CTX_SIZE; i += 4)
3325 cnic_ctx_wr(dev, cid_addr, i, 0);
3326}
3327
3328static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
3329{
3330 struct cnic_local *cp = dev->cnic_priv;
3331 int ret = 0, i;
3332 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
3333
3334 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3335 return 0;
3336
3337 for (i = 0; i < cp->ctx_blks; i++) {
3338 int j;
3339 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
3340 u32 val;
3341
3342 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
3343
3344 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
3345 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
3346 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
3347 (u64) cp->ctx_arr[i].mapping >> 32);
3348 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
3349 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
3350 for (j = 0; j < 10; j++) {
3351
3352 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
3353 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
3354 break;
3355 udelay(5);
3356 }
3357 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
3358 ret = -EBUSY;
3359 break;
3360 }
3361 }
3362 return ret;
3363}
3364
3365static void cnic_free_irq(struct cnic_dev *dev)
3366{
3367 struct cnic_local *cp = dev->cnic_priv;
3368 struct cnic_eth_dev *ethdev = cp->ethdev;
3369
3370 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3371 cp->disable_int_sync(dev);
3372 tasklet_disable(&cp->cnic_irq_task);
3373 free_irq(ethdev->irq_arr[0].vector, dev);
3374 }
3375}
3376
3377static int cnic_init_bnx2_irq(struct cnic_dev *dev)
3378{
3379 struct cnic_local *cp = dev->cnic_priv;
3380 struct cnic_eth_dev *ethdev = cp->ethdev;
3381
3382 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3383 int err, i = 0;
3384 int sblk_num = cp->status_blk_num;
3385 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
3386 BNX2_HC_SB_CONFIG_1;
3387
3388 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
3389
3390 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
3391 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
3392 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
3393
3394 cp->bnx2_status_blk = cp->status_blk;
3395 cp->last_status_idx = cp->bnx2_status_blk->status_idx;
164165da 3396 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
a4636960
MC		 3397 (unsigned long) dev);
3398 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3399 "cnic", dev);
3400 if (err) {
3401 tasklet_disable(&cp->cnic_irq_task);
3402 return err;
3403 }
3404 while (cp->bnx2_status_blk->status_completion_producer_index &&
3405 i < 10) {
3406 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
3407 1 << (11 + sblk_num));
3408 udelay(10);
3409 i++;
3410 barrier();
3411 }
3412 if (cp->bnx2_status_blk->status_completion_producer_index) {
3413 cnic_free_irq(dev);
3414 goto failed;
3415 }
3416
3417 } else {
3418 struct status_block *sblk = cp->status_blk;
3419 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
3420 int i = 0;
3421
3422 while (sblk->status_completion_producer_index && i < 10) {
3423 CNIC_WR(dev, BNX2_HC_COMMAND,
3424 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
3425 udelay(10);
3426 i++;
3427 barrier();
3428 }
3429 if (sblk->status_completion_producer_index)
3430 goto failed;
3431
3432 }
3433 return 0;
3434
3435failed:
3436 printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
3437 dev->netdev->name);
3438 return -EBUSY;
3439}
3440
3441static void cnic_enable_bnx2_int(struct cnic_dev *dev)
3442{
3443 struct cnic_local *cp = dev->cnic_priv;
3444 struct cnic_eth_dev *ethdev = cp->ethdev;
3445
3446 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3447 return;
3448
3449 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3450 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3451}
3452
3453static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
3454{
3455 struct cnic_local *cp = dev->cnic_priv;
3456 struct cnic_eth_dev *ethdev = cp->ethdev;
3457
3458 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3459 return;
3460
3461 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3462 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
3463 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
3464 synchronize_irq(ethdev->irq_arr[0].vector);
3465}
3466
3467static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
3468{
3469 struct cnic_local *cp = dev->cnic_priv;
3470 struct cnic_eth_dev *ethdev = cp->ethdev;
3471 u32 cid_addr, tx_cid, sb_id;
3472 u32 val, offset0, offset1, offset2, offset3;
3473 int i;
3474 struct tx_bd *txbd;
3475 dma_addr_t buf_map;
3476 struct status_block *s_blk = cp->status_blk;
3477
3478 sb_id = cp->status_blk_num;
3479 tx_cid = 20;
3480 cnic_init_context(dev, tx_cid);
3481 cnic_init_context(dev, tx_cid + 1);
3482 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
3483 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3484 struct status_block_msix *sblk = cp->status_blk;
3485
3486 tx_cid = TX_TSS_CID + sb_id - 1;
3487 cnic_init_context(dev, tx_cid);
3488 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
3489 (TX_TSS_CID << 7));
3490 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
3491 }
3492 cp->tx_cons = *cp->tx_cons_ptr;
3493
3494 cid_addr = GET_CID_ADDR(tx_cid);
3495 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
3496 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
3497
3498 for (i = 0; i < PHY_CTX_SIZE; i += 4)
3499 cnic_ctx_wr(dev, cid_addr2, i, 0);
3500
3501 offset0 = BNX2_L2CTX_TYPE_XI;
3502 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
3503 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
3504 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
3505 } else {
3506 offset0 = BNX2_L2CTX_TYPE;
3507 offset1 = BNX2_L2CTX_CMD_TYPE;
3508 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
3509 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
3510 }
3511 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
3512 cnic_ctx_wr(dev, cid_addr, offset0, val);
3513
3514 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
3515 cnic_ctx_wr(dev, cid_addr, offset1, val);
3516
3517 txbd = (struct tx_bd *) cp->l2_ring;
3518
3519 buf_map = cp->l2_buf_map;
3520 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
3521 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
3522 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3523 }
3524 val = (u64) cp->l2_ring_map >> 32;
3525 cnic_ctx_wr(dev, cid_addr, offset2, val);
3526 txbd->tx_bd_haddr_hi = val;
3527
3528 val = (u64) cp->l2_ring_map & 0xffffffff;
3529 cnic_ctx_wr(dev, cid_addr, offset3, val);
3530 txbd->tx_bd_haddr_lo = val;
3531}
3532
3533static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
3534{
3535 struct cnic_local *cp = dev->cnic_priv;
3536 struct cnic_eth_dev *ethdev = cp->ethdev;
3537 u32 cid_addr, sb_id, val, coal_reg, coal_val;
3538 int i;
3539 struct rx_bd *rxbd;
3540 struct status_block *s_blk = cp->status_blk;
3541
3542 sb_id = cp->status_blk_num;
3543 cnic_init_context(dev, 2);
3544 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
3545 coal_reg = BNX2_HC_COMMAND;
3546 coal_val = CNIC_RD(dev, coal_reg);
3547 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3548 struct status_block_msix *sblk = cp->status_blk;
3549
3550 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
3551 coal_reg = BNX2_HC_COALESCE_NOW;
3552 coal_val = 1 << (11 + sb_id);
3553 }
3554 i = 0;
3555 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
3556 CNIC_WR(dev, coal_reg, coal_val);
3557 udelay(10);
3558 i++;
3559 barrier();
3560 }
3561 cp->rx_cons = *cp->rx_cons_ptr;
3562
3563 cid_addr = GET_CID_ADDR(2);
3564 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
3565 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
3566 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
3567
3568 if (sb_id == 0)
d0549382 3569 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
a4636960 3570 else
d0549382 3571 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
a4636960
MC		 3572 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
3573
3574 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
3575 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
3576 dma_addr_t buf_map;
3577 int n = (i % cp->l2_rx_ring_size) + 1;
3578
3579 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3580 rxbd->rx_bd_len = cp->l2_single_buf_size;
3581 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3582 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
3583 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3584 }
3585 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3586 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
3587 rxbd->rx_bd_haddr_hi = val;
3588
3589 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3590 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
3591 rxbd->rx_bd_haddr_lo = val;
3592
3593 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
3594 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
3595}
3596
3597static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
3598{
3599 struct kwqe *wqes[1], l2kwqe;
3600
3601 memset(&l2kwqe, 0, sizeof(l2kwqe));
3602 wqes[0] = &l2kwqe;
3603 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
3604 (L2_KWQE_OPCODE_VALUE_FLUSH <<
3605 KWQE_OPCODE_SHIFT) | 2;
3606 dev->submit_kwqes(dev, wqes, 1);
3607}
3608
3609static void cnic_set_bnx2_mac(struct cnic_dev *dev)
3610{
3611 struct cnic_local *cp = dev->cnic_priv;
3612 u32 val;
3613
3614 val = cp->func << 2;
3615
3616 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
3617
3618 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3619 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
3620 dev->mac_addr[0] = (u8) (val >> 8);
3621 dev->mac_addr[1] = (u8) val;
3622
3623 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
3624
3625 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3626 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
3627 dev->mac_addr[2] = (u8) (val >> 24);
3628 dev->mac_addr[3] = (u8) (val >> 16);
3629 dev->mac_addr[4] = (u8) (val >> 8);
3630 dev->mac_addr[5] = (u8) val;
3631
3632 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
3633
3634 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
3635 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3636 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
3637
3638 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
3639 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
3640 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
3641}
3642
3643static int cnic_start_bnx2_hw(struct cnic_dev *dev)
3644{
3645 struct cnic_local *cp = dev->cnic_priv;
3646 struct cnic_eth_dev *ethdev = cp->ethdev;
3647 struct status_block *sblk = cp->status_blk;
3648 u32 val;
3649 int err;
3650
3651 cnic_set_bnx2_mac(dev);
3652
3653 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
3654 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
3655 if (BCM_PAGE_BITS > 12)
3656 val |= (12 - 8) << 4;
3657 else
3658 val |= (BCM_PAGE_BITS - 8) << 4;
3659
3660 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
3661
3662 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
3663 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
3664 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
3665
3666 err = cnic_setup_5709_context(dev, 1);
3667 if (err)
3668 return err;
3669
3670 cnic_init_context(dev, KWQ_CID);
3671 cnic_init_context(dev, KCQ_CID);
3672
3673 cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
3674 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
3675
3676 cp->max_kwq_idx = MAX_KWQ_IDX;
3677 cp->kwq_prod_idx = 0;
3678 cp->kwq_con_idx = 0;
3679 cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
3680
3681 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
3682 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
3683 else
3684 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
3685
3686 /* Initialize the kernel work queue context. */
3687 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3688 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3689 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
3690
3691 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
3692 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3693
3694 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
3695 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3696
3697 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
3698 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3699
3700 val = (u32) cp->kwq_info.pgtbl_map;
3701 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3702
3703 cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
3704 cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
3705
3706 cp->kcq_prod_idx = 0;
3707
3708 /* Initialize the kernel complete queue context. */
3709 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3710 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3711 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
3712
3713 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
3714 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3715
3716 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
3717 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3718
3719 val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
3720 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3721
3722 val = (u32) cp->kcq_info.pgtbl_map;
3723 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3724
3725 cp->int_num = 0;
3726 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3727 u32 sb_id = cp->status_blk_num;
d0549382 3728 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
a4636960
MC		 3729
3730 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
3731 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3732 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3733 }
3734
3735 /* Enable Commnad Scheduler notification when we write to the
3736 * host producer index of the kernel contexts. */
3737 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
3738
3739 /* Enable Command Scheduler notification when we write to either
3740 * the Send Queue or Receive Queue producer indexes of the kernel
3741 * bypass contexts. */
3742 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
3743 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
3744
3745 /* Notify COM when the driver post an application buffer. */
3746 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
3747
3748 /* Set the CP and COM doorbells. These two processors polls the
3749 * doorbell for a non zero value before running. This must be done
3750 * after setting up the kernel queue contexts. */
3751 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
3752 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
3753
3754 cnic_init_bnx2_tx_ring(dev);
3755 cnic_init_bnx2_rx_ring(dev);
3756
3757 err = cnic_init_bnx2_irq(dev);
3758 if (err) {
3759 printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
3760 dev->netdev->name);
3761 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
3762 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
3763 return err;
3764 }
3765
3766 return 0;
3767}
3768
71034ba8
MC		 3769static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
3770{
3771 struct cnic_local *cp = dev->cnic_priv;
3772 struct cnic_eth_dev *ethdev = cp->ethdev;
3773 u32 start_offset = ethdev->ctx_tbl_offset;
3774 int i;
3775
3776 for (i = 0; i < cp->ctx_blks; i++) {
3777 struct cnic_ctx *ctx = &cp->ctx_arr[i];
3778 dma_addr_t map = ctx->mapping;
3779
3780 if (cp->ctx_align) {
3781 unsigned long mask = cp->ctx_align - 1;
3782
3783 map = (map + mask) & ~mask;
3784 }
3785
3786 cnic_ctx_tbl_wr(dev, start_offset + i, map);
3787 }
3788}
3789
3790static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
3791{
3792 struct cnic_local *cp = dev->cnic_priv;
3793 struct cnic_eth_dev *ethdev = cp->ethdev;
3794 int err = 0;
3795
164165da 3796 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
71034ba8
MC		 3797 (unsigned long) dev);
3798 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3799 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3800 "cnic", dev);
3801 if (err)
3802 tasklet_disable(&cp->cnic_irq_task);
3803 }
3804 return err;
3805}
3806
3807static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
3808{
3809 struct cnic_local *cp = dev->cnic_priv;
3810 u8 sb_id = cp->status_blk_num;
3811 int port = CNIC_PORT(cp);
3812
3813 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
3814 CSTORM_SB_HC_TIMEOUT_C_OFFSET(port, sb_id,
3815 HC_INDEX_C_ISCSI_EQ_CONS),
3816 64 / 12);
3817 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
3818 CSTORM_SB_HC_DISABLE_C_OFFSET(port, sb_id,
3819 HC_INDEX_C_ISCSI_EQ_CONS), 0);
3820}
3821
3822static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
3823{
3824}
3825
3826static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev)
3827{
3828 struct cnic_local *cp = dev->cnic_priv;
3829 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) cp->l2_ring;
3830 struct eth_context *context;
3831 struct regpair context_addr;
3832 dma_addr_t buf_map;
3833 int func = CNIC_FUNC(cp);
3834 int port = CNIC_PORT(cp);
3835 int i;
3836 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3837 u32 val;
3838
3839 memset(txbd, 0, BCM_PAGE_SIZE);
3840
3841 buf_map = cp->l2_buf_map;
3842 for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
3843 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
3844 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
3845
3846 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3847 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3848 reg_bd->addr_hi = start_bd->addr_hi;
3849 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
3850 start_bd->nbytes = cpu_to_le16(0x10);
3851 start_bd->nbd = cpu_to_le16(3);
3852 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
3853 start_bd->general_data = (UNICAST_ADDRESS <<
3854 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
3855 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
3856
3857 }
3858 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 1, &context_addr);
3859
3860 val = (u64) cp->l2_ring_map >> 32;
3861 txbd->next_bd.addr_hi = cpu_to_le32(val);
3862
3863 context->xstorm_st_context.tx_bd_page_base_hi = val;
3864
3865 val = (u64) cp->l2_ring_map & 0xffffffff;
3866 txbd->next_bd.addr_lo = cpu_to_le32(val);
3867
3868 context->xstorm_st_context.tx_bd_page_base_lo = val;
3869
3870 context->cstorm_st_context.sb_index_number =
3871 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS;
3872 context->cstorm_st_context.status_block_id = BNX2X_DEF_SB_ID;
3873
3874 context->xstorm_st_context.statistics_data = (cli |
3875 XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE);
3876
3877 context->xstorm_ag_context.cdu_reserved =
3878 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
3879 CDU_REGION_NUMBER_XCM_AG,
3880 ETH_CONNECTION_TYPE);
3881
3882 /* reset xstorm per client statistics */
3883 val = BAR_XSTRORM_INTMEM +
3884 XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3885 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
3886 CNIC_WR(dev, val + i * 4, 0);
3887
3888 cp->tx_cons_ptr =
3889 &cp->bnx2x_def_status_blk->c_def_status_block.index_values[
3890 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS];
3891}
3892
3893static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev)
3894{
3895 struct cnic_local *cp = dev->cnic_priv;
3896 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (cp->l2_ring +
3897 BCM_PAGE_SIZE);
3898 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
3899 (cp->l2_ring + (2 * BCM_PAGE_SIZE));
3900 struct eth_context *context;
3901 struct regpair context_addr;
3902 int i;
3903 int port = CNIC_PORT(cp);
3904 int func = CNIC_FUNC(cp);
3905 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3906 u32 val;
3907 struct tstorm_eth_client_config tstorm_client = {0};
3908
3909 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
3910 dma_addr_t buf_map;
3911 int n = (i % cp->l2_rx_ring_size) + 1;
3912
3913 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3914 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3915 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3916 }
3917 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 0, &context_addr);
3918
3919 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3920 rxbd->addr_hi = cpu_to_le32(val);
3921
3922 context->ustorm_st_context.common.bd_page_base_hi = val;
3923
3924 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3925 rxbd->addr_lo = cpu_to_le32(val);
3926
3927 context->ustorm_st_context.common.bd_page_base_lo = val;
3928
3929 context->ustorm_st_context.common.sb_index_numbers =
3930 BNX2X_ISCSI_RX_SB_INDEX_NUM;
3931 context->ustorm_st_context.common.clientId = cli;
3932 context->ustorm_st_context.common.status_block_id = BNX2X_DEF_SB_ID;
3933 context->ustorm_st_context.common.flags =
3934 USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS;
3935 context->ustorm_st_context.common.statistics_counter_id = cli;
3936 context->ustorm_st_context.common.mc_alignment_log_size = 0;
3937 context->ustorm_st_context.common.bd_buff_size =
3938 cp->l2_single_buf_size;
3939
3940 context->ustorm_ag_context.cdu_usage =
3941 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
3942 CDU_REGION_NUMBER_UCM_AG,
3943 ETH_CONNECTION_TYPE);
3944
3945 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
3946 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
3947 rxcqe->addr_hi = cpu_to_le32(val);
3948
3949 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3950 USTORM_CQE_PAGE_BASE_OFFSET(port, cli) + 4, val);
3951
3952 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3953 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli) + 4, val);
3954
3955 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
3956 rxcqe->addr_lo = cpu_to_le32(val);
3957
3958 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3959 USTORM_CQE_PAGE_BASE_OFFSET(port, cli), val);
3960
3961 CNIC_WR(dev, BAR_USTRORM_INTMEM +
3962 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli), val);
3963
3964 /* client tstorm info */
3965 tstorm_client.mtu = cp->l2_single_buf_size - 14;
3966 tstorm_client.config_flags =
3967 (TSTORM_ETH_CLIENT_CONFIG_E1HOV_REM_ENABLE |
3968 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE);
3969 tstorm_client.statistics_counter_id = cli;
3970
3971 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
3972 TSTORM_CLIENT_CONFIG_OFFSET(port, cli),
3973 ((u32 *)&tstorm_client)[0]);
3974 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
3975 TSTORM_CLIENT_CONFIG_OFFSET(port, cli) + 4,
3976 ((u32 *)&tstorm_client)[1]);
3977
3978 /* reset tstorm per client statistics */
3979 val = BAR_TSTRORM_INTMEM +
3980 TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3981 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
3982 CNIC_WR(dev, val + i * 4, 0);
3983
3984 /* reset ustorm per client statistics */
3985 val = BAR_USTRORM_INTMEM +
3986 USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3987 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
3988 CNIC_WR(dev, val + i * 4, 0);
3989
3990 cp->rx_cons_ptr =
3991 &cp->bnx2x_def_status_blk->u_def_status_block.index_values[
3992 HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS];
3993}
3994
3995static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
3996{
3997 struct cnic_local *cp = dev->cnic_priv;
3998 u32 base, addr, val;
3999 int port = CNIC_PORT(cp);
4000
4001 dev->max_iscsi_conn = 0;
4002 base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
4003 if (base < 0xa0000 || base >= 0xc0000)
4004 return;
4005
dd2e4dbc 4006 addr = BNX2X_SHMEM_ADDR(base,
71034ba8
MC		 4007 dev_info.port_hw_config[port].iscsi_mac_upper);
4008
dd2e4dbc
MC		 4009 val = CNIC_RD(dev, addr);
4010
71034ba8
MC		 4011 dev->mac_addr[0] = (u8) (val >> 8);
4012 dev->mac_addr[1] = (u8) val;
4013
dd2e4dbc 4014 addr = BNX2X_SHMEM_ADDR(base,
71034ba8
MC		 4015 dev_info.port_hw_config[port].iscsi_mac_lower);
4016
dd2e4dbc
MC		 4017 val = CNIC_RD(dev, addr);
4018
71034ba8
MC		 4019 dev->mac_addr[2] = (u8) (val >> 24);
4020 dev->mac_addr[3] = (u8) (val >> 16);
4021 dev->mac_addr[4] = (u8) (val >> 8);
4022 dev->mac_addr[5] = (u8) val;
4023
4024 addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4025 val = CNIC_RD(dev, addr);
4026
4027 if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4028 u16 val16;
4029
4030 addr = BNX2X_SHMEM_ADDR(base,
4031 drv_lic_key[port].max_iscsi_init_conn);
4032 val16 = CNIC_RD16(dev, addr);
4033
4034 if (val16)
4035 val16 ^= 0x1e1e;
4036 dev->max_iscsi_conn = val16;
4037 }
4038 if (BNX2X_CHIP_IS_E1H(cp->chip_id)) {
4039 int func = CNIC_FUNC(cp);
4040
4041 addr = BNX2X_SHMEM_ADDR(base,
4042 mf_cfg.func_mf_config[func].e1hov_tag);
4043 val = CNIC_RD(dev, addr);
4044 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4045 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4046 addr = BNX2X_SHMEM_ADDR(base,
4047 mf_cfg.func_mf_config[func].config);
4048 val = CNIC_RD(dev, addr);
4049 val &= FUNC_MF_CFG_PROTOCOL_MASK;
4050 if (val != FUNC_MF_CFG_PROTOCOL_ISCSI)
4051 dev->max_iscsi_conn = 0;
4052 }
4053 }
4054}
4055
4056static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4057{
4058 struct cnic_local *cp = dev->cnic_priv;
4059 int func = CNIC_FUNC(cp), ret, i;
4060 int port = CNIC_PORT(cp);
4061 u16 eq_idx;
4062 u8 sb_id = cp->status_blk_num;
4063
4064 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4065 BNX2X_ISCSI_START_CID);
4066
4067 if (ret)
4068 return -ENOMEM;
4069
4070 cp->kcq_io_addr = BAR_CSTRORM_INTMEM +
4071 CSTORM_ISCSI_EQ_PROD_OFFSET(func, 0);
4072 cp->kcq_prod_idx = 0;
4073
4074 cnic_get_bnx2x_iscsi_info(dev);
4075
4076 /* Only 1 EQ */
4077 CNIC_WR16(dev, cp->kcq_io_addr, MAX_KCQ_IDX);
4078 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4079 CSTORM_ISCSI_EQ_CONS_OFFSET(func, 0), 0);
4080 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4081 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0),
4082 cp->kcq_info.pg_map_arr[1] & 0xffffffff);
4083 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4084 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0) + 4,
4085 (u64) cp->kcq_info.pg_map_arr[1] >> 32);
4086 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4087 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0),
4088 cp->kcq_info.pg_map_arr[0] & 0xffffffff);
4089 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4090 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0) + 4,
4091 (u64) cp->kcq_info.pg_map_arr[0] >> 32);
4092 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4093 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(func, 0), 1);
4094 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4095 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(func, 0), cp->status_blk_num);
4096 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4097 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(func, 0),
4098 HC_INDEX_C_ISCSI_EQ_CONS);
4099
4100 for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4101 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4102 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i),
4103 cp->conn_buf_info.pgtbl[2 * i]);
4104 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4105 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i) + 4,
4106 cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4107 }
4108
4109 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4110 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func),
4111 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4112 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4113 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func) + 4,
4114 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4115
4116 cnic_setup_bnx2x_context(dev);
4117
4118 eq_idx = CNIC_RD16(dev, BAR_CSTRORM_INTMEM +
4119 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4120 offsetof(struct cstorm_status_block_c,
4121 index_values[HC_INDEX_C_ISCSI_EQ_CONS]));
4122 if (eq_idx != 0) {
4123 printk(KERN_ERR PFX "%s: EQ cons index %x != 0\n",
4124 dev->netdev->name, eq_idx);
4125 return -EBUSY;
4126 }
4127 ret = cnic_init_bnx2x_irq(dev);
4128 if (ret)
4129 return ret;
4130
4131 cnic_init_bnx2x_tx_ring(dev);
4132 cnic_init_bnx2x_rx_ring(dev);
4133
4134 return 0;
4135}
4136
86b53606
MC		 4137static void cnic_init_rings(struct cnic_dev *dev)
4138{
4139 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4140 cnic_init_bnx2_tx_ring(dev);
4141 cnic_init_bnx2_rx_ring(dev);
71034ba8
MC		 4142 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4143 struct cnic_local *cp = dev->cnic_priv;
71034ba8
MC		 4144 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4145 union l5cm_specific_data l5_data;
4146 struct ustorm_eth_rx_producers rx_prods = {0};
c7596b79 4147 u32 off, i;
71034ba8
MC		 4148
4149 rx_prods.bd_prod = 0;
4150 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
4151 barrier();
4152
c7596b79 4153 off = BAR_USTRORM_INTMEM +
71034ba8
MC		 4154 USTORM_RX_PRODS_OFFSET(CNIC_PORT(cp), cli);
4155
4156 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
c7596b79 4157 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
71034ba8
MC		 4158
4159 cnic_init_bnx2x_tx_ring(dev);
4160 cnic_init_bnx2x_rx_ring(dev);
4161
4162 l5_data.phy_address.lo = cli;
4163 l5_data.phy_address.hi = 0;
4164 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
4165 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
4166 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 1);
86b53606
MC		 4167 }
4168}
4169
4170static void cnic_shutdown_rings(struct cnic_dev *dev)
4171{
4172 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4173 cnic_shutdown_bnx2_rx_ring(dev);
71034ba8
MC		 4174 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4175 struct cnic_local *cp = dev->cnic_priv;
4176 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
8b065b67 4177 union l5cm_specific_data l5_data;
71034ba8
MC		 4178
4179 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 0);
8b065b67
MC		 4180
4181 l5_data.phy_address.lo = cli;
4182 l5_data.phy_address.hi = 0;
4183 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
4184 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
4185 msleep(10);
86b53606
MC		 4186 }
4187}
4188
a3059b12 4189static int cnic_register_netdev(struct cnic_dev *dev)
a4636960
MC		 4190{
4191 struct cnic_local *cp = dev->cnic_priv;
4192 struct cnic_eth_dev *ethdev = cp->ethdev;
4193 int err;
4194
a3059b12
MC		 4195 if (!ethdev)
4196 return -ENODEV;
4197
4198 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
4199 return 0;
a4636960
MC		 4200
4201 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
a3059b12 4202 if (err)
a4636960
MC		 4203 printk(KERN_ERR PFX "%s: register_cnic failed\n",
4204 dev->netdev->name);
a3059b12
MC		 4205
4206 return err;
4207}
4208
4209static void cnic_unregister_netdev(struct cnic_dev *dev)
4210{
4211 struct cnic_local *cp = dev->cnic_priv;
4212 struct cnic_eth_dev *ethdev = cp->ethdev;
4213
4214 if (!ethdev)
4215 return;
4216
4217 ethdev->drv_unregister_cnic(dev->netdev);
4218}
4219
4220static int cnic_start_hw(struct cnic_dev *dev)
4221{
4222 struct cnic_local *cp = dev->cnic_priv;
4223 struct cnic_eth_dev *ethdev = cp->ethdev;
4224 int err;
4225
4226 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
4227 return -EALREADY;
a4636960
MC		 4228
4229 dev->regview = ethdev->io_base;
4230 cp->chip_id = ethdev->chip_id;
4231 pci_dev_get(dev->pcidev);
4232 cp->func = PCI_FUNC(dev->pcidev->devfn);
4233 cp->status_blk = ethdev->irq_arr[0].status_blk;
4234 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
4235
4236 err = cp->alloc_resc(dev);
4237 if (err) {
4238 printk(KERN_ERR PFX "%s: allocate resource failure\n",
4239 dev->netdev->name);
4240 goto err1;
4241 }
4242
4243 err = cp->start_hw(dev);
4244 if (err)
4245 goto err1;
4246
4247 err = cnic_cm_open(dev);
4248 if (err)
4249 goto err1;
4250
4251 set_bit(CNIC_F_CNIC_UP, &dev->flags);
4252
4253 cp->enable_int(dev);
4254
4255 return 0;
4256
4257err1:
a4636960
MC		 4258 cp->free_resc(dev);
4259 pci_dev_put(dev->pcidev);
a4636960
MC		 4260 return err;
4261}
4262
4263static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
4264{
a4636960
MC		 4265 cnic_disable_bnx2_int_sync(dev);
4266
4267 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4268 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4269
4270 cnic_init_context(dev, KWQ_CID);
4271 cnic_init_context(dev, KCQ_CID);
4272
4273 cnic_setup_5709_context(dev, 0);
4274 cnic_free_irq(dev);
4275
a4636960
MC		 4276 cnic_free_resc(dev);
4277}
4278
71034ba8
MC		 4279
4280static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
4281{
4282 struct cnic_local *cp = dev->cnic_priv;
4283 u8 sb_id = cp->status_blk_num;
4284 int port = CNIC_PORT(cp);
4285
4286 cnic_free_irq(dev);
4287 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4288 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4289 offsetof(struct cstorm_status_block_c,
4290 index_values[HC_INDEX_C_ISCSI_EQ_CONS]),
4291 0);
4292 cnic_free_resc(dev);
4293}
4294
a4636960
MC		 4295static void cnic_stop_hw(struct cnic_dev *dev)
4296{
4297 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4298 struct cnic_local *cp = dev->cnic_priv;
4299
4300 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
4301 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
4302 synchronize_rcu();
4303 cnic_cm_shutdown(dev);
4304 cp->stop_hw(dev);
4305 pci_dev_put(dev->pcidev);
4306 }
4307}
4308
4309static void cnic_free_dev(struct cnic_dev *dev)
4310{
4311 int i = 0;
4312
4313 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
4314 msleep(100);
4315 i++;
4316 }
4317 if (atomic_read(&dev->ref_count) != 0)
4318 printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
4319 " to zero.\n", dev->netdev->name);
4320
4321 printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
4322 dev_put(dev->netdev);
4323 kfree(dev);
4324}
4325
4326static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
4327 struct pci_dev *pdev)
4328{
4329 struct cnic_dev *cdev;
4330 struct cnic_local *cp;
4331 int alloc_size;
4332
4333 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
4334
4335 cdev = kzalloc(alloc_size , GFP_KERNEL);
4336 if (cdev == NULL) {
4337 printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
4338 dev->name);
4339 return NULL;
4340 }
4341
4342 cdev->netdev = dev;
4343 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
4344 cdev->register_device = cnic_register_device;
4345 cdev->unregister_device = cnic_unregister_device;
4346 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
4347
4348 cp = cdev->cnic_priv;
4349 cp->dev = cdev;
4350 cp->uio_dev = -1;
4351 cp->l2_single_buf_size = 0x400;
4352 cp->l2_rx_ring_size = 3;
4353
4354 spin_lock_init(&cp->cnic_ulp_lock);
4355
4356 printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
4357
4358 return cdev;
4359}
4360
4361static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
4362{
4363 struct pci_dev *pdev;
4364 struct cnic_dev *cdev;
4365 struct cnic_local *cp;
4366 struct cnic_eth_dev *ethdev = NULL;
e2ee3616 4367 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
a4636960 4368
e2ee3616 4369 probe = symbol_get(bnx2_cnic_probe);
a4636960
MC		 4370 if (probe) {
4371 ethdev = (*probe)(dev);
64c64608 4372 symbol_put(bnx2_cnic_probe);
a4636960
MC		 4373 }
4374 if (!ethdev)
4375 return NULL;
4376
4377 pdev = ethdev->pdev;
4378 if (!pdev)
4379 return NULL;
4380
4381 dev_hold(dev);
4382 pci_dev_get(pdev);
4383 if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
4384 pdev->device == PCI_DEVICE_ID_NX2_5709S) {
4385 u8 rev;
4386
4387 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
4388 if (rev < 0x10) {
4389 pci_dev_put(pdev);
4390 goto cnic_err;
4391 }
4392 }
4393 pci_dev_put(pdev);
4394
4395 cdev = cnic_alloc_dev(dev, pdev);
4396 if (cdev == NULL)
4397 goto cnic_err;
4398
4399 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
4400 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
4401
4402 cp = cdev->cnic_priv;
4403 cp->ethdev = ethdev;
4404 cdev->pcidev = pdev;
4405
4406 cp->cnic_ops = &cnic_bnx2_ops;
4407 cp->start_hw = cnic_start_bnx2_hw;
4408 cp->stop_hw = cnic_stop_bnx2_hw;
4409 cp->setup_pgtbl = cnic_setup_page_tbl;
4410 cp->alloc_resc = cnic_alloc_bnx2_resc;
4411 cp->free_resc = cnic_free_resc;
4412 cp->start_cm = cnic_cm_init_bnx2_hw;
4413 cp->stop_cm = cnic_cm_stop_bnx2_hw;
4414 cp->enable_int = cnic_enable_bnx2_int;
4415 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
4416 cp->close_conn = cnic_close_bnx2_conn;
4417 cp->next_idx = cnic_bnx2_next_idx;
4418 cp->hw_idx = cnic_bnx2_hw_idx;
4419 return cdev;
4420
4421cnic_err:
4422 dev_put(dev);
4423 return NULL;
4424}
4425
71034ba8
MC		 4426static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
4427{
4428 struct pci_dev *pdev;
4429 struct cnic_dev *cdev;
4430 struct cnic_local *cp;
4431 struct cnic_eth_dev *ethdev = NULL;
4432 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4433
4434 probe = symbol_get(bnx2x_cnic_probe);
4435 if (probe) {
4436 ethdev = (*probe)(dev);
4437 symbol_put(bnx2x_cnic_probe);
4438 }
4439 if (!ethdev)
4440 return NULL;
4441
4442 pdev = ethdev->pdev;
4443 if (!pdev)
4444 return NULL;
4445
4446 dev_hold(dev);
4447 cdev = cnic_alloc_dev(dev, pdev);
4448 if (cdev == NULL) {
4449 dev_put(dev);
4450 return NULL;
4451 }
4452
4453 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
4454 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
4455
4456 cp = cdev->cnic_priv;
4457 cp->ethdev = ethdev;
4458 cdev->pcidev = pdev;
4459
4460 cp->cnic_ops = &cnic_bnx2x_ops;
4461 cp->start_hw = cnic_start_bnx2x_hw;
4462 cp->stop_hw = cnic_stop_bnx2x_hw;
4463 cp->setup_pgtbl = cnic_setup_page_tbl_le;
4464 cp->alloc_resc = cnic_alloc_bnx2x_resc;
4465 cp->free_resc = cnic_free_resc;
4466 cp->start_cm = cnic_cm_init_bnx2x_hw;
4467 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
4468 cp->enable_int = cnic_enable_bnx2x_int;
4469 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
4470 cp->ack_int = cnic_ack_bnx2x_msix;
4471 cp->close_conn = cnic_close_bnx2x_conn;
4472 cp->next_idx = cnic_bnx2x_next_idx;
4473 cp->hw_idx = cnic_bnx2x_hw_idx;
4474 return cdev;
4475}
4476
a4636960
MC		 4477static struct cnic_dev *is_cnic_dev(struct net_device *dev)
4478{
4479 struct ethtool_drvinfo drvinfo;
4480 struct cnic_dev *cdev = NULL;
4481
4482 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
4483 memset(&drvinfo, 0, sizeof(drvinfo));
4484 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
4485
4486 if (!strcmp(drvinfo.driver, "bnx2"))
4487 cdev = init_bnx2_cnic(dev);
71034ba8
MC		 4488 if (!strcmp(drvinfo.driver, "bnx2x"))
4489 cdev = init_bnx2x_cnic(dev);
a4636960
MC		 4490 if (cdev) {
4491 write_lock(&cnic_dev_lock);
4492 list_add(&cdev->list, &cnic_dev_list);
4493 write_unlock(&cnic_dev_lock);
4494 }
4495 }
4496 return cdev;
4497}
4498
4499/**
4500 * netdev event handler
4501 */
4502static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
4503 void *ptr)
4504{
4505 struct net_device *netdev = ptr;
4506 struct cnic_dev *dev;
4507 int if_type;
4508 int new_dev = 0;
4509
4510 dev = cnic_from_netdev(netdev);
4511
4512 if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
4513 /* Check for the hot-plug device */
4514 dev = is_cnic_dev(netdev);
4515 if (dev) {
4516 new_dev = 1;
4517 cnic_hold(dev);
4518 }
4519 }
4520 if (dev) {
4521 struct cnic_local *cp = dev->cnic_priv;
4522
4523 if (new_dev)
4524 cnic_ulp_init(dev);
4525 else if (event == NETDEV_UNREGISTER)
4526 cnic_ulp_exit(dev);
6053bbf7
MC		 4527
4528 if (event == NETDEV_UP) {
a3059b12
MC		 4529 if (cnic_register_netdev(dev) != 0) {
4530 cnic_put(dev);
4531 goto done;
4532 }
a4636960
MC		 4533 if (!cnic_start_hw(dev))
4534 cnic_ulp_start(dev);
a4636960
MC		 4535 }
4536
4537 rcu_read_lock();
4538 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
4539 struct cnic_ulp_ops *ulp_ops;
4540 void *ctx;
4541
4542 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
4543 if (!ulp_ops || !ulp_ops->indicate_netevent)
4544 continue;
4545
4546 ctx = cp->ulp_handle[if_type];
4547
4548 ulp_ops->indicate_netevent(ctx, event);
4549 }
4550 rcu_read_unlock();
4551
4552 if (event == NETDEV_GOING_DOWN) {
a4636960
MC		 4553 cnic_ulp_stop(dev);
4554 cnic_stop_hw(dev);
a3059b12 4555 cnic_unregister_netdev(dev);
a4636960
MC		 4556 } else if (event == NETDEV_UNREGISTER) {
4557 write_lock(&cnic_dev_lock);
4558 list_del_init(&dev->list);
4559 write_unlock(&cnic_dev_lock);
4560
4561 cnic_put(dev);
4562 cnic_free_dev(dev);
4563 goto done;
4564 }
4565 cnic_put(dev);
4566 }
4567done:
4568 return NOTIFY_DONE;
4569}
4570
4571static struct notifier_block cnic_netdev_notifier = {
4572 .notifier_call = cnic_netdev_event
4573};
4574
4575static void cnic_release(void)
4576{
4577 struct cnic_dev *dev;
4578
4579 while (!list_empty(&cnic_dev_list)) {
4580 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
4581 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4582 cnic_ulp_stop(dev);
4583 cnic_stop_hw(dev);
4584 }
4585
4586 cnic_ulp_exit(dev);
a3059b12 4587 cnic_unregister_netdev(dev);
a4636960
MC		 4588 list_del_init(&dev->list);
4589 cnic_free_dev(dev);
4590 }
4591}
4592
4593static int __init cnic_init(void)
4594{
4595 int rc = 0;
4596
4597 printk(KERN_INFO "%s", version);
4598
4599 rc = register_netdevice_notifier(&cnic_netdev_notifier);
4600 if (rc) {
4601 cnic_release();
4602 return rc;
4603 }
4604
4605 return 0;
4606}
4607
4608static void __exit cnic_exit(void)
4609{
4610 unregister_netdevice_notifier(&cnic_netdev_notifier);
4611 cnic_release();
4612 return;
4613}
4614
4615module_init(cnic_init);
4616module_exit(cnic_exit);
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