[linux.git] / drivers / iio / dac / ad5791.c

/*
 * AD5760, AD5780, AD5781, AD5790, AD5791 Voltage Output Digital to Analog
 * Converter
 *
 * Copyright 2011 Analog Devices Inc.
 *
 * Licensed under the GPL-2.
 */

#include <linux/interrupt.h>
#include <linux/fs.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/regulator/consumer.h>
#include <linux/module.h>
#include <linux/bitops.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/dac/ad5791.h>

#define AD5791_DAC_MASK			GENMASK(19, 0)

#define AD5791_CMD_READ			BIT(23)
#define AD5791_CMD_WRITE		0
#define AD5791_ADDR(addr)		((addr) << 20)

/* Registers */
#define AD5791_ADDR_NOOP		0
#define AD5791_ADDR_DAC0		1
#define AD5791_ADDR_CTRL		2
#define AD5791_ADDR_CLRCODE		3
#define AD5791_ADDR_SW_CTRL		4

/* Control Register */
#define AD5791_CTRL_RBUF		BIT(1)
#define AD5791_CTRL_OPGND		BIT(2)
#define AD5791_CTRL_DACTRI		BIT(3)
#define AD5791_CTRL_BIN2SC		BIT(4)
#define AD5791_CTRL_SDODIS		BIT(5)
#define AD5761_CTRL_LINCOMP(x)		((x) << 6)

#define AD5791_LINCOMP_0_10		0
#define AD5791_LINCOMP_10_12		1
#define AD5791_LINCOMP_12_16		2
#define AD5791_LINCOMP_16_19		3
#define AD5791_LINCOMP_19_20		12

#define AD5780_LINCOMP_0_10		0
#define AD5780_LINCOMP_10_20		12

/* Software Control Register */
#define AD5791_SWCTRL_LDAC		BIT(0)
#define AD5791_SWCTRL_CLR		BIT(1)
#define AD5791_SWCTRL_RESET		BIT(2)

#define AD5791_DAC_PWRDN_6K		0
#define AD5791_DAC_PWRDN_3STATE		1

/**
 * struct ad5791_chip_info - chip specific information
 * @get_lin_comp:	function pointer to the device specific function
 */

struct ad5791_chip_info {
	int (*get_lin_comp)	(unsigned int span);
};

/**
 * struct ad5791_state - driver instance specific data
 * @spi:			spi_device
 * @reg_vdd:		positive supply regulator
 * @reg_vss:		negative supply regulator
 * @chip_info:		chip model specific constants
 * @vref_mv:		actual reference voltage used
 * @vref_neg_mv:	voltage of the negative supply
 * @pwr_down_mode	current power down mode
 */

struct ad5791_state {
	struct spi_device		*spi;
	struct regulator		*reg_vdd;
	struct regulator		*reg_vss;
	const struct ad5791_chip_info	*chip_info;
	unsigned short			vref_mv;
	unsigned int			vref_neg_mv;
	unsigned			ctrl;
	unsigned			pwr_down_mode;
	bool				pwr_down;

	union {
		__be32 d32;
		u8 d8[4];
	} data[3] ____cacheline_aligned;
};

/**
 * ad5791_supported_device_ids:
 */

enum ad5791_supported_device_ids {
	ID_AD5760,
	ID_AD5780,
	ID_AD5781,
	ID_AD5791,
};

static int ad5791_spi_write(struct ad5791_state *st, u8 addr, u32 val)
{
	st->data[0].d32 = cpu_to_be32(AD5791_CMD_WRITE |
			      AD5791_ADDR(addr) |
			      (val & AD5791_DAC_MASK));

	return spi_write(st->spi, &st->data[0].d8[1], 3);
}

static int ad5791_spi_read(struct ad5791_state *st, u8 addr, u32 *val)
{
	int ret;
	struct spi_transfer xfers[] = {
		{
			.tx_buf = &st->data[0].d8[1],
			.bits_per_word = 8,
			.len = 3,
			.cs_change = 1,
		}, {
			.tx_buf = &st->data[1].d8[1],
			.rx_buf = &st->data[2].d8[1],
			.bits_per_word = 8,
			.len = 3,
		},
	};

	st->data[0].d32 = cpu_to_be32(AD5791_CMD_READ |
			      AD5791_ADDR(addr));
	st->data[1].d32 = cpu_to_be32(AD5791_ADDR(AD5791_ADDR_NOOP));

	ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));

	*val = be32_to_cpu(st->data[2].d32);

	return ret;
}

static const char * const ad5791_powerdown_modes[] = {
	"6kohm_to_gnd",
	"three_state",
};

static int ad5791_get_powerdown_mode(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan)
{
	struct ad5791_state *st = iio_priv(indio_dev);

	return st->pwr_down_mode;
}

static int ad5791_set_powerdown_mode(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, unsigned int mode)
{
	struct ad5791_state *st = iio_priv(indio_dev);

	st->pwr_down_mode = mode;

	return 0;
}

static const struct iio_enum ad5791_powerdown_mode_enum = {
	.items = ad5791_powerdown_modes,
	.num_items = ARRAY_SIZE(ad5791_powerdown_modes),
	.get = ad5791_get_powerdown_mode,
	.set = ad5791_set_powerdown_mode,
};

static ssize_t ad5791_read_dac_powerdown(struct iio_dev *indio_dev,
	uintptr_t private, const struct iio_chan_spec *chan, char *buf)
{
	struct ad5791_state *st = iio_priv(indio_dev);

	return sprintf(buf, "%d\n", st->pwr_down);
}

static ssize_t ad5791_write_dac_powerdown(struct iio_dev *indio_dev,
	 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
	 size_t len)
{
	bool pwr_down;
	int ret;
	struct ad5791_state *st = iio_priv(indio_dev);

	ret = strtobool(buf, &pwr_down);
	if (ret)
		return ret;

	if (!pwr_down) {
		st->ctrl &= ~(AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
	} else {
		if (st->pwr_down_mode == AD5791_DAC_PWRDN_6K)
			st->ctrl |= AD5791_CTRL_OPGND;
		else if (st->pwr_down_mode == AD5791_DAC_PWRDN_3STATE)
			st->ctrl |= AD5791_CTRL_DACTRI;
	}
	st->pwr_down = pwr_down;

	ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl);

	return ret ? ret : len;
}

static int ad5791_get_lin_comp(unsigned int span)
{
	if (span <= 10000)
		return AD5791_LINCOMP_0_10;
	else if (span <= 12000)
		return AD5791_LINCOMP_10_12;
	else if (span <= 16000)
		return AD5791_LINCOMP_12_16;
	else if (span <= 19000)
		return AD5791_LINCOMP_16_19;
	else
		return AD5791_LINCOMP_19_20;
}

static int ad5780_get_lin_comp(unsigned int span)
{
	if (span <= 10000)
		return AD5780_LINCOMP_0_10;
	else
		return AD5780_LINCOMP_10_20;
}
static const struct ad5791_chip_info ad5791_chip_info_tbl[] = {
	[ID_AD5760] = {
		.get_lin_comp = ad5780_get_lin_comp,
	},
	[ID_AD5780] = {
		.get_lin_comp = ad5780_get_lin_comp,
	},
	[ID_AD5781] = {
		.get_lin_comp = ad5791_get_lin_comp,
	},
	[ID_AD5791] = {
		.get_lin_comp = ad5791_get_lin_comp,
	},
};

static int ad5791_read_raw(struct iio_dev *indio_dev,
			   struct iio_chan_spec const *chan,
			   int *val,
			   int *val2,
			   long m)
{
	struct ad5791_state *st = iio_priv(indio_dev);
	u64 val64;
	int ret;

	switch (m) {
	case IIO_CHAN_INFO_RAW:
		ret = ad5791_spi_read(st, chan->address, val);
		if (ret)
			return ret;
		*val &= AD5791_DAC_MASK;
		*val >>= chan->scan_type.shift;
		return IIO_VAL_INT;
	case IIO_CHAN_INFO_SCALE:
		*val = st->vref_mv;
		*val2 = (1 << chan->scan_type.realbits) - 1;
		return IIO_VAL_FRACTIONAL;
	case IIO_CHAN_INFO_OFFSET:
		val64 = (((u64)st->vref_neg_mv) << chan->scan_type.realbits);
		do_div(val64, st->vref_mv);
		*val = -val64;
		return IIO_VAL_INT;
	default:
		return -EINVAL;
	}

};

static const struct iio_chan_spec_ext_info ad5791_ext_info[] = {
	{
		.name = "powerdown",
		.shared = IIO_SHARED_BY_TYPE,
		.read = ad5791_read_dac_powerdown,
		.write = ad5791_write_dac_powerdown,
	},
	IIO_ENUM("powerdown_mode", IIO_SHARED_BY_TYPE,
		 &ad5791_powerdown_mode_enum),
	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5791_powerdown_mode_enum),
	{ },
};

#define AD5791_CHAN(bits, _shift) {			\
	.type = IIO_VOLTAGE,				\
	.output = 1,					\
	.indexed = 1,					\
	.address = AD5791_ADDR_DAC0,			\
	.channel = 0,					\
	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |	\
		BIT(IIO_CHAN_INFO_OFFSET),		\
	.scan_type = {					\
		.sign = 'u',				\
		.realbits = (bits),			\
		.storagebits = 24,			\
		.shift = (_shift),			\
	},						\
	.ext_info = ad5791_ext_info,			\
}

static const struct iio_chan_spec ad5791_channels[] = {
	[ID_AD5760] = AD5791_CHAN(16, 4),
	[ID_AD5780] = AD5791_CHAN(18, 2),
	[ID_AD5781] = AD5791_CHAN(18, 2),
	[ID_AD5791] = AD5791_CHAN(20, 0)
};

static int ad5791_write_raw(struct iio_dev *indio_dev,
			    struct iio_chan_spec const *chan,
			    int val,
			    int val2,
			    long mask)
{
	struct ad5791_state *st = iio_priv(indio_dev);

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		val &= GENMASK(chan->scan_type.realbits - 1, 0);
		val <<= chan->scan_type.shift;

		return ad5791_spi_write(st, chan->address, val);

	default:
		return -EINVAL;
	}
}

static const struct iio_info ad5791_info = {
	.read_raw = &ad5791_read_raw,
	.write_raw = &ad5791_write_raw,
};

static int ad5791_probe(struct spi_device *spi)
{
	struct ad5791_platform_data *pdata = spi->dev.platform_data;
	struct iio_dev *indio_dev;
	struct ad5791_state *st;
	int ret, pos_voltage_uv = 0, neg_voltage_uv = 0;

	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
	if (!indio_dev)
		return -ENOMEM;
	st = iio_priv(indio_dev);
	st->reg_vdd = devm_regulator_get(&spi->dev, "vdd");
	if (!IS_ERR(st->reg_vdd)) {
		ret = regulator_enable(st->reg_vdd);
		if (ret)
			return ret;

		ret = regulator_get_voltage(st->reg_vdd);
		if (ret < 0)
			goto error_disable_reg_pos;

		pos_voltage_uv = ret;
	}

	st->reg_vss = devm_regulator_get(&spi->dev, "vss");
	if (!IS_ERR(st->reg_vss)) {
		ret = regulator_enable(st->reg_vss);
		if (ret)
			goto error_disable_reg_pos;

		ret = regulator_get_voltage(st->reg_vss);
		if (ret < 0)
			goto error_disable_reg_neg;

		neg_voltage_uv = ret;
	}

	st->pwr_down = true;
	st->spi = spi;

	if (!IS_ERR(st->reg_vss) && !IS_ERR(st->reg_vdd)) {
		st->vref_mv = (pos_voltage_uv + neg_voltage_uv) / 1000;
		st->vref_neg_mv = neg_voltage_uv / 1000;
	} else if (pdata) {
		st->vref_mv = pdata->vref_pos_mv + pdata->vref_neg_mv;
		st->vref_neg_mv = pdata->vref_neg_mv;
	} else {
		dev_warn(&spi->dev, "reference voltage unspecified\n");
	}

	ret = ad5791_spi_write(st, AD5791_ADDR_SW_CTRL, AD5791_SWCTRL_RESET);
	if (ret)
		goto error_disable_reg_neg;

	st->chip_info =	&ad5791_chip_info_tbl[spi_get_device_id(spi)
					      ->driver_data];


	st->ctrl = AD5761_CTRL_LINCOMP(st->chip_info->get_lin_comp(st->vref_mv))
		  | ((pdata && pdata->use_rbuf_gain2) ? 0 : AD5791_CTRL_RBUF) |
		  AD5791_CTRL_BIN2SC;

	ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl |
		AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
	if (ret)
		goto error_disable_reg_neg;

	spi_set_drvdata(spi, indio_dev);
	indio_dev->dev.parent = &spi->dev;
	indio_dev->info = &ad5791_info;
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->channels
		= &ad5791_channels[spi_get_device_id(spi)->driver_data];
	indio_dev->num_channels = 1;
	indio_dev->name = spi_get_device_id(st->spi)->name;
	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_disable_reg_neg;

	return 0;

error_disable_reg_neg:
	if (!IS_ERR(st->reg_vss))
		regulator_disable(st->reg_vss);
error_disable_reg_pos:
	if (!IS_ERR(st->reg_vdd))
		regulator_disable(st->reg_vdd);
	return ret;
}

static int ad5791_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	struct ad5791_state *st = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	if (!IS_ERR(st->reg_vdd))
		regulator_disable(st->reg_vdd);

	if (!IS_ERR(st->reg_vss))
		regulator_disable(st->reg_vss);

	return 0;
}

static const struct spi_device_id ad5791_id[] = {
	{"ad5760", ID_AD5760},
	{"ad5780", ID_AD5780},
	{"ad5781", ID_AD5781},
	{"ad5790", ID_AD5791},
	{"ad5791", ID_AD5791},
	{}
};
MODULE_DEVICE_TABLE(spi, ad5791_id);

static struct spi_driver ad5791_driver = {
	.driver = {
		   .name = "ad5791",
		   },
	.probe = ad5791_probe,
	.remove = ad5791_remove,
	.id_table = ad5791_id,
};
module_spi_driver(ad5791_driver);

MODULE_AUTHOR("Michael Hennerich <[email protected]>");
MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
69d900a6	1	/*
9d41c5bb LPC	2	* AD5760, AD5780, AD5781, AD5790, AD5791 Voltage Output Digital to Analog
9d41c5bb LPC	3	* Converter
69d900a6 MH	4	*
	5	* Copyright 2011 Analog Devices Inc.
	6	*
	7	* Licensed under the GPL-2.
	8	*/
	9
	10	#include <linux/interrupt.h>
69d900a6 MH	11	#include <linux/fs.h>
	12	#include <linux/device.h>
	13	#include <linux/kernel.h>
	14	#include <linux/spi/spi.h>
	15	#include <linux/slab.h>
	16	#include <linux/sysfs.h>
	17	#include <linux/regulator/consumer.h>
99c97852	18	#include <linux/module.h>
ff96bf51	19	#include <linux/bitops.h>
69d900a6	20
06458e27 JC	21	#include <linux/iio/iio.h>
06458e27 JC	22	#include <linux/iio/sysfs.h>
dbdc025b	23	#include <linux/iio/dac/ad5791.h>
69d900a6	24
ff96bf51	25	#define AD5791_DAC_MASK GENMASK(19, 0)
20374d1a	26
ff96bf51 PM	27	#define AD5791_CMD_READ BIT(23)
ff96bf51 PM	28	#define AD5791_CMD_WRITE 0
20374d1a LPC	29	#define AD5791_ADDR(addr) ((addr) << 20)
	30
	31	/* Registers */
	32	#define AD5791_ADDR_NOOP 0
	33	#define AD5791_ADDR_DAC0 1
	34	#define AD5791_ADDR_CTRL 2
	35	#define AD5791_ADDR_CLRCODE 3
	36	#define AD5791_ADDR_SW_CTRL 4
	37
	38	/* Control Register */
ff96bf51 PM	39	#define AD5791_CTRL_RBUF BIT(1)
	40	#define AD5791_CTRL_OPGND BIT(2)
	41	#define AD5791_CTRL_DACTRI BIT(3)
	42	#define AD5791_CTRL_BIN2SC BIT(4)
	43	#define AD5791_CTRL_SDODIS BIT(5)
20374d1a LPC	44	#define AD5761_CTRL_LINCOMP(x) ((x) << 6)
	45
	46	#define AD5791_LINCOMP_0_10 0
	47	#define AD5791_LINCOMP_10_12 1
	48	#define AD5791_LINCOMP_12_16 2
	49	#define AD5791_LINCOMP_16_19 3
	50	#define AD5791_LINCOMP_19_20 12
	51
	52	#define AD5780_LINCOMP_0_10 0
	53	#define AD5780_LINCOMP_10_20 12
	54
	55	/* Software Control Register */
ff96bf51 PM	56	#define AD5791_SWCTRL_LDAC BIT(0)
	57	#define AD5791_SWCTRL_CLR BIT(1)
	58	#define AD5791_SWCTRL_RESET BIT(2)
20374d1a LPC	59
	60	#define AD5791_DAC_PWRDN_6K 0
	61	#define AD5791_DAC_PWRDN_3STATE 1
	62
	63	/**
	64	* struct ad5791_chip_info - chip specific information
	65	* @get_lin_comp: function pointer to the device specific function
	66	*/
	67
	68	struct ad5791_chip_info {
	69	int (*get_lin_comp) (unsigned int span);
	70	};
	71
	72	/**
	73	* struct ad5791_state - driver instance specific data
ff96bf51	74	* @spi: spi_device
20374d1a LPC	75	* @reg_vdd: positive supply regulator
	76	* @reg_vss: negative supply regulator
	77	* @chip_info: chip model specific constants
	78	* @vref_mv: actual reference voltage used
	79	* @vref_neg_mv: voltage of the negative supply
	80	* @pwr_down_mode current power down mode
	81	*/
	82
	83	struct ad5791_state {
	84	struct spi_device *spi;
	85	struct regulator *reg_vdd;
	86	struct regulator *reg_vss;
	87	const struct ad5791_chip_info *chip_info;
	88	unsigned short vref_mv;
	89	unsigned int vref_neg_mv;
	90	unsigned ctrl;
	91	unsigned pwr_down_mode;
	92	bool pwr_down;
791bb52a LPC	93
	94	union {
	95	__be32 d32;
	96	u8 d8[4];
	97	} data[3] ____cacheline_aligned;
20374d1a LPC	98	};
	99
	100	/**
	101	* ad5791_supported_device_ids:
	102	*/
	103
	104	enum ad5791_supported_device_ids {
	105	ID_AD5760,
	106	ID_AD5780,
	107	ID_AD5781,
	108	ID_AD5791,
	109	};
	110
791bb52a	111	static int ad5791_spi_write(struct ad5791_state *st, u8 addr, u32 val)
69d900a6	112	{
791bb52a	113	st->data[0].d32 = cpu_to_be32(AD5791_CMD_WRITE \|
69d900a6 MH	114	AD5791_ADDR(addr) \|
	115	(val & AD5791_DAC_MASK));
	116
791bb52a	117	return spi_write(st->spi, &st->data[0].d8[1], 3);
69d900a6 MH	118	}
69d900a6 MH	119
791bb52a	120	static int ad5791_spi_read(struct ad5791_state st, u8 addr, u32 val)
69d900a6	121	{
69d900a6	122	int ret;
69d900a6 MH	123	struct spi_transfer xfers[] = {
69d900a6 MH	124	{
791bb52a	125	.tx_buf = &st->data[0].d8[1],
69d900a6 MH	126	.bits_per_word = 8,
	127	.len = 3,
	128	.cs_change = 1,
	129	}, {
791bb52a LPC	130	.tx_buf = &st->data[1].d8[1],
791bb52a LPC	131	.rx_buf = &st->data[2].d8[1],
69d900a6 MH	132	.bits_per_word = 8,
	133	.len = 3,
	134	},
	135	};
	136
791bb52a	137	st->data[0].d32 = cpu_to_be32(AD5791_CMD_READ \|
69d900a6	138	AD5791_ADDR(addr));
791bb52a	139	st->data[1].d32 = cpu_to_be32(AD5791_ADDR(AD5791_ADDR_NOOP));
69d900a6	140
791bb52a	141	ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
69d900a6	142
791bb52a	143	*val = be32_to_cpu(st->data[2].d32);
69d900a6 MH	144
	145	return ret;
	146	}
	147
4571b39b LPC	148	static const char * const ad5791_powerdown_modes[] = {
	149	"6kohm_to_gnd",
	150	"three_state",
c5b99396	151	};
69d900a6	152
4571b39b LPC	153	static int ad5791_get_powerdown_mode(struct iio_dev *indio_dev,
4571b39b LPC	154	const struct iio_chan_spec *chan)
69d900a6	155	{
f5730d52	156	struct ad5791_state *st = iio_priv(indio_dev);
69d900a6	157
4571b39b	158	return st->pwr_down_mode;
69d900a6 MH	159	}
69d900a6 MH	160
4571b39b LPC	161	static int ad5791_set_powerdown_mode(struct iio_dev *indio_dev,
4571b39b LPC	162	const struct iio_chan_spec *chan, unsigned int mode)
69d900a6	163	{
f5730d52	164	struct ad5791_state *st = iio_priv(indio_dev);
69d900a6	165
4571b39b	166	st->pwr_down_mode = mode;
69d900a6	167
4571b39b	168	return 0;
69d900a6 MH	169	}
69d900a6 MH	170
4571b39b LPC	171	static const struct iio_enum ad5791_powerdown_mode_enum = {
	172	.items = ad5791_powerdown_modes,
	173	.num_items = ARRAY_SIZE(ad5791_powerdown_modes),
	174	.get = ad5791_get_powerdown_mode,
	175	.set = ad5791_set_powerdown_mode,
	176	};
	177
	178	static ssize_t ad5791_read_dac_powerdown(struct iio_dev *indio_dev,
	179	uintptr_t private, const struct iio_chan_spec chan, char buf)
69d900a6	180	{
f5730d52	181	struct ad5791_state *st = iio_priv(indio_dev);
69d900a6 MH	182
	183	return sprintf(buf, "%d\n", st->pwr_down);
	184	}
	185
4571b39b LPC	186	static ssize_t ad5791_write_dac_powerdown(struct iio_dev *indio_dev,
	187	uintptr_t private, const struct iio_chan_spec chan, const char buf,
	188	size_t len)
69d900a6	189	{
4468cb55	190	bool pwr_down;
69d900a6	191	int ret;
f5730d52	192	struct ad5791_state *st = iio_priv(indio_dev);
69d900a6	193
4468cb55	194	ret = strtobool(buf, &pwr_down);
69d900a6 MH	195	if (ret)
	196	return ret;
	197
4468cb55	198	if (!pwr_down) {
69d900a6	199	st->ctrl &= ~(AD5791_CTRL_OPGND \| AD5791_CTRL_DACTRI);
4468cb55	200	} else {
69d900a6 MH	201	if (st->pwr_down_mode == AD5791_DAC_PWRDN_6K)
	202	st->ctrl \|= AD5791_CTRL_OPGND;
	203	else if (st->pwr_down_mode == AD5791_DAC_PWRDN_3STATE)
	204	st->ctrl \|= AD5791_CTRL_DACTRI;
4468cb55 LPC	205	}
4468cb55 LPC	206	st->pwr_down = pwr_down;
69d900a6	207
791bb52a	208	ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl);
69d900a6 MH	209
	210	return ret ? ret : len;
	211	}
	212
69d900a6 MH	213	static int ad5791_get_lin_comp(unsigned int span)
	214	{
	215	if (span <= 10000)
	216	return AD5791_LINCOMP_0_10;
	217	else if (span <= 12000)
	218	return AD5791_LINCOMP_10_12;
	219	else if (span <= 16000)
	220	return AD5791_LINCOMP_12_16;
	221	else if (span <= 19000)
	222	return AD5791_LINCOMP_16_19;
	223	else
	224	return AD5791_LINCOMP_19_20;
	225	}
	226
ba1c2bb2 MH	227	static int ad5780_get_lin_comp(unsigned int span)
	228	{
	229	if (span <= 10000)
	230	return AD5780_LINCOMP_0_10;
	231	else
	232	return AD5780_LINCOMP_10_20;
	233	}
ba1c2bb2 MH	234	static const struct ad5791_chip_info ad5791_chip_info_tbl[] = {
ba1c2bb2 MH	235	[ID_AD5760] = {
ba1c2bb2 MH	236	.get_lin_comp = ad5780_get_lin_comp,
	237	},
	238	[ID_AD5780] = {
ba1c2bb2 MH	239	.get_lin_comp = ad5780_get_lin_comp,
	240	},
	241	[ID_AD5781] = {
ba1c2bb2 MH	242	.get_lin_comp = ad5791_get_lin_comp,
	243	},
	244	[ID_AD5791] = {
ba1c2bb2 MH	245	.get_lin_comp = ad5791_get_lin_comp,
	246	},
	247	};
	248
c5b99396 JC	249	static int ad5791_read_raw(struct iio_dev *indio_dev,
	250	struct iio_chan_spec const *chan,
	251	int *val,
	252	int *val2,
	253	long m)
	254	{
	255	struct ad5791_state *st = iio_priv(indio_dev);
9dc9961d	256	u64 val64;
c5b99396 JC	257	int ret;
	258
	259	switch (m) {
09f4eb40	260	case IIO_CHAN_INFO_RAW:
791bb52a	261	ret = ad5791_spi_read(st, chan->address, val);
c5b99396 JC	262	if (ret)
	263	return ret;
	264	*val &= AD5791_DAC_MASK;
	265	*val >>= chan->scan_type.shift;
c5b99396	266	return IIO_VAL_INT;
c8a9f805	267	case IIO_CHAN_INFO_SCALE:
213983cd LPC	268	*val = st->vref_mv;
	269	*val2 = (1 << chan->scan_type.realbits) - 1;
	270	return IIO_VAL_FRACTIONAL;
c8a9f805	271	case IIO_CHAN_INFO_OFFSET:
9dc9961d LPC	272	val64 = (((u64)st->vref_neg_mv) << chan->scan_type.realbits);
	273	do_div(val64, st->vref_mv);
	274	*val = -val64;
	275	return IIO_VAL_INT;
c5b99396 JC	276	default:
	277	return -EINVAL;
	278	}
	279
	280	};
	281
4571b39b LPC	282	static const struct iio_chan_spec_ext_info ad5791_ext_info[] = {
	283	{
	284	.name = "powerdown",
3704432f	285	.shared = IIO_SHARED_BY_TYPE,
4571b39b LPC	286	.read = ad5791_read_dac_powerdown,
	287	.write = ad5791_write_dac_powerdown,
	288	},
3704432f JC	289	IIO_ENUM("powerdown_mode", IIO_SHARED_BY_TYPE,
3704432f JC	290	&ad5791_powerdown_mode_enum),
4571b39b LPC	291	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5791_powerdown_mode_enum),
	292	{ },
	293	};
	294
cb9d90f1	295	#define AD5791_CHAN(bits, _shift) { \
4571b39b LPC	296	.type = IIO_VOLTAGE, \
	297	.output = 1, \
	298	.indexed = 1, \
	299	.address = AD5791_ADDR_DAC0, \
	300	.channel = 0, \
76112947 JC	301	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	302	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \| \
	303	BIT(IIO_CHAN_INFO_OFFSET), \
cb9d90f1 JC	304	.scan_type = { \
	305	.sign = 'u', \
	306	.realbits = (bits), \
	307	.storagebits = 24, \
	308	.shift = (_shift), \
	309	}, \
4571b39b LPC	310	.ext_info = ad5791_ext_info, \
	311	}
	312
	313	static const struct iio_chan_spec ad5791_channels[] = {
	314	[ID_AD5760] = AD5791_CHAN(16, 4),
	315	[ID_AD5780] = AD5791_CHAN(18, 2),
	316	[ID_AD5781] = AD5791_CHAN(18, 2),
	317	[ID_AD5791] = AD5791_CHAN(20, 0)
	318	};
c5b99396 JC	319
	320	static int ad5791_write_raw(struct iio_dev *indio_dev,
	321	struct iio_chan_spec const *chan,
	322	int val,
	323	int val2,
	324	long mask)
	325	{
	326	struct ad5791_state *st = iio_priv(indio_dev);
	327
	328	switch (mask) {
09f4eb40	329	case IIO_CHAN_INFO_RAW:
ff96bf51	330	val &= GENMASK(chan->scan_type.realbits - 1, 0);
c5b99396 JC	331	val <<= chan->scan_type.shift;
c5b99396 JC	332
791bb52a	333	return ad5791_spi_write(st, chan->address, val);
c5b99396 JC	334
	335	default:
	336	return -EINVAL;
	337	}
	338	}
	339
6fe8135f	340	static const struct iio_info ad5791_info = {
c5b99396 JC	341	.read_raw = &ad5791_read_raw,
c5b99396 JC	342	.write_raw = &ad5791_write_raw,
6fe8135f JC	343	};
6fe8135f JC	344
fc52692c	345	static int ad5791_probe(struct spi_device *spi)
69d900a6 MH	346	{
69d900a6 MH	347	struct ad5791_platform_data *pdata = spi->dev.platform_data;
f5730d52	348	struct iio_dev *indio_dev;
69d900a6 MH	349	struct ad5791_state *st;
	350	int ret, pos_voltage_uv = 0, neg_voltage_uv = 0;
	351
0d7c04d3 SK	352	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
	353	if (!indio_dev)
	354	return -ENOMEM;
26a54797	355	st = iio_priv(indio_dev);
0d7c04d3	356	st->reg_vdd = devm_regulator_get(&spi->dev, "vdd");
26a54797 JC	357	if (!IS_ERR(st->reg_vdd)) {
26a54797 JC	358	ret = regulator_enable(st->reg_vdd);
69d900a6	359	if (ret)
0d7c04d3	360	return ret;
69d900a6	361
7e2dcc69 AL	362	ret = regulator_get_voltage(st->reg_vdd);
	363	if (ret < 0)
	364	goto error_disable_reg_pos;
	365
	366	pos_voltage_uv = ret;
69d900a6 MH	367	}
69d900a6 MH	368
0d7c04d3	369	st->reg_vss = devm_regulator_get(&spi->dev, "vss");
26a54797 JC	370	if (!IS_ERR(st->reg_vss)) {
26a54797 JC	371	ret = regulator_enable(st->reg_vss);
69d900a6	372	if (ret)
0d7c04d3	373	goto error_disable_reg_pos;
69d900a6	374
7e2dcc69 AL	375	ret = regulator_get_voltage(st->reg_vss);
	376	if (ret < 0)
	377	goto error_disable_reg_neg;
	378
	379	neg_voltage_uv = ret;
69d900a6 MH	380	}
69d900a6 MH	381
f5730d52 JC	382	st->pwr_down = true;
	383	st->spi = spi;
	384
9dc9961d LPC	385	if (!IS_ERR(st->reg_vss) && !IS_ERR(st->reg_vdd)) {
	386	st->vref_mv = (pos_voltage_uv + neg_voltage_uv) / 1000;
	387	st->vref_neg_mv = neg_voltage_uv / 1000;
	388	} else if (pdata) {
	389	st->vref_mv = pdata->vref_pos_mv + pdata->vref_neg_mv;
	390	st->vref_neg_mv = pdata->vref_neg_mv;
	391	} else {
69d900a6	392	dev_warn(&spi->dev, "reference voltage unspecified\n");
9dc9961d	393	}
69d900a6	394
791bb52a	395	ret = ad5791_spi_write(st, AD5791_ADDR_SW_CTRL, AD5791_SWCTRL_RESET);
69d900a6	396	if (ret)
26a54797	397	goto error_disable_reg_neg;
69d900a6	398
c5b99396 JC	399	st->chip_info = &ad5791_chip_info_tbl[spi_get_device_id(spi)
c5b99396 JC	400	->driver_data];
69d900a6 MH	401
69d900a6 MH	402
ba1c2bb2 MH	403	st->ctrl = AD5761_CTRL_LINCOMP(st->chip_info->get_lin_comp(st->vref_mv))
ba1c2bb2 MH	404	\| ((pdata && pdata->use_rbuf_gain2) ? 0 : AD5791_CTRL_RBUF) \|
69d900a6 MH	405	AD5791_CTRL_BIN2SC;
69d900a6 MH	406
791bb52a	407	ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl \|
69d900a6 MH	408	AD5791_CTRL_OPGND \| AD5791_CTRL_DACTRI);
69d900a6 MH	409	if (ret)
26a54797	410	goto error_disable_reg_neg;
69d900a6	411
f5730d52 JC	412	spi_set_drvdata(spi, indio_dev);
	413	indio_dev->dev.parent = &spi->dev;
	414	indio_dev->info = &ad5791_info;
	415	indio_dev->modes = INDIO_DIRECT_MODE;
c5b99396 JC	416	indio_dev->channels
	417	= &ad5791_channels[spi_get_device_id(spi)->driver_data];
	418	indio_dev->num_channels = 1;
	419	indio_dev->name = spi_get_device_id(st->spi)->name;
f5730d52	420	ret = iio_device_register(indio_dev);
69d900a6	421	if (ret)
26a54797	422	goto error_disable_reg_neg;
69d900a6 MH	423
	424	return 0;
	425
69d900a6	426	error_disable_reg_neg:
26a54797 JC	427	if (!IS_ERR(st->reg_vss))
26a54797 JC	428	regulator_disable(st->reg_vss);
7e2dcc69	429	error_disable_reg_pos:
26a54797 JC	430	if (!IS_ERR(st->reg_vdd))
26a54797 JC	431	regulator_disable(st->reg_vdd);
69d900a6 MH	432	return ret;
	433	}
	434
fc52692c	435	static int ad5791_remove(struct spi_device *spi)
69d900a6	436	{
f5730d52 JC	437	struct iio_dev *indio_dev = spi_get_drvdata(spi);
f5730d52 JC	438	struct ad5791_state *st = iio_priv(indio_dev);
69d900a6	439
d2fffd6c	440	iio_device_unregister(indio_dev);
0d7c04d3	441	if (!IS_ERR(st->reg_vdd))
26a54797	442	regulator_disable(st->reg_vdd);
69d900a6	443
0d7c04d3	444	if (!IS_ERR(st->reg_vss))
26a54797	445	regulator_disable(st->reg_vss);
26d25ae3	446
69d900a6 MH	447	return 0;
	448	}
	449
	450	static const struct spi_device_id ad5791_id[] = {
ba1c2bb2 MH	451	{"ad5760", ID_AD5760},
ba1c2bb2 MH	452	{"ad5780", ID_AD5780},
69d900a6	453	{"ad5781", ID_AD5781},
9d41c5bb	454	{"ad5790", ID_AD5791},
ba1c2bb2	455	{"ad5791", ID_AD5791},
69d900a6 MH	456	{}
69d900a6 MH	457	};
55e4390c	458	MODULE_DEVICE_TABLE(spi, ad5791_id);
69d900a6 MH	459
	460	static struct spi_driver ad5791_driver = {
	461	.driver = {
	462	.name = "ad5791",
69d900a6 MH	463	},
69d900a6 MH	464	.probe = ad5791_probe,
fc52692c	465	.remove = ad5791_remove,
69d900a6 MH	466	.id_table = ad5791_id,
69d900a6 MH	467	};
ae6ae6fe	468	module_spi_driver(ad5791_driver);
69d900a6	469
9920ed25	470	MODULE_AUTHOR("Michael Hennerich <[email protected]>");
9d41c5bb	471	MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC");
69d900a6	472	MODULE_LICENSE("GPL v2");