[linux.git] / drivers / iio / dac / ad5761.c

/*
 * AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter
 *
 * Copyright 2016 Qtechnology A/S
 * 2016 Ricardo Ribalda <[email protected]>
 *
 * Licensed under the GPL-2.
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/bitops.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/regulator/consumer.h>
#include <linux/platform_data/ad5761.h>

#define AD5761_ADDR(addr)		((addr & 0xf) << 16)
#define AD5761_ADDR_NOOP		0x0
#define AD5761_ADDR_DAC_WRITE		0x3
#define AD5761_ADDR_CTRL_WRITE_REG	0x4
#define AD5761_ADDR_SW_DATA_RESET	0x7
#define AD5761_ADDR_DAC_READ		0xb
#define AD5761_ADDR_CTRL_READ_REG	0xc
#define AD5761_ADDR_SW_FULL_RESET	0xf

#define AD5761_CTRL_USE_INTVREF		BIT(5)
#define AD5761_CTRL_ETS			BIT(6)

/**
 * struct ad5761_chip_info - chip specific information
 * @int_vref:	Value of the internal reference voltage in mV - 0 if external
 *		reference voltage is used
 * @channel:	channel specification
*/

struct ad5761_chip_info {
	unsigned long int_vref;
	const struct iio_chan_spec channel;
};

struct ad5761_range_params {
	int m;
	int c;
};

enum ad5761_supported_device_ids {
	ID_AD5721,
	ID_AD5721R,
	ID_AD5761,
	ID_AD5761R,
};

/**
 * struct ad5761_state - driver instance specific data
 * @spi:		spi_device
 * @vref_reg:		reference voltage regulator
 * @use_intref:		true when the internal voltage reference is used
 * @vref:		actual voltage reference in mVolts
 * @range:		output range mode used
 * @data:		cache aligned spi buffer
 */
struct ad5761_state {
	struct spi_device		*spi;
	struct regulator		*vref_reg;

	bool use_intref;
	int vref;
	enum ad5761_voltage_range range;

	/*
	 * DMA (thus cache coherency maintenance) requires the
	 * transfer buffers to live in their own cache lines.
	 */
	union {
		__be32 d32;
		u8 d8[4];
	} data[3] ____cacheline_aligned;
};

static const struct ad5761_range_params ad5761_range_params[] = {
	[AD5761_VOLTAGE_RANGE_M10V_10V] = {
		.m = 80,
		.c = 40,
	},
	[AD5761_VOLTAGE_RANGE_0V_10V] = {
		.m = 40,
		.c = 0,
	},
	[AD5761_VOLTAGE_RANGE_M5V_5V] = {
		.m = 40,
		.c = 20,
	},
	[AD5761_VOLTAGE_RANGE_0V_5V] = {
		.m = 20,
		.c = 0,
	},
	[AD5761_VOLTAGE_RANGE_M2V5_7V5] = {
		.m = 40,
		.c = 10,
	},
	[AD5761_VOLTAGE_RANGE_M3V_3V] = {
		.m = 24,
		.c = 12,
	},
	[AD5761_VOLTAGE_RANGE_0V_16V] = {
		.m = 64,
		.c = 0,
	},
	[AD5761_VOLTAGE_RANGE_0V_20V] = {
		.m = 80,
		.c = 0,
	},
};

static int _ad5761_spi_write(struct ad5761_state *st, u8 addr, u16 val)
{
	st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr) | val);

	return spi_write(st->spi, &st->data[0].d8[1], 3);
}

static int ad5761_spi_write(struct iio_dev *indio_dev, u8 addr, u16 val)
{
	struct ad5761_state *st = iio_priv(indio_dev);
	int ret;

	mutex_lock(&indio_dev->mlock);
	ret = _ad5761_spi_write(st, addr, val);
	mutex_unlock(&indio_dev->mlock);

	return ret;
}

static int _ad5761_spi_read(struct ad5761_state *st, u8 addr, u16 *val)
{
	int ret;
	struct spi_transfer xfers[] = {
		{
			.tx_buf = &st->data[0].d8[1],
			.bits_per_word = 8,
			.len = 3,
			.cs_change = true,
		}, {
			.tx_buf = &st->data[1].d8[1],
			.rx_buf = &st->data[2].d8[1],
			.bits_per_word = 8,
			.len = 3,
		},
	};

	st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr));
	st->data[1].d32 = cpu_to_be32(AD5761_ADDR(AD5761_ADDR_NOOP));

	ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));

	*val = be32_to_cpu(st->data[2].d32);

	return ret;
}

static int ad5761_spi_read(struct iio_dev *indio_dev, u8 addr, u16 *val)
{
	struct ad5761_state *st = iio_priv(indio_dev);
	int ret;

	mutex_lock(&indio_dev->mlock);
	ret = _ad5761_spi_read(st, addr, val);
	mutex_unlock(&indio_dev->mlock);

	return ret;
}

static int ad5761_spi_set_range(struct ad5761_state *st,
				enum ad5761_voltage_range range)
{
	u16 aux;
	int ret;

	aux = (range & 0x7) | AD5761_CTRL_ETS;

	if (st->use_intref)
		aux |= AD5761_CTRL_USE_INTVREF;

	ret = _ad5761_spi_write(st, AD5761_ADDR_SW_FULL_RESET, 0);
	if (ret)
		return ret;

	ret = _ad5761_spi_write(st, AD5761_ADDR_CTRL_WRITE_REG, aux);
	if (ret)
		return ret;

	st->range = range;

	return 0;
}

static int ad5761_read_raw(struct iio_dev *indio_dev,
			   struct iio_chan_spec const *chan,
			   int *val,
			   int *val2,
			   long mask)
{
	struct ad5761_state *st;
	int ret;
	u16 aux;

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		ret = ad5761_spi_read(indio_dev, AD5761_ADDR_DAC_READ, &aux);
		if (ret)
			return ret;
		*val = aux >> chan->scan_type.shift;
		return IIO_VAL_INT;
	case IIO_CHAN_INFO_SCALE:
		st = iio_priv(indio_dev);
		*val = st->vref * ad5761_range_params[st->range].m;
		*val /= 10;
		*val2 = chan->scan_type.realbits;
		return IIO_VAL_FRACTIONAL_LOG2;
	case IIO_CHAN_INFO_OFFSET:
		st = iio_priv(indio_dev);
		*val = -(1 << chan->scan_type.realbits);
		*val *=	ad5761_range_params[st->range].c;
		*val /=	ad5761_range_params[st->range].m;
		return IIO_VAL_INT;
	default:
		return -EINVAL;
	}
}

static int ad5761_write_raw(struct iio_dev *indio_dev,
			    struct iio_chan_spec const *chan,
			    int val,
			    int val2,
			    long mask)
{
	u16 aux;

	if (mask != IIO_CHAN_INFO_RAW)
		return -EINVAL;

	if (val2 || (val << chan->scan_type.shift) > 0xffff || val < 0)
		return -EINVAL;

	aux = val << chan->scan_type.shift;

	return ad5761_spi_write(indio_dev, AD5761_ADDR_DAC_WRITE, aux);
}

static const struct iio_info ad5761_info = {
	.read_raw = &ad5761_read_raw,
	.write_raw = &ad5761_write_raw,
};

#define AD5761_CHAN(_bits) {				\
	.type = IIO_VOLTAGE,				\
	.output = 1,					\
	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |	\
		BIT(IIO_CHAN_INFO_OFFSET),		\
	.scan_type = {					\
		.sign = 'u',				\
		.realbits = (_bits),			\
		.storagebits = 16,			\
		.shift = 16 - (_bits),			\
	},						\
}

static const struct ad5761_chip_info ad5761_chip_infos[] = {
	[ID_AD5721] = {
		.int_vref = 0,
		.channel = AD5761_CHAN(12),
	},
	[ID_AD5721R] = {
		.int_vref = 2500,
		.channel = AD5761_CHAN(12),
	},
	[ID_AD5761] = {
		.int_vref = 0,
		.channel = AD5761_CHAN(16),
	},
	[ID_AD5761R] = {
		.int_vref = 2500,
		.channel = AD5761_CHAN(16),
	},
};

static int ad5761_get_vref(struct ad5761_state *st,
			   const struct ad5761_chip_info *chip_info)
{
	int ret;

	st->vref_reg = devm_regulator_get_optional(&st->spi->dev, "vref");
	if (PTR_ERR(st->vref_reg) == -ENODEV) {
		/* Use Internal regulator */
		if (!chip_info->int_vref) {
			dev_err(&st->spi->dev,
				"Voltage reference not found\n");
			return -EIO;
		}

		st->use_intref = true;
		st->vref = chip_info->int_vref;
		return 0;
	}

	if (IS_ERR(st->vref_reg)) {
		dev_err(&st->spi->dev,
			"Error getting voltage reference regulator\n");
		return PTR_ERR(st->vref_reg);
	}

	ret = regulator_enable(st->vref_reg);
	if (ret) {
		dev_err(&st->spi->dev,
			 "Failed to enable voltage reference\n");
		return ret;
	}

	ret = regulator_get_voltage(st->vref_reg);
	if (ret < 0) {
		dev_err(&st->spi->dev,
			 "Failed to get voltage reference value\n");
		goto disable_regulator_vref;
	}

	if (ret < 2000000 || ret > 3000000) {
		dev_warn(&st->spi->dev,
			 "Invalid external voltage ref. value %d uV\n", ret);
		ret = -EIO;
		goto disable_regulator_vref;
	}

	st->vref = ret / 1000;
	st->use_intref = false;

	return 0;

disable_regulator_vref:
	regulator_disable(st->vref_reg);
	st->vref_reg = NULL;
	return ret;
}

static int ad5761_probe(struct spi_device *spi)
{
	struct iio_dev *iio_dev;
	struct ad5761_state *st;
	int ret;
	const struct ad5761_chip_info *chip_info =
		&ad5761_chip_infos[spi_get_device_id(spi)->driver_data];
	enum ad5761_voltage_range voltage_range = AD5761_VOLTAGE_RANGE_0V_5V;
	struct ad5761_platform_data *pdata = dev_get_platdata(&spi->dev);

	iio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
	if (!iio_dev)
		return -ENOMEM;

	st = iio_priv(iio_dev);

	st->spi = spi;
	spi_set_drvdata(spi, iio_dev);

	ret = ad5761_get_vref(st, chip_info);
	if (ret)
		return ret;

	if (pdata)
		voltage_range = pdata->voltage_range;

	ret = ad5761_spi_set_range(st, voltage_range);
	if (ret)
		goto disable_regulator_err;

	iio_dev->dev.parent = &spi->dev;
	iio_dev->info = &ad5761_info;
	iio_dev->modes = INDIO_DIRECT_MODE;
	iio_dev->channels = &chip_info->channel;
	iio_dev->num_channels = 1;
	iio_dev->name = spi_get_device_id(st->spi)->name;
	ret = iio_device_register(iio_dev);
	if (ret)
		goto disable_regulator_err;

	return 0;

disable_regulator_err:
	if (!IS_ERR_OR_NULL(st->vref_reg))
		regulator_disable(st->vref_reg);

	return ret;
}

static int ad5761_remove(struct spi_device *spi)
{
	struct iio_dev *iio_dev = spi_get_drvdata(spi);
	struct ad5761_state *st = iio_priv(iio_dev);

	iio_device_unregister(iio_dev);

	if (!IS_ERR_OR_NULL(st->vref_reg))
		regulator_disable(st->vref_reg);

	return 0;
}

static const struct spi_device_id ad5761_id[] = {
	{"ad5721", ID_AD5721},
	{"ad5721r", ID_AD5721R},
	{"ad5761", ID_AD5761},
	{"ad5761r", ID_AD5761R},
	{}
};
MODULE_DEVICE_TABLE(spi, ad5761_id);

static struct spi_driver ad5761_driver = {
	.driver = {
		   .name = "ad5761",
		   },
	.probe = ad5761_probe,
	.remove = ad5761_remove,
	.id_table = ad5761_id,
};
module_spi_driver(ad5761_driver);

MODULE_AUTHOR("Ricardo Ribalda <[email protected]>");
MODULE_DESCRIPTION("Analog Devices AD5721, AD5721R, AD5761, AD5761R driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
131497ac RR	1	/*
	2	* AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter
	3	*
	4	* Copyright 2016 Qtechnology A/S
	5	* 2016 Ricardo Ribalda <[email protected]>
	6	*
	7	* Licensed under the GPL-2.
	8	*/
	9	#include <linux/kernel.h>
	10	#include <linux/module.h>
	11	#include <linux/spi/spi.h>
	12	#include <linux/bitops.h>
	13	#include <linux/iio/iio.h>
	14	#include <linux/iio/sysfs.h>
	15	#include <linux/regulator/consumer.h>
	16	#include <linux/platform_data/ad5761.h>
	17
	18	#define AD5761_ADDR(addr) ((addr & 0xf) << 16)
	19	#define AD5761_ADDR_NOOP 0x0
	20	#define AD5761_ADDR_DAC_WRITE 0x3
	21	#define AD5761_ADDR_CTRL_WRITE_REG 0x4
	22	#define AD5761_ADDR_SW_DATA_RESET 0x7
	23	#define AD5761_ADDR_DAC_READ 0xb
	24	#define AD5761_ADDR_CTRL_READ_REG 0xc
	25	#define AD5761_ADDR_SW_FULL_RESET 0xf
	26
	27	#define AD5761_CTRL_USE_INTVREF BIT(5)
	28	#define AD5761_CTRL_ETS BIT(6)
	29
	30	/**
	31	* struct ad5761_chip_info - chip specific information
	32	* @int_vref: Value of the internal reference voltage in mV - 0 if external
	33	* reference voltage is used
	34	* @channel: channel specification
	35	*/
	36
	37	struct ad5761_chip_info {
	38	unsigned long int_vref;
	39	const struct iio_chan_spec channel;
	40	};
	41
	42	struct ad5761_range_params {
	43	int m;
	44	int c;
	45	};
	46
	47	enum ad5761_supported_device_ids {
	48	ID_AD5721,
	49	ID_AD5721R,
	50	ID_AD5761,
	51	ID_AD5761R,
	52	};
	53
	54	/**
	55	* struct ad5761_state - driver instance specific data
	56	* @spi: spi_device
	57	* @vref_reg: reference voltage regulator
	58	* @use_intref: true when the internal voltage reference is used
	59	* @vref: actual voltage reference in mVolts
	60	* @range: output range mode used
	61	* @data: cache aligned spi buffer
	62	*/
	63	struct ad5761_state {
	64	struct spi_device *spi;
65	struct regulator *vref_reg;
66
67	bool use_intref;
68	int vref;
69	enum ad5761_voltage_range range;
70
71	/*
72	* DMA (thus cache coherency maintenance) requires the
73	* transfer buffers to live in their own cache lines.
74	*/
75	union {
76	__be32 d32;
77	u8 d8[4];
78	} data[3] ____cacheline_aligned;
79	};
80
81	static const struct ad5761_range_params ad5761_range_params[] = {
82	[AD5761_VOLTAGE_RANGE_M10V_10V] = {
83	.m = 80,
84	.c = 40,
85	},
86	[AD5761_VOLTAGE_RANGE_0V_10V] = {
87	.m = 40,
88	.c = 0,
89	},
90	[AD5761_VOLTAGE_RANGE_M5V_5V] = {
91	.m = 40,
92	.c = 20,
93	},
94	[AD5761_VOLTAGE_RANGE_0V_5V] = {
95	.m = 20,
96	.c = 0,
97	},
98	[AD5761_VOLTAGE_RANGE_M2V5_7V5] = {
99	.m = 40,
100	.c = 10,
101	},
102	[AD5761_VOLTAGE_RANGE_M3V_3V] = {
103	.m = 24,
104	.c = 12,
105	},
106	[AD5761_VOLTAGE_RANGE_0V_16V] = {
107	.m = 64,
108	.c = 0,
109	},
110	[AD5761_VOLTAGE_RANGE_0V_20V] = {
111	.m = 80,
112	.c = 0,
113	},
114	};
115
116	static int _ad5761_spi_write(struct ad5761_state *st, u8 addr, u16 val)
117	{
118	st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr) \| val);
119
120	return spi_write(st->spi, &st->data[0].d8[1], 3);
121	}
122
123	static int ad5761_spi_write(struct iio_dev *indio_dev, u8 addr, u16 val)
124	{
125	struct ad5761_state *st = iio_priv(indio_dev);
126	int ret;
127
128	mutex_lock(&indio_dev->mlock);
129	ret = _ad5761_spi_write(st, addr, val);
130	mutex_unlock(&indio_dev->mlock);
131
132	return ret;
133	}
134
135	static int _ad5761_spi_read(struct ad5761_state st, u8 addr, u16 val)
136	{
137	int ret;
138	struct spi_transfer xfers[] = {
139	{
140	.tx_buf = &st->data[0].d8[1],
141	.bits_per_word = 8,
142	.len = 3,
143	.cs_change = true,
144	}, {
145	.tx_buf = &st->data[1].d8[1],
146	.rx_buf = &st->data[2].d8[1],
147	.bits_per_word = 8,
148	.len = 3,
149	},
150	};
151
152	st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr));
153	st->data[1].d32 = cpu_to_be32(AD5761_ADDR(AD5761_ADDR_NOOP));
154
155	ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
156
157	*val = be32_to_cpu(st->data[2].d32);
158
159	return ret;
160	}
161
162	static int ad5761_spi_read(struct iio_dev indio_dev, u8 addr, u16 val)
163	{
164	struct ad5761_state *st = iio_priv(indio_dev);
165	int ret;
166
167	mutex_lock(&indio_dev->mlock);
168	ret = _ad5761_spi_read(st, addr, val);
169	mutex_unlock(&indio_dev->mlock);
170
171	return ret;
172	}
173
174	static int ad5761_spi_set_range(struct ad5761_state *st,
175	enum ad5761_voltage_range range)
176	{
177	u16 aux;
178	int ret;
179
180	aux = (range & 0x7) \| AD5761_CTRL_ETS;
181
182	if (st->use_intref)
183	aux \|= AD5761_CTRL_USE_INTVREF;
184
185	ret = _ad5761_spi_write(st, AD5761_ADDR_SW_FULL_RESET, 0);
186	if (ret)
187	return ret;
188
189	ret = _ad5761_spi_write(st, AD5761_ADDR_CTRL_WRITE_REG, aux);
190	if (ret)
191	return ret;
192
193	st->range = range;
194
195	return 0;
196	}
197
198	static int ad5761_read_raw(struct iio_dev *indio_dev,
199	struct iio_chan_spec const *chan,
200	int *val,
201	int *val2,
202	long mask)
203	{
204	struct ad5761_state *st;
205	int ret;
206	u16 aux;
207
208	switch (mask) {
209	case IIO_CHAN_INFO_RAW:
210	ret = ad5761_spi_read(indio_dev, AD5761_ADDR_DAC_READ, &aux);
211	if (ret)
212	return ret;
213	*val = aux >> chan->scan_type.shift;
214	return IIO_VAL_INT;
215	case IIO_CHAN_INFO_SCALE:
216	st = iio_priv(indio_dev);
217	val = st->vref ad5761_range_params[st->range].m;
218	*val /= 10;
219	*val2 = chan->scan_type.realbits;
220	return IIO_VAL_FRACTIONAL_LOG2;
221	case IIO_CHAN_INFO_OFFSET:
222	st = iio_priv(indio_dev);
223	*val = -(1 << chan->scan_type.realbits);
224	val = ad5761_range_params[st->range].c;
225	*val /= ad5761_range_params[st->range].m;
226	return IIO_VAL_INT;
227	default:
228	return -EINVAL;
229	}
230	}
231
232	static int ad5761_write_raw(struct iio_dev *indio_dev,
233	struct iio_chan_spec const *chan,
234	int val,
235	int val2,
236	long mask)
237	{
238	u16 aux;
239
240	if (mask != IIO_CHAN_INFO_RAW)
241	return -EINVAL;
242
243	if (val2 \|\| (val << chan->scan_type.shift) > 0xffff \|\| val < 0)
244	return -EINVAL;
245
246	aux = val << chan->scan_type.shift;
247
248	return ad5761_spi_write(indio_dev, AD5761_ADDR_DAC_WRITE, aux);
249	}
250
251	static const struct iio_info ad5761_info = {
252	.read_raw = &ad5761_read_raw,
253	.write_raw = &ad5761_write_raw,
131497ac RR	254	};
	255
	256	#define AD5761_CHAN(_bits) { \
	257	.type = IIO_VOLTAGE, \
	258	.output = 1, \
	259	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	260	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \| \
	261	BIT(IIO_CHAN_INFO_OFFSET), \
	262	.scan_type = { \
	263	.sign = 'u', \
	264	.realbits = (_bits), \
	265	.storagebits = 16, \
	266	.shift = 16 - (_bits), \
	267	}, \
	268	}
	269
	270	static const struct ad5761_chip_info ad5761_chip_infos[] = {
	271	[ID_AD5721] = {
	272	.int_vref = 0,
	273	.channel = AD5761_CHAN(12),
	274	},
	275	[ID_AD5721R] = {
	276	.int_vref = 2500,
	277	.channel = AD5761_CHAN(12),
	278	},
	279	[ID_AD5761] = {
	280	.int_vref = 0,
	281	.channel = AD5761_CHAN(16),
	282	},
	283	[ID_AD5761R] = {
	284	.int_vref = 2500,
	285	.channel = AD5761_CHAN(16),
	286	},
	287	};
	288
	289	static int ad5761_get_vref(struct ad5761_state *st,
	290	const struct ad5761_chip_info *chip_info)
	291	{
	292	int ret;
	293
	294	st->vref_reg = devm_regulator_get_optional(&st->spi->dev, "vref");
	295	if (PTR_ERR(st->vref_reg) == -ENODEV) {
	296	/* Use Internal regulator */
	297	if (!chip_info->int_vref) {
	298	dev_err(&st->spi->dev,
	299	"Voltage reference not found\n");
	300	return -EIO;
	301	}
	302
	303	st->use_intref = true;
	304	st->vref = chip_info->int_vref;
	305	return 0;
	306	}
	307
	308	if (IS_ERR(st->vref_reg)) {
	309	dev_err(&st->spi->dev,
	310	"Error getting voltage reference regulator\n");
	311	return PTR_ERR(st->vref_reg);
	312	}
	313
	314	ret = regulator_enable(st->vref_reg);
	315	if (ret) {
	316	dev_err(&st->spi->dev,
	317	"Failed to enable voltage reference\n");
318	return ret;
319	}
320
321	ret = regulator_get_voltage(st->vref_reg);
322	if (ret < 0) {
323	dev_err(&st->spi->dev,
324	"Failed to get voltage reference value\n");
325	goto disable_regulator_vref;
326	}
327
328	if (ret < 2000000 \|\| ret > 3000000) {
329	dev_warn(&st->spi->dev,
330	"Invalid external voltage ref. value %d uV\n", ret);
331	ret = -EIO;
332	goto disable_regulator_vref;
333	}
334
335	st->vref = ret / 1000;
336	st->use_intref = false;
337
338	return 0;
339
340	disable_regulator_vref:
341	regulator_disable(st->vref_reg);
342	st->vref_reg = NULL;
343	return ret;
344	}
345
346	static int ad5761_probe(struct spi_device *spi)
347	{
348	struct iio_dev *iio_dev;
349	struct ad5761_state *st;
350	int ret;
351	const struct ad5761_chip_info *chip_info =
352	&ad5761_chip_infos[spi_get_device_id(spi)->driver_data];
353	enum ad5761_voltage_range voltage_range = AD5761_VOLTAGE_RANGE_0V_5V;
354	struct ad5761_platform_data *pdata = dev_get_platdata(&spi->dev);
355
356	iio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
357	if (!iio_dev)
358	return -ENOMEM;
359
360	st = iio_priv(iio_dev);
361
362	st->spi = spi;
363	spi_set_drvdata(spi, iio_dev);
364
365	ret = ad5761_get_vref(st, chip_info);
366	if (ret)
367	return ret;
368
369	if (pdata)
370	voltage_range = pdata->voltage_range;
371
372	ret = ad5761_spi_set_range(st, voltage_range);
373	if (ret)
374	goto disable_regulator_err;
375
376	iio_dev->dev.parent = &spi->dev;
377	iio_dev->info = &ad5761_info;
378	iio_dev->modes = INDIO_DIRECT_MODE;
379	iio_dev->channels = &chip_info->channel;
380	iio_dev->num_channels = 1;
381	iio_dev->name = spi_get_device_id(st->spi)->name;
382	ret = iio_device_register(iio_dev);
383	if (ret)
384	goto disable_regulator_err;
385
386	return 0;
387
388	disable_regulator_err:
389	if (!IS_ERR_OR_NULL(st->vref_reg))
390	regulator_disable(st->vref_reg);
391
392	return ret;
393	}
394
395	static int ad5761_remove(struct spi_device *spi)
396	{
397	struct iio_dev *iio_dev = spi_get_drvdata(spi);
398	struct ad5761_state *st = iio_priv(iio_dev);
399
400	iio_device_unregister(iio_dev);
401
402	if (!IS_ERR_OR_NULL(st->vref_reg))
403	regulator_disable(st->vref_reg);
404
405	return 0;
406	}
407
408	static const struct spi_device_id ad5761_id[] = {
409	{"ad5721", ID_AD5721},
410	{"ad5721r", ID_AD5721R},
411	{"ad5761", ID_AD5761},
412	{"ad5761r", ID_AD5761R},
413	{}
414	};
415	MODULE_DEVICE_TABLE(spi, ad5761_id);
416
417	static struct spi_driver ad5761_driver = {
418	.driver = {
419	.name = "ad5761",
420	},
421	.probe = ad5761_probe,
422	.remove = ad5761_remove,
423	.id_table = ad5761_id,
424	};
425	module_spi_driver(ad5761_driver);
426
427	MODULE_AUTHOR("Ricardo Ribalda <[email protected]>");
428	MODULE_DESCRIPTION("Analog Devices AD5721, AD5721R, AD5761, AD5761R driver");
429	MODULE_LICENSE("GPL v2");