[linux.git] / drivers / iio / dac / ad5446.c

/*
 * AD5446 SPI DAC driver
 *
 * Copyright 2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/interrupt.h>
#include <linux/workqueue.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/list.h>
#include <linux/spi/spi.h>
#include <linux/i2c.h>
#include <linux/regulator/consumer.h>
#include <linux/err.h>
#include <linux/module.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>

#define MODE_PWRDWN_1k		0x1
#define MODE_PWRDWN_100k	0x2
#define MODE_PWRDWN_TRISTATE	0x3

/**
 * struct ad5446_state - driver instance specific data
 * @spi:		spi_device
 * @chip_info:		chip model specific constants, available modes etc
 * @reg:		supply regulator
 * @vref_mv:		actual reference voltage used
 */

struct ad5446_state {
	struct device		*dev;
	const struct ad5446_chip_info	*chip_info;
	struct regulator		*reg;
	unsigned short			vref_mv;
	unsigned			cached_val;
	unsigned			pwr_down_mode;
	unsigned			pwr_down;
};

/**
 * struct ad5446_chip_info - chip specific information
 * @channel:		channel spec for the DAC
 * @int_vref_mv:	AD5620/40/60: the internal reference voltage
 * @write:		chip specific helper function to write to the register
 */

struct ad5446_chip_info {
	struct iio_chan_spec	channel;
	u16			int_vref_mv;
	int			(*write)(struct ad5446_state *st, unsigned val);
};

static const char * const ad5446_powerdown_modes[] = {
	"1kohm_to_gnd", "100kohm_to_gnd", "three_state"
};

static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, unsigned int mode)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	st->pwr_down_mode = mode + 1;

	return 0;
}

static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	return st->pwr_down_mode - 1;
}

static const struct iio_enum ad5446_powerdown_mode_enum = {
	.items = ad5446_powerdown_modes,
	.num_items = ARRAY_SIZE(ad5446_powerdown_modes),
	.get = ad5446_get_powerdown_mode,
	.set = ad5446_set_powerdown_mode,
};

static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
					   uintptr_t private,
					   const struct iio_chan_spec *chan,
					   char *buf)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	return sprintf(buf, "%d\n", st->pwr_down);
}

static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
					    uintptr_t private,
					    const struct iio_chan_spec *chan,
					    const char *buf, size_t len)
{
	struct ad5446_state *st = iio_priv(indio_dev);
	unsigned int shift;
	unsigned int val;
	bool powerdown;
	int ret;

	ret = strtobool(buf, &powerdown);
	if (ret)
		return ret;

	mutex_lock(&indio_dev->mlock);
	st->pwr_down = powerdown;

	if (st->pwr_down) {
		shift = chan->scan_type.realbits + chan->scan_type.shift;
		val = st->pwr_down_mode << shift;
	} else {
		val = st->cached_val;
	}

	ret = st->chip_info->write(st, val);
	mutex_unlock(&indio_dev->mlock);

	return ret ? ret : len;
}

static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
	{
		.name = "powerdown",
		.read = ad5446_read_dac_powerdown,
		.write = ad5446_write_dac_powerdown,
		.shared = IIO_SEPARATE,
	},
	IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5446_powerdown_mode_enum),
	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
	{ },
};

#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
	.type = IIO_VOLTAGE, \
	.indexed = 1, \
	.output = 1, \
	.channel = 0, \
	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
	.scan_type = { \
		.sign = 'u', \
		.realbits = (bits), \
		.storagebits = (storage), \
		.shift = (_shift), \
		}, \
	.ext_info = (ext), \
}

#define AD5446_CHANNEL(bits, storage, shift) \
	_AD5446_CHANNEL(bits, storage, shift, NULL)

#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
	_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)

static int ad5446_read_raw(struct iio_dev *indio_dev,
			   struct iio_chan_spec const *chan,
			   int *val,
			   int *val2,
			   long m)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	switch (m) {
	case IIO_CHAN_INFO_RAW:
		*val = st->cached_val;
		return IIO_VAL_INT;
	case IIO_CHAN_INFO_SCALE:
		*val = st->vref_mv;
		*val2 = chan->scan_type.realbits;
		return IIO_VAL_FRACTIONAL_LOG2;
	}
	return -EINVAL;
}

static int ad5446_write_raw(struct iio_dev *indio_dev,
			       struct iio_chan_spec const *chan,
			       int val,
			       int val2,
			       long mask)
{
	struct ad5446_state *st = iio_priv(indio_dev);
	int ret = 0;

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		if (val >= (1 << chan->scan_type.realbits) || val < 0)
			return -EINVAL;

		val <<= chan->scan_type.shift;
		mutex_lock(&indio_dev->mlock);
		st->cached_val = val;
		if (!st->pwr_down)
			ret = st->chip_info->write(st, val);
		mutex_unlock(&indio_dev->mlock);
		break;
	default:
		ret = -EINVAL;
	}

	return ret;
}

static const struct iio_info ad5446_info = {
	.read_raw = ad5446_read_raw,
	.write_raw = ad5446_write_raw,
};

static int ad5446_probe(struct device *dev, const char *name,
			const struct ad5446_chip_info *chip_info)
{
	struct ad5446_state *st;
	struct iio_dev *indio_dev;
	struct regulator *reg;
	int ret, voltage_uv = 0;

	reg = devm_regulator_get(dev, "vcc");
	if (!IS_ERR(reg)) {
		ret = regulator_enable(reg);
		if (ret)
			return ret;

		ret = regulator_get_voltage(reg);
		if (ret < 0)
			goto error_disable_reg;

		voltage_uv = ret;
	}

	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
	if (indio_dev == NULL) {
		ret = -ENOMEM;
		goto error_disable_reg;
	}
	st = iio_priv(indio_dev);
	st->chip_info = chip_info;

	dev_set_drvdata(dev, indio_dev);
	st->reg = reg;
	st->dev = dev;

	/* Establish that the iio_dev is a child of the device */
	indio_dev->dev.parent = dev;
	indio_dev->name = name;
	indio_dev->info = &ad5446_info;
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->channels = &st->chip_info->channel;
	indio_dev->num_channels = 1;

	st->pwr_down_mode = MODE_PWRDWN_1k;

	if (st->chip_info->int_vref_mv)
		st->vref_mv = st->chip_info->int_vref_mv;
	else if (voltage_uv)
		st->vref_mv = voltage_uv / 1000;
	else
		dev_warn(dev, "reference voltage unspecified\n");

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_disable_reg;

	return 0;

error_disable_reg:
	if (!IS_ERR(reg))
		regulator_disable(reg);
	return ret;
}

static int ad5446_remove(struct device *dev)
{
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct ad5446_state *st = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	if (!IS_ERR(st->reg))
		regulator_disable(st->reg);

	return 0;
}

#if IS_ENABLED(CONFIG_SPI_MASTER)

static int ad5446_write(struct ad5446_state *st, unsigned val)
{
	struct spi_device *spi = to_spi_device(st->dev);
	__be16 data = cpu_to_be16(val);

	return spi_write(spi, &data, sizeof(data));
}

static int ad5660_write(struct ad5446_state *st, unsigned val)
{
	struct spi_device *spi = to_spi_device(st->dev);
	uint8_t data[3];

	data[0] = (val >> 16) & 0xFF;
	data[1] = (val >> 8) & 0xFF;
	data[2] = val & 0xFF;

	return spi_write(spi, data, sizeof(data));
}

/**
 * ad5446_supported_spi_device_ids:
 * The AD5620/40/60 parts are available in different fixed internal reference
 * voltage options. The actual part numbers may look differently
 * (and a bit cryptic), however this style is used to make clear which
 * parts are supported here.
 */
enum ad5446_supported_spi_device_ids {
	ID_AD5300,
	ID_AD5310,
	ID_AD5320,
	ID_AD5444,
	ID_AD5446,
	ID_AD5450,
	ID_AD5451,
	ID_AD5541A,
	ID_AD5512A,
	ID_AD5553,
	ID_AD5601,
	ID_AD5611,
	ID_AD5621,
	ID_AD5641,
	ID_AD5620_2500,
	ID_AD5620_1250,
	ID_AD5640_2500,
	ID_AD5640_1250,
	ID_AD5660_2500,
	ID_AD5660_1250,
	ID_AD5662,
};

static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
	[ID_AD5300] = {
		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5310] = {
		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
		.write = ad5446_write,
	},
	[ID_AD5320] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5444] = {
		.channel = AD5446_CHANNEL(12, 16, 2),
		.write = ad5446_write,
	},
	[ID_AD5446] = {
		.channel = AD5446_CHANNEL(14, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5450] = {
		.channel = AD5446_CHANNEL(8, 16, 6),
		.write = ad5446_write,
	},
	[ID_AD5451] = {
		.channel = AD5446_CHANNEL(10, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5541A] = {
		.channel = AD5446_CHANNEL(16, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5512A] = {
		.channel = AD5446_CHANNEL(12, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5553] = {
		.channel = AD5446_CHANNEL(14, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5601] = {
		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
		.write = ad5446_write,
	},
	[ID_AD5611] = {
		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5621] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
		.write = ad5446_write,
	},
	[ID_AD5641] = {
		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5620_2500] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
		.int_vref_mv = 2500,
		.write = ad5446_write,
	},
	[ID_AD5620_1250] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
		.int_vref_mv = 1250,
		.write = ad5446_write,
	},
	[ID_AD5640_2500] = {
		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
		.int_vref_mv = 2500,
		.write = ad5446_write,
	},
	[ID_AD5640_1250] = {
		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
		.int_vref_mv = 1250,
		.write = ad5446_write,
	},
	[ID_AD5660_2500] = {
		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
		.int_vref_mv = 2500,
		.write = ad5660_write,
	},
	[ID_AD5660_1250] = {
		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
		.int_vref_mv = 1250,
		.write = ad5660_write,
	},
	[ID_AD5662] = {
		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
		.write = ad5660_write,
	},
};

static const struct spi_device_id ad5446_spi_ids[] = {
	{"ad5300", ID_AD5300},
	{"ad5310", ID_AD5310},
	{"ad5320", ID_AD5320},
	{"ad5444", ID_AD5444},
	{"ad5446", ID_AD5446},
	{"ad5450", ID_AD5450},
	{"ad5451", ID_AD5451},
	{"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
	{"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
	{"ad5512a", ID_AD5512A},
	{"ad5541a", ID_AD5541A},
	{"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
	{"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
	{"ad5553", ID_AD5553},
	{"ad5601", ID_AD5601},
	{"ad5611", ID_AD5611},
	{"ad5621", ID_AD5621},
	{"ad5641", ID_AD5641},
	{"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
	{"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
	{"ad5640-2500", ID_AD5640_2500},
	{"ad5640-1250", ID_AD5640_1250},
	{"ad5660-2500", ID_AD5660_2500},
	{"ad5660-1250", ID_AD5660_1250},
	{"ad5662", ID_AD5662},
	{"dac081s101", ID_AD5300}, /* compatible Texas Instruments chips */
	{"dac101s101", ID_AD5310},
	{"dac121s101", ID_AD5320},
	{"dac7512", ID_AD5320},
	{}
};
MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);

#ifdef CONFIG_OF
static const struct of_device_id ad5446_of_ids[] = {
	{ .compatible = "ti,dac7512" },
	{ }
};
MODULE_DEVICE_TABLE(of, ad5446_of_ids);
#endif

static int ad5446_spi_probe(struct spi_device *spi)
{
	const struct spi_device_id *id = spi_get_device_id(spi);

	return ad5446_probe(&spi->dev, id->name,
		&ad5446_spi_chip_info[id->driver_data]);
}

static int ad5446_spi_remove(struct spi_device *spi)
{
	return ad5446_remove(&spi->dev);
}

static struct spi_driver ad5446_spi_driver = {
	.driver = {
		.name	= "ad5446",
		.of_match_table = of_match_ptr(ad5446_of_ids),
	},
	.probe		= ad5446_spi_probe,
	.remove		= ad5446_spi_remove,
	.id_table	= ad5446_spi_ids,
};

static int __init ad5446_spi_register_driver(void)
{
	return spi_register_driver(&ad5446_spi_driver);
}

static void ad5446_spi_unregister_driver(void)
{
	spi_unregister_driver(&ad5446_spi_driver);
}

#else

static inline int ad5446_spi_register_driver(void) { return 0; }
static inline void ad5446_spi_unregister_driver(void) { }

#endif

#if IS_ENABLED(CONFIG_I2C)

static int ad5622_write(struct ad5446_state *st, unsigned val)
{
	struct i2c_client *client = to_i2c_client(st->dev);
	__be16 data = cpu_to_be16(val);

	return i2c_master_send(client, (char *)&data, sizeof(data));
}

/**
 * ad5446_supported_i2c_device_ids:
 * The AD5620/40/60 parts are available in different fixed internal reference
 * voltage options. The actual part numbers may look differently
 * (and a bit cryptic), however this style is used to make clear which
 * parts are supported here.
 */
enum ad5446_supported_i2c_device_ids {
	ID_AD5602,
	ID_AD5612,
	ID_AD5622,
};

static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
	[ID_AD5602] = {
		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
		.write = ad5622_write,
	},
	[ID_AD5612] = {
		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
		.write = ad5622_write,
	},
	[ID_AD5622] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
		.write = ad5622_write,
	},
};

static int ad5446_i2c_probe(struct i2c_client *i2c,
			    const struct i2c_device_id *id)
{
	return ad5446_probe(&i2c->dev, id->name,
		&ad5446_i2c_chip_info[id->driver_data]);
}

static int ad5446_i2c_remove(struct i2c_client *i2c)
{
	return ad5446_remove(&i2c->dev);
}

static const struct i2c_device_id ad5446_i2c_ids[] = {
	{"ad5301", ID_AD5602},
	{"ad5311", ID_AD5612},
	{"ad5321", ID_AD5622},
	{"ad5602", ID_AD5602},
	{"ad5612", ID_AD5612},
	{"ad5622", ID_AD5622},
	{}
};
MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);

static struct i2c_driver ad5446_i2c_driver = {
	.driver = {
		   .name = "ad5446",
	},
	.probe = ad5446_i2c_probe,
	.remove = ad5446_i2c_remove,
	.id_table = ad5446_i2c_ids,
};

static int __init ad5446_i2c_register_driver(void)
{
	return i2c_add_driver(&ad5446_i2c_driver);
}

static void __exit ad5446_i2c_unregister_driver(void)
{
	i2c_del_driver(&ad5446_i2c_driver);
}

#else

static inline int ad5446_i2c_register_driver(void) { return 0; }
static inline void ad5446_i2c_unregister_driver(void) { }

#endif

static int __init ad5446_init(void)
{
	int ret;

	ret = ad5446_spi_register_driver();
	if (ret)
		return ret;

	ret = ad5446_i2c_register_driver();
	if (ret) {
		ad5446_spi_unregister_driver();
		return ret;
	}

	return 0;
}
module_init(ad5446_init);

static void __exit ad5446_exit(void)
{
	ad5446_i2c_unregister_driver();
	ad5446_spi_unregister_driver();
}
module_exit(ad5446_exit);

MODULE_AUTHOR("Michael Hennerich <[email protected]>");
MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
b5a49481 MH	1	/*
	2	* AD5446 SPI DAC driver
	3	*
	4	* Copyright 2010 Analog Devices Inc.
	5	*
	6	* Licensed under the GPL-2 or later.
	7	*/
	8
	9	#include <linux/interrupt.h>
	10	#include <linux/workqueue.h>
	11	#include <linux/device.h>
	12	#include <linux/kernel.h>
	13	#include <linux/slab.h>
	14	#include <linux/sysfs.h>
	15	#include <linux/list.h>
	16	#include <linux/spi/spi.h>
3ec36a2c	17	#include <linux/i2c.h>
b5a49481 MH	18	#include <linux/regulator/consumer.h>
b5a49481 MH	19	#include <linux/err.h>
99c97852	20	#include <linux/module.h>
b5a49481	21
06458e27 JC	22	#include <linux/iio/iio.h>
06458e27 JC	23	#include <linux/iio/sysfs.h>
b5a49481	24
2e15c903 JFD	25	#define MODE_PWRDWN_1k 0x1
	26	#define MODE_PWRDWN_100k 0x2
	27	#define MODE_PWRDWN_TRISTATE 0x3
	28
	29	/**
	30	* struct ad5446_state - driver instance specific data
	31	* @spi: spi_device
	32	* @chip_info: chip model specific constants, available modes etc
	33	* @reg: supply regulator
	34	* @vref_mv: actual reference voltage used
	35	*/
	36
	37	struct ad5446_state {
	38	struct device *dev;
	39	const struct ad5446_chip_info *chip_info;
	40	struct regulator *reg;
	41	unsigned short vref_mv;
	42	unsigned cached_val;
	43	unsigned pwr_down_mode;
	44	unsigned pwr_down;
	45	};
	46
	47	/**
	48	* struct ad5446_chip_info - chip specific information
	49	* @channel: channel spec for the DAC
	50	* @int_vref_mv: AD5620/40/60: the internal reference voltage
	51	* @write: chip specific helper function to write to the register
	52	*/
	53
	54	struct ad5446_chip_info {
	55	struct iio_chan_spec channel;
	56	u16 int_vref_mv;
	57	int (write)(struct ad5446_state st, unsigned val);
	58	};
b5a49481	59
83f0f572	60	static const char * const ad5446_powerdown_modes[] = {
09d48aa9	61	"1kohm_to_gnd", "100kohm_to_gnd", "three_state"
83f0f572 LPC	62	};
83f0f572 LPC	63
09d48aa9 LPC	64	static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
09d48aa9 LPC	65	const struct iio_chan_spec *chan, unsigned int mode)
bbed4dc7	66	{
638e59fc	67	struct ad5446_state *st = iio_priv(indio_dev);
83f0f572	68
09d48aa9	69	st->pwr_down_mode = mode + 1;
bbed4dc7	70
09d48aa9	71	return 0;
bbed4dc7 MH	72	}
bbed4dc7 MH	73
09d48aa9 LPC	74	static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
09d48aa9 LPC	75	const struct iio_chan_spec *chan)
bbed4dc7	76	{
638e59fc	77	struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7	78
09d48aa9	79	return st->pwr_down_mode - 1;
bbed4dc7 MH	80	}
bbed4dc7 MH	81
09d48aa9 LPC	82	static const struct iio_enum ad5446_powerdown_mode_enum = {
	83	.items = ad5446_powerdown_modes,
	84	.num_items = ARRAY_SIZE(ad5446_powerdown_modes),
	85	.get = ad5446_get_powerdown_mode,
	86	.set = ad5446_set_powerdown_mode,
	87	};
	88
83f0f572	89	static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139	90	uintptr_t private,
83f0f572	91	const struct iio_chan_spec *chan,
bbed4dc7 MH	92	char *buf)
bbed4dc7 MH	93	{
638e59fc	94	struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7 MH	95
	96	return sprintf(buf, "%d\n", st->pwr_down);
	97	}
	98
83f0f572	99	static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139	100	uintptr_t private,
83f0f572	101	const struct iio_chan_spec *chan,
bbed4dc7 MH	102	const char *buf, size_t len)
bbed4dc7 MH	103	{
638e59fc	104	struct ad5446_state *st = iio_priv(indio_dev);
cae329e0 LPC	105	unsigned int shift;
cae329e0 LPC	106	unsigned int val;
83f0f572	107	bool powerdown;
bbed4dc7 MH	108	int ret;
bbed4dc7 MH	109
83f0f572	110	ret = strtobool(buf, &powerdown);
bbed4dc7 MH	111	if (ret)
	112	return ret;
	113
638e59fc	114	mutex_lock(&indio_dev->mlock);
83f0f572	115	st->pwr_down = powerdown;
bbed4dc7	116
cae329e0 LPC	117	if (st->pwr_down) {
	118	shift = chan->scan_type.realbits + chan->scan_type.shift;
	119	val = st->pwr_down_mode << shift;
	120	} else {
	121	val = st->cached_val;
	122	}
bbed4dc7	123
cae329e0	124	ret = st->chip_info->write(st, val);
638e59fc	125	mutex_unlock(&indio_dev->mlock);
bbed4dc7 MH	126
	127	return ret ? ret : len;
	128	}
	129
3ec36a2c	130	static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
83f0f572 LPC	131	{
	132	.name = "powerdown",
	133	.read = ad5446_read_dac_powerdown,
	134	.write = ad5446_write_dac_powerdown,
3704432f	135	.shared = IIO_SEPARATE,
83f0f572	136	},
3704432f	137	IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5446_powerdown_mode_enum),
09d48aa9	138	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
83f0f572	139	{ },
b5a49481 MH	140	};
b5a49481 MH	141
e3019c21	142	#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
33ad6b21 LPC	143	.type = IIO_VOLTAGE, \
	144	.indexed = 1, \
	145	.output = 1, \
	146	.channel = 0, \
2f6a4a44 JC	147	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
2f6a4a44 JC	148	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
e3019c21 JC	149	.scan_type = { \
	150	.sign = 'u', \
	151	.realbits = (bits), \
	152	.storagebits = (storage), \
	153	.shift = (_shift), \
	154	}, \
83f0f572	155	.ext_info = (ext), \
33ad6b21 LPC	156	}
33ad6b21 LPC	157
83f0f572 LPC	158	#define AD5446_CHANNEL(bits, storage, shift) \
	159	_AD5446_CHANNEL(bits, storage, shift, NULL)
	160
	161	#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
3ec36a2c	162	_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
b5a49481	163
33ad6b21 LPC	164	static int ad5446_read_raw(struct iio_dev *indio_dev,
	165	struct iio_chan_spec const *chan,
	166	int *val,
	167	int *val2,
	168	long m)
	169	{
	170	struct ad5446_state *st = iio_priv(indio_dev);
33ad6b21 LPC	171
33ad6b21 LPC	172	switch (m) {
5e06bdfb LPC	173	case IIO_CHAN_INFO_RAW:
	174	*val = st->cached_val;
	175	return IIO_VAL_INT;
33ad6b21	176	case IIO_CHAN_INFO_SCALE:
0a99b601 LPC	177	*val = st->vref_mv;
	178	*val2 = chan->scan_type.realbits;
	179	return IIO_VAL_FRACTIONAL_LOG2;
33ad6b21 LPC	180	}
	181	return -EINVAL;
	182	}
	183
	184	static int ad5446_write_raw(struct iio_dev *indio_dev,
	185	struct iio_chan_spec const *chan,
	186	int val,
	187	int val2,
	188	long mask)
	189	{
	190	struct ad5446_state *st = iio_priv(indio_dev);
07ffd0d0	191	int ret = 0;
33ad6b21 LPC	192
33ad6b21 LPC	193	switch (mask) {
09f4eb40	194	case IIO_CHAN_INFO_RAW:
33ad6b21 LPC	195	if (val >= (1 << chan->scan_type.realbits) \|\| val < 0)
	196	return -EINVAL;
	197
	198	val <<= chan->scan_type.shift;
	199	mutex_lock(&indio_dev->mlock);
	200	st->cached_val = val;
af836d9a	201	if (!st->pwr_down)
cae329e0	202	ret = st->chip_info->write(st, val);
33ad6b21 LPC	203	mutex_unlock(&indio_dev->mlock);
	204	break;
	205	default:
	206	ret = -EINVAL;
	207	}
	208
	209	return ret;
	210	}
	211
6fe8135f	212	static const struct iio_info ad5446_info = {
7389266c JC	213	.read_raw = ad5446_read_raw,
7389266c JC	214	.write_raw = ad5446_write_raw,
7389266c JC	215	};
7389266c JC	216
fc52692c GKH	217	static int ad5446_probe(struct device dev, const char name,
fc52692c GKH	218	const struct ad5446_chip_info *chip_info)
b5a49481 MH	219	{
b5a49481 MH	220	struct ad5446_state *st;
86729fc4 JC	221	struct iio_dev *indio_dev;
86729fc4 JC	222	struct regulator *reg;
b5a49481 MH	223	int ret, voltage_uv = 0;
b5a49481 MH	224
ba727295	225	reg = devm_regulator_get(dev, "vcc");
86729fc4 JC	226	if (!IS_ERR(reg)) {
86729fc4 JC	227	ret = regulator_enable(reg);
b5a49481	228	if (ret)
ba727295	229	return ret;
b5a49481	230
13e57ee2 AL	231	ret = regulator_get_voltage(reg);
	232	if (ret < 0)
	233	goto error_disable_reg;
	234
	235	voltage_uv = ret;
b5a49481 MH	236	}
b5a49481 MH	237
ba727295	238	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
86729fc4 JC	239	if (indio_dev == NULL) {
	240	ret = -ENOMEM;
	241	goto error_disable_reg;
	242	}
	243	st = iio_priv(indio_dev);
3ec36a2c	244	st->chip_info = chip_info;
b5a49481	245
3ec36a2c	246	dev_set_drvdata(dev, indio_dev);
86729fc4	247	st->reg = reg;
3ec36a2c	248	st->dev = dev;
b5a49481	249
3ec36a2c JFD	250	/* Establish that the iio_dev is a child of the device */
	251	indio_dev->dev.parent = dev;
	252	indio_dev->name = name;
83f0f572	253	indio_dev->info = &ad5446_info;
86729fc4	254	indio_dev->modes = INDIO_DIRECT_MODE;
33ad6b21 LPC	255	indio_dev->channels = &st->chip_info->channel;
33ad6b21 LPC	256	indio_dev->num_channels = 1;
b5a49481	257
09d48aa9 LPC	258	st->pwr_down_mode = MODE_PWRDWN_1k;
09d48aa9 LPC	259
4e5d3f92	260	if (st->chip_info->int_vref_mv)
bbed4dc7	261	st->vref_mv = st->chip_info->int_vref_mv;
4e5d3f92 LPC	262	else if (voltage_uv)
	263	st->vref_mv = voltage_uv / 1000;
	264	else
3ec36a2c	265	dev_warn(dev, "reference voltage unspecified\n");
b5a49481	266
86729fc4	267	ret = iio_device_register(indio_dev);
b5a49481	268	if (ret)
ba727295	269	goto error_disable_reg;
b5a49481 MH	270
	271	return 0;
	272
b5a49481	273	error_disable_reg:
86729fc4 JC	274	if (!IS_ERR(reg))
86729fc4 JC	275	regulator_disable(reg);
b5a49481 MH	276	return ret;
	277	}
	278
3ec36a2c	279	static int ad5446_remove(struct device *dev)
b5a49481	280	{
3ec36a2c	281	struct iio_dev *indio_dev = dev_get_drvdata(dev);
86729fc4	282	struct ad5446_state *st = iio_priv(indio_dev);
b5a49481 MH	283
b5a49481 MH	284	iio_device_unregister(indio_dev);
ba727295	285	if (!IS_ERR(st->reg))
d2fffd6c	286	regulator_disable(st->reg);
d2fffd6c	287
b5a49481 MH	288	return 0;
	289	}
	290
3ec36a2c JFD	291	#if IS_ENABLED(CONFIG_SPI_MASTER)
	292
	293	static int ad5446_write(struct ad5446_state *st, unsigned val)
	294	{
	295	struct spi_device *spi = to_spi_device(st->dev);
	296	__be16 data = cpu_to_be16(val);
	297
	298	return spi_write(spi, &data, sizeof(data));
	299	}
	300
	301	static int ad5660_write(struct ad5446_state *st, unsigned val)
	302	{
	303	struct spi_device *spi = to_spi_device(st->dev);
	304	uint8_t data[3];
	305
	306	data[0] = (val >> 16) & 0xFF;
	307	data[1] = (val >> 8) & 0xFF;
	308	data[2] = val & 0xFF;
	309
	310	return spi_write(spi, data, sizeof(data));
	311	}
	312
	313	/**
	314	* ad5446_supported_spi_device_ids:
	315	* The AD5620/40/60 parts are available in different fixed internal reference
	316	* voltage options. The actual part numbers may look differently
	317	* (and a bit cryptic), however this style is used to make clear which
	318	* parts are supported here.
	319	*/
	320	enum ad5446_supported_spi_device_ids {
2fafbce2 LPC	321	ID_AD5300,
	322	ID_AD5310,
	323	ID_AD5320,
3ec36a2c JFD	324	ID_AD5444,
	325	ID_AD5446,
	326	ID_AD5450,
	327	ID_AD5451,
	328	ID_AD5541A,
	329	ID_AD5512A,
	330	ID_AD5553,
	331	ID_AD5601,
	332	ID_AD5611,
	333	ID_AD5621,
4fa2a9e4	334	ID_AD5641,
3ec36a2c JFD	335	ID_AD5620_2500,
	336	ID_AD5620_1250,
	337	ID_AD5640_2500,
	338	ID_AD5640_1250,
	339	ID_AD5660_2500,
	340	ID_AD5660_1250,
	341	ID_AD5662,
	342	};
	343
	344	static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
2fafbce2 LPC	345	[ID_AD5300] = {
	346	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
	347	.write = ad5446_write,
	348	},
	349	[ID_AD5310] = {
	350	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
	351	.write = ad5446_write,
	352	},
	353	[ID_AD5320] = {
	354	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
	355	.write = ad5446_write,
	356	},
3ec36a2c JFD	357	[ID_AD5444] = {
	358	.channel = AD5446_CHANNEL(12, 16, 2),
	359	.write = ad5446_write,
	360	},
	361	[ID_AD5446] = {
	362	.channel = AD5446_CHANNEL(14, 16, 0),
	363	.write = ad5446_write,
	364	},
	365	[ID_AD5450] = {
	366	.channel = AD5446_CHANNEL(8, 16, 6),
	367	.write = ad5446_write,
	368	},
	369	[ID_AD5451] = {
	370	.channel = AD5446_CHANNEL(10, 16, 4),
	371	.write = ad5446_write,
	372	},
	373	[ID_AD5541A] = {
	374	.channel = AD5446_CHANNEL(16, 16, 0),
	375	.write = ad5446_write,
	376	},
	377	[ID_AD5512A] = {
	378	.channel = AD5446_CHANNEL(12, 16, 4),
	379	.write = ad5446_write,
	380	},
	381	[ID_AD5553] = {
	382	.channel = AD5446_CHANNEL(14, 16, 0),
	383	.write = ad5446_write,
	384	},
	385	[ID_AD5601] = {
	386	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
	387	.write = ad5446_write,
	388	},
	389	[ID_AD5611] = {
	390	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
	391	.write = ad5446_write,
	392	},
	393	[ID_AD5621] = {
	394	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
	395	.write = ad5446_write,
	396	},
4fa2a9e4 AM	397	[ID_AD5641] = {
	398	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
	399	.write = ad5446_write,
	400	},
3ec36a2c JFD	401	[ID_AD5620_2500] = {
	402	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
	403	.int_vref_mv = 2500,
	404	.write = ad5446_write,
	405	},
	406	[ID_AD5620_1250] = {
	407	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
	408	.int_vref_mv = 1250,
	409	.write = ad5446_write,
	410	},
	411	[ID_AD5640_2500] = {
	412	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
	413	.int_vref_mv = 2500,
	414	.write = ad5446_write,
	415	},
	416	[ID_AD5640_1250] = {
	417	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
	418	.int_vref_mv = 1250,
	419	.write = ad5446_write,
	420	},
	421	[ID_AD5660_2500] = {
	422	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
	423	.int_vref_mv = 2500,
	424	.write = ad5660_write,
	425	},
	426	[ID_AD5660_1250] = {
	427	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
	428	.int_vref_mv = 1250,
	429	.write = ad5660_write,
	430	},
	431	[ID_AD5662] = {
	432	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
	433	.write = ad5660_write,
	434	},
	435	};
	436
	437	static const struct spi_device_id ad5446_spi_ids[] = {
2fafbce2 LPC	438	{"ad5300", ID_AD5300},
	439	{"ad5310", ID_AD5310},
	440	{"ad5320", ID_AD5320},
b5a49481 MH	441	{"ad5444", ID_AD5444},
b5a49481 MH	442	{"ad5446", ID_AD5446},
779c0c46 LPC	443	{"ad5450", ID_AD5450},
	444	{"ad5451", ID_AD5451},
	445	{"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
	446	{"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
b5a49481	447	{"ad5512a", ID_AD5512A},
67d1c1f4	448	{"ad5541a", ID_AD5541A},
11a7df48 LPC	449	{"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
11a7df48 LPC	450	{"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
bd51c0b0	451	{"ad5553", ID_AD5553},
2b61535a MH	452	{"ad5601", ID_AD5601},
	453	{"ad5611", ID_AD5611},
	454	{"ad5621", ID_AD5621},
4fa2a9e4	455	{"ad5641", ID_AD5641},
d846263d MH	456	{"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
	457	{"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
	458	{"ad5640-2500", ID_AD5640_2500},
	459	{"ad5640-1250", ID_AD5640_1250},
	460	{"ad5660-2500", ID_AD5660_2500},
	461	{"ad5660-1250", ID_AD5660_1250},
18e5ab31	462	{"ad5662", ID_AD5662},
9cad3b98 LW	463	{"dac081s101", ID_AD5300}, /* compatible Texas Instruments chips */
	464	{"dac101s101", ID_AD5310},
	465	{"dac121s101", ID_AD5320},
49b3f874	466	{"dac7512", ID_AD5320},
b5a49481 MH	467	{}
b5a49481 MH	468	};
3ec36a2c JFD	469	MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
3ec36a2c JFD	470
49b3f874 LW	471	#ifdef CONFIG_OF
	472	static const struct of_device_id ad5446_of_ids[] = {
	473	{ .compatible = "ti,dac7512" },
	474	{ }
	475	};
	476	MODULE_DEVICE_TABLE(of, ad5446_of_ids);
	477	#endif
	478
fc52692c	479	static int ad5446_spi_probe(struct spi_device *spi)
3ec36a2c JFD	480	{
	481	const struct spi_device_id *id = spi_get_device_id(spi);
	482
	483	return ad5446_probe(&spi->dev, id->name,
	484	&ad5446_spi_chip_info[id->driver_data]);
	485	}
b5a49481	486
fc52692c	487	static int ad5446_spi_remove(struct spi_device *spi)
3ec36a2c JFD	488	{
	489	return ad5446_remove(&spi->dev);
	490	}
	491
	492	static struct spi_driver ad5446_spi_driver = {
b5a49481 MH	493	.driver = {
b5a49481 MH	494	.name = "ad5446",
49b3f874	495	.of_match_table = of_match_ptr(ad5446_of_ids),
b5a49481	496	},
3ec36a2c	497	.probe = ad5446_spi_probe,
fc52692c	498	.remove = ad5446_spi_remove,
3ec36a2c JFD	499	.id_table = ad5446_spi_ids,
	500	};
	501
	502	static int __init ad5446_spi_register_driver(void)
	503	{
	504	return spi_register_driver(&ad5446_spi_driver);
	505	}
	506
	507	static void ad5446_spi_unregister_driver(void)
	508	{
	509	spi_unregister_driver(&ad5446_spi_driver);
	510	}
	511
	512	#else
	513
	514	static inline int ad5446_spi_register_driver(void) { return 0; }
	515	static inline void ad5446_spi_unregister_driver(void) { }
	516
	517	#endif
	518
	519	#if IS_ENABLED(CONFIG_I2C)
	520
	521	static int ad5622_write(struct ad5446_state *st, unsigned val)
	522	{
	523	struct i2c_client *client = to_i2c_client(st->dev);
	524	__be16 data = cpu_to_be16(val);
	525
	526	return i2c_master_send(client, (char *)&data, sizeof(data));
	527	}
	528
	529	/**
	530	* ad5446_supported_i2c_device_ids:
	531	* The AD5620/40/60 parts are available in different fixed internal reference
	532	* voltage options. The actual part numbers may look differently
	533	* (and a bit cryptic), however this style is used to make clear which
	534	* parts are supported here.
	535	*/
	536	enum ad5446_supported_i2c_device_ids {
	537	ID_AD5602,
	538	ID_AD5612,
	539	ID_AD5622,
	540	};
	541
	542	static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
	543	[ID_AD5602] = {
	544	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
	545	.write = ad5622_write,
	546	},
	547	[ID_AD5612] = {
	548	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
	549	.write = ad5622_write,
	550	},
	551	[ID_AD5622] = {
	552	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
	553	.write = ad5622_write,
	554	},
b5a49481	555	};
3ec36a2c	556
fc52692c GKH	557	static int ad5446_i2c_probe(struct i2c_client *i2c,
fc52692c GKH	558	const struct i2c_device_id *id)
3ec36a2c JFD	559	{
	560	return ad5446_probe(&i2c->dev, id->name,
	561	&ad5446_i2c_chip_info[id->driver_data]);
	562	}
	563
fc52692c	564	static int ad5446_i2c_remove(struct i2c_client *i2c)
3ec36a2c JFD	565	{
	566	return ad5446_remove(&i2c->dev);
	567	}
	568
	569	static const struct i2c_device_id ad5446_i2c_ids[] = {
bf832380 LPC	570	{"ad5301", ID_AD5602},
	571	{"ad5311", ID_AD5612},
	572	{"ad5321", ID_AD5622},
3ec36a2c JFD	573	{"ad5602", ID_AD5602},
	574	{"ad5612", ID_AD5612},
	575	{"ad5622", ID_AD5622},
	576	{}
	577	};
	578	MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
	579
	580	static struct i2c_driver ad5446_i2c_driver = {
	581	.driver = {
	582	.name = "ad5446",
3ec36a2c JFD	583	},
3ec36a2c JFD	584	.probe = ad5446_i2c_probe,
fc52692c	585	.remove = ad5446_i2c_remove,
3ec36a2c JFD	586	.id_table = ad5446_i2c_ids,
	587	};
	588
	589	static int __init ad5446_i2c_register_driver(void)
	590	{
	591	return i2c_add_driver(&ad5446_i2c_driver);
	592	}
	593
	594	static void __exit ad5446_i2c_unregister_driver(void)
	595	{
	596	i2c_del_driver(&ad5446_i2c_driver);
	597	}
	598
	599	#else
	600
	601	static inline int ad5446_i2c_register_driver(void) { return 0; }
	602	static inline void ad5446_i2c_unregister_driver(void) { }
	603
	604	#endif
	605
	606	static int __init ad5446_init(void)
	607	{
	608	int ret;
	609
	610	ret = ad5446_spi_register_driver();
	611	if (ret)
	612	return ret;
	613
	614	ret = ad5446_i2c_register_driver();
	615	if (ret) {
	616	ad5446_spi_unregister_driver();
	617	return ret;
	618	}
	619
	620	return 0;
	621	}
	622	module_init(ad5446_init);
	623
	624	static void __exit ad5446_exit(void)
	625	{
	626	ad5446_i2c_unregister_driver();
	627	ad5446_spi_unregister_driver();
	628	}
	629	module_exit(ad5446_exit);
b5a49481	630
9920ed25	631	MODULE_AUTHOR("Michael Hennerich <[email protected]>");
b5a49481 MH	632	MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
b5a49481 MH	633	MODULE_LICENSE("GPL v2");