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Commit | Line | Data |
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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
c558e39e AS |
2 | /* |
3 | * Intel Low Power Subsystem PWM controller PCI driver | |
4 | * | |
5 | * Copyright (C) 2014, Intel Corporation | |
6 | * | |
7 | * Derived from the original pwm-lpss.c | |
c558e39e AS |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/pci.h> | |
f080be27 | 13 | #include <linux/pm_runtime.h> |
c558e39e AS |
14 | |
15 | #include "pwm-lpss.h" | |
16 | ||
17 | static int pwm_lpss_probe_pci(struct pci_dev *pdev, | |
18 | const struct pci_device_id *id) | |
19 | { | |
20 | const struct pwm_lpss_boardinfo *info; | |
21 | struct pwm_lpss_chip *lpwm; | |
22 | int err; | |
23 | ||
90927fe9 | 24 | err = pcim_enable_device(pdev); |
c558e39e AS |
25 | if (err < 0) |
26 | return err; | |
27 | ||
68af6fb0 AS |
28 | err = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); |
29 | if (err) | |
30 | return err; | |
31 | ||
c558e39e | 32 | info = (struct pwm_lpss_boardinfo *)id->driver_data; |
f0f31de3 | 33 | lpwm = devm_pwm_lpss_probe(&pdev->dev, pcim_iomap_table(pdev)[0], info); |
c558e39e AS |
34 | if (IS_ERR(lpwm)) |
35 | return PTR_ERR(lpwm); | |
36 | ||
37 | pci_set_drvdata(pdev, lpwm); | |
f080be27 QZ |
38 | |
39 | pm_runtime_put(&pdev->dev); | |
40 | pm_runtime_allow(&pdev->dev); | |
41 | ||
c558e39e AS |
42 | return 0; |
43 | } | |
44 | ||
45 | static void pwm_lpss_remove_pci(struct pci_dev *pdev) | |
46 | { | |
f080be27 QZ |
47 | pm_runtime_forbid(&pdev->dev); |
48 | pm_runtime_get_sync(&pdev->dev); | |
c558e39e AS |
49 | } |
50 | ||
f080be27 QZ |
51 | static int pwm_lpss_runtime_suspend_pci(struct device *dev) |
52 | { | |
53 | /* | |
54 | * The PCI core will handle transition to D3 automatically. We only | |
55 | * need to provide runtime PM hooks for that to happen. | |
56 | */ | |
57 | return 0; | |
58 | } | |
59 | ||
60 | static int pwm_lpss_runtime_resume_pci(struct device *dev) | |
61 | { | |
62 | return 0; | |
63 | } | |
f080be27 | 64 | |
163bb6f9 AS |
65 | static DEFINE_RUNTIME_DEV_PM_OPS(pwm_lpss_pci_pm, |
66 | pwm_lpss_runtime_suspend_pci, | |
67 | pwm_lpss_runtime_resume_pci, | |
68 | NULL); | |
f080be27 | 69 | |
c558e39e | 70 | static const struct pci_device_id pwm_lpss_pci_ids[] = { |
87219cb4 | 71 | { PCI_VDEVICE(INTEL, 0x0ac8), (unsigned long)&pwm_lpss_bxt_info}, |
c558e39e AS |
72 | { PCI_VDEVICE(INTEL, 0x0f08), (unsigned long)&pwm_lpss_byt_info}, |
73 | { PCI_VDEVICE(INTEL, 0x0f09), (unsigned long)&pwm_lpss_byt_info}, | |
3c1460e9 | 74 | { PCI_VDEVICE(INTEL, 0x11a5), (unsigned long)&pwm_lpss_tng_info}, |
87219cb4 | 75 | { PCI_VDEVICE(INTEL, 0x1ac8), (unsigned long)&pwm_lpss_bxt_info}, |
c558e39e AS |
76 | { PCI_VDEVICE(INTEL, 0x2288), (unsigned long)&pwm_lpss_bsw_info}, |
77 | { PCI_VDEVICE(INTEL, 0x2289), (unsigned long)&pwm_lpss_bsw_info}, | |
ae252054 | 78 | { PCI_VDEVICE(INTEL, 0x31c8), (unsigned long)&pwm_lpss_bxt_info}, |
03f00e53 | 79 | { PCI_VDEVICE(INTEL, 0x5ac8), (unsigned long)&pwm_lpss_bxt_info}, |
c558e39e AS |
80 | { }, |
81 | }; | |
82 | MODULE_DEVICE_TABLE(pci, pwm_lpss_pci_ids); | |
83 | ||
84 | static struct pci_driver pwm_lpss_driver_pci = { | |
85 | .name = "pwm-lpss", | |
86 | .id_table = pwm_lpss_pci_ids, | |
87 | .probe = pwm_lpss_probe_pci, | |
88 | .remove = pwm_lpss_remove_pci, | |
f080be27 | 89 | .driver = { |
163bb6f9 | 90 | .pm = pm_ptr(&pwm_lpss_pci_pm), |
f080be27 | 91 | }, |
c558e39e AS |
92 | }; |
93 | module_pci_driver(pwm_lpss_driver_pci); | |
94 | ||
95 | MODULE_DESCRIPTION("PWM PCI driver for Intel LPSS"); | |
96 | MODULE_LICENSE("GPL v2"); | |
a3682d2f | 97 | MODULE_IMPORT_NS(PWM_LPSS); |