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359ab9f5 MH |
1 | /* |
2 | * Fuel gauge driver for Maxim 17042 / 8966 / 8997 | |
3 | * Note that Maxim 8966 and 8997 are mfd and this is its subdevice. | |
4 | * | |
5 | * Copyright (C) 2011 Samsung Electronics | |
6 | * MyungJoo Ham <[email protected]> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | * | |
22 | * This driver is based on max17040_battery.c | |
23 | */ | |
24 | ||
25 | #include <linux/init.h> | |
7e6d62db | 26 | #include <linux/module.h> |
359ab9f5 MH |
27 | #include <linux/slab.h> |
28 | #include <linux/i2c.h> | |
f3a71a6e | 29 | #include <linux/delay.h> |
e5f3872d | 30 | #include <linux/interrupt.h> |
48bc1774 | 31 | #include <linux/pm.h> |
359ab9f5 MH |
32 | #include <linux/mod_devicetable.h> |
33 | #include <linux/power_supply.h> | |
34 | #include <linux/power/max17042_battery.h> | |
3832246d | 35 | #include <linux/of.h> |
359ab9f5 | 36 | |
f3a71a6e RP |
37 | /* Status register bits */ |
38 | #define STATUS_POR_BIT (1 << 1) | |
39 | #define STATUS_BST_BIT (1 << 3) | |
40 | #define STATUS_VMN_BIT (1 << 8) | |
41 | #define STATUS_TMN_BIT (1 << 9) | |
42 | #define STATUS_SMN_BIT (1 << 10) | |
43 | #define STATUS_BI_BIT (1 << 11) | |
44 | #define STATUS_VMX_BIT (1 << 12) | |
45 | #define STATUS_TMX_BIT (1 << 13) | |
46 | #define STATUS_SMX_BIT (1 << 14) | |
47 | #define STATUS_BR_BIT (1 << 15) | |
48 | ||
e5f3872d RP |
49 | /* Interrupt mask bits */ |
50 | #define CONFIG_ALRT_BIT_ENBL (1 << 2) | |
5cdd4d7f RP |
51 | #define STATUS_INTR_SOCMIN_BIT (1 << 10) |
52 | #define STATUS_INTR_SOCMAX_BIT (1 << 14) | |
e5f3872d | 53 | |
f3a71a6e RP |
54 | #define VFSOC0_LOCK 0x0000 |
55 | #define VFSOC0_UNLOCK 0x0080 | |
56 | #define MODEL_UNLOCK1 0X0059 | |
57 | #define MODEL_UNLOCK2 0X00C4 | |
58 | #define MODEL_LOCK1 0X0000 | |
59 | #define MODEL_LOCK2 0X0000 | |
60 | ||
61 | #define dQ_ACC_DIV 0x4 | |
62 | #define dP_ACC_100 0x1900 | |
63 | #define dP_ACC_200 0x3200 | |
64 | ||
9a8422d2 RP |
65 | #define MAX17042_IC_VERSION 0x0092 |
66 | #define MAX17047_IC_VERSION 0x00AC /* same for max17050 */ | |
67 | ||
359ab9f5 MH |
68 | struct max17042_chip { |
69 | struct i2c_client *client; | |
70 | struct power_supply battery; | |
9a8422d2 | 71 | enum max170xx_chip_type chip_type; |
359ab9f5 | 72 | struct max17042_platform_data *pdata; |
f3a71a6e RP |
73 | struct work_struct work; |
74 | int init_complete; | |
359ab9f5 MH |
75 | }; |
76 | ||
77 | static int max17042_write_reg(struct i2c_client *client, u8 reg, u16 value) | |
78 | { | |
79 | int ret = i2c_smbus_write_word_data(client, reg, value); | |
80 | ||
81 | if (ret < 0) | |
82 | dev_err(&client->dev, "%s: err %d\n", __func__, ret); | |
83 | ||
84 | return ret; | |
85 | } | |
86 | ||
87 | static int max17042_read_reg(struct i2c_client *client, u8 reg) | |
88 | { | |
89 | int ret = i2c_smbus_read_word_data(client, reg); | |
90 | ||
91 | if (ret < 0) | |
92 | dev_err(&client->dev, "%s: err %d\n", __func__, ret); | |
93 | ||
94 | return ret; | |
95 | } | |
96 | ||
086ef502 DK |
97 | static void max17042_set_reg(struct i2c_client *client, |
98 | struct max17042_reg_data *data, int size) | |
99 | { | |
100 | int i; | |
101 | ||
102 | for (i = 0; i < size; i++) | |
103 | max17042_write_reg(client, data[i].addr, data[i].data); | |
104 | } | |
105 | ||
359ab9f5 | 106 | static enum power_supply_property max17042_battery_props[] = { |
086ef502 DK |
107 | POWER_SUPPLY_PROP_PRESENT, |
108 | POWER_SUPPLY_PROP_CYCLE_COUNT, | |
109 | POWER_SUPPLY_PROP_VOLTAGE_MAX, | |
110 | POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, | |
359ab9f5 MH |
111 | POWER_SUPPLY_PROP_VOLTAGE_NOW, |
112 | POWER_SUPPLY_PROP_VOLTAGE_AVG, | |
a2ebfe2f | 113 | POWER_SUPPLY_PROP_VOLTAGE_OCV, |
359ab9f5 | 114 | POWER_SUPPLY_PROP_CAPACITY, |
086ef502 | 115 | POWER_SUPPLY_PROP_CHARGE_FULL, |
5fc55bc8 | 116 | POWER_SUPPLY_PROP_CHARGE_COUNTER, |
086ef502 DK |
117 | POWER_SUPPLY_PROP_TEMP, |
118 | POWER_SUPPLY_PROP_CURRENT_NOW, | |
119 | POWER_SUPPLY_PROP_CURRENT_AVG, | |
359ab9f5 MH |
120 | }; |
121 | ||
122 | static int max17042_get_property(struct power_supply *psy, | |
123 | enum power_supply_property psp, | |
124 | union power_supply_propval *val) | |
125 | { | |
126 | struct max17042_chip *chip = container_of(psy, | |
127 | struct max17042_chip, battery); | |
60a1f6e4 | 128 | int ret; |
359ab9f5 | 129 | |
f3a71a6e RP |
130 | if (!chip->init_complete) |
131 | return -EAGAIN; | |
132 | ||
359ab9f5 | 133 | switch (psp) { |
086ef502 | 134 | case POWER_SUPPLY_PROP_PRESENT: |
60a1f6e4 RP |
135 | ret = max17042_read_reg(chip->client, MAX17042_STATUS); |
136 | if (ret < 0) | |
137 | return ret; | |
138 | ||
139 | if (ret & MAX17042_STATUS_BattAbsent) | |
086ef502 DK |
140 | val->intval = 0; |
141 | else | |
142 | val->intval = 1; | |
143 | break; | |
144 | case POWER_SUPPLY_PROP_CYCLE_COUNT: | |
60a1f6e4 RP |
145 | ret = max17042_read_reg(chip->client, MAX17042_Cycles); |
146 | if (ret < 0) | |
147 | return ret; | |
148 | ||
149 | val->intval = ret; | |
086ef502 DK |
150 | break; |
151 | case POWER_SUPPLY_PROP_VOLTAGE_MAX: | |
60a1f6e4 RP |
152 | ret = max17042_read_reg(chip->client, MAX17042_MinMaxVolt); |
153 | if (ret < 0) | |
154 | return ret; | |
155 | ||
156 | val->intval = ret >> 8; | |
086ef502 DK |
157 | val->intval *= 20000; /* Units of LSB = 20mV */ |
158 | break; | |
159 | case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: | |
9a8422d2 RP |
160 | if (chip->chip_type == MAX17042) |
161 | ret = max17042_read_reg(chip->client, MAX17042_V_empty); | |
162 | else | |
163 | ret = max17042_read_reg(chip->client, MAX17047_V_empty); | |
60a1f6e4 RP |
164 | if (ret < 0) |
165 | return ret; | |
166 | ||
167 | val->intval = ret >> 7; | |
086ef502 DK |
168 | val->intval *= 10000; /* Units of LSB = 10mV */ |
169 | break; | |
359ab9f5 | 170 | case POWER_SUPPLY_PROP_VOLTAGE_NOW: |
60a1f6e4 RP |
171 | ret = max17042_read_reg(chip->client, MAX17042_VCELL); |
172 | if (ret < 0) | |
173 | return ret; | |
174 | ||
175 | val->intval = ret * 625 / 8; | |
359ab9f5 MH |
176 | break; |
177 | case POWER_SUPPLY_PROP_VOLTAGE_AVG: | |
60a1f6e4 RP |
178 | ret = max17042_read_reg(chip->client, MAX17042_AvgVCELL); |
179 | if (ret < 0) | |
180 | return ret; | |
181 | ||
a2ebfe2f RP |
182 | val->intval = ret * 625 / 8; |
183 | break; | |
184 | case POWER_SUPPLY_PROP_VOLTAGE_OCV: | |
185 | ret = max17042_read_reg(chip->client, MAX17042_OCVInternal); | |
186 | if (ret < 0) | |
187 | return ret; | |
188 | ||
60a1f6e4 | 189 | val->intval = ret * 625 / 8; |
359ab9f5 MH |
190 | break; |
191 | case POWER_SUPPLY_PROP_CAPACITY: | |
13e0aa46 | 192 | ret = max17042_read_reg(chip->client, MAX17042_RepSOC); |
60a1f6e4 RP |
193 | if (ret < 0) |
194 | return ret; | |
195 | ||
196 | val->intval = ret >> 8; | |
359ab9f5 | 197 | break; |
086ef502 | 198 | case POWER_SUPPLY_PROP_CHARGE_FULL: |
6e0e60cd | 199 | ret = max17042_read_reg(chip->client, MAX17042_FullCAP); |
60a1f6e4 RP |
200 | if (ret < 0) |
201 | return ret; | |
202 | ||
5fc55bc8 RP |
203 | val->intval = ret * 1000 / 2; |
204 | break; | |
205 | case POWER_SUPPLY_PROP_CHARGE_COUNTER: | |
206 | ret = max17042_read_reg(chip->client, MAX17042_QH); | |
207 | if (ret < 0) | |
208 | return ret; | |
209 | ||
6e0e60cd | 210 | val->intval = ret * 1000 / 2; |
086ef502 DK |
211 | break; |
212 | case POWER_SUPPLY_PROP_TEMP: | |
60a1f6e4 RP |
213 | ret = max17042_read_reg(chip->client, MAX17042_TEMP); |
214 | if (ret < 0) | |
215 | return ret; | |
216 | ||
217 | val->intval = ret; | |
086ef502 DK |
218 | /* The value is signed. */ |
219 | if (val->intval & 0x8000) { | |
220 | val->intval = (0x7fff & ~val->intval) + 1; | |
221 | val->intval *= -1; | |
222 | } | |
223 | /* The value is converted into deci-centigrade scale */ | |
224 | /* Units of LSB = 1 / 256 degree Celsius */ | |
225 | val->intval = val->intval * 10 / 256; | |
226 | break; | |
227 | case POWER_SUPPLY_PROP_CURRENT_NOW: | |
228 | if (chip->pdata->enable_current_sense) { | |
60a1f6e4 RP |
229 | ret = max17042_read_reg(chip->client, MAX17042_Current); |
230 | if (ret < 0) | |
231 | return ret; | |
232 | ||
233 | val->intval = ret; | |
086ef502 DK |
234 | if (val->intval & 0x8000) { |
235 | /* Negative */ | |
236 | val->intval = ~val->intval & 0x7fff; | |
237 | val->intval++; | |
238 | val->intval *= -1; | |
239 | } | |
91d8b0d6 | 240 | val->intval *= 1562500 / chip->pdata->r_sns; |
086ef502 DK |
241 | } else { |
242 | return -EINVAL; | |
243 | } | |
244 | break; | |
245 | case POWER_SUPPLY_PROP_CURRENT_AVG: | |
246 | if (chip->pdata->enable_current_sense) { | |
60a1f6e4 RP |
247 | ret = max17042_read_reg(chip->client, |
248 | MAX17042_AvgCurrent); | |
249 | if (ret < 0) | |
250 | return ret; | |
251 | ||
252 | val->intval = ret; | |
086ef502 DK |
253 | if (val->intval & 0x8000) { |
254 | /* Negative */ | |
255 | val->intval = ~val->intval & 0x7fff; | |
256 | val->intval++; | |
257 | val->intval *= -1; | |
258 | } | |
259 | val->intval *= 1562500 / chip->pdata->r_sns; | |
260 | } else { | |
261 | return -EINVAL; | |
262 | } | |
263 | break; | |
359ab9f5 MH |
264 | default: |
265 | return -EINVAL; | |
266 | } | |
267 | return 0; | |
268 | } | |
269 | ||
f3a71a6e RP |
270 | static int max17042_write_verify_reg(struct i2c_client *client, |
271 | u8 reg, u16 value) | |
272 | { | |
273 | int retries = 8; | |
274 | int ret; | |
275 | u16 read_value; | |
276 | ||
277 | do { | |
278 | ret = i2c_smbus_write_word_data(client, reg, value); | |
279 | read_value = max17042_read_reg(client, reg); | |
280 | if (read_value != value) { | |
281 | ret = -EIO; | |
282 | retries--; | |
283 | } | |
284 | } while (retries && read_value != value); | |
285 | ||
286 | if (ret < 0) | |
287 | dev_err(&client->dev, "%s: err %d\n", __func__, ret); | |
288 | ||
289 | return ret; | |
290 | } | |
291 | ||
292 | static inline void max17042_override_por( | |
293 | struct i2c_client *client, u8 reg, u16 value) | |
294 | { | |
295 | if (value) | |
296 | max17042_write_reg(client, reg, value); | |
297 | } | |
298 | ||
299 | static inline void max10742_unlock_model(struct max17042_chip *chip) | |
300 | { | |
301 | struct i2c_client *client = chip->client; | |
302 | max17042_write_reg(client, MAX17042_MLOCKReg1, MODEL_UNLOCK1); | |
303 | max17042_write_reg(client, MAX17042_MLOCKReg2, MODEL_UNLOCK2); | |
304 | } | |
305 | ||
306 | static inline void max10742_lock_model(struct max17042_chip *chip) | |
307 | { | |
308 | struct i2c_client *client = chip->client; | |
309 | max17042_write_reg(client, MAX17042_MLOCKReg1, MODEL_LOCK1); | |
310 | max17042_write_reg(client, MAX17042_MLOCKReg2, MODEL_LOCK2); | |
311 | } | |
312 | ||
313 | static inline void max17042_write_model_data(struct max17042_chip *chip, | |
314 | u8 addr, int size) | |
315 | { | |
316 | struct i2c_client *client = chip->client; | |
317 | int i; | |
318 | for (i = 0; i < size; i++) | |
319 | max17042_write_reg(client, addr + i, | |
320 | chip->pdata->config_data->cell_char_tbl[i]); | |
321 | } | |
322 | ||
323 | static inline void max17042_read_model_data(struct max17042_chip *chip, | |
324 | u8 addr, u16 *data, int size) | |
325 | { | |
326 | struct i2c_client *client = chip->client; | |
327 | int i; | |
328 | ||
329 | for (i = 0; i < size; i++) | |
330 | data[i] = max17042_read_reg(client, addr + i); | |
331 | } | |
332 | ||
333 | static inline int max17042_model_data_compare(struct max17042_chip *chip, | |
334 | u16 *data1, u16 *data2, int size) | |
335 | { | |
336 | int i; | |
337 | ||
338 | if (memcmp(data1, data2, size)) { | |
339 | dev_err(&chip->client->dev, "%s compare failed\n", __func__); | |
340 | for (i = 0; i < size; i++) | |
341 | dev_info(&chip->client->dev, "0x%x, 0x%x", | |
342 | data1[i], data2[i]); | |
343 | dev_info(&chip->client->dev, "\n"); | |
344 | return -EINVAL; | |
345 | } | |
346 | return 0; | |
347 | } | |
348 | ||
349 | static int max17042_init_model(struct max17042_chip *chip) | |
350 | { | |
351 | int ret; | |
1ef3d8fb | 352 | int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl); |
f3a71a6e RP |
353 | u16 *temp_data; |
354 | ||
1ef3d8fb | 355 | temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL); |
f3a71a6e RP |
356 | if (!temp_data) |
357 | return -ENOMEM; | |
358 | ||
359 | max10742_unlock_model(chip); | |
360 | max17042_write_model_data(chip, MAX17042_MODELChrTbl, | |
361 | table_size); | |
362 | max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data, | |
363 | table_size); | |
364 | ||
365 | ret = max17042_model_data_compare( | |
366 | chip, | |
367 | chip->pdata->config_data->cell_char_tbl, | |
368 | temp_data, | |
369 | table_size); | |
370 | ||
371 | max10742_lock_model(chip); | |
372 | kfree(temp_data); | |
373 | ||
374 | return ret; | |
375 | } | |
376 | ||
377 | static int max17042_verify_model_lock(struct max17042_chip *chip) | |
378 | { | |
379 | int i; | |
1ef3d8fb | 380 | int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl); |
f3a71a6e RP |
381 | u16 *temp_data; |
382 | int ret = 0; | |
383 | ||
1ef3d8fb | 384 | temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL); |
f3a71a6e RP |
385 | if (!temp_data) |
386 | return -ENOMEM; | |
387 | ||
388 | max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data, | |
389 | table_size); | |
390 | for (i = 0; i < table_size; i++) | |
391 | if (temp_data[i]) | |
392 | ret = -EINVAL; | |
393 | ||
394 | kfree(temp_data); | |
395 | return ret; | |
396 | } | |
397 | ||
398 | static void max17042_write_config_regs(struct max17042_chip *chip) | |
399 | { | |
400 | struct max17042_config_data *config = chip->pdata->config_data; | |
401 | ||
402 | max17042_write_reg(chip->client, MAX17042_CONFIG, config->config); | |
403 | max17042_write_reg(chip->client, MAX17042_LearnCFG, config->learn_cfg); | |
404 | max17042_write_reg(chip->client, MAX17042_FilterCFG, | |
405 | config->filter_cfg); | |
406 | max17042_write_reg(chip->client, MAX17042_RelaxCFG, config->relax_cfg); | |
9a8422d2 RP |
407 | if (chip->chip_type == MAX17047) |
408 | max17042_write_reg(chip->client, MAX17047_FullSOCThr, | |
409 | config->full_soc_thresh); | |
f3a71a6e RP |
410 | } |
411 | ||
412 | static void max17042_write_custom_regs(struct max17042_chip *chip) | |
413 | { | |
414 | struct max17042_config_data *config = chip->pdata->config_data; | |
415 | ||
416 | max17042_write_verify_reg(chip->client, MAX17042_RCOMP0, | |
417 | config->rcomp0); | |
418 | max17042_write_verify_reg(chip->client, MAX17042_TempCo, | |
419 | config->tcompc0); | |
f3a71a6e RP |
420 | max17042_write_verify_reg(chip->client, MAX17042_ICHGTerm, |
421 | config->ichgt_term); | |
9a8422d2 RP |
422 | if (chip->chip_type == MAX17042) { |
423 | max17042_write_reg(chip->client, MAX17042_EmptyTempCo, | |
424 | config->empty_tempco); | |
425 | max17042_write_verify_reg(chip->client, MAX17042_K_empty0, | |
426 | config->kempty0); | |
427 | } else { | |
428 | max17042_write_verify_reg(chip->client, MAX17047_QRTbl00, | |
429 | config->qrtbl00); | |
430 | max17042_write_verify_reg(chip->client, MAX17047_QRTbl10, | |
431 | config->qrtbl10); | |
432 | max17042_write_verify_reg(chip->client, MAX17047_QRTbl20, | |
433 | config->qrtbl20); | |
434 | max17042_write_verify_reg(chip->client, MAX17047_QRTbl30, | |
435 | config->qrtbl30); | |
436 | } | |
f3a71a6e RP |
437 | } |
438 | ||
439 | static void max17042_update_capacity_regs(struct max17042_chip *chip) | |
440 | { | |
441 | struct max17042_config_data *config = chip->pdata->config_data; | |
442 | ||
443 | max17042_write_verify_reg(chip->client, MAX17042_FullCAP, | |
444 | config->fullcap); | |
445 | max17042_write_reg(chip->client, MAX17042_DesignCap, | |
446 | config->design_cap); | |
447 | max17042_write_verify_reg(chip->client, MAX17042_FullCAPNom, | |
448 | config->fullcapnom); | |
449 | } | |
450 | ||
451 | static void max17042_reset_vfsoc0_reg(struct max17042_chip *chip) | |
452 | { | |
453 | u16 vfSoc; | |
454 | ||
455 | vfSoc = max17042_read_reg(chip->client, MAX17042_VFSOC); | |
456 | max17042_write_reg(chip->client, MAX17042_VFSOC0Enable, VFSOC0_UNLOCK); | |
457 | max17042_write_verify_reg(chip->client, MAX17042_VFSOC0, vfSoc); | |
458 | max17042_write_reg(chip->client, MAX17042_VFSOC0Enable, VFSOC0_LOCK); | |
459 | } | |
460 | ||
461 | static void max17042_load_new_capacity_params(struct max17042_chip *chip) | |
462 | { | |
463 | u16 full_cap0, rep_cap, dq_acc, vfSoc; | |
464 | u32 rem_cap; | |
465 | ||
466 | struct max17042_config_data *config = chip->pdata->config_data; | |
467 | ||
468 | full_cap0 = max17042_read_reg(chip->client, MAX17042_FullCAP0); | |
469 | vfSoc = max17042_read_reg(chip->client, MAX17042_VFSOC); | |
470 | ||
471 | /* fg_vfSoc needs to shifted by 8 bits to get the | |
472 | * perc in 1% accuracy, to get the right rem_cap multiply | |
473 | * full_cap0, fg_vfSoc and devide by 100 | |
474 | */ | |
475 | rem_cap = ((vfSoc >> 8) * full_cap0) / 100; | |
476 | max17042_write_verify_reg(chip->client, MAX17042_RemCap, (u16)rem_cap); | |
477 | ||
478 | rep_cap = (u16)rem_cap; | |
479 | max17042_write_verify_reg(chip->client, MAX17042_RepCap, rep_cap); | |
480 | ||
481 | /* Write dQ_acc to 200% of Capacity and dP_acc to 200% */ | |
482 | dq_acc = config->fullcap / dQ_ACC_DIV; | |
483 | max17042_write_verify_reg(chip->client, MAX17042_dQacc, dq_acc); | |
484 | max17042_write_verify_reg(chip->client, MAX17042_dPacc, dP_ACC_200); | |
485 | ||
486 | max17042_write_verify_reg(chip->client, MAX17042_FullCAP, | |
487 | config->fullcap); | |
488 | max17042_write_reg(chip->client, MAX17042_DesignCap, | |
489 | config->design_cap); | |
490 | max17042_write_verify_reg(chip->client, MAX17042_FullCAPNom, | |
491 | config->fullcapnom); | |
9a8422d2 RP |
492 | /* Update SOC register with new SOC */ |
493 | max17042_write_reg(chip->client, MAX17042_RepSOC, vfSoc); | |
f3a71a6e RP |
494 | } |
495 | ||
496 | /* | |
497 | * Block write all the override values coming from platform data. | |
498 | * This function MUST be called before the POR initialization proceedure | |
499 | * specified by maxim. | |
500 | */ | |
501 | static inline void max17042_override_por_values(struct max17042_chip *chip) | |
502 | { | |
503 | struct i2c_client *client = chip->client; | |
504 | struct max17042_config_data *config = chip->pdata->config_data; | |
505 | ||
506 | max17042_override_por(client, MAX17042_TGAIN, config->tgain); | |
507 | max17042_override_por(client, MAx17042_TOFF, config->toff); | |
508 | max17042_override_por(client, MAX17042_CGAIN, config->cgain); | |
509 | max17042_override_por(client, MAX17042_COFF, config->coff); | |
510 | ||
511 | max17042_override_por(client, MAX17042_VALRT_Th, config->valrt_thresh); | |
512 | max17042_override_por(client, MAX17042_TALRT_Th, config->talrt_thresh); | |
513 | max17042_override_por(client, MAX17042_SALRT_Th, | |
514 | config->soc_alrt_thresh); | |
515 | max17042_override_por(client, MAX17042_CONFIG, config->config); | |
516 | max17042_override_por(client, MAX17042_SHDNTIMER, config->shdntimer); | |
517 | ||
518 | max17042_override_por(client, MAX17042_DesignCap, config->design_cap); | |
519 | max17042_override_por(client, MAX17042_ICHGTerm, config->ichgt_term); | |
520 | ||
521 | max17042_override_por(client, MAX17042_AtRate, config->at_rate); | |
522 | max17042_override_por(client, MAX17042_LearnCFG, config->learn_cfg); | |
523 | max17042_override_por(client, MAX17042_FilterCFG, config->filter_cfg); | |
524 | max17042_override_por(client, MAX17042_RelaxCFG, config->relax_cfg); | |
525 | max17042_override_por(client, MAX17042_MiscCFG, config->misc_cfg); | |
526 | max17042_override_por(client, MAX17042_MaskSOC, config->masksoc); | |
527 | ||
528 | max17042_override_por(client, MAX17042_FullCAP, config->fullcap); | |
529 | max17042_override_por(client, MAX17042_FullCAPNom, config->fullcapnom); | |
9a8422d2 RP |
530 | if (chip->chip_type == MAX17042) |
531 | max17042_override_por(client, MAX17042_SOC_empty, | |
532 | config->socempty); | |
f3a71a6e RP |
533 | max17042_override_por(client, MAX17042_LAvg_empty, config->lavg_empty); |
534 | max17042_override_por(client, MAX17042_dQacc, config->dqacc); | |
535 | max17042_override_por(client, MAX17042_dPacc, config->dpacc); | |
536 | ||
9a8422d2 RP |
537 | if (chip->chip_type == MAX17042) |
538 | max17042_override_por(client, MAX17042_V_empty, config->vempty); | |
539 | else | |
540 | max17042_override_por(client, MAX17047_V_empty, config->vempty); | |
f3a71a6e RP |
541 | max17042_override_por(client, MAX17042_TempNom, config->temp_nom); |
542 | max17042_override_por(client, MAX17042_TempLim, config->temp_lim); | |
543 | max17042_override_por(client, MAX17042_FCTC, config->fctc); | |
544 | max17042_override_por(client, MAX17042_RCOMP0, config->rcomp0); | |
545 | max17042_override_por(client, MAX17042_TempCo, config->tcompc0); | |
9a8422d2 RP |
546 | if (chip->chip_type) { |
547 | max17042_override_por(client, MAX17042_EmptyTempCo, | |
548 | config->empty_tempco); | |
549 | max17042_override_por(client, MAX17042_K_empty0, | |
550 | config->kempty0); | |
551 | } | |
f3a71a6e RP |
552 | } |
553 | ||
554 | static int max17042_init_chip(struct max17042_chip *chip) | |
555 | { | |
556 | int ret; | |
557 | int val; | |
558 | ||
559 | max17042_override_por_values(chip); | |
560 | /* After Power up, the MAX17042 requires 500mS in order | |
561 | * to perform signal debouncing and initial SOC reporting | |
562 | */ | |
563 | msleep(500); | |
564 | ||
565 | /* Initialize configaration */ | |
566 | max17042_write_config_regs(chip); | |
567 | ||
568 | /* write cell characterization data */ | |
569 | ret = max17042_init_model(chip); | |
570 | if (ret) { | |
571 | dev_err(&chip->client->dev, "%s init failed\n", | |
572 | __func__); | |
573 | return -EIO; | |
574 | } | |
575 | max17042_verify_model_lock(chip); | |
576 | if (ret) { | |
577 | dev_err(&chip->client->dev, "%s lock verify failed\n", | |
578 | __func__); | |
579 | return -EIO; | |
580 | } | |
581 | /* write custom parameters */ | |
582 | max17042_write_custom_regs(chip); | |
583 | ||
584 | /* update capacity params */ | |
585 | max17042_update_capacity_regs(chip); | |
586 | ||
587 | /* delay must be atleast 350mS to allow VFSOC | |
588 | * to be calculated from the new configuration | |
589 | */ | |
590 | msleep(350); | |
591 | ||
592 | /* reset vfsoc0 reg */ | |
593 | max17042_reset_vfsoc0_reg(chip); | |
594 | ||
595 | /* load new capacity params */ | |
596 | max17042_load_new_capacity_params(chip); | |
597 | ||
598 | /* Init complete, Clear the POR bit */ | |
599 | val = max17042_read_reg(chip->client, MAX17042_STATUS); | |
600 | max17042_write_reg(chip->client, MAX17042_STATUS, | |
601 | val & (~STATUS_POR_BIT)); | |
602 | return 0; | |
603 | } | |
604 | ||
e5f3872d RP |
605 | static void max17042_set_soc_threshold(struct max17042_chip *chip, u16 off) |
606 | { | |
607 | u16 soc, soc_tr; | |
608 | ||
609 | /* program interrupt thesholds such that we should | |
610 | * get interrupt for every 'off' perc change in the soc | |
611 | */ | |
612 | soc = max17042_read_reg(chip->client, MAX17042_RepSOC) >> 8; | |
613 | soc_tr = (soc + off) << 8; | |
614 | soc_tr |= (soc - off); | |
615 | max17042_write_reg(chip->client, MAX17042_SALRT_Th, soc_tr); | |
616 | } | |
617 | ||
e5f3872d RP |
618 | static irqreturn_t max17042_thread_handler(int id, void *dev) |
619 | { | |
620 | struct max17042_chip *chip = dev; | |
621 | u16 val; | |
622 | ||
623 | val = max17042_read_reg(chip->client, MAX17042_STATUS); | |
5cdd4d7f RP |
624 | if ((val & STATUS_INTR_SOCMIN_BIT) || |
625 | (val & STATUS_INTR_SOCMAX_BIT)) { | |
e5f3872d RP |
626 | dev_info(&chip->client->dev, "SOC threshold INTR\n"); |
627 | max17042_set_soc_threshold(chip, 1); | |
628 | } | |
629 | ||
630 | power_supply_changed(&chip->battery); | |
631 | return IRQ_HANDLED; | |
632 | } | |
f3a71a6e RP |
633 | |
634 | static void max17042_init_worker(struct work_struct *work) | |
635 | { | |
636 | struct max17042_chip *chip = container_of(work, | |
637 | struct max17042_chip, work); | |
638 | int ret; | |
639 | ||
640 | /* Initialize registers according to values from the platform data */ | |
641 | if (chip->pdata->enable_por_init && chip->pdata->config_data) { | |
642 | ret = max17042_init_chip(chip); | |
643 | if (ret) | |
644 | return; | |
645 | } | |
646 | ||
647 | chip->init_complete = 1; | |
648 | } | |
649 | ||
3832246d KL |
650 | #ifdef CONFIG_OF |
651 | static struct max17042_platform_data * | |
652 | max17042_get_pdata(struct device *dev) | |
653 | { | |
654 | struct device_node *np = dev->of_node; | |
655 | u32 prop; | |
656 | struct max17042_platform_data *pdata; | |
657 | ||
658 | if (!np) | |
659 | return dev->platform_data; | |
660 | ||
661 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
662 | if (!pdata) | |
663 | return NULL; | |
664 | ||
665 | /* | |
666 | * Require current sense resistor value to be specified for | |
667 | * current-sense functionality to be enabled at all. | |
668 | */ | |
669 | if (of_property_read_u32(np, "maxim,rsns-microohm", &prop) == 0) { | |
670 | pdata->r_sns = prop; | |
671 | pdata->enable_current_sense = true; | |
672 | } | |
673 | ||
674 | return pdata; | |
675 | } | |
676 | #else | |
677 | static struct max17042_platform_data * | |
678 | max17042_get_pdata(struct device *dev) | |
679 | { | |
680 | return dev->platform_data; | |
681 | } | |
682 | #endif | |
683 | ||
359ab9f5 MH |
684 | static int __devinit max17042_probe(struct i2c_client *client, |
685 | const struct i2c_device_id *id) | |
686 | { | |
687 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); | |
688 | struct max17042_chip *chip; | |
689 | int ret; | |
f3a71a6e | 690 | int reg; |
359ab9f5 MH |
691 | |
692 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) | |
693 | return -EIO; | |
694 | ||
2f3b4342 | 695 | chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); |
359ab9f5 MH |
696 | if (!chip) |
697 | return -ENOMEM; | |
698 | ||
699 | chip->client = client; | |
3832246d KL |
700 | chip->pdata = max17042_get_pdata(&client->dev); |
701 | if (!chip->pdata) { | |
702 | dev_err(&client->dev, "no platform data provided\n"); | |
703 | return -EINVAL; | |
704 | } | |
359ab9f5 MH |
705 | |
706 | i2c_set_clientdata(client, chip); | |
707 | ||
9a8422d2 RP |
708 | ret = max17042_read_reg(chip->client, MAX17042_DevName); |
709 | if (ret == MAX17042_IC_VERSION) { | |
710 | dev_dbg(&client->dev, "chip type max17042 detected\n"); | |
711 | chip->chip_type = MAX17042; | |
712 | } else if (ret == MAX17047_IC_VERSION) { | |
713 | dev_dbg(&client->dev, "chip type max17047/50 detected\n"); | |
714 | chip->chip_type = MAX17047; | |
715 | } else { | |
716 | dev_err(&client->dev, "device version mismatch: %x\n", ret); | |
717 | return -EIO; | |
718 | } | |
719 | ||
720 | chip->battery.name = "max170xx_battery"; | |
359ab9f5 MH |
721 | chip->battery.type = POWER_SUPPLY_TYPE_BATTERY; |
722 | chip->battery.get_property = max17042_get_property; | |
723 | chip->battery.properties = max17042_battery_props; | |
724 | chip->battery.num_properties = ARRAY_SIZE(max17042_battery_props); | |
725 | ||
086ef502 DK |
726 | /* When current is not measured, |
727 | * CURRENT_NOW and CURRENT_AVG properties should be invisible. */ | |
728 | if (!chip->pdata->enable_current_sense) | |
729 | chip->battery.num_properties -= 2; | |
730 | ||
4cfa892c PR |
731 | if (chip->pdata->r_sns == 0) |
732 | chip->pdata->r_sns = MAX17042_DEFAULT_SNS_RESISTOR; | |
733 | ||
086ef502 DK |
734 | if (chip->pdata->init_data) |
735 | max17042_set_reg(client, chip->pdata->init_data, | |
f3a71a6e | 736 | chip->pdata->num_init_data); |
086ef502 | 737 | |
359ab9f5 MH |
738 | if (!chip->pdata->enable_current_sense) { |
739 | max17042_write_reg(client, MAX17042_CGAIN, 0x0000); | |
740 | max17042_write_reg(client, MAX17042_MiscCFG, 0x0003); | |
741 | max17042_write_reg(client, MAX17042_LearnCFG, 0x0007); | |
742 | } | |
743 | ||
243e3527 RP |
744 | ret = power_supply_register(&client->dev, &chip->battery); |
745 | if (ret) { | |
746 | dev_err(&client->dev, "failed: power supply register\n"); | |
747 | return ret; | |
748 | } | |
749 | ||
e5f3872d | 750 | if (client->irq) { |
5cdd4d7f | 751 | ret = request_threaded_irq(client->irq, NULL, |
e5f3872d | 752 | max17042_thread_handler, |
5cdd4d7f RP |
753 | IRQF_TRIGGER_FALLING, |
754 | chip->battery.name, chip); | |
e5f3872d RP |
755 | if (!ret) { |
756 | reg = max17042_read_reg(client, MAX17042_CONFIG); | |
757 | reg |= CONFIG_ALRT_BIT_ENBL; | |
758 | max17042_write_reg(client, MAX17042_CONFIG, reg); | |
759 | max17042_set_soc_threshold(chip, 1); | |
e5ba50bc RP |
760 | } else { |
761 | client->irq = 0; | |
e5f3872d RP |
762 | dev_err(&client->dev, "%s(): cannot get IRQ\n", |
763 | __func__); | |
e5ba50bc | 764 | } |
e5f3872d RP |
765 | } |
766 | ||
f3a71a6e | 767 | reg = max17042_read_reg(chip->client, MAX17042_STATUS); |
f3a71a6e RP |
768 | if (reg & STATUS_POR_BIT) { |
769 | INIT_WORK(&chip->work, max17042_init_worker); | |
770 | schedule_work(&chip->work); | |
771 | } else { | |
772 | chip->init_complete = 1; | |
773 | } | |
774 | ||
243e3527 | 775 | return 0; |
359ab9f5 MH |
776 | } |
777 | ||
778 | static int __devexit max17042_remove(struct i2c_client *client) | |
779 | { | |
780 | struct max17042_chip *chip = i2c_get_clientdata(client); | |
781 | ||
bb28da90 RP |
782 | if (client->irq) |
783 | free_irq(client->irq, chip); | |
359ab9f5 | 784 | power_supply_unregister(&chip->battery); |
359ab9f5 MH |
785 | return 0; |
786 | } | |
787 | ||
48bc1774 RP |
788 | #ifdef CONFIG_PM |
789 | static int max17042_suspend(struct device *dev) | |
790 | { | |
791 | struct max17042_chip *chip = dev_get_drvdata(dev); | |
792 | ||
48e41c70 AV |
793 | /* |
794 | * disable the irq and enable irq_wake | |
48bc1774 RP |
795 | * capability to the interrupt line. |
796 | */ | |
797 | if (chip->client->irq) { | |
798 | disable_irq(chip->client->irq); | |
799 | enable_irq_wake(chip->client->irq); | |
800 | } | |
801 | ||
802 | return 0; | |
803 | } | |
804 | ||
805 | static int max17042_resume(struct device *dev) | |
806 | { | |
807 | struct max17042_chip *chip = dev_get_drvdata(dev); | |
808 | ||
809 | if (chip->client->irq) { | |
810 | disable_irq_wake(chip->client->irq); | |
811 | enable_irq(chip->client->irq); | |
812 | /* re-program the SOC thresholds to 1% change */ | |
813 | max17042_set_soc_threshold(chip, 1); | |
814 | } | |
815 | ||
816 | return 0; | |
817 | } | |
48e41c70 AV |
818 | |
819 | static const struct dev_pm_ops max17042_pm_ops = { | |
820 | .suspend = max17042_suspend, | |
821 | .resume = max17042_resume, | |
822 | }; | |
823 | ||
824 | #define MAX17042_PM_OPS (&max17042_pm_ops) | |
48bc1774 | 825 | #else |
48e41c70 | 826 | #define MAX17042_PM_OPS NULL |
48bc1774 RP |
827 | #endif |
828 | ||
3832246d KL |
829 | #ifdef CONFIG_OF |
830 | static const struct of_device_id max17042_dt_match[] = { | |
831 | { .compatible = "maxim,max17042" }, | |
9a8422d2 RP |
832 | { .compatible = "maxim,max17047" }, |
833 | { .compatible = "maxim,max17050" }, | |
3832246d KL |
834 | { }, |
835 | }; | |
836 | MODULE_DEVICE_TABLE(of, max17042_dt_match); | |
837 | #endif | |
838 | ||
359ab9f5 MH |
839 | static const struct i2c_device_id max17042_id[] = { |
840 | { "max17042", 0 }, | |
9a8422d2 RP |
841 | { "max17047", 1 }, |
842 | { "max17050", 2 }, | |
359ab9f5 MH |
843 | { } |
844 | }; | |
845 | MODULE_DEVICE_TABLE(i2c, max17042_id); | |
846 | ||
847 | static struct i2c_driver max17042_i2c_driver = { | |
848 | .driver = { | |
849 | .name = "max17042", | |
3832246d | 850 | .of_match_table = of_match_ptr(max17042_dt_match), |
48e41c70 | 851 | .pm = MAX17042_PM_OPS, |
359ab9f5 MH |
852 | }, |
853 | .probe = max17042_probe, | |
854 | .remove = __devexit_p(max17042_remove), | |
855 | .id_table = max17042_id, | |
856 | }; | |
5ff92e7a | 857 | module_i2c_driver(max17042_i2c_driver); |
359ab9f5 MH |
858 | |
859 | MODULE_AUTHOR("MyungJoo Ham <[email protected]>"); | |
860 | MODULE_DESCRIPTION("MAX17042 Fuel Gauge"); | |
861 | MODULE_LICENSE("GPL"); |