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iwlagn: kill iwlagn_rx_handler_setup
[linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
901069c7 3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <[email protected]>
b481de9c
ZY		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
c96c31e4
JP		 30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
b481de9c
ZY		 32#include <linux/kernel.h>
33#include <linux/module.h>
b481de9c 34#include <linux/init.h>
5a0e3ad6 35#include <linux/slab.h>
b481de9c
ZY		 36#include <linux/dma-mapping.h>
37#include <linux/delay.h>
d43c36dc 38#include <linux/sched.h>
b481de9c
ZY		 39#include <linux/skbuff.h>
40#include <linux/netdevice.h>
41#include <linux/wireless.h>
42#include <linux/firmware.h>
b481de9c
ZY		 43#include <linux/etherdevice.h>
44#include <linux/if_arp.h>
45
b481de9c
ZY		 46#include <net/mac80211.h>
47
48#include <asm/div64.h>
49
6bc913bd 50#include "iwl-eeprom.h"
3e0d4cb1 51#include "iwl-dev.h"
fee1247a 52#include "iwl-core.h"
3395f6e9 53#include "iwl-io.h"
b481de9c 54#include "iwl-helpers.h"
6974e363 55#include "iwl-sta.h"
0de76736 56#include "iwl-agn-calib.h"
a1175124 57#include "iwl-agn.h"
48d1a211 58#include "iwl-pci.h"
c85eb619 59#include "iwl-trans.h"
416e1438 60
b481de9c
ZY		 61/******************************************************************************
62 *
63 * module boiler plate
64 *
65 ******************************************************************************/
66
b481de9c
ZY		 67/*
68 * module name, copyright, version, etc.
b481de9c 69 */
d783b061 70#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 71
0a6857e7 72#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 73#define VD "d"
74#else
75#define VD
76#endif
77
81963d68 78#define DRV_VERSION IWLWIFI_VERSION VD
b481de9c 79
b481de9c
ZY		 80
81MODULE_DESCRIPTION(DRV_DESCRIPTION);
82MODULE_VERSION(DRV_VERSION);
a7b75207 83MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
b481de9c
ZY		 84MODULE_LICENSE("GPL");
85
bee008b7 86static int iwlagn_ant_coupling;
f37837c9 87static bool iwlagn_bt_ch_announce = 1;
bee008b7 88
5b9f8cd3 89void iwl_update_chain_flags(struct iwl_priv *priv)
5da4b55f 90{
246ed355 91 struct iwl_rxon_context *ctx;
5da4b55f 92
e3f10cea
WYG		 93 for_each_context(priv, ctx) {
94 iwlagn_set_rxon_chain(priv, ctx);
95 if (ctx->active.rx_chain != ctx->staging.rx_chain)
96 iwlagn_commit_rxon(priv, ctx);
246ed355 97 }
5da4b55f
MA		 98}
99
47ff65c4
DH		 100/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
101static void iwl_set_beacon_tim(struct iwl_priv *priv,
77834543
JB		 102 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
103 u8 *beacon, u32 frame_size)
47ff65c4
DH		 104{
105 u16 tim_idx;
106 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
107
108 /*
109 * The index is relative to frame start but we start looking at the
110 * variable-length part of the beacon.
111 */
112 tim_idx = mgmt->u.beacon.variable - beacon;
113
114 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
115 while ((tim_idx < (frame_size - 2)) &&
116 (beacon[tim_idx] != WLAN_EID_TIM))
117 tim_idx += beacon[tim_idx+1] + 2;
118
119 /* If TIM field was found, set variables */
120 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
121 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
122 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
123 } else
124 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
125}
126
8a98d49e 127int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
4bf64efd
TW		 128{
129 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
8a98d49e
JB		 130 struct iwl_host_cmd cmd = {
131 .id = REPLY_TX_BEACON,
e419d62d 132 .flags = CMD_SYNC,
8a98d49e 133 };
0b5b3ff1 134 struct ieee80211_tx_info *info;
47ff65c4
DH		 135 u32 frame_size;
136 u32 rate_flags;
137 u32 rate;
8a98d49e 138
47ff65c4
DH		 139 /*
140 * We have to set up the TX command, the TX Beacon command, and the
141 * beacon contents.
142 */
4bf64efd 143
76d04815
JB		 144 lockdep_assert_held(&priv->mutex);
145
146 if (!priv->beacon_ctx) {
147 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
950094cb 148 return 0;
76d04815
JB		 149 }
150
8a98d49e
JB		 151 if (WARN_ON(!priv->beacon_skb))
152 return -EINVAL;
153
4ce7cc2b
JB		 154 /* Allocate beacon command */
155 if (!priv->beacon_cmd)
156 priv->beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd), GFP_KERNEL);
157 tx_beacon_cmd = priv->beacon_cmd;
8a98d49e
JB		 158 if (!tx_beacon_cmd)
159 return -ENOMEM;
160
161 frame_size = priv->beacon_skb->len;
4bf64efd 162
47ff65c4 163 /* Set up TX command fields */
4bf64efd 164 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
76d04815 165 tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
47ff65c4
DH		 166 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
167 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
168 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
4bf64efd 169
47ff65c4 170 /* Set up TX beacon command fields */
4ce7cc2b 171 iwl_set_beacon_tim(priv, tx_beacon_cmd, priv->beacon_skb->data,
77834543 172 frame_size);
4bf64efd 173
47ff65c4 174 /* Set up packet rate and flags */
0b5b3ff1
JB		 175 info = IEEE80211_SKB_CB(priv->beacon_skb);
176
177 /*
178 * Let's set up the rate at least somewhat correctly;
179 * it will currently not actually be used by the uCode,
180 * it uses the broadcast station's rate instead.
181 */
182 if (info->control.rates[0].idx < 0 ||
183 info->control.rates[0].flags & IEEE80211_TX_RC_MCS)
184 rate = 0;
185 else
186 rate = info->control.rates[0].idx;
187
0e1654fa
JB		 188 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
189 priv->hw_params.valid_tx_ant);
47ff65c4 190 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
0b5b3ff1
JB		 191
192 /* In mac80211, rates for 5 GHz start at 0 */
193 if (info->band == IEEE80211_BAND_5GHZ)
194 rate += IWL_FIRST_OFDM_RATE;
195 else if (rate >= IWL_FIRST_CCK_RATE && rate <= IWL_LAST_CCK_RATE)
47ff65c4 196 rate_flags |= RATE_MCS_CCK_MSK;
0b5b3ff1
JB		 197
198 tx_beacon_cmd->tx.rate_n_flags =
199 iwl_hw_set_rate_n_flags(rate, rate_flags);
4bf64efd 200
8a98d49e 201 /* Submit command */
4ce7cc2b 202 cmd.len[0] = sizeof(*tx_beacon_cmd);
3fa50738 203 cmd.data[0] = tx_beacon_cmd;
4ce7cc2b
JB		 204 cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
205 cmd.len[1] = frame_size;
206 cmd.data[1] = priv->beacon_skb->data;
207 cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
7aaa1d79 208
bdfbf092 209 return trans_send_cmd(priv, &cmd);
a8e74e27
SO		 210}
211
5b9f8cd3 212static void iwl_bg_beacon_update(struct work_struct *work)
b481de9c 213{
c79dd5b5
TW		 214 struct iwl_priv *priv =
215 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 216 struct sk_buff *beacon;
217
76d04815
JB		 218 mutex_lock(&priv->mutex);
219 if (!priv->beacon_ctx) {
220 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
221 goto out;
222 }
b481de9c 223
60744f62
JB		 224 if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
225 /*
226 * The ucode will send beacon notifications even in
227 * IBSS mode, but we don't want to process them. But
228 * we need to defer the type check to here due to
229 * requiring locking around the beacon_ctx access.
230 */
231 goto out;
232 }
233
76d04815
JB		 234 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
235 beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
b481de9c 236 if (!beacon) {
77834543 237 IWL_ERR(priv, "update beacon failed -- keeping old\n");
76d04815 238 goto out;
b481de9c
ZY		 239 }
240
b481de9c 241 /* new beacon skb is allocated every time; dispose previous.*/
77834543 242 dev_kfree_skb(priv->beacon_skb);
b481de9c 243
12e934dc 244 priv->beacon_skb = beacon;
b481de9c 245
2295c66b 246 iwlagn_send_beacon_cmd(priv);
76d04815
JB		 247 out:
248 mutex_unlock(&priv->mutex);
b481de9c
ZY		 249}
250
fbba9410
WYG		 251static void iwl_bg_bt_runtime_config(struct work_struct *work)
252{
253 struct iwl_priv *priv =
254 container_of(work, struct iwl_priv, bt_runtime_config);
255
256 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
257 return;
258
259 /* dont send host command if rf-kill is on */
260 if (!iwl_is_ready_rf(priv))
261 return;
e55b517c 262 iwlagn_send_advance_bt_config(priv);
fbba9410
WYG		 263}
264
bee008b7
WYG		 265static void iwl_bg_bt_full_concurrency(struct work_struct *work)
266{
267 struct iwl_priv *priv =
268 container_of(work, struct iwl_priv, bt_full_concurrency);
246ed355 269 struct iwl_rxon_context *ctx;
bee008b7 270
dc1a4068
SG		 271 mutex_lock(&priv->mutex);
272
bee008b7 273 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
dc1a4068 274 goto out;
bee008b7
WYG		 275
276 /* dont send host command if rf-kill is on */
277 if (!iwl_is_ready_rf(priv))
dc1a4068 278 goto out;
bee008b7
WYG		 279
280 IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
281 priv->bt_full_concurrent ?
282 "full concurrency" : "3-wire");
283
284 /*
285 * LQ & RXON updated cmds must be sent before BT Config cmd
286 * to avoid 3-wire collisions
287 */
246ed355 288 for_each_context(priv, ctx) {
e3f10cea 289 iwlagn_set_rxon_chain(priv, ctx);
805a3b81 290 iwlagn_commit_rxon(priv, ctx);
246ed355 291 }
bee008b7 292
e55b517c 293 iwlagn_send_advance_bt_config(priv);
dc1a4068
SG		 294out:
295 mutex_unlock(&priv->mutex);
bee008b7
WYG		 296}
297
4e39317d 298/**
5b9f8cd3 299 * iwl_bg_statistics_periodic - Timer callback to queue statistics
4e39317d
EG		 300 *
301 * This callback is provided in order to send a statistics request.
302 *
303 * This timer function is continually reset to execute within
304 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
305 * was received. We need to ensure we receive the statistics in order
306 * to update the temperature used for calibrating the TXPOWER.
307 */
5b9f8cd3 308static void iwl_bg_statistics_periodic(unsigned long data)
4e39317d
EG		 309{
310 struct iwl_priv *priv = (struct iwl_priv *)data;
311
312 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
313 return;
314
61780ee3
MA		 315 /* dont send host command if rf-kill is on */
316 if (!iwl_is_ready_rf(priv))
317 return;
318
ef8d5529 319 iwl_send_statistics_request(priv, CMD_ASYNC, false);
4e39317d
EG		 320}
321
a9e1cb6a
WYG		 322
323static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
324 u32 start_idx, u32 num_events,
325 u32 mode)
326{
327 u32 i;
328 u32 ptr; /* SRAM byte address of log data */
329 u32 ev, time, data; /* event log data */
330 unsigned long reg_flags;
331
332 if (mode == 0)
333 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
334 else
335 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
336
337 /* Make sure device is powered up for SRAM reads */
338 spin_lock_irqsave(&priv->reg_lock, reg_flags);
339 if (iwl_grab_nic_access(priv)) {
340 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
341 return;
342 }
343
344 /* Set starting address; reads will auto-increment */
02a7fa00 345 iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
a9e1cb6a
WYG		 346 rmb();
347
348 /*
349 * "time" is actually "data" for mode 0 (no timestamp).
350 * place event id # at far right for easier visual parsing.
351 */
352 for (i = 0; i < num_events; i++) {
02a7fa00
JB		 353 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
354 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
a9e1cb6a
WYG		 355 if (mode == 0) {
356 trace_iwlwifi_dev_ucode_cont_event(priv,
357 0, time, ev);
358 } else {
02a7fa00 359 data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
a9e1cb6a
WYG		 360 trace_iwlwifi_dev_ucode_cont_event(priv,
361 time, data, ev);
362 }
363 }
364 /* Allow device to power down */
365 iwl_release_nic_access(priv);
366 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
367}
368
875295f1 369static void iwl_continuous_event_trace(struct iwl_priv *priv)
a9e1cb6a
WYG		 370{
371 u32 capacity; /* event log capacity in # entries */
372 u32 base; /* SRAM byte address of event log header */
373 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
374 u32 num_wraps; /* # times uCode wrapped to top of log */
375 u32 next_entry; /* index of next entry to be written by uCode */
376
d7d5783c 377 base = priv->device_pointers.error_event_table;
4caab328 378 if (iwlagn_hw_valid_rtc_data_addr(base)) {
a9e1cb6a
WYG		 379 capacity = iwl_read_targ_mem(priv, base);
380 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
381 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
382 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
383 } else
384 return;
385
386 if (num_wraps == priv->event_log.num_wraps) {
387 iwl_print_cont_event_trace(priv,
388 base, priv->event_log.next_entry,
389 next_entry - priv->event_log.next_entry,
390 mode);
391 priv->event_log.non_wraps_count++;
392 } else {
393 if ((num_wraps - priv->event_log.num_wraps) > 1)
394 priv->event_log.wraps_more_count++;
395 else
396 priv->event_log.wraps_once_count++;
397 trace_iwlwifi_dev_ucode_wrap_event(priv,
398 num_wraps - priv->event_log.num_wraps,
399 next_entry, priv->event_log.next_entry);
400 if (next_entry < priv->event_log.next_entry) {
401 iwl_print_cont_event_trace(priv, base,
402 priv->event_log.next_entry,
403 capacity - priv->event_log.next_entry,
404 mode);
405
406 iwl_print_cont_event_trace(priv, base, 0,
407 next_entry, mode);
408 } else {
409 iwl_print_cont_event_trace(priv, base,
410 next_entry, capacity - next_entry,
411 mode);
412
413 iwl_print_cont_event_trace(priv, base, 0,
414 next_entry, mode);
415 }
416 }
417 priv->event_log.num_wraps = num_wraps;
418 priv->event_log.next_entry = next_entry;
419}
420
421/**
422 * iwl_bg_ucode_trace - Timer callback to log ucode event
423 *
424 * The timer is continually set to execute every
425 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
426 * this function is to perform continuous uCode event logging operation
427 * if enabled
428 */
429static void iwl_bg_ucode_trace(unsigned long data)
430{
431 struct iwl_priv *priv = (struct iwl_priv *)data;
432
433 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
434 return;
435
436 if (priv->event_log.ucode_trace) {
437 iwl_continuous_event_trace(priv);
438 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
439 mod_timer(&priv->ucode_trace,
440 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
441 }
442}
443
65550636
WYG		 444static void iwl_bg_tx_flush(struct work_struct *work)
445{
446 struct iwl_priv *priv =
447 container_of(work, struct iwl_priv, tx_flush);
448
449 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
450 return;
451
452 /* do nothing if rf-kill is on */
453 if (!iwl_is_ready_rf(priv))
454 return;
455
c68744fb
WYG		 456 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
457 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
65550636
WYG		 458}
459
7d47618a
EG		 460/*****************************************************************************
461 *
462 * sysfs attributes
463 *
464 *****************************************************************************/
465
466#ifdef CONFIG_IWLWIFI_DEBUG
467
468/*
469 * The following adds a new attribute to the sysfs representation
470 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
471 * used for controlling the debug level.
472 *
473 * See the level definitions in iwl for details.
474 *
475 * The debug_level being managed using sysfs below is a per device debug
476 * level that is used instead of the global debug level if it (the per
477 * device debug level) is set.
478 */
479static ssize_t show_debug_level(struct device *d,
480 struct device_attribute *attr, char *buf)
481{
482 struct iwl_priv *priv = dev_get_drvdata(d);
483 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
484}
485static ssize_t store_debug_level(struct device *d,
486 struct device_attribute *attr,
487 const char *buf, size_t count)
488{
489 struct iwl_priv *priv = dev_get_drvdata(d);
490 unsigned long val;
491 int ret;
492
493 ret = strict_strtoul(buf, 0, &val);
494 if (ret)
495 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
496 else {
497 priv->debug_level = val;
498 if (iwl_alloc_traffic_mem(priv))
499 IWL_ERR(priv,
500 "Not enough memory to generate traffic log\n");
501 }
502 return strnlen(buf, count);
503}
504
505static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
506 show_debug_level, store_debug_level);
507
508
509#endif /* CONFIG_IWLWIFI_DEBUG */
510
511
512static ssize_t show_temperature(struct device *d,
513 struct device_attribute *attr, char *buf)
514{
515 struct iwl_priv *priv = dev_get_drvdata(d);
516
517 if (!iwl_is_alive(priv))
518 return -EAGAIN;
519
520 return sprintf(buf, "%d\n", priv->temperature);
521}
522
523static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
524
525static ssize_t show_tx_power(struct device *d,
526 struct device_attribute *attr, char *buf)
527{
528 struct iwl_priv *priv = dev_get_drvdata(d);
529
530 if (!iwl_is_ready_rf(priv))
531 return sprintf(buf, "off\n");
532 else
533 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
534}
535
536static ssize_t store_tx_power(struct device *d,
537 struct device_attribute *attr,
538 const char *buf, size_t count)
539{
540 struct iwl_priv *priv = dev_get_drvdata(d);
541 unsigned long val;
542 int ret;
543
544 ret = strict_strtoul(buf, 10, &val);
545 if (ret)
546 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
547 else {
548 ret = iwl_set_tx_power(priv, val, false);
549 if (ret)
550 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
551 ret);
552 else
553 ret = count;
554 }
555 return ret;
556}
557
558static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
559
7d47618a
EG		 560static struct attribute *iwl_sysfs_entries[] = {
561 &dev_attr_temperature.attr,
562 &dev_attr_tx_power.attr,
7d47618a
EG		 563#ifdef CONFIG_IWLWIFI_DEBUG
564 &dev_attr_debug_level.attr,
565#endif
566 NULL
567};
568
569static struct attribute_group iwl_attribute_group = {
570 .name = NULL, /* put in device directory */
571 .attrs = iwl_sysfs_entries,
572};
573
b481de9c
ZY		 574/******************************************************************************
575 *
576 * uCode download functions
577 *
578 ******************************************************************************/
579
3599d39a 580static void iwl_free_fw_desc(struct iwl_priv *priv, struct fw_desc *desc)
dbf28e21
JB		 581{
582 if (desc->v_addr)
3599d39a 583 dma_free_coherent(priv->bus.dev, desc->len,
dbf28e21
JB		 584 desc->v_addr, desc->p_addr);
585 desc->v_addr = NULL;
586 desc->len = 0;
587}
588
3599d39a 589static void iwl_free_fw_img(struct iwl_priv *priv, struct fw_img *img)
dbf28e21 590{
3599d39a
EG		 591 iwl_free_fw_desc(priv, &img->code);
592 iwl_free_fw_desc(priv, &img->data);
dbf28e21
JB		 593}
594
3599d39a
EG		 595static void iwl_dealloc_ucode(struct iwl_priv *priv)
596{
597 iwl_free_fw_img(priv, &priv->ucode_rt);
598 iwl_free_fw_img(priv, &priv->ucode_init);
599}
600
601static int iwl_alloc_fw_desc(struct iwl_priv *priv, struct fw_desc *desc,
dbf28e21
JB		 602 const void *data, size_t len)
603{
604 if (!len) {
605 desc->v_addr = NULL;
606 return -EINVAL;
607 }
608
3599d39a 609 desc->v_addr = dma_alloc_coherent(priv->bus.dev, len,
dbf28e21
JB		 610 &desc->p_addr, GFP_KERNEL);
611 if (!desc->v_addr)
612 return -ENOMEM;
3599d39a 613
dbf28e21
JB		 614 desc->len = len;
615 memcpy(desc->v_addr, data, len);
616 return 0;
617}
618
dd7a2509
JB		 619struct iwlagn_ucode_capabilities {
620 u32 max_probe_length;
6a822d06 621 u32 standard_phy_calibration_size;
3997ff39 622 u32 flags;
dd7a2509 623};
edcdf8b2 624
b08dfd04 625static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
dd7a2509
JB		 626static int iwl_mac_setup_register(struct iwl_priv *priv,
627 struct iwlagn_ucode_capabilities *capa);
b08dfd04 628
39396085
JS		 629#define UCODE_EXPERIMENTAL_INDEX 100
630#define UCODE_EXPERIMENTAL_TAG "exp"
631
b08dfd04
JB		 632static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
633{
634 const char *name_pre = priv->cfg->fw_name_pre;
39396085 635 char tag[8];
b08dfd04 636
39396085
JS		 637 if (first) {
638#ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
639 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
640 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
641 } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
642#endif
b08dfd04 643 priv->fw_index = priv->cfg->ucode_api_max;
39396085
JS		 644 sprintf(tag, "%d", priv->fw_index);
645 } else {
b08dfd04 646 priv->fw_index--;
39396085
JS		 647 sprintf(tag, "%d", priv->fw_index);
648 }
b08dfd04
JB		 649
650 if (priv->fw_index < priv->cfg->ucode_api_min) {
651 IWL_ERR(priv, "no suitable firmware found!\n");
652 return -ENOENT;
653 }
654
39396085 655 sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
b08dfd04 656
39396085
JS		 657 IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
658 (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
659 ? "EXPERIMENTAL " : "",
b08dfd04
JB		 660 priv->firmware_name);
661
662 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
3599d39a
EG		 663 priv->bus.dev,
664 GFP_KERNEL, priv, iwl_ucode_callback);
b08dfd04
JB		 665}
666
0e9a44dc 667struct iwlagn_firmware_pieces {
1fc35276
JB		 668 const void *inst, *data, *init, *init_data;
669 size_t inst_size, data_size, init_size, init_data_size;
0e9a44dc
JB		 670
671 u32 build;
b2e640d4
JB		 672
673 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
674 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
0e9a44dc
JB		 675};
676
677static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
678 const struct firmware *ucode_raw,
679 struct iwlagn_firmware_pieces *pieces)
680{
681 struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
682 u32 api_ver, hdr_size;
683 const u8 *src;
684
685 priv->ucode_ver = le32_to_cpu(ucode->ver);
686 api_ver = IWL_UCODE_API(priv->ucode_ver);
687
688 switch (api_ver) {
689 default:
f7d046f9
WYG		 690 hdr_size = 28;
691 if (ucode_raw->size < hdr_size) {
692 IWL_ERR(priv, "File size too small!\n");
693 return -EINVAL;
0e9a44dc 694 }
f7d046f9
WYG		 695 pieces->build = le32_to_cpu(ucode->u.v2.build);
696 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
697 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
698 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
699 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
f7d046f9
WYG		 700 src = ucode->u.v2.data;
701 break;
0e9a44dc
JB		 702 case 0:
703 case 1:
704 case 2:
705 hdr_size = 24;
706 if (ucode_raw->size < hdr_size) {
707 IWL_ERR(priv, "File size too small!\n");
708 return -EINVAL;
709 }
710 pieces->build = 0;
711 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
712 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
713 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
714 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
0e9a44dc
JB		 715 src = ucode->u.v1.data;
716 break;
717 }
718
719 /* Verify size of file vs. image size info in file's header */
720 if (ucode_raw->size != hdr_size + pieces->inst_size +
721 pieces->data_size + pieces->init_size +
1fc35276 722 pieces->init_data_size) {
0e9a44dc
JB		 723
724 IWL_ERR(priv,
725 "uCode file size %d does not match expected size\n",
726 (int)ucode_raw->size);
727 return -EINVAL;
728 }
729
730 pieces->inst = src;
731 src += pieces->inst_size;
732 pieces->data = src;
733 src += pieces->data_size;
734 pieces->init = src;
735 src += pieces->init_size;
736 pieces->init_data = src;
737 src += pieces->init_data_size;
0e9a44dc
JB		 738
739 return 0;
740}
741
dd7a2509
JB		 742static int iwlagn_wanted_ucode_alternative = 1;
743
744static int iwlagn_load_firmware(struct iwl_priv *priv,
745 const struct firmware *ucode_raw,
746 struct iwlagn_firmware_pieces *pieces,
747 struct iwlagn_ucode_capabilities *capa)
748{
749 struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
750 struct iwl_ucode_tlv *tlv;
751 size_t len = ucode_raw->size;
752 const u8 *data;
753 int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
754 u64 alternatives;
ad8d8333
WYG		 755 u32 tlv_len;
756 enum iwl_ucode_tlv_type tlv_type;
757 const u8 *tlv_data;
dd7a2509 758
ad8d8333
WYG		 759 if (len < sizeof(*ucode)) {
760 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
dd7a2509 761 return -EINVAL;
ad8d8333 762 }
dd7a2509 763
ad8d8333
WYG		 764 if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
765 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
766 le32_to_cpu(ucode->magic));
dd7a2509 767 return -EINVAL;
ad8d8333 768 }
dd7a2509
JB		 769
770 /*
771 * Check which alternatives are present, and "downgrade"
772 * when the chosen alternative is not present, warning
773 * the user when that happens. Some files may not have
774 * any alternatives, so don't warn in that case.
775 */
776 alternatives = le64_to_cpu(ucode->alternatives);
777 tmp = wanted_alternative;
778 if (wanted_alternative > 63)
779 wanted_alternative = 63;
780 while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
781 wanted_alternative--;
782 if (wanted_alternative && wanted_alternative != tmp)
783 IWL_WARN(priv,
784 "uCode alternative %d not available, choosing %d\n",
785 tmp, wanted_alternative);
786
787 priv->ucode_ver = le32_to_cpu(ucode->ver);
788 pieces->build = le32_to_cpu(ucode->build);
789 data = ucode->data;
790
791 len -= sizeof(*ucode);
792
704da534 793 while (len >= sizeof(*tlv)) {
dd7a2509 794 u16 tlv_alt;
dd7a2509
JB		 795
796 len -= sizeof(*tlv);
797 tlv = (void *)data;
798
799 tlv_len = le32_to_cpu(tlv->length);
800 tlv_type = le16_to_cpu(tlv->type);
801 tlv_alt = le16_to_cpu(tlv->alternative);
802 tlv_data = tlv->data;
803
ad8d8333
WYG		 804 if (len < tlv_len) {
805 IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
806 len, tlv_len);
dd7a2509 807 return -EINVAL;
ad8d8333 808 }
dd7a2509
JB		 809 len -= ALIGN(tlv_len, 4);
810 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
811
812 /*
813 * Alternative 0 is always valid.
814 *
815 * Skip alternative TLVs that are not selected.
816 */
817 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
818 continue;
819
820 switch (tlv_type) {
821 case IWL_UCODE_TLV_INST:
822 pieces->inst = tlv_data;
823 pieces->inst_size = tlv_len;
824 break;
825 case IWL_UCODE_TLV_DATA:
826 pieces->data = tlv_data;
827 pieces->data_size = tlv_len;
828 break;
829 case IWL_UCODE_TLV_INIT:
830 pieces->init = tlv_data;
831 pieces->init_size = tlv_len;
832 break;
833 case IWL_UCODE_TLV_INIT_DATA:
834 pieces->init_data = tlv_data;
835 pieces->init_data_size = tlv_len;
836 break;
837 case IWL_UCODE_TLV_BOOT:
1fc35276 838 IWL_ERR(priv, "Found unexpected BOOT ucode\n");
dd7a2509
JB		 839 break;
840 case IWL_UCODE_TLV_PROBE_MAX_LEN:
704da534
JB		 841 if (tlv_len != sizeof(u32))
842 goto invalid_tlv_len;
843 capa->max_probe_length =
ad8d8333 844 le32_to_cpup((__le32 *)tlv_data);
dd7a2509 845 break;
ece9c4ee
JB		 846 case IWL_UCODE_TLV_PAN:
847 if (tlv_len)
848 goto invalid_tlv_len;
3997ff39
JB		 849 capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
850 break;
851 case IWL_UCODE_TLV_FLAGS:
852 /* must be at least one u32 */
853 if (tlv_len < sizeof(u32))
854 goto invalid_tlv_len;
855 /* and a proper number of u32s */
856 if (tlv_len % sizeof(u32))
857 goto invalid_tlv_len;
858 /*
859 * This driver only reads the first u32 as
860 * right now no more features are defined,
861 * if that changes then either the driver
862 * will not work with the new firmware, or
863 * it'll not take advantage of new features.
864 */
865 capa->flags = le32_to_cpup((__le32 *)tlv_data);
ece9c4ee 866 break;
b2e640d4 867 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
704da534
JB		 868 if (tlv_len != sizeof(u32))
869 goto invalid_tlv_len;
870 pieces->init_evtlog_ptr =
ad8d8333 871 le32_to_cpup((__le32 *)tlv_data);
b2e640d4
JB		 872 break;
873 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
704da534
JB		 874 if (tlv_len != sizeof(u32))
875 goto invalid_tlv_len;
876 pieces->init_evtlog_size =
ad8d8333 877 le32_to_cpup((__le32 *)tlv_data);
b2e640d4
JB		 878 break;
879 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
704da534
JB		 880 if (tlv_len != sizeof(u32))
881 goto invalid_tlv_len;
882 pieces->init_errlog_ptr =
ad8d8333 883 le32_to_cpup((__le32 *)tlv_data);
b2e640d4
JB		 884 break;
885 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
704da534
JB		 886 if (tlv_len != sizeof(u32))
887 goto invalid_tlv_len;
888 pieces->inst_evtlog_ptr =
ad8d8333 889 le32_to_cpup((__le32 *)tlv_data);
b2e640d4
JB		 890 break;
891 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
704da534
JB		 892 if (tlv_len != sizeof(u32))
893 goto invalid_tlv_len;
894 pieces->inst_evtlog_size =
ad8d8333 895 le32_to_cpup((__le32 *)tlv_data);
b2e640d4
JB		 896 break;
897 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
704da534
JB		 898 if (tlv_len != sizeof(u32))
899 goto invalid_tlv_len;
900 pieces->inst_errlog_ptr =
ad8d8333 901 le32_to_cpup((__le32 *)tlv_data);
b2e640d4 902 break;
c8312fac
WYG		 903 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
904 if (tlv_len)
704da534
JB		 905 goto invalid_tlv_len;
906 priv->enhance_sensitivity_table = true;
c8312fac 907 break;
6a822d06 908 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
704da534
JB		 909 if (tlv_len != sizeof(u32))
910 goto invalid_tlv_len;
911 capa->standard_phy_calibration_size =
6a822d06
WYG		 912 le32_to_cpup((__le32 *)tlv_data);
913 break;
dd7a2509 914 default:
6fc3ba99 915 IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
dd7a2509
JB		 916 break;
917 }
918 }
919
ad8d8333
WYG		 920 if (len) {
921 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
922 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
704da534 923 return -EINVAL;
ad8d8333 924 }
dd7a2509 925
704da534
JB		 926 return 0;
927
928 invalid_tlv_len:
929 IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
930 iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
931
932 return -EINVAL;
dd7a2509
JB		 933}
934
b481de9c 935/**
b08dfd04 936 * iwl_ucode_callback - callback when firmware was loaded
b481de9c 937 *
b08dfd04
JB		 938 * If loaded successfully, copies the firmware into buffers
939 * for the card to fetch (via DMA).
b481de9c 940 */
b08dfd04 941static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
b481de9c 942{
b08dfd04 943 struct iwl_priv *priv = context;
cc0f555d 944 struct iwl_ucode_header *ucode;
0e9a44dc
JB		 945 int err;
946 struct iwlagn_firmware_pieces pieces;
a0987a8d
RC		 947 const unsigned int api_max = priv->cfg->ucode_api_max;
948 const unsigned int api_min = priv->cfg->ucode_api_min;
0e9a44dc 949 u32 api_ver;
3e4de761 950 char buildstr[25];
0e9a44dc 951 u32 build;
dd7a2509
JB		 952 struct iwlagn_ucode_capabilities ucode_capa = {
953 .max_probe_length = 200,
6a822d06 954 .standard_phy_calibration_size =
642454cc 955 IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
dd7a2509 956 };
0e9a44dc
JB		 957
958 memset(&pieces, 0, sizeof(pieces));
b481de9c 959
b08dfd04 960 if (!ucode_raw) {
39396085
JS		 961 if (priv->fw_index <= priv->cfg->ucode_api_max)
962 IWL_ERR(priv,
963 "request for firmware file '%s' failed.\n",
964 priv->firmware_name);
b08dfd04 965 goto try_again;
b481de9c
ZY		 966 }
967
b08dfd04
JB		 968 IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
969 priv->firmware_name, ucode_raw->size);
b481de9c 970
22adba2a
JB		 971 /* Make sure that we got at least the API version number */
972 if (ucode_raw->size < 4) {
15b1687c 973 IWL_ERR(priv, "File size way too small!\n");
b08dfd04 974 goto try_again;
b481de9c
ZY		 975 }
976
977 /* Data from ucode file: header followed by uCode images */
cc0f555d 978 ucode = (struct iwl_ucode_header *)ucode_raw->data;
b481de9c 979
0e9a44dc
JB		 980 if (ucode->ver)
981 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
982 else
dd7a2509
JB		 983 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
984 &ucode_capa);
22adba2a 985
0e9a44dc
JB		 986 if (err)
987 goto try_again;
b481de9c 988
a0987a8d 989 api_ver = IWL_UCODE_API(priv->ucode_ver);
0e9a44dc 990 build = pieces.build;
a0987a8d 991
0e9a44dc
JB		 992 /*
993 * api_ver should match the api version forming part of the
994 * firmware filename ... but we don't check for that and only rely
995 * on the API version read from firmware header from here on forward
996 */
65cccfb0
WYG		 997 /* no api version check required for experimental uCode */
998 if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
999 if (api_ver < api_min || api_ver > api_max) {
1000 IWL_ERR(priv,
1001 "Driver unable to support your firmware API. "
1002 "Driver supports v%u, firmware is v%u.\n",
1003 api_max, api_ver);
1004 goto try_again;
1005 }
b08dfd04 1006
65cccfb0
WYG		 1007 if (api_ver != api_max)
1008 IWL_ERR(priv,
1009 "Firmware has old API version. Expected v%u, "
1010 "got v%u. New firmware can be obtained "
1011 "from http://www.intellinuxwireless.org.\n",
1012 api_max, api_ver);
1013 }
a0987a8d 1014
3e4de761 1015 if (build)
39396085
JS		 1016 sprintf(buildstr, " build %u%s", build,
1017 (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1018 ? " (EXP)" : "");
3e4de761
JB		 1019 else
1020 buildstr[0] = '\0';
1021
1022 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1023 IWL_UCODE_MAJOR(priv->ucode_ver),
1024 IWL_UCODE_MINOR(priv->ucode_ver),
1025 IWL_UCODE_API(priv->ucode_ver),
1026 IWL_UCODE_SERIAL(priv->ucode_ver),
1027 buildstr);
a0987a8d 1028
5ebeb5a6
RC		 1029 snprintf(priv->hw->wiphy->fw_version,
1030 sizeof(priv->hw->wiphy->fw_version),
3e4de761 1031 "%u.%u.%u.%u%s",
5ebeb5a6
RC		 1032 IWL_UCODE_MAJOR(priv->ucode_ver),
1033 IWL_UCODE_MINOR(priv->ucode_ver),
1034 IWL_UCODE_API(priv->ucode_ver),
3e4de761
JB		 1035 IWL_UCODE_SERIAL(priv->ucode_ver),
1036 buildstr);
b481de9c 1037
b08dfd04
JB		 1038 /*
1039 * For any of the failures below (before allocating pci memory)
1040 * we will try to load a version with a smaller API -- maybe the
1041 * user just got a corrupted version of the latest API.
1042 */
1043
0e9a44dc
JB		 1044 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1045 priv->ucode_ver);
1046 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1047 pieces.inst_size);
1048 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1049 pieces.data_size);
1050 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1051 pieces.init_size);
1052 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1053 pieces.init_data_size);
b481de9c
ZY		 1054
1055 /* Verify that uCode images will fit in card's SRAM */
0e9a44dc
JB		 1056 if (pieces.inst_size > priv->hw_params.max_inst_size) {
1057 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1058 pieces.inst_size);
b08dfd04 1059 goto try_again;
b481de9c
ZY		 1060 }
1061
0e9a44dc
JB		 1062 if (pieces.data_size > priv->hw_params.max_data_size) {
1063 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1064 pieces.data_size);
b08dfd04 1065 goto try_again;
b481de9c 1066 }
0e9a44dc
JB		 1067
1068 if (pieces.init_size > priv->hw_params.max_inst_size) {
1069 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1070 pieces.init_size);
b08dfd04 1071 goto try_again;
b481de9c 1072 }
0e9a44dc
JB		 1073
1074 if (pieces.init_data_size > priv->hw_params.max_data_size) {
1075 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1076 pieces.init_data_size);
b08dfd04 1077 goto try_again;
b481de9c 1078 }
0e9a44dc 1079
b481de9c
ZY		 1080 /* Allocate ucode buffers for card's bus-master loading ... */
1081
1082 /* Runtime instructions and 2 copies of data:
1083 * 1) unmodified from disk
1084 * 2) backup cache for save/restore during power-downs */
3599d39a 1085 if (iwl_alloc_fw_desc(priv, &priv->ucode_rt.code,
dbf28e21
JB		 1086 pieces.inst, pieces.inst_size))
1087 goto err_pci_alloc;
3599d39a 1088 if (iwl_alloc_fw_desc(priv, &priv->ucode_rt.data,
dbf28e21 1089 pieces.data, pieces.data_size))
1f304e4e
ZY		 1090 goto err_pci_alloc;
1091
b481de9c 1092 /* Initialization instructions and data */
0e9a44dc 1093 if (pieces.init_size && pieces.init_data_size) {
3599d39a 1094 if (iwl_alloc_fw_desc(priv, &priv->ucode_init.code,
dbf28e21
JB		 1095 pieces.init, pieces.init_size))
1096 goto err_pci_alloc;
3599d39a 1097 if (iwl_alloc_fw_desc(priv, &priv->ucode_init.data,
dbf28e21 1098 pieces.init_data, pieces.init_data_size))
90e759d1
TW		 1099 goto err_pci_alloc;
1100 }
b481de9c 1101
b2e640d4
JB		 1102 /* Now that we can no longer fail, copy information */
1103
1104 /*
1105 * The (size - 16) / 12 formula is based on the information recorded
1106 * for each event, which is of mode 1 (including timestamp) for all
1107 * new microcodes that include this information.
1108 */
1109 priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1110 if (pieces.init_evtlog_size)
1111 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1112 else
7cb1b088
WYG		 1113 priv->_agn.init_evtlog_size =
1114 priv->cfg->base_params->max_event_log_size;
b2e640d4
JB		 1115 priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1116 priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1117 if (pieces.inst_evtlog_size)
1118 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1119 else
7cb1b088
WYG		 1120 priv->_agn.inst_evtlog_size =
1121 priv->cfg->base_params->max_event_log_size;
b2e640d4
JB		 1122 priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1123
d2690c0d
JB		 1124 priv->new_scan_threshold_behaviour =
1125 !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
1126
b2ea345e
WYG		 1127 if ((priv->cfg->sku & EEPROM_SKU_CAP_IPAN_ENABLE) &&
1128 (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN)) {
ece9c4ee 1129 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
c10afb6e 1130 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
ece9c4ee
JB		 1131 } else
1132 priv->sta_key_max_num = STA_KEY_MAX_NUM;
c10afb6e 1133
17445b8c
JB		 1134 if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
1135 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
1136 else
1137 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
1138
6a822d06
WYG		 1139 /*
1140 * figure out the offset of chain noise reset and gain commands
1141 * base on the size of standard phy calibration commands table size
1142 */
1143 if (ucode_capa.standard_phy_calibration_size >
1144 IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
1145 ucode_capa.standard_phy_calibration_size =
1146 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1147
1148 priv->_agn.phy_calib_chain_noise_reset_cmd =
1149 ucode_capa.standard_phy_calibration_size;
1150 priv->_agn.phy_calib_chain_noise_gain_cmd =
1151 ucode_capa.standard_phy_calibration_size + 1;
1152
b08dfd04
JB		 1153 /**************************************************
1154 * This is still part of probe() in a sense...
1155 *
1156 * 9. Setup and register with mac80211 and debugfs
1157 **************************************************/
dd7a2509 1158 err = iwl_mac_setup_register(priv, &ucode_capa);
b08dfd04
JB		 1159 if (err)
1160 goto out_unbind;
1161
1162 err = iwl_dbgfs_register(priv, DRV_NAME);
1163 if (err)
1164 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1165
3599d39a 1166 err = sysfs_create_group(&(priv->bus.dev->kobj),
7d47618a
EG		 1167 &iwl_attribute_group);
1168 if (err) {
1169 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1170 goto out_unbind;
1171 }
1172
b481de9c
ZY		 1173 /* We have our copies now, allow OS release its copies */
1174 release_firmware(ucode_raw);
a15707d8 1175 complete(&priv->_agn.firmware_loading_complete);
b08dfd04
JB		 1176 return;
1177
1178 try_again:
1179 /* try next, if any */
1180 if (iwl_request_firmware(priv, false))
1181 goto out_unbind;
1182 release_firmware(ucode_raw);
1183 return;
b481de9c
ZY		 1184
1185 err_pci_alloc:
15b1687c 1186 IWL_ERR(priv, "failed to allocate pci memory\n");
3599d39a 1187 iwl_dealloc_ucode(priv);
b08dfd04 1188 out_unbind:
a15707d8 1189 complete(&priv->_agn.firmware_loading_complete);
3599d39a 1190 device_release_driver(priv->bus.dev);
b481de9c 1191 release_firmware(ucode_raw);
b481de9c
ZY		 1192}
1193
2a897d41 1194static const char * const desc_lookup_text[] = {
b7a79404
RC		 1195 "OK",
1196 "FAIL",
1197 "BAD_PARAM",
1198 "BAD_CHECKSUM",
1199 "NMI_INTERRUPT_WDG",
1200 "SYSASSERT",
1201 "FATAL_ERROR",
1202 "BAD_COMMAND",
1203 "HW_ERROR_TUNE_LOCK",
1204 "HW_ERROR_TEMPERATURE",
1205 "ILLEGAL_CHAN_FREQ",
1206 "VCC_NOT_STABLE",
1207 "FH_ERROR",
1208 "NMI_INTERRUPT_HOST",
1209 "NMI_INTERRUPT_ACTION_PT",
1210 "NMI_INTERRUPT_UNKNOWN",
1211 "UCODE_VERSION_MISMATCH",
1212 "HW_ERROR_ABS_LOCK",
1213 "HW_ERROR_CAL_LOCK_FAIL",
1214 "NMI_INTERRUPT_INST_ACTION_PT",
1215 "NMI_INTERRUPT_DATA_ACTION_PT",
1216 "NMI_TRM_HW_ER",
1217 "NMI_INTERRUPT_TRM",
2a897d41 1218 "NMI_INTERRUPT_BREAK_POINT",
b7a79404
RC		 1219 "DEBUG_0",
1220 "DEBUG_1",
1221 "DEBUG_2",
1222 "DEBUG_3",
b7a79404
RC		 1223};
1224
4b58645c
JS		 1225static struct { char *name; u8 num; } advanced_lookup[] = {
1226 { "NMI_INTERRUPT_WDG", 0x34 },
1227 { "SYSASSERT", 0x35 },
1228 { "UCODE_VERSION_MISMATCH", 0x37 },
1229 { "BAD_COMMAND", 0x38 },
1230 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1231 { "FATAL_ERROR", 0x3D },
1232 { "NMI_TRM_HW_ERR", 0x46 },
1233 { "NMI_INTERRUPT_TRM", 0x4C },
1234 { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1235 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1236 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1237 { "NMI_INTERRUPT_HOST", 0x66 },
1238 { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1239 { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1240 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1241 { "ADVANCED_SYSASSERT", 0 },
1242};
1243
1244static const char *desc_lookup(u32 num)
b7a79404 1245{
4b58645c
JS		 1246 int i;
1247 int max = ARRAY_SIZE(desc_lookup_text);
b7a79404 1248
4b58645c
JS		 1249 if (num < max)
1250 return desc_lookup_text[num];
b7a79404 1251
4b58645c
JS		 1252 max = ARRAY_SIZE(advanced_lookup) - 1;
1253 for (i = 0; i < max; i++) {
1254 if (advanced_lookup[i].num == num)
6eab04a8 1255 break;
4b58645c
JS		 1256 }
1257 return advanced_lookup[i].name;
b7a79404
RC		 1258}
1259
1260#define ERROR_START_OFFSET (1 * sizeof(u32))
1261#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1262
1263void iwl_dump_nic_error_log(struct iwl_priv *priv)
1264{
50650547 1265 u32 base;
e46f6538 1266 struct iwl_error_event_table table;
b7a79404 1267
d7d5783c 1268 base = priv->device_pointers.error_event_table;
872907bb 1269 if (priv->ucode_type == IWL_UCODE_INIT) {
b2e640d4
JB		 1270 if (!base)
1271 base = priv->_agn.init_errlog_ptr;
1272 } else {
b2e640d4
JB		 1273 if (!base)
1274 base = priv->_agn.inst_errlog_ptr;
1275 }
b7a79404 1276
4caab328 1277 if (!iwlagn_hw_valid_rtc_data_addr(base)) {
212fb575
WYG		 1278 IWL_ERR(priv,
1279 "Not valid error log pointer 0x%08X for %s uCode\n",
ca7966c8 1280 base,
872907bb 1281 (priv->ucode_type == IWL_UCODE_INIT)
ca7966c8 1282 ? "Init" : "RT");
b7a79404
RC		 1283 return;
1284 }
1285
e46f6538
JB		 1286 iwl_read_targ_mem_words(priv, base, &table, sizeof(table));
1287
50650547 1288 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
b7a79404
RC		 1289 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1290 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
50650547 1291 priv->status, table.valid);
b7a79404
RC		 1292 }
1293
50650547
WYG		 1294 priv->isr_stats.err_code = table.error_id;
1295
1296 trace_iwlwifi_dev_ucode_error(priv, table.error_id, table.tsf_low,
1297 table.data1, table.data2, table.line,
1298 table.blink1, table.blink2, table.ilink1,
1299 table.ilink2, table.bcon_time, table.gp1,
1300 table.gp2, table.gp3, table.ucode_ver,
1301 table.hw_ver, table.brd_ver);
1302 IWL_ERR(priv, "0x%08X | %-28s\n", table.error_id,
1303 desc_lookup(table.error_id));
1304 IWL_ERR(priv, "0x%08X | uPc\n", table.pc);
1305 IWL_ERR(priv, "0x%08X | branchlink1\n", table.blink1);
1306 IWL_ERR(priv, "0x%08X | branchlink2\n", table.blink2);
1307 IWL_ERR(priv, "0x%08X | interruptlink1\n", table.ilink1);
1308 IWL_ERR(priv, "0x%08X | interruptlink2\n", table.ilink2);
1309 IWL_ERR(priv, "0x%08X | data1\n", table.data1);
1310 IWL_ERR(priv, "0x%08X | data2\n", table.data2);
1311 IWL_ERR(priv, "0x%08X | line\n", table.line);
1312 IWL_ERR(priv, "0x%08X | beacon time\n", table.bcon_time);
1313 IWL_ERR(priv, "0x%08X | tsf low\n", table.tsf_low);
1314 IWL_ERR(priv, "0x%08X | tsf hi\n", table.tsf_hi);
1315 IWL_ERR(priv, "0x%08X | time gp1\n", table.gp1);
1316 IWL_ERR(priv, "0x%08X | time gp2\n", table.gp2);
1317 IWL_ERR(priv, "0x%08X | time gp3\n", table.gp3);
1318 IWL_ERR(priv, "0x%08X | uCode version\n", table.ucode_ver);
1319 IWL_ERR(priv, "0x%08X | hw version\n", table.hw_ver);
1320 IWL_ERR(priv, "0x%08X | board version\n", table.brd_ver);
1321 IWL_ERR(priv, "0x%08X | hcmd\n", table.hcmd);
b7a79404
RC		 1322}
1323
1324#define EVENT_START_OFFSET (4 * sizeof(u32))
1325
1326/**
1327 * iwl_print_event_log - Dump error event log to syslog
1328 *
1329 */
b03d7d0f
WYG		 1330static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1331 u32 num_events, u32 mode,
1332 int pos, char **buf, size_t bufsz)
b7a79404
RC		 1333{
1334 u32 i;
1335 u32 base; /* SRAM byte address of event log header */
1336 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1337 u32 ptr; /* SRAM byte address of log data */
1338 u32 ev, time, data; /* event log data */
e5854471 1339 unsigned long reg_flags;
b7a79404
RC		 1340
1341 if (num_events == 0)
b03d7d0f 1342 return pos;
b2e640d4 1343
d7d5783c 1344 base = priv->device_pointers.log_event_table;
872907bb 1345 if (priv->ucode_type == IWL_UCODE_INIT) {
b2e640d4
JB		 1346 if (!base)
1347 base = priv->_agn.init_evtlog_ptr;
1348 } else {
b2e640d4
JB		 1349 if (!base)
1350 base = priv->_agn.inst_evtlog_ptr;
1351 }
b7a79404
RC		 1352
1353 if (mode == 0)
1354 event_size = 2 * sizeof(u32);
1355 else
1356 event_size = 3 * sizeof(u32);
1357
1358 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1359
e5854471
BC		 1360 /* Make sure device is powered up for SRAM reads */
1361 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1362 iwl_grab_nic_access(priv);
1363
1364 /* Set starting address; reads will auto-increment */
02a7fa00 1365 iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
e5854471
BC		 1366 rmb();
1367
b7a79404
RC		 1368 /* "time" is actually "data" for mode 0 (no timestamp).
1369 * place event id # at far right for easier visual parsing. */
1370 for (i = 0; i < num_events; i++) {
02a7fa00
JB		 1371 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1372 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
b7a79404
RC		 1373 if (mode == 0) {
1374 /* data, ev */
b03d7d0f
WYG		 1375 if (bufsz) {
1376 pos += scnprintf(*buf + pos, bufsz - pos,
1377 "EVT_LOG:0x%08x:%04u\n",
1378 time, ev);
1379 } else {
1380 trace_iwlwifi_dev_ucode_event(priv, 0,
1381 time, ev);
1382 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1383 time, ev);
1384 }
b7a79404 1385 } else {
02a7fa00 1386 data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
b03d7d0f
WYG		 1387 if (bufsz) {
1388 pos += scnprintf(*buf + pos, bufsz - pos,
1389 "EVT_LOGT:%010u:0x%08x:%04u\n",
1390 time, data, ev);
1391 } else {
1392 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
b7a79404 1393 time, data, ev);
b03d7d0f
WYG		 1394 trace_iwlwifi_dev_ucode_event(priv, time,
1395 data, ev);
1396 }
b7a79404
RC		 1397 }
1398 }
e5854471
BC		 1399
1400 /* Allow device to power down */
1401 iwl_release_nic_access(priv);
1402 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
b03d7d0f 1403 return pos;
b7a79404
RC		 1404}
1405
c341ddb2
WYG		 1406/**
1407 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1408 */
b03d7d0f
WYG		 1409static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1410 u32 num_wraps, u32 next_entry,
1411 u32 size, u32 mode,
1412 int pos, char **buf, size_t bufsz)
c341ddb2
WYG		 1413{
1414 /*
1415 * display the newest DEFAULT_LOG_ENTRIES entries
1416 * i.e the entries just before the next ont that uCode would fill.
1417 */
1418 if (num_wraps) {
1419 if (next_entry < size) {
b03d7d0f
WYG		 1420 pos = iwl_print_event_log(priv,
1421 capacity - (size - next_entry),
1422 size - next_entry, mode,
1423 pos, buf, bufsz);
1424 pos = iwl_print_event_log(priv, 0,
1425 next_entry, mode,
1426 pos, buf, bufsz);
c341ddb2 1427 } else
b03d7d0f
WYG		 1428 pos = iwl_print_event_log(priv, next_entry - size,
1429 size, mode, pos, buf, bufsz);
c341ddb2 1430 } else {
b03d7d0f
WYG		 1431 if (next_entry < size) {
1432 pos = iwl_print_event_log(priv, 0, next_entry,
1433 mode, pos, buf, bufsz);
1434 } else {
1435 pos = iwl_print_event_log(priv, next_entry - size,
1436 size, mode, pos, buf, bufsz);
1437 }
c341ddb2 1438 }
b03d7d0f 1439 return pos;
c341ddb2
WYG		 1440}
1441
c341ddb2
WYG		 1442#define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1443
b03d7d0f
WYG		 1444int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1445 char **buf, bool display)
b7a79404
RC		 1446{
1447 u32 base; /* SRAM byte address of event log header */
1448 u32 capacity; /* event log capacity in # entries */
1449 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1450 u32 num_wraps; /* # times uCode wrapped to top of log */
1451 u32 next_entry; /* index of next entry to be written by uCode */
1452 u32 size; /* # entries that we'll print */
b2e640d4 1453 u32 logsize;
b03d7d0f
WYG		 1454 int pos = 0;
1455 size_t bufsz = 0;
b7a79404 1456
d7d5783c 1457 base = priv->device_pointers.log_event_table;
872907bb 1458 if (priv->ucode_type == IWL_UCODE_INIT) {
b2e640d4
JB		 1459 logsize = priv->_agn.init_evtlog_size;
1460 if (!base)
1461 base = priv->_agn.init_evtlog_ptr;
1462 } else {
b2e640d4
JB		 1463 logsize = priv->_agn.inst_evtlog_size;
1464 if (!base)
1465 base = priv->_agn.inst_evtlog_ptr;
1466 }
b7a79404 1467
4caab328 1468 if (!iwlagn_hw_valid_rtc_data_addr(base)) {
212fb575
WYG		 1469 IWL_ERR(priv,
1470 "Invalid event log pointer 0x%08X for %s uCode\n",
ca7966c8 1471 base,
872907bb 1472 (priv->ucode_type == IWL_UCODE_INIT)
ca7966c8 1473 ? "Init" : "RT");
937c397e 1474 return -EINVAL;
b7a79404
RC		 1475 }
1476
1477 /* event log header */
1478 capacity = iwl_read_targ_mem(priv, base);
1479 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1480 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1481 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1482
b2e640d4 1483 if (capacity > logsize) {
84c40692 1484 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
b2e640d4
JB		 1485 capacity, logsize);
1486 capacity = logsize;
84c40692
BC		 1487 }
1488
b2e640d4 1489 if (next_entry > logsize) {
84c40692 1490 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
b2e640d4
JB		 1491 next_entry, logsize);
1492 next_entry = logsize;
84c40692
BC		 1493 }
1494
b7a79404
RC		 1495 size = num_wraps ? capacity : next_entry;
1496
1497 /* bail out if nothing in log */
1498 if (size == 0) {
1499 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
b03d7d0f 1500 return pos;
b7a79404
RC		 1501 }
1502
9f28ebc3 1503 /* enable/disable bt channel inhibition */
f37837c9
WYG		 1504 priv->bt_ch_announce = iwlagn_bt_ch_announce;
1505
c341ddb2 1506#ifdef CONFIG_IWLWIFI_DEBUG
521d9bce 1507 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
c341ddb2
WYG		 1508 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1509 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1510#else
1511 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1512 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1513#endif
1514 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
1515 size);
b7a79404 1516
c341ddb2 1517#ifdef CONFIG_IWLWIFI_DEBUG
b03d7d0f
WYG		 1518 if (display) {
1519 if (full_log)
1520 bufsz = capacity * 48;
1521 else
1522 bufsz = size * 48;
1523 *buf = kmalloc(bufsz, GFP_KERNEL);
1524 if (!*buf)
937c397e 1525 return -ENOMEM;
b03d7d0f 1526 }
c341ddb2
WYG		 1527 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1528 /*
1529 * if uCode has wrapped back to top of log,
1530 * start at the oldest entry,
1531 * i.e the next one that uCode would fill.
1532 */
1533 if (num_wraps)
b03d7d0f
WYG		 1534 pos = iwl_print_event_log(priv, next_entry,
1535 capacity - next_entry, mode,
1536 pos, buf, bufsz);
c341ddb2 1537 /* (then/else) start at top of log */
b03d7d0f
WYG		 1538 pos = iwl_print_event_log(priv, 0,
1539 next_entry, mode, pos, buf, bufsz);
c341ddb2 1540 } else
b03d7d0f
WYG		 1541 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
1542 next_entry, size, mode,
1543 pos, buf, bufsz);
c341ddb2 1544#else
b03d7d0f
WYG		 1545 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
1546 next_entry, size, mode,
1547 pos, buf, bufsz);
b7a79404 1548#endif
b03d7d0f 1549 return pos;
c341ddb2 1550}
b7a79404 1551
0975cc8f
WYG		 1552static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1553{
1554 struct iwl_ct_kill_config cmd;
1555 struct iwl_ct_kill_throttling_config adv_cmd;
1556 unsigned long flags;
1557 int ret = 0;
1558
1559 spin_lock_irqsave(&priv->lock, flags);
1560 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1561 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1562 spin_unlock_irqrestore(&priv->lock, flags);
1563 priv->thermal_throttle.ct_kill_toggle = false;
1564
7cb1b088 1565 if (priv->cfg->base_params->support_ct_kill_exit) {
0975cc8f
WYG		 1566 adv_cmd.critical_temperature_enter =
1567 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1568 adv_cmd.critical_temperature_exit =
1569 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1570
bdfbf092 1571 ret = trans_send_cmd_pdu(priv,
e419d62d
EG		 1572 REPLY_CT_KILL_CONFIG_CMD,
1573 CMD_SYNC, sizeof(adv_cmd), &adv_cmd);
0975cc8f
WYG		 1574 if (ret)
1575 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1576 else
1577 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1578 "succeeded, "
1579 "critical temperature enter is %d,"
1580 "exit is %d\n",
1581 priv->hw_params.ct_kill_threshold,
1582 priv->hw_params.ct_kill_exit_threshold);
1583 } else {
1584 cmd.critical_temperature_R =
1585 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1586
bdfbf092 1587 ret = trans_send_cmd_pdu(priv,
e419d62d
EG		 1588 REPLY_CT_KILL_CONFIG_CMD,
1589 CMD_SYNC, sizeof(cmd), &cmd);
0975cc8f
WYG		 1590 if (ret)
1591 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1592 else
1593 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1594 "succeeded, "
1595 "critical temperature is %d\n",
1596 priv->hw_params.ct_kill_threshold);
1597 }
1598}
1599
6d6a1afd
SZ		 1600static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
1601{
1602 struct iwl_calib_cfg_cmd calib_cfg_cmd;
1603 struct iwl_host_cmd cmd = {
1604 .id = CALIBRATION_CFG_CMD,
3fa50738
JB		 1605 .len = { sizeof(struct iwl_calib_cfg_cmd), },
1606 .data = { &calib_cfg_cmd, },
6d6a1afd
SZ		 1607 };
1608
1609 memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
1610 calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
7cb1b088 1611 calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
6d6a1afd 1612
bdfbf092 1613 return trans_send_cmd(priv, &cmd);
6d6a1afd
SZ		 1614}
1615
1616
e505c433
WYG		 1617static int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant)
1618{
1619 struct iwl_tx_ant_config_cmd tx_ant_cmd = {
1620 .valid = cpu_to_le32(valid_tx_ant),
1621 };
1622
1623 if (IWL_UCODE_API(priv->ucode_ver) > 1) {
1624 IWL_DEBUG_HC(priv, "select valid tx ant: %u\n", valid_tx_ant);
1625 return trans_send_cmd_pdu(priv,
1626 TX_ANT_CONFIGURATION_CMD,
1627 CMD_SYNC,
1628 sizeof(struct iwl_tx_ant_config_cmd),
1629 &tx_ant_cmd);
1630 } else {
1631 IWL_DEBUG_HC(priv, "TX_ANT_CONFIGURATION_CMD not supported\n");
1632 return -EOPNOTSUPP;
1633 }
1634}
1635
b481de9c 1636/**
4a4a9e81 1637 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1638 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1639 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1640 */
4613e72d 1641int iwl_alive_start(struct iwl_priv *priv)
b481de9c 1642{
57aab75a 1643 int ret = 0;
246ed355 1644 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
b481de9c 1645
1a361cd8 1646 /*TODO: this should go to the transport layer */
ca7966c8 1647 iwl_reset_ict(priv);
b481de9c 1648
ca7966c8 1649 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
6d6a1afd 1650
5b9f8cd3 1651 /* After the ALIVE response, we can send host commands to the uCode */
b481de9c
ZY		 1652 set_bit(STATUS_ALIVE, &priv->status);
1653
22de94de
SG		 1654 /* Enable watchdog to monitor the driver tx queues */
1655 iwl_setup_watchdog(priv);
b74e31a9 1656
fee1247a 1657 if (iwl_is_rfkill(priv))
ca7966c8 1658 return -ERFKILL;
b481de9c 1659
bc795df1 1660 /* download priority table before any calibration request */
7cb1b088
WYG		 1661 if (priv->cfg->bt_params &&
1662 priv->cfg->bt_params->advanced_bt_coexist) {
f7322f8f 1663 /* Configure Bluetooth device coexistence support */
207ecc5e
MV		 1664 if (priv->cfg->bt_params->bt_sco_disable)
1665 priv->bt_enable_pspoll = false;
1666 else
1667 priv->bt_enable_pspoll = true;
1668
f7322f8f
WYG		 1669 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
1670 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
1671 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
e55b517c 1672 iwlagn_send_advance_bt_config(priv);
f7322f8f 1673 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
207ecc5e
MV		 1674 priv->cur_rssi_ctx = NULL;
1675
a5901cbb 1676 iwlagn_send_prio_tbl(priv);
f7322f8f
WYG		 1677
1678 /* FIXME: w/a to force change uCode BT state machine */
ca7966c8
JB		 1679 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
1680 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
1681 if (ret)
1682 return ret;
1683 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
1684 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
1685 if (ret)
1686 return ret;
e55b517c
WYG		 1687 } else {
1688 /*
1689 * default is 2-wire BT coexexistence support
1690 */
1691 iwl_send_bt_config(priv);
f7322f8f 1692 }
e55b517c 1693
bc795df1
WYG		 1694 if (priv->hw_params.calib_rt_cfg)
1695 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
1696
36d6825b 1697 ieee80211_wake_queues(priv->hw);
b481de9c 1698
470ab2dd 1699 priv->active_rate = IWL_RATES_MASK;
b481de9c 1700
2f748dec 1701 /* Configure Tx antenna selection based on H/W config */
e3f10cea 1702 iwlagn_send_tx_ant_config(priv, priv->cfg->valid_tx_ant);
2f748dec 1703
246ed355 1704 if (iwl_is_associated_ctx(ctx)) {
c1adf9fb 1705 struct iwl_rxon_cmd *active_rxon =
246ed355 1706 (struct iwl_rxon_cmd *)&ctx->active;
019fb97d 1707 /* apply any changes in staging */
246ed355 1708 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c
ZY		 1709 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1710 } else {
d0fe478c 1711 struct iwl_rxon_context *tmp;
b481de9c 1712 /* Initialize our rx_config data */
d0fe478c
JB		 1713 for_each_context(priv, tmp)
1714 iwl_connection_init_rx_config(priv, tmp);
45823531 1715
e3f10cea 1716 iwlagn_set_rxon_chain(priv, ctx);
b481de9c
ZY		 1717 }
1718
4a4a9e81
TW		 1719 iwl_reset_run_time_calib(priv);
1720
9e2e7422
WYG		 1721 set_bit(STATUS_READY, &priv->status);
1722
b481de9c 1723 /* Configure the adapter for unassociated operation */
805a3b81 1724 ret = iwlagn_commit_rxon(priv, ctx);
ca7966c8
JB		 1725 if (ret)
1726 return ret;
b481de9c
ZY		 1727
1728 /* At this point, the NIC is initialized and operational */
47f4a587 1729 iwl_rf_kill_ct_config(priv);
5a66926a 1730
e1623446 1731 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
c46fbefa 1732
ca7966c8 1733 return iwl_power_update_mode(priv, true);
b481de9c
ZY		 1734}
1735
4e39317d 1736static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 1737
5b9f8cd3 1738static void __iwl_down(struct iwl_priv *priv)
b481de9c 1739{
22dd2fd2 1740 int exit_pending;
b481de9c 1741
e1623446 1742 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c 1743
d745d472
SG		 1744 iwl_scan_cancel_timeout(priv, 200);
1745
1746 exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c 1747
b62177a0
SG		 1748 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
1749 * to prevent rearm timer */
22de94de 1750 del_timer_sync(&priv->watchdog);
b62177a0 1751
dcef732c 1752 iwl_clear_ucode_stations(priv, NULL);
a194e324 1753 iwl_dealloc_bcast_stations(priv);
db125c78 1754 iwl_clear_driver_stations(priv);
b481de9c 1755
a1174138 1756 /* reset BT coex data */
da5dbb97 1757 priv->bt_status = 0;
207ecc5e
MV		 1758 priv->cur_rssi_ctx = NULL;
1759 priv->bt_is_sco = 0;
7cb1b088
WYG		 1760 if (priv->cfg->bt_params)
1761 priv->bt_traffic_load =
1762 priv->cfg->bt_params->bt_init_traffic_load;
1763 else
1764 priv->bt_traffic_load = 0;
bee008b7
WYG		 1765 priv->bt_full_concurrent = false;
1766 priv->bt_ci_compliance = 0;
a1174138 1767
b481de9c
ZY		 1768 /* Wipe out the EXIT_PENDING status bit if we are not actually
1769 * exiting the module */
1770 if (!exit_pending)
1771 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1772
b481de9c
ZY		 1773 if (priv->mac80211_registered)
1774 ieee80211_stop_queues(priv->hw);
1775
1a10f433 1776 /* Clear out all status bits but a few that are stable across reset */
b481de9c
ZY		 1777 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1778 STATUS_RF_KILL_HW |
9788864e
RC		 1779 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1780 STATUS_GEO_CONFIGURED |
b481de9c 1781 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA		 1782 STATUS_FW_ERROR |
1783 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1784 STATUS_EXIT_PENDING;
b481de9c 1785
ab6cf8e8 1786 trans_stop_device(priv);
4d2ccdb9 1787
77834543 1788 dev_kfree_skb(priv->beacon_skb);
12e934dc 1789 priv->beacon_skb = NULL;
b481de9c
ZY		 1790}
1791
5b9f8cd3 1792static void iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 1793{
1794 mutex_lock(&priv->mutex);
5b9f8cd3 1795 __iwl_down(priv);
b481de9c 1796 mutex_unlock(&priv->mutex);
b24d22b1 1797
4e39317d 1798 iwl_cancel_deferred_work(priv);
b481de9c
ZY		 1799}
1800
086ed117
MA		 1801#define HW_READY_TIMEOUT (50)
1802
4cd2bf76 1803/* Note: returns poll_bit return value, which is >= 0 if success */
086ed117
MA		 1804static int iwl_set_hw_ready(struct iwl_priv *priv)
1805{
4cd2bf76 1806 int ret;
086ed117
MA		 1807
1808 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1809 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1810
1811 /* See if we got it */
1812 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1813 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1814 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1815 HW_READY_TIMEOUT);
086ed117 1816
4cd2bf76 1817 IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
086ed117
MA		 1818 return ret;
1819}
1820
4cd2bf76 1821/* Note: returns standard 0/-ERROR code */
3e14c1fd 1822int iwl_prepare_card_hw(struct iwl_priv *priv)
086ed117 1823{
4cd2bf76 1824 int ret;
086ed117 1825
91dd6c27 1826 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
086ed117 1827
3354a0f6 1828 ret = iwl_set_hw_ready(priv);
4cd2bf76
JB		 1829 if (ret >= 0)
1830 return 0;
3354a0f6
MA		 1831
1832 /* If HW is not ready, prepare the conditions to check again */
086ed117
MA		 1833 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1834 CSR_HW_IF_CONFIG_REG_PREPARE);
1835
1836 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1837 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1838 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1839
4cd2bf76
JB		 1840 if (ret < 0)
1841 return ret;
086ed117 1842
4cd2bf76
JB		 1843 /* HW should be ready by now, check again. */
1844 ret = iwl_set_hw_ready(priv);
1845 if (ret >= 0)
1846 return 0;
086ed117
MA		 1847 return ret;
1848}
1849
b481de9c
ZY		 1850#define MAX_HW_RESTARTS 5
1851
5b9f8cd3 1852static int __iwl_up(struct iwl_priv *priv)
b481de9c 1853{
a194e324 1854 struct iwl_rxon_context *ctx;
57aab75a 1855 int ret;
b481de9c 1856
ca7966c8
JB		 1857 lockdep_assert_held(&priv->mutex);
1858
b481de9c 1859 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 1860 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY		 1861 return -EIO;
1862 }
1863
a194e324 1864 for_each_context(priv, ctx) {
a30e3112 1865 ret = iwlagn_alloc_bcast_station(priv, ctx);
a194e324
JB		 1866 if (ret) {
1867 iwl_dealloc_bcast_stations(priv);
1868 return ret;
1869 }
1870 }
2c810ccd 1871
ca7966c8
JB		 1872 ret = iwlagn_run_init_ucode(priv);
1873 if (ret) {
1874 IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
1875 goto error;
1876 }
b481de9c 1877
ca7966c8 1878 ret = iwlagn_load_ucode_wait_alive(priv,
dbf28e21 1879 &priv->ucode_rt,
872907bb 1880 IWL_UCODE_REGULAR);
ca7966c8
JB		 1881 if (ret) {
1882 IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
1883 goto error;
b481de9c
ZY		 1884 }
1885
ca7966c8
JB		 1886 ret = iwl_alive_start(priv);
1887 if (ret)
1888 goto error;
1889 return 0;
1890
1891 error:
b481de9c 1892 set_bit(STATUS_EXIT_PENDING, &priv->status);
5b9f8cd3 1893 __iwl_down(priv);
64e72c3e 1894 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c 1895
ca7966c8
JB		 1896 IWL_ERR(priv, "Unable to initialize device.\n");
1897 return ret;
b481de9c
ZY		 1898}
1899
1900
1901/*****************************************************************************
1902 *
1903 * Workqueue callbacks
1904 *
1905 *****************************************************************************/
1906
16e727e8
EG		 1907static void iwl_bg_run_time_calib_work(struct work_struct *work)
1908{
1909 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1910 run_time_calib_work);
1911
1912 mutex_lock(&priv->mutex);
1913
1914 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1915 test_bit(STATUS_SCANNING, &priv->status)) {
1916 mutex_unlock(&priv->mutex);
1917 return;
1918 }
1919
1920 if (priv->start_calib) {
0da0e5bf
JB		 1921 iwl_chain_noise_calibration(priv);
1922 iwl_sensitivity_calibration(priv);
16e727e8
EG		 1923 }
1924
1925 mutex_unlock(&priv->mutex);
16e727e8
EG		 1926}
1927
e43e85c4
JB		 1928static void iwlagn_prepare_restart(struct iwl_priv *priv)
1929{
1930 struct iwl_rxon_context *ctx;
1931 bool bt_full_concurrent;
1932 u8 bt_ci_compliance;
1933 u8 bt_load;
1934 u8 bt_status;
207ecc5e 1935 bool bt_is_sco;
e43e85c4
JB		 1936
1937 lockdep_assert_held(&priv->mutex);
1938
1939 for_each_context(priv, ctx)
1940 ctx->vif = NULL;
1941 priv->is_open = 0;
1942
1943 /*
1944 * __iwl_down() will clear the BT status variables,
1945 * which is correct, but when we restart we really
1946 * want to keep them so restore them afterwards.
1947 *
1948 * The restart process will later pick them up and
1949 * re-configure the hw when we reconfigure the BT
1950 * command.
1951 */
1952 bt_full_concurrent = priv->bt_full_concurrent;
1953 bt_ci_compliance = priv->bt_ci_compliance;
1954 bt_load = priv->bt_traffic_load;
1955 bt_status = priv->bt_status;
207ecc5e 1956 bt_is_sco = priv->bt_is_sco;
e43e85c4
JB		 1957
1958 __iwl_down(priv);
1959
1960 priv->bt_full_concurrent = bt_full_concurrent;
1961 priv->bt_ci_compliance = bt_ci_compliance;
1962 priv->bt_traffic_load = bt_load;
1963 priv->bt_status = bt_status;
207ecc5e 1964 priv->bt_is_sco = bt_is_sco;
e43e85c4
JB		 1965}
1966
5b9f8cd3 1967static void iwl_bg_restart(struct work_struct *data)
b481de9c 1968{
c79dd5b5 1969 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 1970
1971 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1972 return;
1973
19cc1087
JB		 1974 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
1975 mutex_lock(&priv->mutex);
e43e85c4 1976 iwlagn_prepare_restart(priv);
19cc1087 1977 mutex_unlock(&priv->mutex);
a1174138 1978 iwl_cancel_deferred_work(priv);
19cc1087
JB		 1979 ieee80211_restart_hw(priv->hw);
1980 } else {
ca7966c8 1981 WARN_ON(1);
19cc1087 1982 }
b481de9c
ZY		 1983}
1984
266af4c7
JB		 1985static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1986 struct ieee80211_channel *chan,
1987 enum nl80211_channel_type channel_type,
1988 unsigned int wait)
1989{
1990 struct iwl_priv *priv = hw->priv;
1991 int ret;
1992
1993 /* Not supported if we don't have PAN */
1994 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
1995 ret = -EOPNOTSUPP;
1996 goto free;
1997 }
1998
1999 /* Not supported on pre-P2P firmware */
2000 if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
2001 BIT(NL80211_IFTYPE_P2P_CLIENT))) {
2002 ret = -EOPNOTSUPP;
2003 goto free;
2004 }
2005
2006 mutex_lock(&priv->mutex);
2007
2008 if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
2009 /*
2010 * If the PAN context is free, use the normal
2011 * way of doing remain-on-channel offload + TX.
2012 */
2013 ret = 1;
2014 goto out;
2015 }
2016
2017 /* TODO: queue up if scanning? */
2018 if (test_bit(STATUS_SCANNING, &priv->status) ||
2019 priv->_agn.offchan_tx_skb) {
2020 ret = -EBUSY;
2021 goto out;
2022 }
2023
2024 /*
2025 * max_scan_ie_len doesn't include the blank SSID or the header,
2026 * so need to add that again here.
2027 */
2028 if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
2029 ret = -ENOBUFS;
2030 goto out;
2031 }
2032
2033 priv->_agn.offchan_tx_skb = skb;
2034 priv->_agn.offchan_tx_timeout = wait;
2035 priv->_agn.offchan_tx_chan = chan;
2036
2037 ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
2038 IWL_SCAN_OFFCH_TX, chan->band);
2039 if (ret)
2040 priv->_agn.offchan_tx_skb = NULL;
2041 out:
2042 mutex_unlock(&priv->mutex);
2043 free:
2044 if (ret < 0)
2045 kfree_skb(skb);
2046
2047 return ret;
2048}
2049
2050static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
2051{
2052 struct iwl_priv *priv = hw->priv;
2053 int ret;
2054
2055 mutex_lock(&priv->mutex);
2056
f8a22a2b
DC		 2057 if (!priv->_agn.offchan_tx_skb) {
2058 ret = -EINVAL;
2059 goto unlock;
2060 }
266af4c7
JB		 2061
2062 priv->_agn.offchan_tx_skb = NULL;
2063
2064 ret = iwl_scan_cancel_timeout(priv, 200);
2065 if (ret)
2066 ret = -EIO;
f8a22a2b 2067unlock:
266af4c7
JB		 2068 mutex_unlock(&priv->mutex);
2069
2070 return ret;
2071}
2072
b481de9c
ZY		 2073/*****************************************************************************
2074 *
2075 * mac80211 entry point functions
2076 *
2077 *****************************************************************************/
2078
0fd09502
JB		 2079static const struct ieee80211_iface_limit iwlagn_sta_ap_limits[] = {
2080 {
2081 .max = 1,
2082 .types = BIT(NL80211_IFTYPE_STATION),
2083 },
2084 {
2085 .max = 1,
2086 .types = BIT(NL80211_IFTYPE_AP),
2087 },
2088};
2089
2090static const struct ieee80211_iface_limit iwlagn_2sta_limits[] = {
2091 {
2092 .max = 2,
2093 .types = BIT(NL80211_IFTYPE_STATION),
2094 },
2095};
2096
2097static const struct ieee80211_iface_limit iwlagn_p2p_sta_go_limits[] = {
2098 {
2099 .max = 1,
2100 .types = BIT(NL80211_IFTYPE_STATION),
2101 },
2102 {
2103 .max = 1,
2104 .types = BIT(NL80211_IFTYPE_P2P_GO) |
2105 BIT(NL80211_IFTYPE_AP),
2106 },
2107};
2108
2109static const struct ieee80211_iface_limit iwlagn_p2p_2sta_limits[] = {
2110 {
2111 .max = 2,
2112 .types = BIT(NL80211_IFTYPE_STATION),
2113 },
2114 {
2115 .max = 1,
2116 .types = BIT(NL80211_IFTYPE_P2P_CLIENT),
2117 },
2118};
2119
2120static const struct ieee80211_iface_combination
2121iwlagn_iface_combinations_dualmode[] = {
2122 { .num_different_channels = 1,
2123 .max_interfaces = 2,
2124 .beacon_int_infra_match = true,
2125 .limits = iwlagn_sta_ap_limits,
2126 .n_limits = ARRAY_SIZE(iwlagn_sta_ap_limits),
2127 },
2128 { .num_different_channels = 1,
2129 .max_interfaces = 2,
2130 .limits = iwlagn_2sta_limits,
2131 .n_limits = ARRAY_SIZE(iwlagn_2sta_limits),
2132 },
2133};
2134
2135static const struct ieee80211_iface_combination
2136iwlagn_iface_combinations_p2p[] = {
2137 { .num_different_channels = 1,
2138 .max_interfaces = 2,
2139 .beacon_int_infra_match = true,
2140 .limits = iwlagn_p2p_sta_go_limits,
2141 .n_limits = ARRAY_SIZE(iwlagn_p2p_sta_go_limits),
2142 },
2143 { .num_different_channels = 1,
2144 .max_interfaces = 2,
2145 .limits = iwlagn_p2p_2sta_limits,
2146 .n_limits = ARRAY_SIZE(iwlagn_p2p_2sta_limits),
2147 },
2148};
2149
f0b6e2e8
RC		 2150/*
2151 * Not a mac80211 entry point function, but it fits in with all the
2152 * other mac80211 functions grouped here.
2153 */
dd7a2509
JB		 2154static int iwl_mac_setup_register(struct iwl_priv *priv,
2155 struct iwlagn_ucode_capabilities *capa)
f0b6e2e8
RC		 2156{
2157 int ret;
2158 struct ieee80211_hw *hw = priv->hw;
d0fe478c
JB		 2159 struct iwl_rxon_context *ctx;
2160
f0b6e2e8
RC		 2161 hw->rate_control_algorithm = "iwl-agn-rs";
2162
2163 /* Tell mac80211 our characteristics */
2164 hw->flags = IEEE80211_HW_SIGNAL_DBM |
f0b6e2e8 2165 IEEE80211_HW_AMPDU_AGGREGATION |
2491fa42 2166 IEEE80211_HW_NEED_DTIM_PERIOD |
6fb5511a
JB		 2167 IEEE80211_HW_SPECTRUM_MGMT |
2168 IEEE80211_HW_REPORTS_TX_ACK_STATUS;
f0b6e2e8 2169
9b768832
JB		 2170 hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2171
23c0fcc6
WYG		 2172 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2173 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
f0b6e2e8 2174
88950758 2175 if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
ba37a3d0
JB		 2176 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2177 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2178
3997ff39
JB		 2179 if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
2180 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
2181
8d9698b3 2182 hw->sta_data_size = sizeof(struct iwl_station_priv);
fd1af15d
JB		 2183 hw->vif_data_size = sizeof(struct iwl_vif_priv);
2184
d0fe478c
JB		 2185 for_each_context(priv, ctx) {
2186 hw->wiphy->interface_modes |= ctx->interface_modes;
2187 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2188 }
f0b6e2e8 2189
0fd09502
JB		 2190 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
2191
f35490f9 2192 if (hw->wiphy->interface_modes & BIT(NL80211_IFTYPE_P2P_CLIENT)) {
0fd09502
JB		 2193 hw->wiphy->iface_combinations = iwlagn_iface_combinations_p2p;
2194 hw->wiphy->n_iface_combinations =
2195 ARRAY_SIZE(iwlagn_iface_combinations_p2p);
f35490f9 2196 } else if (hw->wiphy->interface_modes & BIT(NL80211_IFTYPE_AP)) {
0fd09502
JB		 2197 hw->wiphy->iface_combinations = iwlagn_iface_combinations_dualmode;
2198 hw->wiphy->n_iface_combinations =
2199 ARRAY_SIZE(iwlagn_iface_combinations_dualmode);
2200 }
2201
9b9190d9
JB		 2202 hw->wiphy->max_remain_on_channel_duration = 1000;
2203
f6c8f152 2204 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
274102a8
JB		 2205 WIPHY_FLAG_DISABLE_BEACON_HINTS |
2206 WIPHY_FLAG_IBSS_RSN;
f0b6e2e8 2207
0172b029
WYG		 2208 if (iwlagn_mod_params.power_save)
2209 hw->wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT;
2210 else
2211 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
f0b6e2e8 2212
1382c71c 2213 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
f0b6e2e8 2214 /* we create the 802.11 header and a zero-length SSID element */
dd7a2509 2215 hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
f0b6e2e8
RC		 2216
2217 /* Default value; 4 EDCA QOS priorities */
2218 hw->queues = 4;
2219
2220 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2221
2222 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2223 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2224 &priv->bands[IEEE80211_BAND_2GHZ];
2225 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2226 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2227 &priv->bands[IEEE80211_BAND_5GHZ];
2228
5ed540ae
WYG		 2229 iwl_leds_init(priv);
2230
f0b6e2e8
RC		 2231 ret = ieee80211_register_hw(priv->hw);
2232 if (ret) {
2233 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2234 return ret;
2235 }
2236 priv->mac80211_registered = 1;
2237
2238 return 0;
2239}
2240
2241
2dedbf58 2242static int iwlagn_mac_start(struct ieee80211_hw *hw)
b481de9c 2243{
c79dd5b5 2244 struct iwl_priv *priv = hw->priv;
5a66926a 2245 int ret;
b481de9c 2246
e1623446 2247 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY		 2248
2249 /* we should be verifying the device is ready to be opened */
2250 mutex_lock(&priv->mutex);
5b9f8cd3 2251 ret = __iwl_up(priv);
b481de9c 2252 mutex_unlock(&priv->mutex);
e655b9f0 2253 if (ret)
6cd0b1cb 2254 return ret;
e655b9f0 2255
e1623446 2256 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
e655b9f0 2257
ca7966c8
JB		 2258 /* Now we should be done, and the READY bit should be set. */
2259 if (WARN_ON(!test_bit(STATUS_READY, &priv->status)))
2260 ret = -EIO;
0a078ffa 2261
5ed540ae 2262 iwlagn_led_enable(priv);
e932a609 2263
0a078ffa 2264 priv->is_open = 1;
e1623446 2265 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2266 return 0;
2267}
2268
2dedbf58 2269static void iwlagn_mac_stop(struct ieee80211_hw *hw)
b481de9c 2270{
c79dd5b5 2271 struct iwl_priv *priv = hw->priv;
b481de9c 2272
e1623446 2273 IWL_DEBUG_MAC80211(priv, "enter\n");
948c171c 2274
19cc1087 2275 if (!priv->is_open)
e655b9f0 2276 return;
e655b9f0 2277
b481de9c 2278 priv->is_open = 0;
5a66926a 2279
5b9f8cd3 2280 iwl_down(priv);
5a66926a
ZY		 2281
2282 flush_workqueue(priv->workqueue);
6cd0b1cb 2283
554d1d02
SG		 2284 /* User space software may expect getting rfkill changes
2285 * even if interface is down */
6cd0b1cb 2286 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
554d1d02 2287 iwl_enable_rfkill_int(priv);
948c171c 2288
e1623446 2289 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2290}
2291
2dedbf58 2292static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2293{
c79dd5b5 2294 struct iwl_priv *priv = hw->priv;
b481de9c 2295
e1623446 2296 IWL_DEBUG_MACDUMP(priv, "enter\n");
b481de9c 2297
e1623446 2298 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2299 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2300
74bcdb33 2301 if (iwlagn_tx_skb(priv, skb))
b481de9c
ZY		 2302 dev_kfree_skb_any(skb);
2303
e1623446 2304 IWL_DEBUG_MACDUMP(priv, "leave\n");
b481de9c
ZY		 2305}
2306
2dedbf58
JB		 2307static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
2308 struct ieee80211_vif *vif,
2309 struct ieee80211_key_conf *keyconf,
2310 struct ieee80211_sta *sta,
2311 u32 iv32, u16 *phase1key)
ab885f8c 2312{
9f58671e 2313 struct iwl_priv *priv = hw->priv;
a194e324
JB		 2314 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2315
e1623446 2316 IWL_DEBUG_MAC80211(priv, "enter\n");
ab885f8c 2317
a194e324 2318 iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
b3fbdcf4 2319 iv32, phase1key);
ab885f8c 2320
e1623446 2321 IWL_DEBUG_MAC80211(priv, "leave\n");
ab885f8c
EG		 2322}
2323
2dedbf58
JB		 2324static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2325 struct ieee80211_vif *vif,
2326 struct ieee80211_sta *sta,
2327 struct ieee80211_key_conf *key)
b481de9c 2328{
c79dd5b5 2329 struct iwl_priv *priv = hw->priv;
a194e324 2330 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
c10afb6e 2331 struct iwl_rxon_context *ctx = vif_priv->ctx;
42986796
WT		 2332 int ret;
2333 u8 sta_id;
2334 bool is_default_wep_key = false;
b481de9c 2335
e1623446 2336 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2337
9d143e9a 2338 if (iwlagn_mod_params.sw_crypto) {
e1623446 2339 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY		 2340 return -EOPNOTSUPP;
2341 }
b481de9c 2342
274102a8
JB		 2343 /*
2344 * To support IBSS RSN, don't program group keys in IBSS, the
2345 * hardware will then not attempt to decrypt the frames.
2346 */
2347 if (vif->type == NL80211_IFTYPE_ADHOC &&
2348 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2349 return -EOPNOTSUPP;
2350
a194e324 2351 sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
0af8bcae
JB		 2352 if (sta_id == IWL_INVALID_STATION)
2353 return -EINVAL;
b481de9c 2354
6974e363 2355 mutex_lock(&priv->mutex);
2a421b91 2356 iwl_scan_cancel_timeout(priv, 100);
6974e363 2357
a90178fa
JB		 2358 /*
2359 * If we are getting WEP group key and we didn't receive any key mapping
6974e363
EG		 2360 * so far, we are in legacy wep mode (group key only), otherwise we are
2361 * in 1X mode.
a90178fa
JB		 2362 * In legacy wep mode, we use another host command to the uCode.
2363 */
97359d12
JB		 2364 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2365 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
54c8067a 2366 !sta) {
6974e363 2367 if (cmd == SET_KEY)
c10afb6e 2368 is_default_wep_key = !ctx->key_mapping_keys;
6974e363 2369 else
ccc038ab
EG		 2370 is_default_wep_key =
2371 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 2372 }
052c4b9f 2373
b481de9c 2374 switch (cmd) {
deb09c43 2375 case SET_KEY:
6974e363 2376 if (is_default_wep_key)
2995bafa 2377 ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
deb09c43 2378 else
a194e324
JB		 2379 ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
2380 key, sta_id);
deb09c43 2381
e1623446 2382 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY		 2383 break;
2384 case DISABLE_KEY:
6974e363 2385 if (is_default_wep_key)
c10afb6e 2386 ret = iwl_remove_default_wep_key(priv, ctx, key);
deb09c43 2387 else
c10afb6e 2388 ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
deb09c43 2389
e1623446 2390 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY		 2391 break;
2392 default:
deb09c43 2393 ret = -EINVAL;
b481de9c
ZY		 2394 }
2395
72e15d71 2396 mutex_unlock(&priv->mutex);
e1623446 2397 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 2398
deb09c43 2399 return ret;
b481de9c
ZY		 2400}
2401
2dedbf58
JB		 2402static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
2403 struct ieee80211_vif *vif,
2404 enum ieee80211_ampdu_mlme_action action,
2405 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
2406 u8 buf_size)
d783b061
TW		 2407{
2408 struct iwl_priv *priv = hw->priv;
4620fefa 2409 int ret = -EINVAL;
7b090687 2410 struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
d783b061 2411
e1623446 2412 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
e174961c 2413 sta->addr, tid);
d783b061 2414
88950758 2415 if (!(priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE))
d783b061
TW		 2416 return -EACCES;
2417
4620fefa
JB		 2418 mutex_lock(&priv->mutex);
2419
d783b061
TW		 2420 switch (action) {
2421 case IEEE80211_AMPDU_RX_START:
e1623446 2422 IWL_DEBUG_HT(priv, "start Rx\n");
4620fefa
JB		 2423 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
2424 break;
d783b061 2425 case IEEE80211_AMPDU_RX_STOP:
e1623446 2426 IWL_DEBUG_HT(priv, "stop Rx\n");
619753ff 2427 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
5c2207c6 2428 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
4620fefa
JB		 2429 ret = 0;
2430 break;
d783b061 2431 case IEEE80211_AMPDU_TX_START:
e1623446 2432 IWL_DEBUG_HT(priv, "start Tx\n");
619753ff 2433 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
d5a0ffa3
WYG		 2434 if (ret == 0) {
2435 priv->_agn.agg_tids_count++;
2436 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2437 priv->_agn.agg_tids_count);
2438 }
4620fefa 2439 break;
d783b061 2440 case IEEE80211_AMPDU_TX_STOP:
e1623446 2441 IWL_DEBUG_HT(priv, "stop Tx\n");
619753ff 2442 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
d5a0ffa3
WYG		 2443 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
2444 priv->_agn.agg_tids_count--;
2445 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2446 priv->_agn.agg_tids_count);
2447 }
5c2207c6 2448 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
4620fefa 2449 ret = 0;
7cb1b088
WYG		 2450 if (priv->cfg->ht_params &&
2451 priv->cfg->ht_params->use_rts_for_aggregation) {
94597ab2
JB		 2452 /*
2453 * switch off RTS/CTS if it was previously enabled
2454 */
94597ab2
JB		 2455 sta_priv->lq_sta.lq.general_params.flags &=
2456 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
7e6a5886
JB		 2457 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
2458 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
94597ab2 2459 }
4620fefa 2460 break;
f0527971 2461 case IEEE80211_AMPDU_TX_OPERATIONAL:
c8823ec1
JB		 2462 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
2463
2464 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
2465
7b090687
JB		 2466 /*
2467 * If the limit is 0, then it wasn't initialised yet,
2468 * use the default. We can do that since we take the
2469 * minimum below, and we don't want to go above our
2470 * default due to hardware restrictions.
2471 */
2472 if (sta_priv->max_agg_bufsize == 0)
2473 sta_priv->max_agg_bufsize =
2474 LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2475
2476 /*
2477 * Even though in theory the peer could have different
2478 * aggregation reorder buffer sizes for different sessions,
2479 * our ucode doesn't allow for that and has a global limit
2480 * for each station. Therefore, use the minimum of all the
2481 * aggregation sessions and our default value.
2482 */
2483 sta_priv->max_agg_bufsize =
2484 min(sta_priv->max_agg_bufsize, buf_size);
2485
7cb1b088
WYG		 2486 if (priv->cfg->ht_params &&
2487 priv->cfg->ht_params->use_rts_for_aggregation) {
cfecc6b4
WYG		 2488 /*
2489 * switch to RTS/CTS if it is the prefer protection
2490 * method for HT traffic
2491 */
94597ab2
JB		 2492
2493 sta_priv->lq_sta.lq.general_params.flags |=
2494 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
cfecc6b4 2495 }
7b090687
JB		 2496
2497 sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
2498 sta_priv->max_agg_bufsize;
2499
2500 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
2501 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
5bc9890f
WYG		 2502
2503 IWL_INFO(priv, "Tx aggregation enabled on ra = %pM tid = %d\n",
2504 sta->addr, tid);
cfecc6b4 2505 ret = 0;
d783b061
TW		 2506 break;
2507 }
4620fefa
JB		 2508 mutex_unlock(&priv->mutex);
2509
2510 return ret;
d783b061 2511}
9f58671e 2512
2dedbf58
JB		 2513static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
2514 struct ieee80211_vif *vif,
2515 struct ieee80211_sta *sta)
fe6b23dd
RC		 2516{
2517 struct iwl_priv *priv = hw->priv;
2518 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
a194e324 2519 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
eafdfbd3 2520 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
fe6b23dd
RC		 2521 int ret;
2522 u8 sta_id;
2523
2524 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
2525 sta->addr);
da5ae1cf
RC		 2526 mutex_lock(&priv->mutex);
2527 IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
2528 sta->addr);
2529 sta_priv->common.sta_id = IWL_INVALID_STATION;
fe6b23dd
RC		 2530
2531 atomic_set(&sta_priv->pending_frames, 0);
2532 if (vif->type == NL80211_IFTYPE_AP)
2533 sta_priv->client = true;
2534
a194e324 2535 ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
238d781d 2536 is_ap, sta, &sta_id);
fe6b23dd
RC		 2537 if (ret) {
2538 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
2539 sta->addr, ret);
2540 /* Should we return success if return code is EEXIST ? */
da5ae1cf 2541 mutex_unlock(&priv->mutex);
fe6b23dd
RC		 2542 return ret;
2543 }
2544
fd1af15d
JB		 2545 sta_priv->common.sta_id = sta_id;
2546
fe6b23dd 2547 /* Initialize rate scaling */
91dd6c27 2548 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
fe6b23dd
RC		 2549 sta->addr);
2550 iwl_rs_rate_init(priv, sta, sta_id);
da5ae1cf 2551 mutex_unlock(&priv->mutex);
fe6b23dd 2552
fd1af15d 2553 return 0;
fe6b23dd
RC		 2554}
2555
2dedbf58
JB		 2556static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
2557 struct ieee80211_channel_switch *ch_switch)
79d07325
WYG		 2558{
2559 struct iwl_priv *priv = hw->priv;
2560 const struct iwl_channel_info *ch_info;
2561 struct ieee80211_conf *conf = &hw->conf;
aa2dc6b5 2562 struct ieee80211_channel *channel = ch_switch->channel;
79d07325 2563 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
246ed355
JB		 2564 /*
2565 * MULTI-FIXME
2566 * When we add support for multiple interfaces, we need to
2567 * revisit this. The channel switch command in the device
2568 * only affects the BSS context, but what does that really
2569 * mean? And what if we get a CSA on the second interface?
2570 * This needs a lot of work.
2571 */
2572 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
79d07325 2573 u16 ch;
79d07325
WYG		 2574
2575 IWL_DEBUG_MAC80211(priv, "enter\n");
2576
dc1a4068
SG		 2577 mutex_lock(&priv->mutex);
2578
79d07325 2579 if (iwl_is_rfkill(priv))
dc1a4068 2580 goto out;
79d07325
WYG		 2581
2582 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
6f213ff1
SG		 2583 test_bit(STATUS_SCANNING, &priv->status) ||
2584 test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
dc1a4068 2585 goto out;
79d07325 2586
246ed355 2587 if (!iwl_is_associated_ctx(ctx))
dc1a4068 2588 goto out;
79d07325 2589
90c300cb 2590 if (!priv->cfg->lib->set_channel_switch)
f973f87e 2591 goto out;
79d07325 2592
f973f87e
SG		 2593 ch = channel->hw_value;
2594 if (le16_to_cpu(ctx->active.channel) == ch)
2595 goto out;
2596
2597 ch_info = iwl_get_channel_info(priv, channel->band, ch);
2598 if (!is_channel_valid(ch_info)) {
2599 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
2600 goto out;
2601 }
79d07325 2602
f973f87e 2603 spin_lock_irq(&priv->lock);
79d07325 2604
f973f87e 2605 priv->current_ht_config.smps = conf->smps_mode;
79d07325 2606
f973f87e
SG		 2607 /* Configure HT40 channels */
2608 ctx->ht.enabled = conf_is_ht(conf);
2609 if (ctx->ht.enabled) {
2610 if (conf_is_ht40_minus(conf)) {
2611 ctx->ht.extension_chan_offset =
2612 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2613 ctx->ht.is_40mhz = true;
2614 } else if (conf_is_ht40_plus(conf)) {
2615 ctx->ht.extension_chan_offset =
2616 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2617 ctx->ht.is_40mhz = true;
2618 } else {
2619 ctx->ht.extension_chan_offset =
2620 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2621 ctx->ht.is_40mhz = false;
79d07325 2622 }
f973f87e
SG		 2623 } else
2624 ctx->ht.is_40mhz = false;
2625
2626 if ((le16_to_cpu(ctx->staging.channel) != ch))
2627 ctx->staging.flags = 0;
2628
2629 iwl_set_rxon_channel(priv, channel, ctx);
2630 iwl_set_rxon_ht(priv, ht_conf);
2631 iwl_set_flags_for_band(priv, ctx, channel->band, ctx->vif);
2632
2633 spin_unlock_irq(&priv->lock);
2634
2635 iwl_set_rate(priv);
2636 /*
2637 * at this point, staging_rxon has the
2638 * configuration for channel switch
2639 */
2640 set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
2641 priv->switch_channel = cpu_to_le16(ch);
90c300cb 2642 if (priv->cfg->lib->set_channel_switch(priv, ch_switch)) {
f973f87e
SG		 2643 clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
2644 priv->switch_channel = 0;
2645 ieee80211_chswitch_done(ctx->vif, false);
79d07325 2646 }
f973f87e 2647
79d07325
WYG		 2648out:
2649 mutex_unlock(&priv->mutex);
79d07325
WYG		 2650 IWL_DEBUG_MAC80211(priv, "leave\n");
2651}
2652
2dedbf58
JB		 2653static void iwlagn_configure_filter(struct ieee80211_hw *hw,
2654 unsigned int changed_flags,
2655 unsigned int *total_flags,
2656 u64 multicast)
8b8ab9d5
JB		 2657{
2658 struct iwl_priv *priv = hw->priv;
2659 __le32 filter_or = 0, filter_nand = 0;
246ed355 2660 struct iwl_rxon_context *ctx;
8b8ab9d5
JB		 2661
2662#define CHK(test, flag) do { \
2663 if (*total_flags & (test)) \
2664 filter_or |= (flag); \
2665 else \
2666 filter_nand |= (flag); \
2667 } while (0)
2668
2669 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
2670 changed_flags, *total_flags);
2671
2672 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
bdb84fec
JB		 2673 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
2674 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
8b8ab9d5
JB		 2675 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
2676
2677#undef CHK
2678
2679 mutex_lock(&priv->mutex);
2680
246ed355
JB		 2681 for_each_context(priv, ctx) {
2682 ctx->staging.filter_flags &= ~filter_nand;
2683 ctx->staging.filter_flags |= filter_or;
749ff4ef
SG		 2684
2685 /*
2686 * Not committing directly because hardware can perform a scan,
2687 * but we'll eventually commit the filter flags change anyway.
2688 */
246ed355 2689 }
8b8ab9d5
JB		 2690
2691 mutex_unlock(&priv->mutex);
2692
2693 /*
2694 * Receiving all multicast frames is always enabled by the
2695 * default flags setup in iwl_connection_init_rx_config()
2696 * since we currently do not support programming multicast
2697 * filters into the device.
2698 */
2699 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
2700 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
2701}
2702
2dedbf58 2703static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
716c74b0
WYG		 2704{
2705 struct iwl_priv *priv = hw->priv;
2706
2707 mutex_lock(&priv->mutex);
2708 IWL_DEBUG_MAC80211(priv, "enter\n");
2709
716c74b0
WYG		 2710 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2711 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
2712 goto done;
2713 }
2714 if (iwl_is_rfkill(priv)) {
2715 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
2716 goto done;
2717 }
2718
2719 /*
2720 * mac80211 will not push any more frames for transmit
2721 * until the flush is completed
2722 */
2723 if (drop) {
2724 IWL_DEBUG_MAC80211(priv, "send flush command\n");
c68744fb 2725 if (iwlagn_txfifo_flush(priv, IWL_DROP_ALL)) {
716c74b0
WYG		 2726 IWL_ERR(priv, "flush request fail\n");
2727 goto done;
2728 }
2729 }
2730 IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
2731 iwlagn_wait_tx_queue_empty(priv);
2732done:
2733 mutex_unlock(&priv->mutex);
2734 IWL_DEBUG_MAC80211(priv, "leave\n");
2735}
2736
9b9190d9
JB		 2737static void iwlagn_disable_roc(struct iwl_priv *priv)
2738{
2739 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
2740 struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
2741
2742 lockdep_assert_held(&priv->mutex);
2743
2744 if (!ctx->is_active)
2745 return;
2746
2747 ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
2748 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2749 iwl_set_rxon_channel(priv, chan, ctx);
2750 iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
2751
2752 priv->_agn.hw_roc_channel = NULL;
2753
805a3b81 2754 iwlagn_commit_rxon(priv, ctx);
9b9190d9
JB		 2755
2756 ctx->is_active = false;
2757}
2758
2759static void iwlagn_bg_roc_done(struct work_struct *work)
2760{
2761 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2762 _agn.hw_roc_work.work);
2763
2764 mutex_lock(&priv->mutex);
2765 ieee80211_remain_on_channel_expired(priv->hw);
2766 iwlagn_disable_roc(priv);
2767 mutex_unlock(&priv->mutex);
2768}
2769
2770static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
2771 struct ieee80211_channel *channel,
2772 enum nl80211_channel_type channel_type,
2773 int duration)
2774{
2775 struct iwl_priv *priv = hw->priv;
2776 int err = 0;
2777
2778 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
2779 return -EOPNOTSUPP;
2780
2781 if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
2782 BIT(NL80211_IFTYPE_P2P_CLIENT)))
2783 return -EOPNOTSUPP;
2784
2785 mutex_lock(&priv->mutex);
2786
2787 if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
2788 test_bit(STATUS_SCAN_HW, &priv->status)) {
2789 err = -EBUSY;
2790 goto out;
2791 }
2792
2793 priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
2794 priv->_agn.hw_roc_channel = channel;
2795 priv->_agn.hw_roc_chantype = channel_type;
2796 priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
805a3b81 2797 iwlagn_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
9b9190d9
JB		 2798 queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
2799 msecs_to_jiffies(duration + 20));
2800
94073919 2801 msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
9b9190d9
JB		 2802 ieee80211_ready_on_channel(priv->hw);
2803
2804 out:
2805 mutex_unlock(&priv->mutex);
2806
2807 return err;
2808}
2809
2810static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
2811{
2812 struct iwl_priv *priv = hw->priv;
2813
2814 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
2815 return -EOPNOTSUPP;
2816
2817 cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
2818
2819 mutex_lock(&priv->mutex);
2820 iwlagn_disable_roc(priv);
2821 mutex_unlock(&priv->mutex);
2822
2823 return 0;
2824}
2825
b481de9c
ZY		 2826/*****************************************************************************
2827 *
2828 * driver setup and teardown
2829 *
2830 *****************************************************************************/
2831
4e39317d 2832static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c 2833{
d21050c7 2834 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY		 2835
2836 init_waitqueue_head(&priv->wait_command_queue);
2837
5b9f8cd3 2838 INIT_WORK(&priv->restart, iwl_bg_restart);
5b9f8cd3 2839 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
16e727e8 2840 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
65550636 2841 INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
bee008b7 2842 INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
fbba9410 2843 INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
9b9190d9 2844 INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
2a421b91 2845
2a421b91 2846 iwl_setup_scan_deferred_work(priv);
bb8c093b 2847
90c300cb
WYG		 2848 if (priv->cfg->lib->setup_deferred_work)
2849 priv->cfg->lib->setup_deferred_work(priv);
4e39317d
EG		 2850
2851 init_timer(&priv->statistics_periodic);
2852 priv->statistics_periodic.data = (unsigned long)priv;
5b9f8cd3 2853 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
b481de9c 2854
a9e1cb6a
WYG		 2855 init_timer(&priv->ucode_trace);
2856 priv->ucode_trace.data = (unsigned long)priv;
2857 priv->ucode_trace.function = iwl_bg_ucode_trace;
2858
22de94de
SG		 2859 init_timer(&priv->watchdog);
2860 priv->watchdog.data = (unsigned long)priv;
2861 priv->watchdog.function = iwl_bg_watchdog;
b481de9c
ZY		 2862}
2863
4e39317d 2864static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 2865{
90c300cb
WYG		 2866 if (priv->cfg->lib->cancel_deferred_work)
2867 priv->cfg->lib->cancel_deferred_work(priv);
b481de9c 2868
815e629b 2869 cancel_work_sync(&priv->run_time_calib_work);
b481de9c 2870 cancel_work_sync(&priv->beacon_update);
e7e16b90
SG		 2871
2872 iwl_cancel_scan_deferred_work(priv);
2873
bee008b7 2874 cancel_work_sync(&priv->bt_full_concurrency);
fbba9410 2875 cancel_work_sync(&priv->bt_runtime_config);
e7e16b90 2876
4e39317d 2877 del_timer_sync(&priv->statistics_periodic);
a9e1cb6a 2878 del_timer_sync(&priv->ucode_trace);
b481de9c
ZY		 2879}
2880
89f186a8
RC		 2881static void iwl_init_hw_rates(struct iwl_priv *priv,
2882 struct ieee80211_rate *rates)
2883{
2884 int i;
2885
2886 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
2887 rates[i].bitrate = iwl_rates[i].ieee * 5;
2888 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2889 rates[i].hw_value_short = i;
2890 rates[i].flags = 0;
2891 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
2892 /*
2893 * If CCK != 1M then set short preamble rate flag.
2894 */
2895 rates[i].flags |=
2896 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
2897 0 : IEEE80211_RATE_SHORT_PREAMBLE;
2898 }
2899 }
2900}
2901
2902static int iwl_init_drv(struct iwl_priv *priv)
2903{
2904 int ret;
2905
89f186a8
RC		 2906 spin_lock_init(&priv->sta_lock);
2907 spin_lock_init(&priv->hcmd_lock);
2908
89f186a8
RC		 2909 mutex_init(&priv->mutex);
2910
89f186a8
RC		 2911 priv->ieee_channels = NULL;
2912 priv->ieee_rates = NULL;
2913 priv->band = IEEE80211_BAND_2GHZ;
2914
2915 priv->iw_mode = NL80211_IFTYPE_STATION;
ba37a3d0 2916 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
a13d276f 2917 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
d5a0ffa3 2918 priv->_agn.agg_tids_count = 0;
89f186a8 2919
8a472da4
WYG		 2920 /* initialize force reset */
2921 priv->force_reset[IWL_RF_RESET].reset_duration =
2922 IWL_DELAY_NEXT_FORCE_RF_RESET;
2923 priv->force_reset[IWL_FW_RESET].reset_duration =
2924 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
89f186a8 2925
410f2bb3
SG		 2926 priv->rx_statistics_jiffies = jiffies;
2927
89f186a8 2928 /* Choose which receivers/antennas to use */
e3f10cea 2929 iwlagn_set_rxon_chain(priv, &priv->contexts[IWL_RXON_CTX_BSS]);
89f186a8
RC		 2930
2931 iwl_init_scan_params(priv);
2932
22bf59a0 2933 /* init bt coex */
7cb1b088
WYG		 2934 if (priv->cfg->bt_params &&
2935 priv->cfg->bt_params->advanced_bt_coexist) {
b6e116e8
WYG		 2936 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2937 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2938 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
22bf59a0
WYG		 2939 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
2940 priv->bt_duration = BT_DURATION_LIMIT_DEF;
2941 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
22bf59a0
WYG		 2942 }
2943
89f186a8
RC		 2944 ret = iwl_init_channel_map(priv);
2945 if (ret) {
2946 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
2947 goto err;
2948 }
2949
2950 ret = iwlcore_init_geos(priv);
2951 if (ret) {
2952 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
2953 goto err_free_channel_map;
2954 }
2955 iwl_init_hw_rates(priv, priv->ieee_rates);
2956
2957 return 0;
2958
2959err_free_channel_map:
2960 iwl_free_channel_map(priv);
2961err:
2962 return ret;
2963}
2964
2965static void iwl_uninit_drv(struct iwl_priv *priv)
2966{
2967 iwl_calib_free_results(priv);
2968 iwlcore_free_geos(priv);
2969 iwl_free_channel_map(priv);
811ecc99 2970 kfree(priv->scan_cmd);
4ce7cc2b 2971 kfree(priv->beacon_cmd);
89f186a8
RC		 2972}
2973
3a3b14c2 2974static void iwl_mac_rssi_callback(struct ieee80211_hw *hw,
207ecc5e
MV		 2975 enum ieee80211_rssi_event rssi_event)
2976{
2977 struct iwl_priv *priv = hw->priv;
2978
2979 mutex_lock(&priv->mutex);
2980
2981 if (priv->cfg->bt_params &&
2982 priv->cfg->bt_params->advanced_bt_coexist) {
2983 if (rssi_event == RSSI_EVENT_LOW)
2984 priv->bt_enable_pspoll = true;
2985 else if (rssi_event == RSSI_EVENT_HIGH)
2986 priv->bt_enable_pspoll = false;
2987
2988 iwlagn_send_advance_bt_config(priv);
2989 } else {
2990 IWL_DEBUG_MAC80211(priv, "Advanced BT coex disabled,"
2991 "ignoring RSSI callback\n");
2992 }
2993
2994 mutex_unlock(&priv->mutex);
2995}
2996
dc21b545 2997struct ieee80211_ops iwlagn_hw_ops = {
2295c66b
JB		 2998 .tx = iwlagn_mac_tx,
2999 .start = iwlagn_mac_start,
3000 .stop = iwlagn_mac_stop,
5b9f8cd3
EG		 3001 .add_interface = iwl_mac_add_interface,
3002 .remove_interface = iwl_mac_remove_interface,
d4daaea6 3003 .change_interface = iwl_mac_change_interface,
2295c66b 3004 .config = iwlagn_mac_config,
8b8ab9d5 3005 .configure_filter = iwlagn_configure_filter,
2295c66b
JB		 3006 .set_key = iwlagn_mac_set_key,
3007 .update_tkip_key = iwlagn_mac_update_tkip_key,
5b9f8cd3 3008 .conf_tx = iwl_mac_conf_tx,
2295c66b
JB		 3009 .bss_info_changed = iwlagn_bss_info_changed,
3010 .ampdu_action = iwlagn_mac_ampdu_action,
6ab10ff8 3011 .hw_scan = iwl_mac_hw_scan,
2295c66b 3012 .sta_notify = iwlagn_mac_sta_notify,
fe6b23dd
RC		 3013 .sta_add = iwlagn_mac_sta_add,
3014 .sta_remove = iwl_mac_sta_remove,
2295c66b
JB		 3015 .channel_switch = iwlagn_mac_channel_switch,
3016 .flush = iwlagn_mac_flush,
a85d7cca 3017 .tx_last_beacon = iwl_mac_tx_last_beacon,
9b9190d9
JB		 3018 .remain_on_channel = iwl_mac_remain_on_channel,
3019 .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
266af4c7
JB		 3020 .offchannel_tx = iwl_mac_offchannel_tx,
3021 .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
207ecc5e 3022 .rssi_callback = iwl_mac_rssi_callback,
4613e72d 3023 CFG80211_TESTMODE_CMD(iwl_testmode_cmd)
eb64dca0 3024 CFG80211_TESTMODE_DUMP(iwl_testmode_dump)
b481de9c
ZY		 3025};
3026
e98a1302 3027static u32 iwl_hw_detect(struct iwl_priv *priv)
3867fe04 3028{
02a7fa00 3029 return iwl_read32(priv, CSR_HW_REV);
3867fe04
WYG		 3030}
3031
07d4f1ad
WYG		 3032static int iwl_set_hw_params(struct iwl_priv *priv)
3033{
3034 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3035 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
9d143e9a 3036 if (iwlagn_mod_params.amsdu_size_8K)
07d4f1ad
WYG		 3037 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3038 else
3039 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3040
3041 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3042
9d143e9a 3043 if (iwlagn_mod_params.disable_11n)
88950758 3044 priv->cfg->sku &= ~EEPROM_SKU_CAP_11N_ENABLE;
07d4f1ad
WYG		 3045
3046 /* Device-specific setup */
90c300cb 3047 return priv->cfg->lib->set_hw_params(priv);
07d4f1ad
WYG		 3048}
3049
e72f368b
JB		 3050static const u8 iwlagn_bss_ac_to_fifo[] = {
3051 IWL_TX_FIFO_VO,
3052 IWL_TX_FIFO_VI,
3053 IWL_TX_FIFO_BE,
3054 IWL_TX_FIFO_BK,
3055};
3056
3057static const u8 iwlagn_bss_ac_to_queue[] = {
3058 0, 1, 2, 3,
3059};
3060
3061static const u8 iwlagn_pan_ac_to_fifo[] = {
3062 IWL_TX_FIFO_VO_IPAN,
3063 IWL_TX_FIFO_VI_IPAN,
3064 IWL_TX_FIFO_BE_IPAN,
3065 IWL_TX_FIFO_BK_IPAN,
3066};
3067
3068static const u8 iwlagn_pan_ac_to_queue[] = {
3069 7, 6, 5, 4,
3070};
3071
119ea186
WYG		 3072/* This function both allocates and initializes hw and priv. */
3073static struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
3074{
3075 struct iwl_priv *priv;
3076 /* mac80211 allocates memory for this device instance, including
3077 * space for this driver's private structure */
3078 struct ieee80211_hw *hw;
3079
3080 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwlagn_hw_ops);
3081 if (hw == NULL) {
3082 pr_err("%s: Can not allocate network device\n",
3083 cfg->name);
3084 goto out;
3085 }
3086
3087 priv = hw->priv;
3088 priv->hw = hw;
3089
3090out:
3091 return hw;
3092}
3093
b2ea345e 3094static void iwl_init_context(struct iwl_priv *priv)
b481de9c 3095{
b2ea345e 3096 int i;
1d0a082d 3097
246ed355
JB		 3098 /*
3099 * The default context is always valid,
3100 * more may be discovered when firmware
3101 * is loaded.
3102 */
3103 priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3104
3105 for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3106 priv->contexts[i].ctxid = i;
3107
763cc3bf
JB		 3108 priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
3109 priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
8f2d3d2a
JB		 3110 priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3111 priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3112 priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
8dfdb9d5 3113 priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
2995bafa 3114 priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
c10afb6e 3115 priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
e72f368b
JB		 3116 priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
3117 priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
d0fe478c
JB		 3118 priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
3119 BIT(NL80211_IFTYPE_ADHOC);
3120 priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3121 BIT(NL80211_IFTYPE_STATION);
2295c66b 3122 priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
d0fe478c
JB		 3123 priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3124 priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3125 priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
ece9c4ee
JB		 3126
3127 priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
b2ea345e
WYG		 3128 priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd =
3129 REPLY_WIPAN_RXON_TIMING;
3130 priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd =
3131 REPLY_WIPAN_RXON_ASSOC;
ece9c4ee
JB		 3132 priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
3133 priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
3134 priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
3135 priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
3136 priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
e72f368b
JB		 3137 priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
3138 priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
3139 priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
d0fe478c
JB		 3140 priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
3141 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
f35c0c56
WYG		 3142#ifdef CONFIG_IWL_P2P
3143 priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
3144 BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
3145#endif
d0fe478c
JB		 3146 priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
3147 priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
3148 priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
ece9c4ee
JB		 3149
3150 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
b2ea345e
WYG		 3151}
3152
a48709c5
EG		 3153int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
3154 struct iwl_cfg *cfg)
b2ea345e
WYG		 3155{
3156 int err = 0;
3157 struct iwl_priv *priv;
3158 struct ieee80211_hw *hw;
084dd791 3159 u16 num_mac;
b2ea345e
WYG		 3160 u32 hw_rev;
3161
3162 /************************
3163 * 1. Allocating HW data
3164 ************************/
b2ea345e
WYG		 3165 hw = iwl_alloc_all(cfg);
3166 if (!hw) {
3167 err = -ENOMEM;
807caf26
EG		 3168 goto out;
3169 }
3170
b2ea345e 3171 priv = hw->priv;
a48709c5
EG		 3172
3173 priv->bus.priv = priv;
3174 priv->bus.bus_specific = bus_specific;
3175 priv->bus.ops = bus_ops;
705cd451 3176 priv->bus.irq = priv->bus.ops->get_irq(&priv->bus);
a48709c5 3177 priv->bus.ops->set_drv_data(&priv->bus, priv);
3599d39a 3178 priv->bus.dev = priv->bus.ops->get_dev(&priv->bus);
a48709c5 3179
b2ea345e 3180 /* At this point both hw and priv are allocated. */
8f2d3d2a 3181
3599d39a 3182 SET_IEEE80211_DEV(hw, priv->bus.dev);
b481de9c 3183
e1623446 3184 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
82b9a121 3185 priv->cfg = cfg;
40cefda9 3186 priv->inta_mask = CSR_INI_SET_MASK;
316c30d9 3187
34c1b7ba
EG		 3188 err = iwl_trans_register(priv);
3189 if (err)
3190 goto out_free_priv;
3191
bee008b7
WYG		 3192 /* is antenna coupling more than 35dB ? */
3193 priv->bt_ant_couple_ok =
3194 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
3195 true : false;
3196
9f28ebc3 3197 /* enable/disable bt channel inhibition */
f37837c9 3198 priv->bt_ch_announce = iwlagn_bt_ch_announce;
9f28ebc3
WYG		 3199 IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
3200 (priv->bt_ch_announce) ? "On" : "Off");
f37837c9 3201
20594eb0
WYG		 3202 if (iwl_alloc_traffic_mem(priv))
3203 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
b481de9c 3204
316c30d9 3205
731a29b7 3206 /* these spin locks will be used in apm_ops.init and EEPROM access
a8b50a0a
MA		 3207 * we should init now
3208 */
3209 spin_lock_init(&priv->reg_lock);
731a29b7 3210 spin_lock_init(&priv->lock);
4843b5a7
RC		 3211
3212 /*
3213 * stop and reset the on-board processor just in case it is in a
3214 * strange state ... like being left stranded by a primary kernel
3215 * and this is now the kdump kernel trying to start up
3216 */
3217 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3218
084dd791
EG		 3219 /***********************
3220 * 3. Read REV register
3221 ***********************/
e98a1302 3222 hw_rev = iwl_hw_detect(priv);
c11362c0 3223 IWL_INFO(priv, "Detected %s, REV=0x%X\n",
e98a1302 3224 priv->cfg->name, hw_rev);
316c30d9 3225
4cd2bf76 3226 if (iwl_prepare_card_hw(priv)) {
bcd4fe2f 3227 err = -EIO;
086ed117 3228 IWL_WARN(priv, "Failed, HW not ready\n");
084dd791 3229 goto out_free_traffic_mem;
086ed117
MA		 3230 }
3231
91238714
TW		 3232 /*****************
3233 * 4. Read EEPROM
3234 *****************/
316c30d9 3235 /* Read the EEPROM */
e98a1302 3236 err = iwl_eeprom_init(priv, hw_rev);
316c30d9 3237 if (err) {
15b1687c 3238 IWL_ERR(priv, "Unable to init EEPROM\n");
084dd791 3239 goto out_free_traffic_mem;
316c30d9 3240 }
8614f360
TW		 3241 err = iwl_eeprom_check_version(priv);
3242 if (err)
c8f16138 3243 goto out_free_eeprom;
8614f360 3244
21a5b3c6
WYG		 3245 err = iwl_eeprom_check_sku(priv);
3246 if (err)
3247 goto out_free_eeprom;
3248
02883017 3249 /* extract MAC Address */
c6fa17ed
WYG		 3250 iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
3251 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
3252 priv->hw->wiphy->addresses = priv->addresses;
3253 priv->hw->wiphy->n_addresses = 1;
3254 num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
3255 if (num_mac > 1) {
3256 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
3257 ETH_ALEN);
3258 priv->addresses[1].addr[5]++;
3259 priv->hw->wiphy->n_addresses++;
3260 }
316c30d9 3261
b2ea345e
WYG		 3262 /* initialize all valid contexts */
3263 iwl_init_context(priv);
3264
316c30d9
AK		 3265 /************************
3266 * 5. Setup HW constants
3267 ************************/
da154e30 3268 if (iwl_set_hw_params(priv)) {
084dd791 3269 err = -ENOENT;
15b1687c 3270 IWL_ERR(priv, "failed to set hw parameters\n");
073d3f5f 3271 goto out_free_eeprom;
316c30d9
AK		 3272 }
3273
3274 /*******************
6ba87956 3275 * 6. Setup priv
316c30d9 3276 *******************/
b481de9c 3277
6ba87956 3278 err = iwl_init_drv(priv);
bf85ea4f 3279 if (err)
399f4900 3280 goto out_free_eeprom;
bf85ea4f 3281 /* At this point both hw and priv are initialized. */
316c30d9 3282
316c30d9 3283 /********************
09f9bf79 3284 * 7. Setup services
316c30d9 3285 ********************/
4e39317d 3286 iwl_setup_deferred_work(priv);
653fa4a0 3287 iwl_setup_rx_handlers(priv);
4613e72d 3288 iwl_testmode_init(priv);
316c30d9 3289
158bea07 3290 /*********************************************
084dd791 3291 * 8. Enable interrupts
158bea07 3292 *********************************************/
6ba87956 3293
554d1d02 3294 iwl_enable_rfkill_int(priv);
6cd0b1cb 3295
6cd0b1cb
HS		 3296 /* If platform's RF_KILL switch is NOT set to KILL */
3297 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3298 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3299 else
3300 set_bit(STATUS_RF_KILL_HW, &priv->status);
6ba87956 3301
a60e77e5
JB		 3302 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3303 test_bit(STATUS_RF_KILL_HW, &priv->status));
6cd0b1cb 3304
58d0f361 3305 iwl_power_initialize(priv);
39b73fb1 3306 iwl_tt_initialize(priv);
158bea07 3307
a15707d8 3308 init_completion(&priv->_agn.firmware_loading_complete);
562db532 3309
b08dfd04 3310 err = iwl_request_firmware(priv, true);
158bea07 3311 if (err)
7d47618a 3312 goto out_destroy_workqueue;
158bea07 3313
b481de9c
ZY		 3314 return 0;
3315
34c1b7ba 3316out_destroy_workqueue:
c8f16138
RC		 3317 destroy_workqueue(priv->workqueue);
3318 priv->workqueue = NULL;
6ba87956 3319 iwl_uninit_drv(priv);
34c1b7ba 3320out_free_eeprom:
073d3f5f 3321 iwl_eeprom_free(priv);
34c1b7ba 3322out_free_traffic_mem:
20594eb0 3323 iwl_free_traffic_mem(priv);
34c1b7ba
EG		 3324 trans_free(priv);
3325out_free_priv:
d7c76f4c 3326 ieee80211_free_hw(priv->hw);
34c1b7ba 3327out:
b481de9c
ZY		 3328 return err;
3329}
3330
a48709c5 3331void __devexit iwl_remove(struct iwl_priv * priv)
b481de9c 3332{
0359facc 3333 unsigned long flags;
b481de9c 3334
a15707d8 3335 wait_for_completion(&priv->_agn.firmware_loading_complete);
562db532 3336
e1623446 3337 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 3338
67249625 3339 iwl_dbgfs_unregister(priv);
3599d39a
EG		 3340 sysfs_remove_group(&priv->bus.dev->kobj,
3341 &iwl_attribute_group);
67249625 3342
5b9f8cd3
EG		 3343 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3344 * to be called and iwl_down since we are removing the device
0b124c31
GG		 3345 * we need to set STATUS_EXIT_PENDING bit.
3346 */
3347 set_bit(STATUS_EXIT_PENDING, &priv->status);
5ed540ae 3348
7a4e5281 3349 iwl_testmode_cleanup(priv);
5ed540ae
WYG		 3350 iwl_leds_exit(priv);
3351
c4f55232
RR		 3352 if (priv->mac80211_registered) {
3353 ieee80211_unregister_hw(priv->hw);
3354 priv->mac80211_registered = 0;
3355 }
3356
1a10f433 3357 /* Reset to low power before unloading driver. */
14e8e4af 3358 iwl_apm_stop(priv);
c166b25a 3359
39b73fb1
WYG		 3360 iwl_tt_exit(priv);
3361
0359facc
MA		 3362 /* make sure we flush any pending irq or
3363 * tasklet for the driver
3364 */
3365 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3366 iwl_disable_interrupts(priv);
0359facc
MA		 3367 spin_unlock_irqrestore(&priv->lock, flags);
3368
a27367d2 3369 trans_sync_irq(priv);
0359facc 3370
3599d39a 3371 iwl_dealloc_ucode(priv);
b481de9c 3372
bdfbf092
EG		 3373 trans_rx_free(priv);
3374 trans_tx_free(priv);
b481de9c 3375
073d3f5f 3376 iwl_eeprom_free(priv);
b481de9c 3377
948c171c
MA		 3378 /*netif_stop_queue(dev); */
3379 flush_workqueue(priv->workqueue);
3380
5b9f8cd3 3381 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
b481de9c
ZY		 3382 * priv->workqueue... so we can't take down the workqueue
3383 * until now... */
3384 destroy_workqueue(priv->workqueue);
3385 priv->workqueue = NULL;
20594eb0 3386 iwl_free_traffic_mem(priv);
b481de9c 3387
34c1b7ba
EG		 3388 trans_free(priv);
3389
a48709c5 3390 priv->bus.ops->set_drv_data(&priv->bus, NULL);
b481de9c 3391
6ba87956 3392 iwl_uninit_drv(priv);
b481de9c 3393
77834543 3394 dev_kfree_skb(priv->beacon_skb);
b481de9c
ZY		 3395
3396 ieee80211_free_hw(priv->hw);
3397}
3398
b481de9c
ZY		 3399
3400/*****************************************************************************
3401 *
3402 * driver and module entry point
3403 *
3404 *****************************************************************************/
5b9f8cd3 3405static int __init iwl_init(void)
b481de9c
ZY		 3406{
3407
3408 int ret;
c96c31e4
JP		 3409 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3410 pr_info(DRV_COPYRIGHT "\n");
897e1cf2 3411
e227ceac 3412 ret = iwlagn_rate_control_register();
897e1cf2 3413 if (ret) {
c96c31e4 3414 pr_err("Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC		 3415 return ret;
3416 }
3417
48d1a211 3418 ret = iwl_pci_register_driver();
b481de9c 3419
48d1a211
EG		 3420 if (ret)
3421 goto error_register;
b481de9c 3422 return ret;
897e1cf2 3423
897e1cf2 3424error_register:
e227ceac 3425 iwlagn_rate_control_unregister();
897e1cf2 3426 return ret;
b481de9c
ZY		 3427}
3428
5b9f8cd3 3429static void __exit iwl_exit(void)
b481de9c 3430{
48d1a211 3431 iwl_pci_unregister_driver();
e227ceac 3432 iwlagn_rate_control_unregister();
b481de9c
ZY		 3433}
3434
5b9f8cd3
EG		 3435module_exit(iwl_exit);
3436module_init(iwl_init);
a562a9dd
RC		 3437
3438#ifdef CONFIG_IWLWIFI_DEBUG
4e30cb69 3439module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
a562a9dd
RC		 3440MODULE_PARM_DESC(debug, "debug output mask");
3441#endif
3442
2b068618
WYG		 3443module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
3444MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2b068618
WYG		 3445module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3446MODULE_PARM_DESC(queues_num, "number of hw queues.");
2b068618
WYG		 3447module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3448MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2b068618
WYG		 3449module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
3450 int, S_IRUGO);
3451MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2b068618
WYG		 3452module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3453MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
dd7a2509
JB		 3454
3455module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
3456 S_IRUGO);
3457MODULE_PARM_DESC(ucode_alternative,
3458 "specify ucode alternative to use from ucode file");
bee008b7
WYG		 3459
3460module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
3461MODULE_PARM_DESC(antenna_coupling,
3462 "specify antenna coupling in dB (defualt: 0 dB)");
f37837c9 3463
9f28ebc3
WYG		 3464module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
3465MODULE_PARM_DESC(bt_ch_inhibition,
3466 "Disable BT channel inhibition (default: enable)");
b7977ffa
SG		 3467
3468module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
3469MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
3470
3471module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
3472MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");
b60eec9b 3473
300d0834
WYG		 3474module_param_named(wd_disable, iwlagn_mod_params.wd_disable, bool, S_IRUGO);
3475MODULE_PARM_DESC(wd_disable,
3476 "Disable stuck queue watchdog timer (default: 0 [enabled])");
3477
b60eec9b
WYG		 3478/*
3479 * set bt_coex_active to true, uCode will do kill/defer
3480 * every time the priority line is asserted (BT is sending signals on the
3481 * priority line in the PCIx).
3482 * set bt_coex_active to false, uCode will ignore the BT activity and
3483 * perform the normal operation
3484 *
3485 * User might experience transmit issue on some platform due to WiFi/BT
3486 * co-exist problem. The possible behaviors are:
3487 * Able to scan and finding all the available AP
3488 * Not able to associate with any AP
3489 * On those platforms, WiFi communication can be restored by set
3490 * "bt_coex_active" module parameter to "false"
3491 *
3492 * default: bt_coex_active = true (BT_COEX_ENABLE)
3493 */
3494module_param_named(bt_coex_active, iwlagn_mod_params.bt_coex_active,
3495 bool, S_IRUGO);
3496MODULE_PARM_DESC(bt_coex_active, "enable wifi/bt co-exist (default: enable)");
6b0184c4
WYG		 3497
3498module_param_named(led_mode, iwlagn_mod_params.led_mode, int, S_IRUGO);
3499MODULE_PARM_DESC(led_mode, "0=system default, "
3500 "1=On(RF On)/Off(RF Off), 2=blinking (default: 0)");
3f1e5f4a 3501
0172b029
WYG		 3502module_param_named(power_save, iwlagn_mod_params.power_save,
3503 bool, S_IRUGO);
3504MODULE_PARM_DESC(power_save,
3505 "enable WiFi power management (default: disable)");
3506
f7538168
WYG		 3507module_param_named(power_level, iwlagn_mod_params.power_level,
3508 int, S_IRUGO);
3509MODULE_PARM_DESC(power_level,
3510 "default power save level (range from 1 - 5, default: 1)");
3511
3f1e5f4a
WYG		 3512/*
3513 * For now, keep using power level 1 instead of automatically
3514 * adjusting ...
3515 */
3516module_param_named(no_sleep_autoadjust, iwlagn_mod_params.no_sleep_autoadjust,
3517 bool, S_IRUGO);
3518MODULE_PARM_DESC(no_sleep_autoadjust,
3519 "don't automatically adjust sleep level "
3520 "according to maximum network latency (default: true)");
Empty description
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