]> Git Repo - linux.git/blame - drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
drm/vmwgfx: Make sure to update STDU when FB is updated
[linux.git] / drivers / gpu / drm / vmwgfx / vmwgfx_stdu.c
CommitLineData
35c05125
SY
1/******************************************************************************
2 *
54fbde8a 3 * COPYRIGHT © 2014-2015 VMware, Inc., Palo Alto, CA., USA
35c05125
SY
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 ******************************************************************************/
27
28#include "vmwgfx_kms.h"
8ce75f8a 29#include "device_include/svga3d_surfacedefs.h"
35c05125 30#include <drm/drm_plane_helper.h>
d7721ca7
SY
31#include <drm/drm_atomic.h>
32#include <drm/drm_atomic_helper.h>
33
35c05125
SY
34
35#define vmw_crtc_to_stdu(x) \
36 container_of(x, struct vmw_screen_target_display_unit, base.crtc)
37#define vmw_encoder_to_stdu(x) \
38 container_of(x, struct vmw_screen_target_display_unit, base.encoder)
39#define vmw_connector_to_stdu(x) \
40 container_of(x, struct vmw_screen_target_display_unit, base.connector)
41
42
43
44enum stdu_content_type {
45 SAME_AS_DISPLAY = 0,
46 SEPARATE_SURFACE,
47 SEPARATE_DMA
48};
49
6bf6bf03
TH
50/**
51 * struct vmw_stdu_dirty - closure structure for the update functions
52 *
53 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
54 * @transfer: Transfer direction for DMA command.
55 * @left: Left side of bounding box.
56 * @right: Right side of bounding box.
57 * @top: Top side of bounding box.
58 * @bottom: Bottom side of bounding box.
59 * @buf: DMA buffer when DMA-ing between buffer and screen targets.
60 * @sid: Surface ID when copying between surface and screen targets.
61 */
62struct vmw_stdu_dirty {
63 struct vmw_kms_dirty base;
64 SVGA3dTransferType transfer;
65 s32 left, right, top, bottom;
66 u32 pitch;
67 union {
68 struct vmw_dma_buffer *buf;
69 u32 sid;
70 };
71};
72
73/*
74 * SVGA commands that are used by this code. Please see the device headers
75 * for explanation.
76 */
77struct vmw_stdu_update {
78 SVGA3dCmdHeader header;
79 SVGA3dCmdUpdateGBScreenTarget body;
80};
81
82struct vmw_stdu_dma {
83 SVGA3dCmdHeader header;
84 SVGA3dCmdSurfaceDMA body;
85};
86
87struct vmw_stdu_surface_copy {
88 SVGA3dCmdHeader header;
89 SVGA3dCmdSurfaceCopy body;
90};
35c05125
SY
91
92
93/**
94 * struct vmw_screen_target_display_unit
95 *
96 * @base: VMW specific DU structure
97 * @display_srf: surface to be displayed. The dimension of this will always
98 * match the display mode. If the display mode matches
99 * content_vfbs dimensions, then this is a pointer into the
100 * corresponding field in content_vfbs. If not, then this
101 * is a separate buffer to which content_vfbs will blit to.
35c05125
SY
102 * @content_type: content_fb type
103 * @defined: true if the current display unit has been initialized
104 */
105struct vmw_screen_target_display_unit {
106 struct vmw_display_unit base;
904bb5e5 107 const struct vmw_surface *display_srf;
35c05125 108 enum stdu_content_type content_fb_type;
9aa8dcab 109 s32 display_width, display_height;
35c05125
SY
110
111 bool defined;
810b3e16
SY
112
113 /* For CPU Blit */
114 struct ttm_bo_kmap_obj host_map, guest_map;
115 unsigned int cpp;
35c05125
SY
116};
117
118
119
120static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
121
122
123
35c05125
SY
124/******************************************************************************
125 * Screen Target Display Unit CRTC Functions
126 *****************************************************************************/
127
128
129/**
130 * vmw_stdu_crtc_destroy - cleans up the STDU
131 *
132 * @crtc: used to get a reference to the containing STDU
133 */
134static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
135{
136 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
137}
138
35c05125
SY
139/**
140 * vmw_stdu_define_st - Defines a Screen Target
141 *
142 * @dev_priv: VMW DRM device
143 * @stdu: display unit to create a Screen Target for
b1097aeb
TH
144 * @mode: The mode to set.
145 * @crtc_x: X coordinate of screen target relative to framebuffer origin.
146 * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
35c05125
SY
147 *
148 * Creates a STDU that we can used later. This function is called whenever the
149 * framebuffer size changes.
150 *
151 * RETURNs:
152 * 0 on success, error code on failure
153 */
154static int vmw_stdu_define_st(struct vmw_private *dev_priv,
b1097aeb
TH
155 struct vmw_screen_target_display_unit *stdu,
156 struct drm_display_mode *mode,
157 int crtc_x, int crtc_y)
35c05125
SY
158{
159 struct {
160 SVGA3dCmdHeader header;
161 SVGA3dCmdDefineGBScreenTarget body;
162 } *cmd;
163
164 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
165
166 if (unlikely(cmd == NULL)) {
167 DRM_ERROR("Out of FIFO space defining Screen Target\n");
168 return -ENOMEM;
169 }
170
171 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
172 cmd->header.size = sizeof(cmd->body);
173
174 cmd->body.stid = stdu->base.unit;
b1097aeb
TH
175 cmd->body.width = mode->hdisplay;
176 cmd->body.height = mode->vdisplay;
35c05125
SY
177 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
178 cmd->body.dpi = 0;
b1097aeb
TH
179 if (stdu->base.is_implicit) {
180 cmd->body.xRoot = crtc_x;
181 cmd->body.yRoot = crtc_y;
182 } else {
35c05125
SY
183 cmd->body.xRoot = stdu->base.gui_x;
184 cmd->body.yRoot = stdu->base.gui_y;
185 }
6dd687b4
TH
186 stdu->base.set_gui_x = cmd->body.xRoot;
187 stdu->base.set_gui_y = cmd->body.yRoot;
35c05125
SY
188
189 vmw_fifo_commit(dev_priv, sizeof(*cmd));
190
191 stdu->defined = true;
9aa8dcab
SY
192 stdu->display_width = mode->hdisplay;
193 stdu->display_height = mode->vdisplay;
35c05125
SY
194
195 return 0;
196}
197
198
199
200/**
201 * vmw_stdu_bind_st - Binds a surface to a Screen Target
202 *
203 * @dev_priv: VMW DRM device
204 * @stdu: display unit affected
205 * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
206 *
207 * Binding a surface to a Screen Target the same as flipping
208 */
209static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
210 struct vmw_screen_target_display_unit *stdu,
904bb5e5 211 const struct vmw_resource *res)
35c05125
SY
212{
213 SVGA3dSurfaceImageId image;
214
215 struct {
216 SVGA3dCmdHeader header;
217 SVGA3dCmdBindGBScreenTarget body;
218 } *cmd;
219
220
221 if (!stdu->defined) {
222 DRM_ERROR("No screen target defined\n");
223 return -EINVAL;
224 }
225
226 /* Set up image using information in vfb */
227 memset(&image, 0, sizeof(image));
228 image.sid = res ? res->id : SVGA3D_INVALID_ID;
229
230 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
231
232 if (unlikely(cmd == NULL)) {
233 DRM_ERROR("Out of FIFO space binding a screen target\n");
234 return -ENOMEM;
235 }
236
237 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
238 cmd->header.size = sizeof(cmd->body);
239
240 cmd->body.stid = stdu->base.unit;
241 cmd->body.image = image;
242
243 vmw_fifo_commit(dev_priv, sizeof(*cmd));
244
245 return 0;
246}
247
6bf6bf03
TH
248/**
249 * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
250 * bounding box.
251 *
252 * @cmd: Pointer to command stream.
253 * @unit: Screen target unit.
254 * @left: Left side of bounding box.
255 * @right: Right side of bounding box.
256 * @top: Top side of bounding box.
257 * @bottom: Bottom side of bounding box.
258 */
259static void vmw_stdu_populate_update(void *cmd, int unit,
260 s32 left, s32 right, s32 top, s32 bottom)
261{
262 struct vmw_stdu_update *update = cmd;
263
264 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
265 update->header.size = sizeof(update->body);
35c05125 266
6bf6bf03
TH
267 update->body.stid = unit;
268 update->body.rect.x = left;
269 update->body.rect.y = top;
270 update->body.rect.w = right - left;
271 update->body.rect.h = bottom - top;
272}
35c05125
SY
273
274/**
6bf6bf03 275 * vmw_stdu_update_st - Full update of a Screen Target
35c05125
SY
276 *
277 * @dev_priv: VMW DRM device
35c05125 278 * @stdu: display unit affected
35c05125
SY
279 *
280 * This function needs to be called whenever the content of a screen
6bf6bf03
TH
281 * target has changed completely. Typically as a result of a backing
282 * surface change.
35c05125
SY
283 *
284 * RETURNS:
285 * 0 on success, error code on failure
286 */
287static int vmw_stdu_update_st(struct vmw_private *dev_priv,
6bf6bf03 288 struct vmw_screen_target_display_unit *stdu)
35c05125 289{
6bf6bf03 290 struct vmw_stdu_update *cmd;
35c05125
SY
291
292 if (!stdu->defined) {
293 DRM_ERROR("No screen target defined");
294 return -EINVAL;
295 }
296
35c05125
SY
297 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
298
299 if (unlikely(cmd == NULL)) {
300 DRM_ERROR("Out of FIFO space updating a Screen Target\n");
301 return -ENOMEM;
302 }
303
9aa8dcab
SY
304 vmw_stdu_populate_update(cmd, stdu->base.unit,
305 0, stdu->display_width,
306 0, stdu->display_height);
35c05125
SY
307
308 vmw_fifo_commit(dev_priv, sizeof(*cmd));
309
310 return 0;
311}
312
313
314
315/**
316 * vmw_stdu_destroy_st - Destroy a Screen Target
317 *
318 * @dev_priv: VMW DRM device
319 * @stdu: display unit to destroy
320 */
321static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
322 struct vmw_screen_target_display_unit *stdu)
323{
324 int ret;
325
326 struct {
327 SVGA3dCmdHeader header;
328 SVGA3dCmdDestroyGBScreenTarget body;
329 } *cmd;
330
331
332 /* Nothing to do if not successfully defined */
333 if (unlikely(!stdu->defined))
334 return 0;
335
336 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
337
338 if (unlikely(cmd == NULL)) {
339 DRM_ERROR("Out of FIFO space, screen target not destroyed\n");
340 return -ENOMEM;
341 }
342
343 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
344 cmd->header.size = sizeof(cmd->body);
345
346 cmd->body.stid = stdu->base.unit;
347
348 vmw_fifo_commit(dev_priv, sizeof(*cmd));
349
350 /* Force sync */
351 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
352 if (unlikely(ret != 0))
353 DRM_ERROR("Failed to sync with HW");
354
355 stdu->defined = false;
9aa8dcab
SY
356 stdu->display_width = 0;
357 stdu->display_height = 0;
35c05125
SY
358
359 return ret;
360}
361
06ec4190
SY
362
363/**
364 * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
365 *
366 * @crtc: CRTC associated with the screen target
367 *
368 * This function defines/destroys a screen target
369 *
370 */
371static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
372{
373 struct vmw_private *dev_priv;
374 struct vmw_screen_target_display_unit *stdu;
375 int ret;
376
377
378 stdu = vmw_crtc_to_stdu(crtc);
379 dev_priv = vmw_priv(crtc->dev);
380
381 if (stdu->defined) {
382 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
383 if (ret)
384 DRM_ERROR("Failed to blank CRTC\n");
385
386 (void) vmw_stdu_update_st(dev_priv, stdu);
387
388 ret = vmw_stdu_destroy_st(dev_priv, stdu);
389 if (ret)
390 DRM_ERROR("Failed to destroy Screen Target\n");
391
392 stdu->content_fb_type = SAME_AS_DISPLAY;
393 }
394
395 if (!crtc->state->enable)
396 return;
397
398 vmw_svga_enable(dev_priv);
399 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, crtc->x, crtc->y);
400
401 if (ret)
402 DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
403 crtc->x, crtc->y);
404}
405
406
407static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
408{
409}
410
411
412static void vmw_stdu_crtc_helper_commit(struct drm_crtc *crtc)
413{
414 struct vmw_private *dev_priv;
415 struct vmw_screen_target_display_unit *stdu;
416 struct vmw_framebuffer *vfb;
417 struct drm_framebuffer *fb;
418
419
420 stdu = vmw_crtc_to_stdu(crtc);
421 dev_priv = vmw_priv(crtc->dev);
422 fb = crtc->primary->fb;
423
424 vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
425
426 if (vfb)
427 vmw_kms_add_active(dev_priv, &stdu->base, vfb);
428 else
429 vmw_kms_del_active(dev_priv, &stdu->base);
430}
431
432static void vmw_stdu_crtc_helper_disable(struct drm_crtc *crtc)
433{
434 struct vmw_private *dev_priv;
435 struct vmw_screen_target_display_unit *stdu;
436 int ret;
437
438
439 if (!crtc) {
440 DRM_ERROR("CRTC is NULL\n");
441 return;
442 }
443
444 stdu = vmw_crtc_to_stdu(crtc);
445 dev_priv = vmw_priv(crtc->dev);
446
447 if (stdu->defined) {
448 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
449 if (ret)
450 DRM_ERROR("Failed to blank CRTC\n");
451
452 (void) vmw_stdu_update_st(dev_priv, stdu);
453
454 ret = vmw_stdu_destroy_st(dev_priv, stdu);
455 if (ret)
456 DRM_ERROR("Failed to destroy Screen Target\n");
457
458 stdu->content_fb_type = SAME_AS_DISPLAY;
459 }
460}
461
35c05125
SY
462/**
463 * vmw_stdu_crtc_page_flip - Binds a buffer to a screen target
464 *
465 * @crtc: CRTC to attach FB to
466 * @fb: FB to attach
467 * @event: Event to be posted. This event should've been alloced
468 * using k[mz]alloc, and should've been completely initialized.
469 * @page_flip_flags: Input flags.
470 *
471 * If the STDU uses the same display and content buffers, i.e. a true flip,
472 * this function will replace the existing display buffer with the new content
473 * buffer.
474 *
475 * If the STDU uses different display and content buffers, i.e. a blit, then
476 * only the content buffer will be updated.
477 *
478 * RETURNS:
479 * 0 on success, error code on failure
480 */
481static int vmw_stdu_crtc_page_flip(struct drm_crtc *crtc,
482 struct drm_framebuffer *new_fb,
483 struct drm_pending_vblank_event *event,
41292b1f
SV
484 uint32_t flags,
485 struct drm_modeset_acquire_ctx *ctx)
35c05125
SY
486
487{
488 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
904bb5e5 489 struct vmw_screen_target_display_unit *stdu = vmw_crtc_to_stdu(crtc);
b1097aeb 490 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(new_fb);
904bb5e5 491 struct drm_vmw_rect vclips;
35c05125
SY
492 int ret;
493
35c05125
SY
494 dev_priv = vmw_priv(crtc->dev);
495 stdu = vmw_crtc_to_stdu(crtc);
35c05125 496
4d492a07 497 if (!stdu->defined || !vmw_kms_crtc_flippable(dev_priv, crtc))
b1097aeb 498 return -EINVAL;
35c05125 499
904bb5e5
SY
500 /*
501 * We're always async, but the helper doesn't know how to set async
502 * so lie to the helper. Also, the helper expects someone
503 * to pick the event up from the crtc state, and if nobody does,
504 * it will free it. Since we handle the event in this function,
505 * don't hand it to the helper.
506 */
507 flags &= ~DRM_MODE_PAGE_FLIP_ASYNC;
320d8c3d 508 ret = drm_atomic_helper_page_flip(crtc, new_fb, NULL, flags, ctx);
904bb5e5
SY
509 if (ret) {
510 DRM_ERROR("Page flip error %d.\n", ret);
b1097aeb 511 return ret;
904bb5e5 512 }
35c05125 513
4d492a07
TH
514 if (stdu->base.is_implicit)
515 vmw_kms_update_implicit_fb(dev_priv, crtc);
516
904bb5e5
SY
517 /*
518 * Now that we've bound a new surface to the screen target,
519 * update the contents.
520 */
b1097aeb
TH
521 vclips.x = crtc->x;
522 vclips.y = crtc->y;
523 vclips.w = crtc->mode.hdisplay;
524 vclips.h = crtc->mode.vdisplay;
904bb5e5 525
b1097aeb
TH
526 if (vfb->dmabuf)
527 ret = vmw_kms_stdu_dma(dev_priv, NULL, vfb, NULL, NULL, &vclips,
528 1, 1, true, false);
529 else
530 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, &vclips,
531 NULL, 0, 0, 1, 1, NULL);
904bb5e5
SY
532 if (ret) {
533 DRM_ERROR("Page flip update error %d.\n", ret);
35c05125 534 return ret;
904bb5e5 535 }
35c05125
SY
536
537 if (event) {
538 struct vmw_fence_obj *fence = NULL;
6bf6bf03 539 struct drm_file *file_priv = event->base.file_priv;
35c05125
SY
540
541 vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);
542 if (!fence)
543 return -ENOMEM;
544
545 ret = vmw_event_fence_action_queue(file_priv, fence,
546 &event->base,
547 &event->event.tv_sec,
548 &event->event.tv_usec,
549 true);
550 vmw_fence_obj_unreference(&fence);
4e0858a6 551 } else {
904bb5e5 552 (void) vmw_fifo_flush(dev_priv, false);
35c05125
SY
553 }
554
b1097aeb 555 return 0;
35c05125
SY
556}
557
558
6bf6bf03
TH
559/**
560 * vmw_stdu_dmabuf_clip - Callback to encode a suface DMA command cliprect
561 *
562 * @dirty: The closure structure.
563 *
564 * Encodes a surface DMA command cliprect and updates the bounding box
565 * for the DMA.
566 */
567static void vmw_stdu_dmabuf_clip(struct vmw_kms_dirty *dirty)
568{
569 struct vmw_stdu_dirty *ddirty =
570 container_of(dirty, struct vmw_stdu_dirty, base);
571 struct vmw_stdu_dma *cmd = dirty->cmd;
572 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
573
574 blit += dirty->num_hits;
575 blit->srcx = dirty->fb_x;
576 blit->srcy = dirty->fb_y;
577 blit->x = dirty->unit_x1;
578 blit->y = dirty->unit_y1;
579 blit->d = 1;
580 blit->w = dirty->unit_x2 - dirty->unit_x1;
581 blit->h = dirty->unit_y2 - dirty->unit_y1;
582 dirty->num_hits++;
583
584 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
585 return;
586
587 /* Destination bounding box */
588 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
589 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
590 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
591 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
592}
593
594/**
595 * vmw_stdu_dmabuf_fifo_commit - Callback to fill in and submit a DMA command.
596 *
597 * @dirty: The closure structure.
598 *
599 * Fills in the missing fields in a DMA command, and optionally encodes
600 * a screen target update command, depending on transfer direction.
601 */
602static void vmw_stdu_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty)
603{
604 struct vmw_stdu_dirty *ddirty =
605 container_of(dirty, struct vmw_stdu_dirty, base);
606 struct vmw_screen_target_display_unit *stdu =
607 container_of(dirty->unit, typeof(*stdu), base);
608 struct vmw_stdu_dma *cmd = dirty->cmd;
609 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
610 SVGA3dCmdSurfaceDMASuffix *suffix =
611 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
612 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
613
614 if (!dirty->num_hits) {
615 vmw_fifo_commit(dirty->dev_priv, 0);
616 return;
617 }
618
619 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
620 cmd->header.size = sizeof(cmd->body) + blit_size;
621 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
622 cmd->body.guest.pitch = ddirty->pitch;
623 cmd->body.host.sid = stdu->display_srf->res.id;
624 cmd->body.host.face = 0;
625 cmd->body.host.mipmap = 0;
626 cmd->body.transfer = ddirty->transfer;
627 suffix->suffixSize = sizeof(*suffix);
628 suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
629
630 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
631 blit_size += sizeof(struct vmw_stdu_update);
632
633 vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
634 ddirty->left, ddirty->right,
635 ddirty->top, ddirty->bottom);
636 }
637
638 vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
639
640 ddirty->left = ddirty->top = S32_MAX;
641 ddirty->right = ddirty->bottom = S32_MIN;
642}
643
810b3e16
SY
644
645/**
646 * vmw_stdu_dmabuf_cpu_clip - Callback to encode a CPU blit
647 *
648 * @dirty: The closure structure.
649 *
650 * This function calculates the bounding box for all the incoming clips
651 */
652static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty)
653{
654 struct vmw_stdu_dirty *ddirty =
655 container_of(dirty, struct vmw_stdu_dirty, base);
656
657 dirty->num_hits = 1;
658
659 /* Calculate bounding box */
660 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
661 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
662 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
663 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
664}
665
666
667/**
668 * vmw_stdu_dmabuf_cpu_commit - Callback to do a CPU blit from DMAbuf
669 *
670 * @dirty: The closure structure.
671 *
672 * For the special case when we cannot create a proxy surface in a
673 * 2D VM, we have to do a CPU blit ourselves.
674 */
675static void vmw_stdu_dmabuf_cpu_commit(struct vmw_kms_dirty *dirty)
676{
677 struct vmw_stdu_dirty *ddirty =
678 container_of(dirty, struct vmw_stdu_dirty, base);
679 struct vmw_screen_target_display_unit *stdu =
680 container_of(dirty->unit, typeof(*stdu), base);
681 s32 width, height;
682 s32 src_pitch, dst_pitch;
683 u8 *src, *dst;
684 bool not_used;
685
686
687 if (!dirty->num_hits)
688 return;
689
690 width = ddirty->right - ddirty->left;
691 height = ddirty->bottom - ddirty->top;
692
693 if (width == 0 || height == 0)
694 return;
695
696
697 /* Assume we are blitting from Host (display_srf) to Guest (dmabuf) */
698 src_pitch = stdu->display_srf->base_size.width * stdu->cpp;
699 src = ttm_kmap_obj_virtual(&stdu->host_map, &not_used);
700 src += dirty->unit_y1 * src_pitch + dirty->unit_x1 * stdu->cpp;
701
702 dst_pitch = ddirty->pitch;
703 dst = ttm_kmap_obj_virtual(&stdu->guest_map, &not_used);
704 dst += dirty->fb_y * dst_pitch + dirty->fb_x * stdu->cpp;
705
706
707 /* Figure out the real direction */
708 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
709 u8 *tmp;
710 s32 tmp_pitch;
711
712 tmp = src;
713 tmp_pitch = src_pitch;
714
715 src = dst;
716 src_pitch = dst_pitch;
717
718 dst = tmp;
719 dst_pitch = tmp_pitch;
720 }
721
722 /* CPU Blit */
723 while (height-- > 0) {
724 memcpy(dst, src, width * stdu->cpp);
725 dst += dst_pitch;
726 src += src_pitch;
727 }
728
729 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
730 struct vmw_private *dev_priv;
731 struct vmw_stdu_update *cmd;
732 struct drm_clip_rect region;
733 int ret;
734
735 /* We are updating the actual surface, not a proxy */
736 region.x1 = ddirty->left;
737 region.x2 = ddirty->right;
738 region.y1 = ddirty->top;
739 region.y2 = ddirty->bottom;
740 ret = vmw_kms_update_proxy(
741 (struct vmw_resource *) &stdu->display_srf->res,
742 (const struct drm_clip_rect *) &region, 1, 1);
743 if (ret)
744 goto out_cleanup;
745
746
747 dev_priv = vmw_priv(stdu->base.crtc.dev);
748 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
749
750 if (!cmd) {
751 DRM_ERROR("Cannot reserve FIFO space to update STDU");
752 goto out_cleanup;
753 }
754
755 vmw_stdu_populate_update(cmd, stdu->base.unit,
756 ddirty->left, ddirty->right,
757 ddirty->top, ddirty->bottom);
758
759 vmw_fifo_commit(dev_priv, sizeof(*cmd));
760 }
761
762out_cleanup:
763 ddirty->left = ddirty->top = S32_MAX;
764 ddirty->right = ddirty->bottom = S32_MIN;
765}
766
6bf6bf03
TH
767/**
768 * vmw_kms_stdu_dma - Perform a DMA transfer between a dma-buffer backed
769 * framebuffer and the screen target system.
770 *
771 * @dev_priv: Pointer to the device private structure.
772 * @file_priv: Pointer to a struct drm-file identifying the caller. May be
773 * set to NULL, but then @user_fence_rep must also be set to NULL.
774 * @vfb: Pointer to the dma-buffer backed framebuffer.
775 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
776 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
777 * be NULL.
778 * @num_clips: Number of clip rects in @clips or @vclips.
779 * @increment: Increment to use when looping over @clips or @vclips.
780 * @to_surface: Whether to DMA to the screen target system as opposed to
781 * from the screen target system.
782 * @interruptible: Whether to perform waits interruptible if possible.
783 *
784 * If DMA-ing till the screen target system, the function will also notify
785 * the screen target system that a bounding box of the cliprects has been
786 * updated.
787 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
788 * interrupted.
789 */
790int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
791 struct drm_file *file_priv,
792 struct vmw_framebuffer *vfb,
793 struct drm_vmw_fence_rep __user *user_fence_rep,
794 struct drm_clip_rect *clips,
795 struct drm_vmw_rect *vclips,
796 uint32_t num_clips,
797 int increment,
798 bool to_surface,
799 bool interruptible)
800{
801 struct vmw_dma_buffer *buf =
802 container_of(vfb, struct vmw_framebuffer_dmabuf, base)->buffer;
803 struct vmw_stdu_dirty ddirty;
804 int ret;
805
806 ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, interruptible,
807 false);
808 if (ret)
809 return ret;
810
811 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
812 SVGA3D_READ_HOST_VRAM;
813 ddirty.left = ddirty.top = S32_MAX;
814 ddirty.right = ddirty.bottom = S32_MIN;
815 ddirty.pitch = vfb->base.pitches[0];
816 ddirty.buf = buf;
817 ddirty.base.fifo_commit = vmw_stdu_dmabuf_fifo_commit;
818 ddirty.base.clip = vmw_stdu_dmabuf_clip;
819 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
820 num_clips * sizeof(SVGA3dCopyBox) +
821 sizeof(SVGA3dCmdSurfaceDMASuffix);
822 if (to_surface)
823 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
824
810b3e16
SY
825 /* 2D VMs cannot use SVGA_3D_CMD_SURFACE_DMA so do CPU blit instead */
826 if (!(dev_priv->capabilities & SVGA_CAP_3D)) {
827 ddirty.base.fifo_commit = vmw_stdu_dmabuf_cpu_commit;
828 ddirty.base.clip = vmw_stdu_dmabuf_cpu_clip;
829 ddirty.base.fifo_reserve_size = 0;
830 }
831
6bf6bf03
TH
832 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
833 0, 0, num_clips, increment, &ddirty.base);
834 vmw_kms_helper_buffer_finish(dev_priv, file_priv, buf, NULL,
835 user_fence_rep);
836
837 return ret;
838}
839
840/**
841 * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
842 *
843 * @dirty: The closure structure.
844 *
845 * Encodes a surface copy command cliprect and updates the bounding box
846 * for the copy.
847 */
848static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
849{
850 struct vmw_stdu_dirty *sdirty =
851 container_of(dirty, struct vmw_stdu_dirty, base);
852 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
853 struct vmw_screen_target_display_unit *stdu =
854 container_of(dirty->unit, typeof(*stdu), base);
855
856 if (sdirty->sid != stdu->display_srf->res.id) {
857 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
858
859 blit += dirty->num_hits;
860 blit->srcx = dirty->fb_x;
861 blit->srcy = dirty->fb_y;
862 blit->x = dirty->unit_x1;
863 blit->y = dirty->unit_y1;
864 blit->d = 1;
865 blit->w = dirty->unit_x2 - dirty->unit_x1;
866 blit->h = dirty->unit_y2 - dirty->unit_y1;
867 }
868
869 dirty->num_hits++;
870
871 /* Destination bounding box */
872 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
873 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
874 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
875 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
876}
877
878/**
879 * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
880 * copy command.
881 *
882 * @dirty: The closure structure.
883 *
884 * Fills in the missing fields in a surface copy command, and encodes a screen
885 * target update command.
886 */
887static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
888{
889 struct vmw_stdu_dirty *sdirty =
890 container_of(dirty, struct vmw_stdu_dirty, base);
891 struct vmw_screen_target_display_unit *stdu =
892 container_of(dirty->unit, typeof(*stdu), base);
893 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
894 struct vmw_stdu_update *update;
895 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
896 size_t commit_size;
897
898 if (!dirty->num_hits) {
899 vmw_fifo_commit(dirty->dev_priv, 0);
900 return;
901 }
902
903 if (sdirty->sid != stdu->display_srf->res.id) {
904 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
905
906 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
907 cmd->header.size = sizeof(cmd->body) + blit_size;
908 cmd->body.src.sid = sdirty->sid;
909 cmd->body.dest.sid = stdu->display_srf->res.id;
910 update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
911 commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
912 } else {
913 update = dirty->cmd;
914 commit_size = sizeof(*update);
915 }
916
917 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
918 sdirty->right, sdirty->top, sdirty->bottom);
919
920 vmw_fifo_commit(dirty->dev_priv, commit_size);
921
922 sdirty->left = sdirty->top = S32_MAX;
923 sdirty->right = sdirty->bottom = S32_MIN;
924}
925
926/**
927 * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
928 *
929 * @dev_priv: Pointer to the device private structure.
930 * @framebuffer: Pointer to the surface-buffer backed framebuffer.
931 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
932 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
933 * be NULL.
934 * @srf: Pointer to surface to blit from. If NULL, the surface attached
935 * to @framebuffer will be used.
936 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
937 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
938 * @num_clips: Number of clip rects in @clips.
939 * @inc: Increment to use when looping over @clips.
940 * @out_fence: If non-NULL, will return a ref-counted pointer to a
941 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
942 * case the device has already synchronized.
943 *
944 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
945 * interrupted.
946 */
947int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
948 struct vmw_framebuffer *framebuffer,
949 struct drm_clip_rect *clips,
950 struct drm_vmw_rect *vclips,
951 struct vmw_resource *srf,
952 s32 dest_x,
953 s32 dest_y,
954 unsigned num_clips, int inc,
955 struct vmw_fence_obj **out_fence)
956{
957 struct vmw_framebuffer_surface *vfbs =
958 container_of(framebuffer, typeof(*vfbs), base);
959 struct vmw_stdu_dirty sdirty;
960 int ret;
961
962 if (!srf)
963 srf = &vfbs->surface->res;
964
965 ret = vmw_kms_helper_resource_prepare(srf, true);
966 if (ret)
967 return ret;
968
969 if (vfbs->is_dmabuf_proxy) {
970 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
971 if (ret)
972 goto out_finish;
973 }
974
975 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
976 sdirty.base.clip = vmw_kms_stdu_surface_clip;
977 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
978 sizeof(SVGA3dCopyBox) * num_clips +
979 sizeof(struct vmw_stdu_update);
980 sdirty.sid = srf->id;
981 sdirty.left = sdirty.top = S32_MAX;
982 sdirty.right = sdirty.bottom = S32_MIN;
983
984 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
985 dest_x, dest_y, num_clips, inc,
986 &sdirty.base);
987out_finish:
988 vmw_kms_helper_resource_finish(srf, out_fence);
989
990 return ret;
991}
992
35c05125
SY
993
994/*
995 * Screen Target CRTC dispatch table
996 */
d7955fcf 997static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
35c05125
SY
998 .gamma_set = vmw_du_crtc_gamma_set,
999 .destroy = vmw_stdu_crtc_destroy,
9c2542a4
SY
1000 .reset = vmw_du_crtc_reset,
1001 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
1002 .atomic_destroy_state = vmw_du_crtc_destroy_state,
904bb5e5 1003 .set_config = vmw_kms_set_config,
35c05125
SY
1004 .page_flip = vmw_stdu_crtc_page_flip,
1005};
1006
1007
1008
1009/******************************************************************************
1010 * Screen Target Display Unit Encoder Functions
1011 *****************************************************************************/
1012
1013/**
1014 * vmw_stdu_encoder_destroy - cleans up the STDU
1015 *
1016 * @encoder: used the get the containing STDU
1017 *
1018 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
1019 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
1020 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
1021 * get called.
1022 */
1023static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
1024{
1025 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
1026}
1027
d7955fcf 1028static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
35c05125
SY
1029 .destroy = vmw_stdu_encoder_destroy,
1030};
1031
1032
1033
1034/******************************************************************************
1035 * Screen Target Display Unit Connector Functions
1036 *****************************************************************************/
1037
1038/**
1039 * vmw_stdu_connector_destroy - cleans up the STDU
1040 *
1041 * @connector: used to get the containing STDU
1042 *
1043 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
1044 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
1045 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
1046 * get called.
1047 */
1048static void vmw_stdu_connector_destroy(struct drm_connector *connector)
1049{
1050 vmw_stdu_destroy(vmw_connector_to_stdu(connector));
1051}
1052
1053
1054
d7955fcf 1055static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
35c05125 1056 .dpms = vmw_du_connector_dpms,
35c05125
SY
1057 .detect = vmw_du_connector_detect,
1058 .fill_modes = vmw_du_connector_fill_modes,
1059 .set_property = vmw_du_connector_set_property,
1060 .destroy = vmw_stdu_connector_destroy,
d7721ca7
SY
1061 .reset = vmw_du_connector_reset,
1062 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
1063 .atomic_destroy_state = vmw_du_connector_destroy_state,
1064 .atomic_set_property = vmw_du_connector_atomic_set_property,
1065 .atomic_get_property = vmw_du_connector_atomic_get_property,
35c05125
SY
1066};
1067
1068
d947d1b7
SY
1069static const struct
1070drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
1071 .best_encoder = drm_atomic_helper_best_encoder,
1072};
1073
1074
35c05125 1075
36cc79bc
SY
1076/******************************************************************************
1077 * Screen Target Display Plane Functions
1078 *****************************************************************************/
1079
060e2ad5
SY
1080
1081
1082/**
1083 * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
1084 *
1085 * @plane: display plane
1086 * @old_state: Contains the FB to clean up
1087 *
1088 * Unpins the display surface
1089 *
1090 * Returns 0 on success
1091 */
1092static void
1093vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1094 struct drm_plane_state *old_state)
1095{
1096 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1097
810b3e16
SY
1098 if (vps->guest_map.virtual)
1099 ttm_bo_kunmap(&vps->guest_map);
1100
1101 if (vps->host_map.virtual)
1102 ttm_bo_kunmap(&vps->host_map);
1103
060e2ad5
SY
1104 if (vps->surf)
1105 WARN_ON(!vps->pinned);
1106
1107 vmw_du_plane_cleanup_fb(plane, old_state);
1108
1109 vps->content_fb_type = SAME_AS_DISPLAY;
810b3e16 1110 vps->cpp = 0;
060e2ad5
SY
1111}
1112
1113
1114
1115/**
1116 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1117 *
1118 * @plane: display plane
1119 * @new_state: info on the new plane state, including the FB
1120 *
1121 * This function allocates a new display surface if the content is
1122 * backed by a DMA. The display surface is pinned here, and it'll
1123 * be unpinned in .cleanup_fb()
1124 *
1125 * Returns 0 on success
1126 */
1127static int
1128vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1129 struct drm_plane_state *new_state)
1130{
810b3e16 1131 struct vmw_private *dev_priv = vmw_priv(plane->dev);
060e2ad5
SY
1132 struct drm_framebuffer *new_fb = new_state->fb;
1133 struct vmw_framebuffer *vfb;
1134 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1135 enum stdu_content_type new_content_type;
1136 struct vmw_framebuffer_surface *new_vfbs;
1137 struct drm_crtc *crtc = new_state->crtc;
1138 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1139 int ret;
1140
1141 /* No FB to prepare */
1142 if (!new_fb) {
1143 if (vps->surf) {
1144 WARN_ON(vps->pinned != 0);
1145 vmw_surface_unreference(&vps->surf);
1146 }
1147
1148 return 0;
1149 }
1150
1151 vfb = vmw_framebuffer_to_vfb(new_fb);
1152 new_vfbs = (vfb->dmabuf) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1153
1154 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1155 new_vfbs->surface->base_size.height == vdisplay)
1156 new_content_type = SAME_AS_DISPLAY;
1157 else if (vfb->dmabuf)
1158 new_content_type = SEPARATE_DMA;
1159 else
1160 new_content_type = SEPARATE_SURFACE;
1161
1162 if (new_content_type != SAME_AS_DISPLAY) {
1163 struct vmw_surface content_srf;
1164 struct drm_vmw_size display_base_size = {0};
1165
1166 display_base_size.width = hdisplay;
1167 display_base_size.height = vdisplay;
1168 display_base_size.depth = 1;
1169
1170 /*
1171 * If content buffer is a DMA buf, then we have to construct
1172 * surface info
1173 */
1174 if (new_content_type == SEPARATE_DMA) {
1175
1176 switch (new_fb->format->cpp[0]*8) {
1177 case 32:
1178 content_srf.format = SVGA3D_X8R8G8B8;
1179 break;
1180
1181 case 16:
1182 content_srf.format = SVGA3D_R5G6B5;
1183 break;
1184
1185 case 8:
1186 content_srf.format = SVGA3D_P8;
1187 break;
1188
1189 default:
1190 DRM_ERROR("Invalid format\n");
1191 return -EINVAL;
1192 }
1193
1194 content_srf.flags = 0;
1195 content_srf.mip_levels[0] = 1;
1196 content_srf.multisample_count = 0;
1197 } else {
1198 content_srf = *new_vfbs->surface;
1199 }
1200
1201 if (vps->surf) {
1202 struct drm_vmw_size cur_base_size = vps->surf->base_size;
1203
1204 if (cur_base_size.width != display_base_size.width ||
1205 cur_base_size.height != display_base_size.height ||
1206 vps->surf->format != content_srf.format) {
1207 WARN_ON(vps->pinned != 0);
1208 vmw_surface_unreference(&vps->surf);
1209 }
1210
1211 }
1212
1213 if (!vps->surf) {
1214 ret = vmw_surface_gb_priv_define
1215 (crtc->dev,
1216 /* Kernel visible only */
1217 0,
1218 content_srf.flags,
1219 content_srf.format,
1220 true, /* a scanout buffer */
1221 content_srf.mip_levels[0],
1222 content_srf.multisample_count,
1223 0,
1224 display_base_size,
1225 &vps->surf);
1226 if (ret != 0) {
1227 DRM_ERROR("Couldn't allocate STDU surface.\n");
1228 return ret;
1229 }
1230 }
1231 } else {
1232 /*
1233 * prepare_fb and clean_fb should only take care of pinning
1234 * and unpinning. References are tracked by state objects.
1235 * The only time we add a reference in prepare_fb is if the
1236 * state object doesn't have a reference to begin with
1237 */
1238 if (vps->surf) {
1239 WARN_ON(vps->pinned != 0);
1240 vmw_surface_unreference(&vps->surf);
1241 }
1242
1243 vps->surf = vmw_surface_reference(new_vfbs->surface);
1244 }
1245
1246 if (vps->surf) {
1247
1248 /* Pin new surface before flipping */
1249 ret = vmw_resource_pin(&vps->surf->res, false);
1250 if (ret)
1251 goto out_srf_unref;
1252
1253 vps->pinned++;
1254 }
1255
1256 vps->content_fb_type = new_content_type;
810b3e16
SY
1257
1258 /*
1259 * This should only happen if the DMA buf is too large to create a
1260 * proxy surface for.
1261 * If we are a 2D VM with a DMA buffer then we have to use CPU blit
1262 * so cache these mappings
1263 */
1264 if (vps->content_fb_type == SEPARATE_DMA &&
1265 !(dev_priv->capabilities & SVGA_CAP_3D)) {
1266
1267 struct vmw_framebuffer_dmabuf *new_vfbd;
1268
1269 new_vfbd = vmw_framebuffer_to_vfbd(new_fb);
1270
1271 ret = ttm_bo_reserve(&new_vfbd->buffer->base, false, false,
1272 NULL);
1273 if (ret)
1274 goto out_srf_unpin;
1275
1276 ret = ttm_bo_kmap(&new_vfbd->buffer->base, 0,
1277 new_vfbd->buffer->base.num_pages,
1278 &vps->guest_map);
1279
1280 ttm_bo_unreserve(&new_vfbd->buffer->base);
1281
1282 if (ret) {
1283 DRM_ERROR("Failed to map content buffer to CPU\n");
1284 goto out_srf_unpin;
1285 }
1286
1287 ret = ttm_bo_kmap(&vps->surf->res.backup->base, 0,
1288 vps->surf->res.backup->base.num_pages,
1289 &vps->host_map);
1290 if (ret) {
1291 DRM_ERROR("Failed to map display buffer to CPU\n");
1292 ttm_bo_kunmap(&vps->guest_map);
1293 goto out_srf_unpin;
1294 }
1295
1296 vps->cpp = new_fb->pitches[0] / new_fb->width;
1297 }
1298
060e2ad5
SY
1299 return 0;
1300
810b3e16
SY
1301out_srf_unpin:
1302 vmw_resource_unpin(&vps->surf->res);
1303 vps->pinned--;
1304
060e2ad5
SY
1305out_srf_unref:
1306 vmw_surface_unreference(&vps->surf);
1307 return ret;
1308}
1309
1310
1311
1312/**
1313 * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1314 *
1315 * @plane: display plane
1316 * @old_state: Only used to get crtc info
1317 *
1318 * Formally update stdu->display_srf to the new plane, and bind the new
1319 * plane STDU. This function is called during the commit phase when
1320 * all the preparation have been done and all the configurations have
1321 * been checked.
1322 */
1323static void
1324vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1325 struct drm_plane_state *old_state)
1326{
1327 struct vmw_private *dev_priv;
1328 struct vmw_screen_target_display_unit *stdu;
1329 struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1330 struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc;
1331 int ret;
1332
1333 stdu = vmw_crtc_to_stdu(crtc);
1334 dev_priv = vmw_priv(crtc->dev);
1335
1336 stdu->display_srf = vps->surf;
1337 stdu->content_fb_type = vps->content_fb_type;
810b3e16
SY
1338 stdu->cpp = vps->cpp;
1339 memcpy(&stdu->guest_map, &vps->guest_map, sizeof(vps->guest_map));
1340 memcpy(&stdu->host_map, &vps->host_map, sizeof(vps->host_map));
060e2ad5
SY
1341
1342 if (!stdu->defined)
1343 return;
1344
1345 if (plane->state->fb)
1346 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1347 else
1348 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1349
1350 /*
1351 * We cannot really fail this function, so if we do, then output an
1352 * error and quit
1353 */
1354 if (ret)
1355 DRM_ERROR("Failed to bind surface to STDU.\n");
1356 else
1357 crtc->primary->fb = plane->state->fb;
8a309c8a
SY
1358
1359 ret = vmw_stdu_update_st(dev_priv, stdu);
1360
1361 if (ret)
1362 DRM_ERROR("Failed to update STDU.\n");
060e2ad5
SY
1363}
1364
1365
36cc79bc 1366static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
904bb5e5
SY
1367 .update_plane = drm_atomic_helper_update_plane,
1368 .disable_plane = drm_atomic_helper_disable_plane,
36cc79bc 1369 .destroy = vmw_du_primary_plane_destroy,
cc5ec459
SY
1370 .reset = vmw_du_plane_reset,
1371 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1372 .atomic_destroy_state = vmw_du_plane_destroy_state,
36cc79bc
SY
1373};
1374
1375static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
904bb5e5
SY
1376 .update_plane = drm_atomic_helper_update_plane,
1377 .disable_plane = drm_atomic_helper_disable_plane,
36cc79bc 1378 .destroy = vmw_du_cursor_plane_destroy,
cc5ec459
SY
1379 .reset = vmw_du_plane_reset,
1380 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1381 .atomic_destroy_state = vmw_du_plane_destroy_state,
36cc79bc
SY
1382};
1383
1384
06ec4190
SY
1385/*
1386 * Atomic Helpers
1387 */
060e2ad5
SY
1388static const struct
1389drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1390 .atomic_check = vmw_du_cursor_plane_atomic_check,
1391 .atomic_update = vmw_du_cursor_plane_atomic_update,
1392 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
1393 .cleanup_fb = vmw_du_plane_cleanup_fb,
1394};
1395
1396static const struct
1397drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1398 .atomic_check = vmw_du_primary_plane_atomic_check,
1399 .atomic_update = vmw_stdu_primary_plane_atomic_update,
1400 .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1401 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1402};
1403
06ec4190
SY
1404static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1405 .prepare = vmw_stdu_crtc_helper_prepare,
1406 .commit = vmw_stdu_crtc_helper_commit,
1407 .disable = vmw_stdu_crtc_helper_disable,
06ec4190
SY
1408 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1409 .atomic_check = vmw_du_crtc_atomic_check,
1410 .atomic_begin = vmw_du_crtc_atomic_begin,
1411 .atomic_flush = vmw_du_crtc_atomic_flush,
1412};
1413
1414
35c05125
SY
1415/**
1416 * vmw_stdu_init - Sets up a Screen Target Display Unit
1417 *
1418 * @dev_priv: VMW DRM device
1419 * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1420 *
1421 * This function is called once per CRTC, and allocates one Screen Target
1422 * display unit to represent that CRTC. Since the SVGA device does not separate
1423 * out encoder and connector, they are represented as part of the STDU as well.
1424 */
1425static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1426{
1427 struct vmw_screen_target_display_unit *stdu;
1428 struct drm_device *dev = dev_priv->dev;
1429 struct drm_connector *connector;
1430 struct drm_encoder *encoder;
36cc79bc 1431 struct drm_plane *primary, *cursor;
35c05125 1432 struct drm_crtc *crtc;
36cc79bc 1433 int ret;
35c05125
SY
1434
1435
1436 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1437 if (!stdu)
1438 return -ENOMEM;
1439
1440 stdu->base.unit = unit;
1441 crtc = &stdu->base.crtc;
1442 encoder = &stdu->base.encoder;
1443 connector = &stdu->base.connector;
36cc79bc
SY
1444 primary = &stdu->base.primary;
1445 cursor = &stdu->base.cursor;
35c05125
SY
1446
1447 stdu->base.pref_active = (unit == 0);
1448 stdu->base.pref_width = dev_priv->initial_width;
1449 stdu->base.pref_height = dev_priv->initial_height;
9c2542a4
SY
1450
1451 /*
1452 * Remove this after enabling atomic because property values can
1453 * only exist in a state object
1454 */
2e69b25b 1455 stdu->base.is_implicit = false;
35c05125 1456
36cc79bc 1457 /* Initialize primary plane */
cc5ec459
SY
1458 vmw_du_plane_reset(primary);
1459
36cc79bc
SY
1460 ret = drm_universal_plane_init(dev, primary,
1461 0, &vmw_stdu_plane_funcs,
1462 vmw_primary_plane_formats,
1463 ARRAY_SIZE(vmw_primary_plane_formats),
1464 DRM_PLANE_TYPE_PRIMARY, NULL);
1465 if (ret) {
1466 DRM_ERROR("Failed to initialize primary plane");
1467 goto err_free;
1468 }
1469
060e2ad5
SY
1470 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1471
36cc79bc 1472 /* Initialize cursor plane */
cc5ec459
SY
1473 vmw_du_plane_reset(cursor);
1474
36cc79bc
SY
1475 ret = drm_universal_plane_init(dev, cursor,
1476 0, &vmw_stdu_cursor_funcs,
1477 vmw_cursor_plane_formats,
1478 ARRAY_SIZE(vmw_cursor_plane_formats),
1479 DRM_PLANE_TYPE_CURSOR, NULL);
1480 if (ret) {
1481 DRM_ERROR("Failed to initialize cursor plane");
1482 drm_plane_cleanup(&stdu->base.primary);
1483 goto err_free;
1484 }
1485
060e2ad5
SY
1486 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1487
d7721ca7
SY
1488 vmw_du_connector_reset(connector);
1489
36cc79bc
SY
1490 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1491 DRM_MODE_CONNECTOR_VIRTUAL);
1492 if (ret) {
1493 DRM_ERROR("Failed to initialize connector\n");
1494 goto err_free;
1495 }
d947d1b7
SY
1496
1497 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
35c05125 1498 connector->status = vmw_du_connector_detect(connector, false);
d7721ca7 1499 vmw_connector_state_to_vcs(connector->state)->is_implicit = false;
35c05125 1500
36cc79bc
SY
1501 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1502 DRM_MODE_ENCODER_VIRTUAL, NULL);
1503 if (ret) {
1504 DRM_ERROR("Failed to initialize encoder\n");
1505 goto err_free_connector;
1506 }
1507
1508 (void) drm_mode_connector_attach_encoder(connector, encoder);
35c05125
SY
1509 encoder->possible_crtcs = (1 << unit);
1510 encoder->possible_clones = 0;
1511
36cc79bc
SY
1512 ret = drm_connector_register(connector);
1513 if (ret) {
1514 DRM_ERROR("Failed to register connector\n");
1515 goto err_free_encoder;
1516 }
35c05125 1517
d7721ca7 1518 vmw_du_crtc_reset(crtc);
36cc79bc
SY
1519 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1520 &stdu->base.cursor,
1521 &vmw_stdu_crtc_funcs, NULL);
1522 if (ret) {
1523 DRM_ERROR("Failed to initialize CRTC\n");
1524 goto err_free_unregister;
1525 }
35c05125 1526
06ec4190
SY
1527 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1528
35c05125
SY
1529 drm_mode_crtc_set_gamma_size(crtc, 256);
1530
578e609a
TH
1531 drm_object_attach_property(&connector->base,
1532 dev_priv->hotplug_mode_update_property, 1);
1533 drm_object_attach_property(&connector->base,
1534 dev->mode_config.suggested_x_property, 0);
1535 drm_object_attach_property(&connector->base,
1536 dev->mode_config.suggested_y_property, 0);
76404ac0
TH
1537 if (dev_priv->implicit_placement_property)
1538 drm_object_attach_property
1539 (&connector->base,
1540 dev_priv->implicit_placement_property,
1541 stdu->base.is_implicit);
35c05125 1542 return 0;
36cc79bc
SY
1543
1544err_free_unregister:
1545 drm_connector_unregister(connector);
1546err_free_encoder:
1547 drm_encoder_cleanup(encoder);
1548err_free_connector:
1549 drm_connector_cleanup(connector);
1550err_free:
1551 kfree(stdu);
1552 return ret;
35c05125
SY
1553}
1554
1555
1556
1557/**
1558 * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1559 *
1560 * @stdu: Screen Target Display Unit to be destroyed
1561 *
1562 * Clean up after vmw_stdu_init
1563 */
1564static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1565{
35c05125
SY
1566 vmw_du_cleanup(&stdu->base);
1567 kfree(stdu);
1568}
1569
1570
1571
1572/******************************************************************************
1573 * Screen Target Display KMS Functions
1574 *
1575 * These functions are called by the common KMS code in vmwgfx_kms.c
1576 *****************************************************************************/
1577
1578/**
1579 * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1580 *
1581 * @dev_priv: VMW DRM device
1582 *
1583 * This function initialize a Screen Target based display device. It checks
1584 * the capability bits to make sure the underlying hardware can support
1585 * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1586 * Units, as supported by the display hardware.
1587 *
1588 * RETURNS:
1589 * 0 on success, error code otherwise
1590 */
1591int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1592{
1593 struct drm_device *dev = dev_priv->dev;
1594 int i, ret;
1595
1596
1597 /* Do nothing if Screen Target support is turned off */
1598 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1599 return -ENOSYS;
1600
f89c6c32 1601 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
35c05125
SY
1602 return -ENOSYS;
1603
1604 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1605 if (unlikely(ret != 0))
1606 return ret;
1607
6bf6bf03
TH
1608 dev_priv->active_display_unit = vmw_du_screen_target;
1609
28c95429
SY
1610 if (dev_priv->capabilities & SVGA_CAP_3D) {
1611 /*
1612 * For 3D VMs, display (scanout) buffer size is the smaller of
1613 * max texture and max STDU
1614 */
1615 uint32_t max_width, max_height;
1616
1617 max_width = min(dev_priv->texture_max_width,
1618 dev_priv->stdu_max_width);
1619 max_height = min(dev_priv->texture_max_height,
1620 dev_priv->stdu_max_height);
1621
1622 dev->mode_config.max_width = max_width;
1623 dev->mode_config.max_height = max_height;
1624 } else {
810b3e16
SY
1625 /*
1626 * Given various display aspect ratios, there's no way to
1627 * estimate these using prim_bb_mem. So just set these to
1628 * something arbitrarily large and we will reject any layout
1629 * that doesn't fit prim_bb_mem later
1630 */
1631 dev->mode_config.max_width = 16384;
1632 dev->mode_config.max_height = 16384;
1633 }
1634
76404ac0
TH
1635 vmw_kms_create_implicit_placement_property(dev_priv, false);
1636
35c05125
SY
1637 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1638 ret = vmw_stdu_init(dev_priv, i);
1639
1640 if (unlikely(ret != 0)) {
1641 DRM_ERROR("Failed to initialize STDU %d", i);
1642 goto err_vblank_cleanup;
1643 }
1644 }
1645
35c05125
SY
1646 DRM_INFO("Screen Target Display device initialized\n");
1647
1648 return 0;
1649
1650err_vblank_cleanup:
1651 drm_vblank_cleanup(dev);
1652 return ret;
1653}
1654
1655
1656
1657/**
1658 * vmw_kms_stdu_close_display - Cleans up after vmw_kms_stdu_init_display
1659 *
1660 * @dev_priv: VMW DRM device
1661 *
1662 * Frees up any resources allocated by vmw_kms_stdu_init_display
1663 *
1664 * RETURNS:
1665 * 0 on success
1666 */
1667int vmw_kms_stdu_close_display(struct vmw_private *dev_priv)
1668{
1669 struct drm_device *dev = dev_priv->dev;
1670
1671 drm_vblank_cleanup(dev);
1672
1673 return 0;
1674}
This page took 0.429915 seconds and 4 git commands to generate.