[linux.git] / drivers / ide / pci / it8213.c

/*
 * ITE 8213 IDE driver
 *
 * Copyright (C) 2006 Jack Lee
 * Copyright (C) 2006 Alan Cox
 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>

#include <asm/io.h>

/**
 *	it8213_dma_2_pio		-	return the PIO mode matching DMA
 *	@xfer_rate: transfer speed
 *
 *	Returns the nearest equivalent PIO timing for the DMA
 *	mode requested by the controller.
 */

static u8 it8213_dma_2_pio (u8 xfer_rate) {
	switch(xfer_rate) {
		case XFER_UDMA_6:
		case XFER_UDMA_5:
		case XFER_UDMA_4:
		case XFER_UDMA_3:
		case XFER_UDMA_2:
		case XFER_UDMA_1:
		case XFER_UDMA_0:
		case XFER_MW_DMA_2:
			return 4;
		case XFER_MW_DMA_1:
			return 3;
		case XFER_SW_DMA_2:
			return 2;
		case XFER_MW_DMA_0:
		case XFER_SW_DMA_1:
		case XFER_SW_DMA_0:
		default:
			return 0;
	}
}

/**
 *	it8213_set_pio_mode	-	set host controller for PIO mode
 *	@drive: drive
 *	@pio: PIO mode number
 *
 *	Set the interface PIO mode.
 */

static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	ide_hwif_t *hwif	= HWIF(drive);
	struct pci_dev *dev	= hwif->pci_dev;
	int is_slave		= drive->dn & 1;
	int master_port		= 0x40;
	int slave_port		= 0x44;
	unsigned long flags;
	u16 master_data;
	u8 slave_data;
	static DEFINE_SPINLOCK(tune_lock);
	int control = 0;

	static const u8 timings[][2]= {
					{ 0, 0 },
					{ 0, 0 },
					{ 1, 0 },
					{ 2, 1 },
					{ 2, 3 }, };

	spin_lock_irqsave(&tune_lock, flags);
	pci_read_config_word(dev, master_port, &master_data);

	if (pio > 1)
		control |= 1;	/* Programmable timing on */
	if (drive->media != ide_disk)
		control |= 4;	/* ATAPI */
	if (pio > 2)
		control |= 2;	/* IORDY */
	if (is_slave) {
		master_data |=  0x4000;
		master_data &= ~0x0070;
		if (pio > 1)
			master_data = master_data | (control << 4);
		pci_read_config_byte(dev, slave_port, &slave_data);
		slave_data = slave_data & 0xf0;
		slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
	} else {
		master_data &= ~0x3307;
		if (pio > 1)
			master_data = master_data | control;
		master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
	}
	pci_write_config_word(dev, master_port, master_data);
	if (is_slave)
		pci_write_config_byte(dev, slave_port, slave_data);
	spin_unlock_irqrestore(&tune_lock, flags);
}

/**
 *	it8213_set_dma_mode	-	set host controller for DMA mode
 *	@drive: drive
 *	@speed: DMA mode
 *
 *	Tune the ITE chipset for the DMA mode.
 */

static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
{
	ide_hwif_t *hwif	= HWIF(drive);
	struct pci_dev *dev	= hwif->pci_dev;
	u8 maslave		= 0x40;
	int a_speed		= 3 << (drive->dn * 4);
	int u_flag		= 1 << drive->dn;
	int v_flag		= 0x01 << drive->dn;
	int w_flag		= 0x10 << drive->dn;
	int u_speed		= 0;
	u16			reg4042, reg4a;
	u8			reg48, reg54, reg55;

	pci_read_config_word(dev, maslave, &reg4042);
	pci_read_config_byte(dev, 0x48, &reg48);
	pci_read_config_word(dev, 0x4a, &reg4a);
	pci_read_config_byte(dev, 0x54, &reg54);
	pci_read_config_byte(dev, 0x55, &reg55);

	switch(speed) {
		case XFER_UDMA_6:
		case XFER_UDMA_4:
		case XFER_UDMA_2:	u_speed = 2 << (drive->dn * 4); break;
		case XFER_UDMA_5:
		case XFER_UDMA_3:
		case XFER_UDMA_1:	u_speed = 1 << (drive->dn * 4); break;
		case XFER_UDMA_0:	u_speed = 0 << (drive->dn * 4); break;
			break;
		case XFER_MW_DMA_2:
		case XFER_MW_DMA_1:
		case XFER_SW_DMA_2:
			break;
		default:
			return;
	}

	if (speed >= XFER_UDMA_0) {
		if (!(reg48 & u_flag))
			pci_write_config_byte(dev, 0x48, reg48 | u_flag);
		if (speed >= XFER_UDMA_5) {
			pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
		} else {
			pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
		}

		if ((reg4a & a_speed) != u_speed)
			pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
		if (speed > XFER_UDMA_2) {
			if (!(reg54 & v_flag))
				pci_write_config_byte(dev, 0x54, reg54 | v_flag);
		} else
			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
	} else {
		if (reg48 & u_flag)
			pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
		if (reg4a & a_speed)
			pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
		if (reg54 & v_flag)
			pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
		if (reg55 & w_flag)
			pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
	}

	it8213_set_pio_mode(drive, it8213_dma_2_pio(speed));
}

/**
 *	it8213_configure_drive_for_dma	-	set up for DMA transfers
 *	@drive: drive we are going to set up
 *
 *	Set up the drive for DMA, tune the controller and drive as
 *	required. If the drive isn't suitable for DMA or we hit
 *	other problems then we will drop down to PIO and set up
 *	PIO appropriately
 */

static int it8213_config_drive_for_dma (ide_drive_t *drive)
{
	if (ide_tune_dma(drive))
		return 0;

	ide_set_max_pio(drive);

	return -1;
}

/**
 *	init_hwif_it8213	-	set up hwif structs
 *	@hwif: interface to set up
 *
 *	We do the basic set up of the interface structure. The IT8212
 *	requires several custom handlers so we override the default
 *	ide DMA handlers appropriately
 */

static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
{
	u8 reg42h = 0;

	hwif->set_dma_mode = &it8213_set_dma_mode;
	hwif->set_pio_mode = &it8213_set_pio_mode;

	hwif->autodma = 0;

	hwif->drives[0].autotune = 1;
	hwif->drives[1].autotune = 1;

	if (!hwif->dma_base)
		return;

	hwif->atapi_dma = 1;
	hwif->ultra_mask = 0x7f;
	hwif->mwdma_mask = 0x06;
	hwif->swdma_mask = 0x04;

	pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);

	hwif->ide_dma_check = &it8213_config_drive_for_dma;

	if (hwif->cbl != ATA_CBL_PATA40_SHORT)
		hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;

	/*
	 *	The BIOS often doesn't set up DMA on this controller
	 *	so we always do it.
	 */
	if (!noautodma)
		hwif->autodma = 1;

	hwif->drives[0].autodma = hwif->autodma;
	hwif->drives[1].autodma = hwif->autodma;
}


#define DECLARE_ITE_DEV(name_str)			\
	{						\
		.name		= name_str,		\
		.init_hwif	= init_hwif_it8213,	\
		.autodma	= AUTODMA,		\
		.enablebits	= {{0x41,0x80,0x80}}, \
		.bootable	= ON_BOARD,		\
		.host_flags	= IDE_HFLAG_SINGLE,	\
		.pio_mask	= ATA_PIO4,		\
	}

static ide_pci_device_t it8213_chipsets[] __devinitdata = {
	/* 0 */ DECLARE_ITE_DEV("IT8213"),
};


/**
 *	it8213_init_one	-	pci layer discovery entry
 *	@dev: PCI device
 *	@id: ident table entry
 *
 *	Called by the PCI code when it finds an ITE8213 controller. As
 *	this device follows the standard interfaces we can use the
 *	standard helper functions to do almost all the work for us.
 */

static int __devinit it8213_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
	return 0;
}


static struct pci_device_id it8213_pci_tbl[] = {
	{ PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
	{ 0, },
};

MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);

static struct pci_driver driver = {
	.name		= "ITE8213_IDE",
	.id_table	= it8213_pci_tbl,
	.probe		= it8213_init_one,
};

static int __init it8213_ide_init(void)
{
	return ide_pci_register_driver(&driver);
}

module_init(it8213_ide_init);

MODULE_AUTHOR("Jack Lee, Alan Cox");
MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
MODULE_LICENSE("GPL");
Commit	Line	Data
67881826 BZ	1	/*
	2	* ITE 8213 IDE driver
	3	*
	4	* Copyright (C) 2006 Jack Lee
	5	* Copyright (C) 2006 Alan Cox
	6	* Copyright (C) 2007 Bartlomiej Zolnierkiewicz
	7	*/
	8
9c6712c0 JL	9	#include <linux/kernel.h>
	10	#include <linux/types.h>
	11	#include <linux/module.h>
	12	#include <linux/pci.h>
	13	#include <linux/delay.h>
	14	#include <linux/hdreg.h>
	15	#include <linux/ide.h>
	16	#include <linux/init.h>
	17
	18	#include <asm/io.h>
	19
9c6712c0 JL	20	/**
	21	* it8213_dma_2_pio - return the PIO mode matching DMA
	22	* @xfer_rate: transfer speed
	23	*
68aaf815	24	* Returns the nearest equivalent PIO timing for the DMA
9c6712c0 JL	25	* mode requested by the controller.
	26	*/
	27
	28	static u8 it8213_dma_2_pio (u8 xfer_rate) {
	29	switch(xfer_rate) {
	30	case XFER_UDMA_6:
	31	case XFER_UDMA_5:
	32	case XFER_UDMA_4:
	33	case XFER_UDMA_3:
	34	case XFER_UDMA_2:
	35	case XFER_UDMA_1:
	36	case XFER_UDMA_0:
	37	case XFER_MW_DMA_2:
9c6712c0 JL	38	return 4;
9c6712c0 JL	39	case XFER_MW_DMA_1:
9c6712c0 JL	40	return 3;
9c6712c0 JL	41	case XFER_SW_DMA_2:
9c6712c0 JL	42	return 2;
	43	case XFER_MW_DMA_0:
	44	case XFER_SW_DMA_1:
	45	case XFER_SW_DMA_0:
9c6712c0 JL	46	default:
	47	return 0;
	48	}
	49	}
	50
88b2b32b BZ	51	/**
	52	* it8213_set_pio_mode - set host controller for PIO mode
	53	* @drive: drive
	54	* @pio: PIO mode number
9c6712c0	55	*
67881826	56	* Set the interface PIO mode.
9c6712c0 JL	57	*/
9c6712c0 JL	58
88b2b32b	59	static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
9c6712c0 JL	60	{
	61	ide_hwif_t *hwif = HWIF(drive);
	62	struct pci_dev *dev = hwif->pci_dev;
67881826	63	int is_slave = drive->dn & 1;
9c6712c0 JL	64	int master_port = 0x40;
	65	int slave_port = 0x44;
	66	unsigned long flags;
	67	u16 master_data;
	68	u8 slave_data;
67881826 BZ	69	static DEFINE_SPINLOCK(tune_lock);
67881826 BZ	70	int control = 0;
9c6712c0	71
67881826 BZ	72	static const u8 timings[][2]= {
	73	{ 0, 0 },
	74	{ 0, 0 },
	75	{ 1, 0 },
	76	{ 2, 1 },
	77	{ 2, 3 }, };
9c6712c0	78
9c6712c0 JL	79	spin_lock_irqsave(&tune_lock, flags);
9c6712c0 JL	80	pci_read_config_word(dev, master_port, &master_data);
67881826 BZ	81
	82	if (pio > 1)
	83	control \|= 1; /* Programmable timing on */
	84	if (drive->media != ide_disk)
	85	control \|= 4; /* ATAPI */
	86	if (pio > 2)
	87	control \|= 2; /* IORDY */
9c6712c0	88	if (is_slave) {
67881826 BZ	89	master_data \|= 0x4000;
67881826 BZ	90	master_data &= ~0x0070;
9c6712c0	91	if (pio > 1)
67881826	92	master_data = master_data \| (control << 4);
9c6712c0 JL	93	pci_read_config_byte(dev, slave_port, &slave_data);
9c6712c0 JL	94	slave_data = slave_data & 0xf0;
67881826	95	slave_data = slave_data \| (timings[pio][0] << 2) \| timings[pio][1];
9c6712c0	96	} else {
67881826	97	master_data &= ~0x3307;
9c6712c0	98	if (pio > 1)
67881826	99	master_data = master_data \| control;
9c6712c0 JL	100	master_data = master_data \| (timings[pio][0] << 12) \| (timings[pio][1] << 8);
	101	}
	102	pci_write_config_word(dev, master_port, master_data);
	103	if (is_slave)
	104	pci_write_config_byte(dev, slave_port, slave_data);
	105	spin_unlock_irqrestore(&tune_lock, flags);
	106	}
	107
9c6712c0	108	/**
88b2b32b BZ	109	* it8213_set_dma_mode - set host controller for DMA mode
	110	* @drive: drive
	111	* @speed: DMA mode
9c6712c0	112	*
88b2b32b	113	* Tune the ITE chipset for the DMA mode.
9c6712c0 JL	114	*/
9c6712c0 JL	115
88b2b32b	116	static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
9c6712c0	117	{
9c6712c0 JL	118	ide_hwif_t *hwif = HWIF(drive);
	119	struct pci_dev *dev = hwif->pci_dev;
	120	u8 maslave = 0x40;
9c6712c0 JL	121	int a_speed = 3 << (drive->dn * 4);
	122	int u_flag = 1 << drive->dn;
	123	int v_flag = 0x01 << drive->dn;
	124	int w_flag = 0x10 << drive->dn;
	125	int u_speed = 0;
	126	u16 reg4042, reg4a;
	127	u8 reg48, reg54, reg55;
	128
	129	pci_read_config_word(dev, maslave, &reg4042);
	130	pci_read_config_byte(dev, 0x48, &reg48);
	131	pci_read_config_word(dev, 0x4a, &reg4a);
	132	pci_read_config_byte(dev, 0x54, &reg54);
	133	pci_read_config_byte(dev, 0x55, &reg55);
	134
	135	switch(speed) {
	136	case XFER_UDMA_6:
	137	case XFER_UDMA_4:
67881826	138	case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break;
9c6712c0 JL	139	case XFER_UDMA_5:
9c6712c0 JL	140	case XFER_UDMA_3:
67881826 BZ	141	case XFER_UDMA_1: u_speed = 1 << (drive->dn * 4); break;
67881826 BZ	142	case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break;
9c6712c0 JL	143	break;
	144	case XFER_MW_DMA_2:
	145	case XFER_MW_DMA_1:
67881826	146	case XFER_SW_DMA_2:
9c6712c0	147	break;
9c6712c0	148	default:
88b2b32b	149	return;
9c6712c0 JL	150	}
9c6712c0 JL	151
67881826	152	if (speed >= XFER_UDMA_0) {
9c6712c0 JL	153	if (!(reg48 & u_flag))
	154	pci_write_config_byte(dev, 0x48, reg48 \| u_flag);
	155	if (speed >= XFER_UDMA_5) {
	156	pci_write_config_byte(dev, 0x55, (u8) reg55\|w_flag);
	157	} else {
	158	pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
	159	}
	160
	161	if ((reg4a & a_speed) != u_speed)
	162	pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) \| u_speed);
67881826	163	if (speed > XFER_UDMA_2) {
9c6712c0 JL	164	if (!(reg54 & v_flag))
	165	pci_write_config_byte(dev, 0x54, reg54 \| v_flag);
	166	} else
	167	pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
67881826	168	} else {
9c6712c0 JL	169	if (reg48 & u_flag)
	170	pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
	171	if (reg4a & a_speed)
	172	pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
	173	if (reg54 & v_flag)
	174	pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
	175	if (reg55 & w_flag)
	176	pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
67881826	177	}
68aaf815	178
88b2b32b	179	it8213_set_pio_mode(drive, it8213_dma_2_pio(speed));
67881826	180	}
9c6712c0	181
9c6712c0 JL	182	/**
	183	* it8213_configure_drive_for_dma - set up for DMA transfers
	184	* @drive: drive we are going to set up
	185	*
	186	* Set up the drive for DMA, tune the controller and drive as
	187	* required. If the drive isn't suitable for DMA or we hit
	188	* other problems then we will drop down to PIO and set up
	189	* PIO appropriately
	190	*/
	191
	192	static int it8213_config_drive_for_dma (ide_drive_t *drive)
	193	{
29e744d0	194	if (ide_tune_dma(drive))
3608b5d7	195	return 0;
9c6712c0	196
26bcb879	197	ide_set_max_pio(drive);
9c6712c0	198
3608b5d7	199	return -1;
9c6712c0 JL	200	}
9c6712c0 JL	201
9c6712c0 JL	202	/**
	203	* init_hwif_it8213 - set up hwif structs
	204	* @hwif: interface to set up
	205	*
	206	* We do the basic set up of the interface structure. The IT8212
	207	* requires several custom handlers so we override the default
	208	* ide DMA handlers appropriately
	209	*/
	210
	211	static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
	212	{
49521f97	213	u8 reg42h = 0;
9c6712c0	214
88b2b32b	215	hwif->set_dma_mode = &it8213_set_dma_mode;
26bcb879	216	hwif->set_pio_mode = &it8213_set_pio_mode;
9c6712c0 JL	217
	218	hwif->autodma = 0;
	219
	220	hwif->drives[0].autotune = 1;
	221	hwif->drives[1].autotune = 1;
	222
	223	if (!hwif->dma_base)
67881826 BZ	224	return;
67881826 BZ	225
9c6712c0 JL	226	hwif->atapi_dma = 1;
9c6712c0 JL	227	hwif->ultra_mask = 0x7f;
67881826 BZ	228	hwif->mwdma_mask = 0x06;
67881826 BZ	229	hwif->swdma_mask = 0x04;
9c6712c0 JL	230
9c6712c0 JL	231	pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);
9c6712c0 JL	232
9c6712c0 JL	233	hwif->ide_dma_check = &it8213_config_drive_for_dma;
49521f97 BZ	234
	235	if (hwif->cbl != ATA_CBL_PATA40_SHORT)
	236	hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
9c6712c0 JL	237
	238	/*
	239	* The BIOS often doesn't set up DMA on this controller
	240	* so we always do it.
	241	*/
	242	if (!noautodma)
	243	hwif->autodma = 1;
	244
	245	hwif->drives[0].autodma = hwif->autodma;
	246	hwif->drives[1].autodma = hwif->autodma;
9c6712c0 JL	247	}
	248
	249
	250	#define DECLARE_ITE_DEV(name_str) \
	251	{ \
	252	.name = name_str, \
9c6712c0	253	.init_hwif = init_hwif_it8213, \
67881826	254	.autodma = AUTODMA, \
9c6712c0 JL	255	.enablebits = {{0x41,0x80,0x80}}, \
9c6712c0 JL	256	.bootable = ON_BOARD, \
a5d8c5c8	257	.host_flags = IDE_HFLAG_SINGLE, \
4099d143	258	.pio_mask = ATA_PIO4, \
9c6712c0 JL	259	}
	260
	261	static ide_pci_device_t it8213_chipsets[] __devinitdata = {
	262	/* 0 */ DECLARE_ITE_DEV("IT8213"),
	263	};
	264
	265
	266	/**
	267	* it8213_init_one - pci layer discovery entry
	268	* @dev: PCI device
	269	* @id: ident table entry
	270	*
	271	* Called by the PCI code when it finds an ITE8213 controller. As
	272	* this device follows the standard interfaces we can use the
	273	* standard helper functions to do almost all the work for us.
	274	*/
	275
	276	static int __devinit it8213_init_one(struct pci_dev dev, const struct pci_device_id id)
	277	{
	278	ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
	279	return 0;
	280	}
	281
	282
	283	static struct pci_device_id it8213_pci_tbl[] = {
67881826	284	{ PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
9c6712c0 JL	285	{ 0, },
	286	};
	287
	288	MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
	289
	290	static struct pci_driver driver = {
	291	.name = "ITE8213_IDE",
	292	.id_table = it8213_pci_tbl,
	293	.probe = it8213_init_one,
	294	};
	295
	296	static int __init it8213_ide_init(void)
	297	{
67881826 BZ	298	return ide_pci_register_driver(&driver);
67881826 BZ	299	}
9c6712c0 JL	300
	301	module_init(it8213_ide_init);
	302
67881826	303	MODULE_AUTHOR("Jack Lee, Alan Cox");
9c6712c0 JL	304	MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
9c6712c0 JL	305	MODULE_LICENSE("GPL");