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libertas: rename/document scan_channel
[linux.git] / drivers / net / wireless / iwlwifi / iwl-4965.h
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b481de9c
ZY		 1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <[email protected]>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
fcd427bb
BC		 26/*
27 * Please use this file (iwl-4965.h) for driver implementation definitions.
28 * Please use iwl-4965-commands.h for uCode API definitions.
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
b481de9c
ZY		 32#ifndef __iwl_4965_h__
33#define __iwl_4965_h__
34
5d08cd1d
CH		 35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
5d08cd1d 39/* Hardware specific file defines the PCI IDs table for that hardware module */
bb8c093b 40extern struct pci_device_id iwl4965_hw_card_ids[];
5d08cd1d
CH		 41
42#define DRV_NAME "iwl4965"
43#include "iwl-4965-hw.h"
44#include "iwl-prph.h"
45#include "iwl-4965-debug.h"
46
47/* Default noise level to report when noise measurement is not available.
48 * This may be because we're:
49 * 1) Not associated (4965, no beacon statistics being sent to driver)
50 * 2) Scanning (noise measurement does not apply to associated channel)
51 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
52 * Use default noise value of -127 ... this is below the range of measurable
53 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
54 * Also, -127 works better than 0 when averaging frames with/without
55 * noise info (e.g. averaging might be done in app); measured dBm values are
56 * always negative ... using a negative value as the default keeps all
57 * averages within an s8's (used in some apps) range of negative values. */
58#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
59
60/* Module parameters accessible from iwl-*.c */
bb8c093b
CH		 61extern int iwl4965_param_hwcrypto;
62extern int iwl4965_param_queues_num;
9ee1ba47 63extern int iwl4965_param_amsdu_size_8K;
5d08cd1d 64
bb8c093b 65enum iwl4965_antenna {
5d08cd1d
CH		 66 IWL_ANTENNA_DIVERSITY,
67 IWL_ANTENNA_MAIN,
68 IWL_ANTENNA_AUX
69};
70
71/*
72 * RTS threshold here is total size [2347] minus 4 FCS bytes
73 * Per spec:
74 * a value of 0 means RTS on all data/management packets
75 * a value > max MSDU size means no RTS
76 * else RTS for data/management frames where MPDU is larger
77 * than RTS value.
78 */
79#define DEFAULT_RTS_THRESHOLD 2347U
80#define MIN_RTS_THRESHOLD 0U
81#define MAX_RTS_THRESHOLD 2347U
82#define MAX_MSDU_SIZE 2304U
83#define MAX_MPDU_SIZE 2346U
84#define DEFAULT_BEACON_INTERVAL 100U
85#define DEFAULT_SHORT_RETRY_LIMIT 7U
86#define DEFAULT_LONG_RETRY_LIMIT 4U
87
bb8c093b 88struct iwl4965_rx_mem_buffer {
5d08cd1d
CH		 89 dma_addr_t dma_addr;
90 struct sk_buff *skb;
91 struct list_head list;
92};
93
5d08cd1d
CH		 94/*
95 * Generic queue structure
96 *
97 * Contains common data for Rx and Tx queues
98 */
bb8c093b 99struct iwl4965_queue {
5d08cd1d
CH		 100 int n_bd; /* number of BDs in this queue */
101 int write_ptr; /* 1-st empty entry (index) host_w*/
102 int read_ptr; /* last used entry (index) host_r*/
103 dma_addr_t dma_addr; /* physical addr for BD's */
104 int n_window; /* safe queue window */
105 u32 id;
106 int low_mark; /* low watermark, resume queue if free
107 * space more than this */
108 int high_mark; /* high watermark, stop queue if free
109 * space less than this */
110} __attribute__ ((packed));
111
112#define MAX_NUM_OF_TBS (20)
113
bc47279f 114/* One for each TFD */
bb8c093b 115struct iwl4965_tx_info {
5d08cd1d
CH		 116 struct ieee80211_tx_status status;
117 struct sk_buff *skb[MAX_NUM_OF_TBS];
118};
119
120/**
bb8c093b 121 * struct iwl4965_tx_queue - Tx Queue for DMA
bc47279f
BC		 122 * @q: generic Rx/Tx queue descriptor
123 * @bd: base of circular buffer of TFDs
124 * @cmd: array of command/Tx buffers
125 * @dma_addr_cmd: physical address of cmd/tx buffer array
126 * @txb: array of per-TFD driver data
127 * @need_update: indicates need to update read/write index
128 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
5d08cd1d 129 *
bc47279f
BC		 130 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
131 * descriptors) and required locking structures.
5d08cd1d 132 */
bb8c093b
CH		 133struct iwl4965_tx_queue {
134 struct iwl4965_queue q;
135 struct iwl4965_tfd_frame *bd;
136 struct iwl4965_cmd *cmd;
5d08cd1d 137 dma_addr_t dma_addr_cmd;
bb8c093b 138 struct iwl4965_tx_info *txb;
5d08cd1d
CH		 139 int need_update;
140 int sched_retry;
141 int active;
142};
143
144#define IWL_NUM_SCAN_RATES (2)
145
bb8c093b 146struct iwl4965_channel_tgd_info {
5d08cd1d
CH		 147 u8 type;
148 s8 max_power;
149};
150
bb8c093b 151struct iwl4965_channel_tgh_info {
5d08cd1d
CH		 152 s64 last_radar_time;
153};
154
155/* current Tx power values to use, one for each rate for each channel.
156 * requested power is limited by:
157 * -- regulatory EEPROM limits for this channel
158 * -- hardware capabilities (clip-powers)
159 * -- spectrum management
160 * -- user preference (e.g. iwconfig)
161 * when requested power is set, base power index must also be set. */
bb8c093b
CH		 162struct iwl4965_channel_power_info {
163 struct iwl4965_tx_power tpc; /* actual radio and DSP gain settings */
5d08cd1d
CH		 164 s8 power_table_index; /* actual (compenst'd) index into gain table */
165 s8 base_power_index; /* gain index for power at factory temp. */
166 s8 requested_power; /* power (dBm) requested for this chnl/rate */
167};
168
169/* current scan Tx power values to use, one for each scan rate for each
170 * channel. */
bb8c093b
CH		 171struct iwl4965_scan_power_info {
172 struct iwl4965_tx_power tpc; /* actual radio and DSP gain settings */
5d08cd1d
CH		 173 s8 power_table_index; /* actual (compenst'd) index into gain table */
174 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
175};
176
fcd427bb
BC		 177/* For fat_extension_channel */
178enum {
179 HT_IE_EXT_CHANNEL_NONE = 0,
180 HT_IE_EXT_CHANNEL_ABOVE,
181 HT_IE_EXT_CHANNEL_INVALID,
182 HT_IE_EXT_CHANNEL_BELOW,
183 HT_IE_EXT_CHANNEL_MAX
184};
185
5d08cd1d
CH		 186/*
187 * One for each channel, holds all channel setup data
188 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
189 * with one another!
190 */
191#define IWL4965_MAX_RATE (33)
192
bb8c093b
CH		 193struct iwl4965_channel_info {
194 struct iwl4965_channel_tgd_info tgd;
195 struct iwl4965_channel_tgh_info tgh;
fcd427bb
BC		 196 struct iwl4965_eeprom_channel eeprom; /* EEPROM regulatory limit */
197 struct iwl4965_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
198 * FAT channel */
5d08cd1d
CH		 199
200 u8 channel; /* channel number */
201 u8 flags; /* flags copied from EEPROM */
202 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
fcd427bb 203 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
5d08cd1d
CH		 204 s8 min_power; /* always 0 */
205 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
206
207 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
208 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
209 u8 phymode; /* MODE_IEEE80211{A,B,G} */
210
211 /* Radio/DSP gain settings for each "normal" data Tx rate.
212 * These include, in addition to RF and DSP gain, a few fields for
213 * remembering/modifying gain settings (indexes). */
bb8c093b 214 struct iwl4965_channel_power_info power_info[IWL4965_MAX_RATE];
5d08cd1d
CH		 215
216 /* FAT channel info */
217 s8 fat_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
218 s8 fat_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
219 s8 fat_min_power; /* always 0 */
220 s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */
221 u8 fat_flags; /* flags copied from EEPROM */
fcd427bb 222 u8 fat_extension_channel; /* HT_IE_EXT_CHANNEL_* */
5d08cd1d
CH		 223
224 /* Radio/DSP gain settings for each scan rate, for directed scans. */
bb8c093b 225 struct iwl4965_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
5d08cd1d
CH		 226};
227
bb8c093b 228struct iwl4965_clip_group {
5d08cd1d
CH		 229 /* maximum power level to prevent clipping for each rate, derived by
230 * us from this band's saturation power in EEPROM */
231 const s8 clip_powers[IWL_MAX_RATES];
232};
233
234#include "iwl-4965-rs.h"
235
236#define IWL_TX_FIFO_AC0 0
237#define IWL_TX_FIFO_AC1 1
238#define IWL_TX_FIFO_AC2 2
239#define IWL_TX_FIFO_AC3 3
240#define IWL_TX_FIFO_HCCA_1 5
241#define IWL_TX_FIFO_HCCA_2 6
242#define IWL_TX_FIFO_NONE 7
243
244/* Minimum number of queues. MAX_NUM is defined in hw specific files */
245#define IWL_MIN_NUM_QUEUES 4
246
247/* Power management (not Tx power) structures */
248
bb8c093b
CH		 249struct iwl4965_power_vec_entry {
250 struct iwl4965_powertable_cmd cmd;
5d08cd1d
CH		 251 u8 no_dtim;
252};
253#define IWL_POWER_RANGE_0 (0)
254#define IWL_POWER_RANGE_1 (1)
255
256#define IWL_POWER_MODE_CAM 0x00 /* Continuously Aware Mode, always on */
257#define IWL_POWER_INDEX_3 0x03
258#define IWL_POWER_INDEX_5 0x05
259#define IWL_POWER_AC 0x06
260#define IWL_POWER_BATTERY 0x07
261#define IWL_POWER_LIMIT 0x07
262#define IWL_POWER_MASK 0x0F
263#define IWL_POWER_ENABLED 0x10
264#define IWL_POWER_LEVEL(x) ((x) & IWL_POWER_MASK)
265
bb8c093b 266struct iwl4965_power_mgr {
5d08cd1d 267 spinlock_t lock;
bb8c093b
CH		 268 struct iwl4965_power_vec_entry pwr_range_0[IWL_POWER_AC];
269 struct iwl4965_power_vec_entry pwr_range_1[IWL_POWER_AC];
5d08cd1d
CH		 270 u8 active_index;
271 u32 dtim_val;
272};
273
274#define IEEE80211_DATA_LEN 2304
275#define IEEE80211_4ADDR_LEN 30
276#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
277#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
278
bb8c093b 279struct iwl4965_frame {
5d08cd1d
CH		 280 union {
281 struct ieee80211_hdr frame;
bb8c093b 282 struct iwl4965_tx_beacon_cmd beacon;
5d08cd1d
CH		 283 u8 raw[IEEE80211_FRAME_LEN];
284 u8 cmd[360];
285 } u;
286 struct list_head list;
287};
288
289#define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf)
290#define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8)
291#define SEQ_TO_INDEX(x) (x & 0xff)
292#define INDEX_TO_SEQ(x) (x & 0xff)
293#define SEQ_HUGE_FRAME (0x4000)
294#define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000)
295#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
296#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
297#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
298
299enum {
300 /* CMD_SIZE_NORMAL = 0, */
301 CMD_SIZE_HUGE = (1 << 0),
302 /* CMD_SYNC = 0, */
303 CMD_ASYNC = (1 << 1),
304 /* CMD_NO_SKB = 0, */
305 CMD_WANT_SKB = (1 << 2),
306};
307
bb8c093b
CH		 308struct iwl4965_cmd;
309struct iwl4965_priv;
5d08cd1d 310
bb8c093b
CH		 311struct iwl4965_cmd_meta {
312 struct iwl4965_cmd_meta *source;
5d08cd1d
CH		 313 union {
314 struct sk_buff *skb;
bb8c093b
CH		 315 int (*callback)(struct iwl4965_priv *priv,
316 struct iwl4965_cmd *cmd, struct sk_buff *skb);
5d08cd1d
CH		 317 } __attribute__ ((packed)) u;
318
319 /* The CMD_SIZE_HUGE flag bit indicates that the command
320 * structure is stored at the end of the shared queue memory. */
321 u32 flags;
322
323} __attribute__ ((packed));
324
bc47279f
BC		 325/**
326 * struct iwl4965_cmd
327 *
328 * For allocation of the command and tx queues, this establishes the overall
329 * size of the largest command we send to uCode, except for a scan command
330 * (which is relatively huge; space is allocated separately).
331 */
bb8c093b 332struct iwl4965_cmd {
bc47279f
BC		 333 struct iwl4965_cmd_meta meta; /* driver data */
334 struct iwl4965_cmd_header hdr; /* uCode API */
5d08cd1d 335 union {
bb8c093b
CH		 336 struct iwl4965_addsta_cmd addsta;
337 struct iwl4965_led_cmd led;
5d08cd1d
CH		 338 u32 flags;
339 u8 val8;
340 u16 val16;
341 u32 val32;
bb8c093b
CH		 342 struct iwl4965_bt_cmd bt;
343 struct iwl4965_rxon_time_cmd rxon_time;
344 struct iwl4965_powertable_cmd powertable;
345 struct iwl4965_qosparam_cmd qosparam;
346 struct iwl4965_tx_cmd tx;
347 struct iwl4965_tx_beacon_cmd tx_beacon;
348 struct iwl4965_rxon_assoc_cmd rxon_assoc;
5d08cd1d
CH		 349 u8 *indirect;
350 u8 payload[360];
351 } __attribute__ ((packed)) cmd;
352} __attribute__ ((packed));
353
bb8c093b 354struct iwl4965_host_cmd {
5d08cd1d
CH		 355 u8 id;
356 u16 len;
bb8c093b 357 struct iwl4965_cmd_meta meta;
5d08cd1d
CH		 358 const void *data;
359};
360
bb8c093b
CH		 361#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl4965_cmd) - \
362 sizeof(struct iwl4965_cmd_meta))
5d08cd1d
CH		 363
364/*
365 * RX related structures and functions
366 */
367#define RX_FREE_BUFFERS 64
368#define RX_LOW_WATERMARK 8
369
370#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
371#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
372#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
373
374/**
bb8c093b 375 * struct iwl4965_rx_queue - Rx queue
5d08cd1d
CH		 376 * @processed: Internal index to last handled Rx packet
377 * @read: Shared index to newest available Rx buffer
378 * @write: Shared index to oldest written Rx packet
379 * @free_count: Number of pre-allocated buffers in rx_free
380 * @rx_free: list of free SKBs for use
381 * @rx_used: List of Rx buffers with no SKB
382 * @need_update: flag to indicate we need to update read/write index
383 *
bb8c093b 384 * NOTE: rx_free and rx_used are used as a FIFO for iwl4965_rx_mem_buffers
5d08cd1d 385 */
bb8c093b 386struct iwl4965_rx_queue {
5d08cd1d
CH		 387 __le32 *bd;
388 dma_addr_t dma_addr;
bb8c093b
CH		 389 struct iwl4965_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
390 struct iwl4965_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH		 391 u32 processed;
392 u32 read;
393 u32 write;
394 u32 free_count;
395 struct list_head rx_free;
396 struct list_head rx_used;
397 int need_update;
398 spinlock_t lock;
399};
400
401#define IWL_SUPPORTED_RATES_IE_LEN 8
402
403#define SCAN_INTERVAL 100
404
405#define MAX_A_CHANNELS 252
406#define MIN_A_CHANNELS 7
407
408#define MAX_B_CHANNELS 14
409#define MIN_B_CHANNELS 1
410
411#define STATUS_HCMD_ACTIVE 0 /* host command in progress */
412#define STATUS_INT_ENABLED 1
413#define STATUS_RF_KILL_HW 2
414#define STATUS_RF_KILL_SW 3
415#define STATUS_INIT 4
416#define STATUS_ALIVE 5
417#define STATUS_READY 6
418#define STATUS_TEMPERATURE 7
419#define STATUS_GEO_CONFIGURED 8
420#define STATUS_EXIT_PENDING 9
421#define STATUS_IN_SUSPEND 10
422#define STATUS_STATISTICS 11
423#define STATUS_SCANNING 12
424#define STATUS_SCAN_ABORTING 13
425#define STATUS_SCAN_HW 14
426#define STATUS_POWER_PMI 15
427#define STATUS_FW_ERROR 16
a0646470 428#define STATUS_CONF_PENDING 17
5d08cd1d
CH		 429
430#define MAX_TID_COUNT 9
431
432#define IWL_INVALID_RATE 0xFF
433#define IWL_INVALID_VALUE -1
434
c8b0e6e1
CH		 435#ifdef CONFIG_IWL4965_HT
436#ifdef CONFIG_IWL4965_HT_AGG
bc47279f
BC		 437/**
438 * struct iwl4965_ht_agg -- aggregation status while waiting for block-ack
439 * @txq_id: Tx queue used for Tx attempt
440 * @frame_count: # frames attempted by Tx command
441 * @wait_for_ba: Expect block-ack before next Tx reply
442 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
443 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
444 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
445 * @rate_n_flags: Rate at which Tx was attempted
446 *
447 * If REPLY_TX indicates that aggregation was attempted, driver must wait
448 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
449 * until block ack arrives.
450 */
bb8c093b 451struct iwl4965_ht_agg {
5d08cd1d
CH		 452 u16 txq_id;
453 u16 frame_count;
454 u16 wait_for_ba;
455 u16 start_idx;
456 u32 bitmap0;
457 u32 bitmap1;
458 u32 rate_n_flags;
459};
c8b0e6e1
CH		 460#endif /* CONFIG_IWL4965_HT_AGG */
461#endif /* CONFIG_IWL4965_HT */
5d08cd1d 462
bb8c093b 463struct iwl4965_tid_data {
5d08cd1d 464 u16 seq_number;
c8b0e6e1
CH		 465#ifdef CONFIG_IWL4965_HT
466#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b 467 struct iwl4965_ht_agg agg;
c8b0e6e1
CH		 468#endif /* CONFIG_IWL4965_HT_AGG */
469#endif /* CONFIG_IWL4965_HT */
5d08cd1d
CH		 470};
471
bb8c093b 472struct iwl4965_hw_key {
5d08cd1d
CH		 473 enum ieee80211_key_alg alg;
474 int keylen;
475 u8 key[32];
476};
477
bb8c093b 478union iwl4965_ht_rate_supp {
5d08cd1d
CH		 479 u16 rates;
480 struct {
481 u8 siso_rate;
482 u8 mimo_rate;
483 };
484};
485
c8b0e6e1 486#ifdef CONFIG_IWL4965_HT
5d08cd1d 487#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
5d08cd1d
CH		 488#define CFG_HT_MPDU_DENSITY_2USEC (0x5)
489#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_2USEC
490
9e0cc6de
RR		 491struct iwl_ht_info {
492 /* self configuration data */
5d08cd1d 493 u8 is_ht;
9e0cc6de 494 u8 supported_chan_width;
5d08cd1d 495 u16 tx_mimo_ps_mode;
9e0cc6de 496 u8 is_green_field;
bb54244b 497 u8 sgf; /* HT_SHORT_GI_* short guard interval */
5d08cd1d
CH		 498 u8 max_amsdu_size;
499 u8 ampdu_factor;
500 u8 mpdu_density;
9e0cc6de
RR		 501 u8 supp_mcs_set[16];
502 /* BSS related data */
503 u8 control_channel;
5d08cd1d 504 u8 extension_chan_offset;
5d08cd1d 505 u8 tx_chan_width;
9e0cc6de
RR		 506 u8 ht_protection;
507 u8 non_GF_STA_present;
5d08cd1d 508};
c8b0e6e1 509#endif /*CONFIG_IWL4965_HT */
5d08cd1d 510
c8b0e6e1 511#ifdef CONFIG_IWL4965_QOS
5d08cd1d 512
bb8c093b 513union iwl4965_qos_capabity {
5d08cd1d
CH		 514 struct {
515 u8 edca_count:4; /* bit 0-3 */
516 u8 q_ack:1; /* bit 4 */
517 u8 queue_request:1; /* bit 5 */
518 u8 txop_request:1; /* bit 6 */
519 u8 reserved:1; /* bit 7 */
520 } q_AP;
521 struct {
522 u8 acvo_APSD:1; /* bit 0 */
523 u8 acvi_APSD:1; /* bit 1 */
524 u8 ac_bk_APSD:1; /* bit 2 */
525 u8 ac_be_APSD:1; /* bit 3 */
526 u8 q_ack:1; /* bit 4 */
527 u8 max_len:2; /* bit 5-6 */
528 u8 more_data_ack:1; /* bit 7 */
529 } q_STA;
530 u8 val;
531};
532
533/* QoS structures */
bb8c093b 534struct iwl4965_qos_info {
5d08cd1d
CH		 535 int qos_enable;
536 int qos_active;
bb8c093b
CH		 537 union iwl4965_qos_capabity qos_cap;
538 struct iwl4965_qosparam_cmd def_qos_parm;
5d08cd1d 539};
c8b0e6e1 540#endif /*CONFIG_IWL4965_QOS */
5d08cd1d
CH		 541
542#define STA_PS_STATUS_WAKE 0
543#define STA_PS_STATUS_SLEEP 1
544
bb8c093b
CH		 545struct iwl4965_station_entry {
546 struct iwl4965_addsta_cmd sta;
547 struct iwl4965_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH		 548 u8 used;
549 u8 ps_status;
bb8c093b 550 struct iwl4965_hw_key keyinfo;
5d08cd1d
CH		 551};
552
553/* one for each uCode image (inst/data, boot/init/runtime) */
554struct fw_desc {
555 void *v_addr; /* access by driver */
556 dma_addr_t p_addr; /* access by card's busmaster DMA */
557 u32 len; /* bytes */
558};
559
560/* uCode file layout */
bb8c093b 561struct iwl4965_ucode {
5d08cd1d
CH		 562 __le32 ver; /* major/minor/subminor */
563 __le32 inst_size; /* bytes of runtime instructions */
564 __le32 data_size; /* bytes of runtime data */
565 __le32 init_size; /* bytes of initialization instructions */
566 __le32 init_data_size; /* bytes of initialization data */
567 __le32 boot_size; /* bytes of bootstrap instructions */
568 u8 data[0]; /* data in same order as "size" elements */
569};
570
571#define IWL_IBSS_MAC_HASH_SIZE 32
572
bb8c093b 573struct iwl4965_ibss_seq {
5d08cd1d
CH		 574 u8 mac[ETH_ALEN];
575 u16 seq_num;
576 u16 frag_num;
577 unsigned long packet_time;
578 struct list_head list;
579};
580
bc47279f
BC		 581/**
582 * struct iwl4965_driver_hw_info
583 * @max_txq_num: Max # Tx queues supported
584 * @ac_queue_count: # Tx queues for EDCA Access Categories (AC)
585 * @tx_cmd_len: Size of Tx command (but not including frame itself)
586 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
587 * @rx_buffer_size:
588 * @max_rxq_log: Log-base-2 of max_rxq_size
589 * @max_stations:
590 * @bcast_sta_id:
591 * @shared_virt: Pointer to driver/uCode shared Tx Byte Counts and Rx status
592 * @shared_phys: Physical Pointer to Tx Byte Counts and Rx status
593 */
bb8c093b 594struct iwl4965_driver_hw_info {
5d08cd1d
CH		 595 u16 max_txq_num;
596 u16 ac_queue_count;
597 u16 tx_cmd_len;
598 u16 max_rxq_size;
9ee1ba47
RR		 599 u32 rx_buf_size;
600 u32 max_pkt_size;
5d08cd1d
CH		 601 u16 max_rxq_log;
602 u8 max_stations;
603 u8 bcast_sta_id;
604 void *shared_virt;
605 dma_addr_t shared_phys;
606};
607
5d08cd1d
CH		 608#define HT_SHORT_GI_20MHZ_ONLY (1 << 0)
609#define HT_SHORT_GI_40MHZ_ONLY (1 << 1)
610
611
bb8c093b 612#define IWL_RX_HDR(x) ((struct iwl4965_rx_frame_hdr *)(\
5d08cd1d
CH		 613 x->u.rx_frame.stats.payload + \
614 x->u.rx_frame.stats.phy_count))
bb8c093b 615#define IWL_RX_END(x) ((struct iwl4965_rx_frame_end *)(\
5d08cd1d
CH		 616 IWL_RX_HDR(x)->payload + \
617 le16_to_cpu(IWL_RX_HDR(x)->len)))
618#define IWL_RX_STATS(x) (&x->u.rx_frame.stats)
619#define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload)
620
621
622/******************************************************************************
623 *
624 * Functions implemented in iwl-base.c which are forward declared here
625 * for use by iwl-*.c
626 *
627 *****************************************************************************/
bb8c093b
CH		 628struct iwl4965_addsta_cmd;
629extern int iwl4965_send_add_station(struct iwl4965_priv *priv,
630 struct iwl4965_addsta_cmd *sta, u8 flags);
67d62035
RR		 631extern u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
632 int is_ap, u8 flags, void *ht_data);
bb8c093b 633extern int iwl4965_is_network_packet(struct iwl4965_priv *priv,
5d08cd1d 634 struct ieee80211_hdr *header);
bb8c093b
CH		 635extern int iwl4965_power_init_handle(struct iwl4965_priv *priv);
636extern int iwl4965_eeprom_init(struct iwl4965_priv *priv);
c8b0e6e1 637#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 638extern void iwl4965_report_frame(struct iwl4965_priv *priv,
639 struct iwl4965_rx_packet *pkt,
5d08cd1d
CH		 640 struct ieee80211_hdr *header, int group100);
641#else
bb8c093b
CH		 642static inline void iwl4965_report_frame(struct iwl4965_priv *priv,
643 struct iwl4965_rx_packet *pkt,
5d08cd1d
CH		 644 struct ieee80211_hdr *header,
645 int group100) {}
646#endif
bb8c093b
CH		 647extern void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv,
648 struct iwl4965_rx_mem_buffer *rxb,
5d08cd1d
CH		 649 void *data, short len,
650 struct ieee80211_rx_status *stats,
651 u16 phy_flags);
bb8c093b
CH		 652extern int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv,
653 struct ieee80211_hdr *header);
654extern int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv);
655extern void iwl4965_rx_queue_reset(struct iwl4965_priv *priv,
656 struct iwl4965_rx_queue *rxq);
657extern int iwl4965_calc_db_from_ratio(int sig_ratio);
658extern int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm);
659extern int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
660 struct iwl4965_tx_queue *txq, int count, u32 id);
661extern void iwl4965_rx_replenish(void *data);
662extern void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq);
663extern int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len,
5d08cd1d 664 const void *data);
bb8c093b
CH		 665extern int __must_check iwl4965_send_cmd(struct iwl4965_priv *priv,
666 struct iwl4965_host_cmd *cmd);
667extern unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
5d08cd1d
CH		 668 struct ieee80211_hdr *hdr,
669 const u8 *dest, int left);
bb8c093b
CH		 670extern int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv,
671 struct iwl4965_rx_queue *q);
672extern int iwl4965_send_statistics_request(struct iwl4965_priv *priv);
673extern void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
5d08cd1d
CH		 674 u32 decrypt_res,
675 struct ieee80211_rx_status *stats);
676extern __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr);
677
bb8c093b 678extern const u8 iwl4965_broadcast_addr[ETH_ALEN];
5d08cd1d
CH		 679
680/*
681 * Currently used by iwl-3945-rs... look at restructuring so that it doesn't
682 * call this... todo... fix that.
683*/
bb8c093b 684extern u8 iwl4965_sync_station(struct iwl4965_priv *priv, int sta_id,
5d08cd1d
CH		 685 u16 tx_rate, u8 flags);
686
687/******************************************************************************
688 *
689 * Functions implemented in iwl-[34]*.c which are forward declared here
690 * for use by iwl-base.c
691 *
692 * NOTE: The implementation of these functions are hardware specific
693 * which is why they are in the hardware specific files (vs. iwl-base.c)
694 *
695 * Naming convention --
bb8c093b
CH		 696 * iwl4965_ <-- Its part of iwlwifi (should be changed to iwl4965_)
697 * iwl4965_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW)
5d08cd1d 698 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH		 699 * iwl4965_bg_ <-- Called from work queue context
700 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH		 701 *
702 ****************************************************************************/
bb8c093b
CH		 703extern void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv);
704extern void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv);
705extern void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv);
706extern int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv);
707extern int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv);
708extern int iwl4965_hw_nic_init(struct iwl4965_priv *priv);
709extern int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv);
710extern void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv);
711extern void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv);
712extern int iwl4965_hw_nic_reset(struct iwl4965_priv *priv);
713extern int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *tfd,
5d08cd1d 714 dma_addr_t addr, u16 len);
bb8c093b
CH		 715extern int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq);
716extern int iwl4965_hw_get_temperature(struct iwl4965_priv *priv);
717extern int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv,
718 struct iwl4965_tx_queue *txq);
719extern unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
720 struct iwl4965_frame *frame, u8 rate);
721extern int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv);
722extern void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
723 struct iwl4965_cmd *cmd,
5d08cd1d
CH		 724 struct ieee80211_tx_control *ctrl,
725 struct ieee80211_hdr *hdr,
726 int sta_id, int tx_id);
bb8c093b
CH		 727extern int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv);
728extern int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power);
729extern void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv,
730 struct iwl4965_rx_mem_buffer *rxb);
731extern void iwl4965_disable_events(struct iwl4965_priv *priv);
732extern int iwl4965_get_temperature(const struct iwl4965_priv *priv);
5d08cd1d
CH		 733
734/**
bb8c093b 735 * iwl4965_hw_find_station - Find station id for a given BSSID
5d08cd1d
CH		 736 * @bssid: MAC address of station ID to find
737 *
738 * NOTE: This should not be hardware specific but the code has
739 * not yet been merged into a single common layer for managing the
740 * station tables.
741 */
bb8c093b 742extern u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *bssid);
5d08cd1d 743
bb8c093b
CH		 744extern int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel);
745extern int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index);
5d08cd1d 746
bb8c093b 747struct iwl4965_priv;
b481de9c
ZY		 748
749/*
750 * Forward declare iwl-4965.c functions for iwl-base.c
751 */
bb8c093b 752extern int iwl4965_eeprom_acquire_semaphore(struct iwl4965_priv *priv);
b481de9c 753
bb8c093b
CH		 754extern int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
755 struct iwl4965_tx_queue *txq,
b481de9c 756 u16 byte_cnt);
bb8c093b 757extern void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr,
b481de9c 758 int is_ap);
bb8c093b 759extern void iwl4965_set_rxon_chain(struct iwl4965_priv *priv);
bb8c093b
CH		 760extern int iwl4965_alive_notify(struct iwl4965_priv *priv);
761extern void iwl4965_update_rate_scaling(struct iwl4965_priv *priv, u8 mode);
bb8c093b
CH		 762extern void iwl4965_chain_noise_reset(struct iwl4965_priv *priv);
763extern void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags,
b481de9c 764 u8 force);
bb8c093b 765extern int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv, int phymode,
b481de9c 766 u16 channel,
bb8c093b 767 const struct iwl4965_eeprom_channel *eeprom_ch,
b481de9c 768 u8 fat_extension_channel);
bb8c093b 769extern void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv);
b481de9c 770
c8b0e6e1 771#ifdef CONFIG_IWL4965_HT
326eeee8
RR		 772extern void iwl4965_init_ht_hw_capab(struct ieee80211_ht_info *ht_info,
773 int mode);
fd105e79
RR		 774extern void iwl4965_set_rxon_ht(struct iwl4965_priv *priv,
775 struct iwl_ht_info *ht_info);
67d62035
RR		 776extern void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index,
777 struct ieee80211_ht_info *sta_ht_inf);
9ab46173
RR		 778extern int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
779 enum ieee80211_ampdu_mlme_action action,
780 const u8 *addr, u16 tid, u16 ssn);
c8b0e6e1 781#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b 782extern int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, u8 *da,
b481de9c 783 u16 tid, u16 *start_seq_num);
bb8c093b 784extern int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, u8 *da,
b481de9c 785 u16 tid, int generator);
bb8c093b 786extern void iwl4965_turn_off_agg(struct iwl4965_priv *priv, u8 tid);
87e4f7df
TW		 787extern void iwl4965_tl_get_stats(struct iwl4965_priv *priv,
788 struct ieee80211_hdr *hdr);
c8b0e6e1
CH		 789#endif /* CONFIG_IWL4965_HT_AGG */
790#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY		 791/* Structures, enum, and defines specific to the 4965 */
792
793#define IWL4965_KW_SIZE 0x1000 /*4k */
794
bb8c093b 795struct iwl4965_kw {
b481de9c
ZY		 796 dma_addr_t dma_addr;
797 void *v_addr;
798 size_t size;
799};
800
801#define TID_QUEUE_CELL_SPACING 50 /*mS */
802#define TID_QUEUE_MAX_SIZE 20
803#define TID_ROUND_VALUE 5 /* mS */
804#define TID_MAX_LOAD_COUNT 8
805
806#define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING)
807#define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y))
808
809#define TID_ALL_ENABLED 0x7f
810#define TID_ALL_SPECIFIED 0xff
811#define TID_AGG_TPT_THREHOLD 0x0
812
813#define IWL_CHANNEL_WIDTH_20MHZ 0
814#define IWL_CHANNEL_WIDTH_40MHZ 1
815
816#define IWL_MIMO_PS_STATIC 0
817#define IWL_MIMO_PS_NONE 3
818#define IWL_MIMO_PS_DYNAMIC 1
819#define IWL_MIMO_PS_INVALID 2
820
821#define IWL_OPERATION_MODE_AUTO 0
822#define IWL_OPERATION_MODE_HT_ONLY 1
823#define IWL_OPERATION_MODE_MIXED 2
824#define IWL_OPERATION_MODE_20MHZ 3
825
826#define IWL_EXT_CHANNEL_OFFSET_AUTO 0
827#define IWL_EXT_CHANNEL_OFFSET_ABOVE 1
828#define IWL_EXT_CHANNEL_OFFSET_ 2
829#define IWL_EXT_CHANNEL_OFFSET_BELOW 3
830#define IWL_EXT_CHANNEL_OFFSET_MAX 4
831
832#define NRG_NUM_PREV_STAT_L 20
833#define NUM_RX_CHAINS (3)
834
b481de9c 835#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
b481de9c 836
bb8c093b 837struct iwl4965_traffic_load {
b481de9c
ZY		 838 unsigned long time_stamp;
839 u32 packet_count[TID_QUEUE_MAX_SIZE];
840 u8 queue_count;
841 u8 head;
842 u32 total;
843};
844
c8b0e6e1 845#ifdef CONFIG_IWL4965_HT_AGG
abceddb4
BC		 846/**
847 * struct iwl4965_agg_control
848 * @requested_ba: bit map of tids requesting aggregation/block-ack
849 * @granted_ba: bit map of tids granted aggregation/block-ack
850 */
bb8c093b 851struct iwl4965_agg_control {
b481de9c
ZY		 852 unsigned long next_retry;
853 u32 wait_for_agg_status;
854 u32 tid_retry;
855 u32 requested_ba;
856 u32 granted_ba;
857 u8 auto_agg;
858 u32 tid_traffic_load_threshold;
859 u32 ba_timeout;
bb8c093b 860 struct iwl4965_traffic_load traffic_load[TID_MAX_LOAD_COUNT];
b481de9c 861};
c8b0e6e1 862#endif /*CONFIG_IWL4965_HT_AGG */
b481de9c 863
bb8c093b 864struct iwl4965_lq_mngr {
c8b0e6e1 865#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b 866 struct iwl4965_agg_control agg_ctrl;
b481de9c
ZY		 867#endif
868 spinlock_t lock;
869 s32 max_window_size;
870 s32 *expected_tpt;
871 u8 *next_higher_rate;
872 u8 *next_lower_rate;
873 unsigned long stamp;
874 unsigned long stamp_last;
875 u32 flush_time;
876 u32 tx_packets;
877 u8 lq_ready;
878};
879
880
881/* Sensitivity and chain noise calibration */
882#define INTERFERENCE_DATA_AVAILABLE __constant_cpu_to_le32(1)
883#define INITIALIZATION_VALUE 0xFFFF
884#define CAL_NUM_OF_BEACONS 20
885#define MAXIMUM_ALLOWED_PATHLOSS 15
886
b481de9c
ZY		 887#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
888
889#define MAX_FA_OFDM 50
890#define MIN_FA_OFDM 5
891#define MAX_FA_CCK 50
892#define MIN_FA_CCK 5
893
894#define NRG_MIN_CCK 97
895#define NRG_MAX_CCK 0
896
897#define AUTO_CORR_MIN_OFDM 85
898#define AUTO_CORR_MIN_OFDM_MRC 170
899#define AUTO_CORR_MIN_OFDM_X1 105
900#define AUTO_CORR_MIN_OFDM_MRC_X1 220
901#define AUTO_CORR_MAX_OFDM 120
902#define AUTO_CORR_MAX_OFDM_MRC 210
903#define AUTO_CORR_MAX_OFDM_X1 140
904#define AUTO_CORR_MAX_OFDM_MRC_X1 270
905#define AUTO_CORR_STEP_OFDM 1
906
907#define AUTO_CORR_MIN_CCK (125)
908#define AUTO_CORR_MAX_CCK (200)
909#define AUTO_CORR_MIN_CCK_MRC 200
910#define AUTO_CORR_MAX_CCK_MRC 400
911#define AUTO_CORR_STEP_CCK 3
912#define AUTO_CORR_MAX_TH_CCK 160
913
b481de9c
ZY		 914#define NRG_DIFF 2
915#define NRG_STEP_CCK 2
916#define NRG_MARGIN 8
917#define MAX_NUMBER_CCK_NO_FA 100
918
919#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
920
921#define CHAIN_A 0
922#define CHAIN_B 1
923#define CHAIN_C 2
924#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
925#define ALL_BAND_FILTER 0xFF00
926#define IN_BAND_FILTER 0xFF
927#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
928
bb8c093b 929enum iwl4965_false_alarm_state {
b481de9c
ZY		 930 IWL_FA_TOO_MANY = 0,
931 IWL_FA_TOO_FEW = 1,
932 IWL_FA_GOOD_RANGE = 2,
933};
934
bb8c093b 935enum iwl4965_chain_noise_state {
b481de9c
ZY		 936 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
937 IWL_CHAIN_NOISE_ACCUMULATE = 1,
938 IWL_CHAIN_NOISE_CALIBRATED = 2,
939};
940
bb8c093b 941enum iwl4965_sensitivity_state {
b481de9c
ZY		 942 IWL_SENS_CALIB_ALLOWED = 0,
943 IWL_SENS_CALIB_NEED_REINIT = 1,
944};
945
bb8c093b 946enum iwl4965_calib_enabled_state {
b481de9c
ZY		 947 IWL_CALIB_DISABLED = 0, /* must be 0 */
948 IWL_CALIB_ENABLED = 1,
949};
950
951struct statistics_general_data {
952 u32 beacon_silence_rssi_a;
953 u32 beacon_silence_rssi_b;
954 u32 beacon_silence_rssi_c;
955 u32 beacon_energy_a;
956 u32 beacon_energy_b;
957 u32 beacon_energy_c;
958};
959
960/* Sensitivity calib data */
bb8c093b 961struct iwl4965_sensitivity_data {
b481de9c
ZY		 962 u32 auto_corr_ofdm;
963 u32 auto_corr_ofdm_mrc;
964 u32 auto_corr_ofdm_x1;
965 u32 auto_corr_ofdm_mrc_x1;
966 u32 auto_corr_cck;
967 u32 auto_corr_cck_mrc;
968
969 u32 last_bad_plcp_cnt_ofdm;
970 u32 last_fa_cnt_ofdm;
971 u32 last_bad_plcp_cnt_cck;
972 u32 last_fa_cnt_cck;
973
974 u32 nrg_curr_state;
975 u32 nrg_prev_state;
976 u32 nrg_value[10];
977 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
978 u32 nrg_silence_ref;
979 u32 nrg_energy_idx;
980 u32 nrg_silence_idx;
981 u32 nrg_th_cck;
982 s32 nrg_auto_corr_silence_diff;
983 u32 num_in_cck_no_fa;
984 u32 nrg_th_ofdm;
985
986 u8 state;
987};
988
989/* Chain noise (differential Rx gain) calib data */
bb8c093b 990struct iwl4965_chain_noise_data {
b481de9c
ZY		 991 u8 state;
992 u16 beacon_count;
993 u32 chain_noise_a;
994 u32 chain_noise_b;
995 u32 chain_noise_c;
996 u32 chain_signal_a;
997 u32 chain_signal_b;
998 u32 chain_signal_c;
999 u8 disconn_array[NUM_RX_CHAINS];
1000 u8 delta_gain_code[NUM_RX_CHAINS];
1001 u8 radio_write;
1002};
1003
abceddb4
BC		 1004#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
1005#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
b481de9c 1006
5d08cd1d 1007
c8b0e6e1 1008#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
5d08cd1d
CH		 1009
1010enum {
1011 MEASUREMENT_READY = (1 << 0),
1012 MEASUREMENT_ACTIVE = (1 << 1),
1013};
1014
1015#endif
1016
bb8c093b 1017struct iwl4965_priv {
5d08cd1d
CH		 1018
1019 /* ieee device used by generic ieee processing code */
1020 struct ieee80211_hw *hw;
1021 struct ieee80211_channel *ieee_channels;
1022 struct ieee80211_rate *ieee_rates;
1023
1024 /* temporary frame storage list */
1025 struct list_head free_frames;
1026 int frames_count;
1027
1028 u8 phymode;
1029 int alloc_rxb_skb;
12342c47 1030 bool add_radiotap;
5d08cd1d 1031
bb8c093b
CH		 1032 void (*rx_handlers[REPLY_MAX])(struct iwl4965_priv *priv,
1033 struct iwl4965_rx_mem_buffer *rxb);
5d08cd1d
CH		 1034
1035 const struct ieee80211_hw_mode *modes;
1036
c8b0e6e1 1037#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
5d08cd1d 1038 /* spectrum measurement report caching */
bb8c093b 1039 struct iwl4965_spectrum_notification measure_report;
5d08cd1d
CH		 1040 u8 measurement_status;
1041#endif
1042 /* ucode beacon time */
1043 u32 ucode_beacon_time;
1044
bb8c093b 1045 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 1046 * Access via channel # using indirect index array */
bb8c093b 1047 struct iwl4965_channel_info *channel_info; /* channel info array */
5d08cd1d
CH		 1048 u8 channel_count; /* # of channels */
1049
1050 /* each calibration channel group in the EEPROM has a derived
1051 * clip setting for each rate. */
bb8c093b 1052 const struct iwl4965_clip_group clip_groups[5];
5d08cd1d
CH		 1053
1054 /* thermal calibration */
1055 s32 temperature; /* degrees Kelvin */
1056 s32 last_temperature;
1057
1058 /* Scan related variables */
1059 unsigned long last_scan_jiffies;
7878a5a4 1060 unsigned long next_scan_jiffies;
5d08cd1d
CH		 1061 unsigned long scan_start;
1062 unsigned long scan_pass_start;
1063 unsigned long scan_start_tsf;
1064 int scan_bands;
1065 int one_direct_scan;
1066 u8 direct_ssid_len;
1067 u8 direct_ssid[IW_ESSID_MAX_SIZE];
bb8c093b 1068 struct iwl4965_scan_cmd *scan;
5d08cd1d
CH		 1069 u8 only_active_channel;
1070
1071 /* spinlock */
1072 spinlock_t lock; /* protect general shared data */
1073 spinlock_t hcmd_lock; /* protect hcmd */
1074 struct mutex mutex;
1075
1076 /* basic pci-network driver stuff */
1077 struct pci_dev *pci_dev;
1078
1079 /* pci hardware address support */
1080 void __iomem *hw_base;
1081
1082 /* uCode images, save to reload in case of failure */
1083 struct fw_desc ucode_code; /* runtime inst */
1084 struct fw_desc ucode_data; /* runtime data original */
1085 struct fw_desc ucode_data_backup; /* runtime data save/restore */
1086 struct fw_desc ucode_init; /* initialization inst */
1087 struct fw_desc ucode_init_data; /* initialization data */
1088 struct fw_desc ucode_boot; /* bootstrap inst */
1089
1090
bb8c093b 1091 struct iwl4965_rxon_time_cmd rxon_timing;
5d08cd1d
CH		 1092
1093 /* We declare this const so it can only be
1094 * changed via explicit cast within the
1095 * routines that actually update the physical
1096 * hardware */
bb8c093b
CH		 1097 const struct iwl4965_rxon_cmd active_rxon;
1098 struct iwl4965_rxon_cmd staging_rxon;
5d08cd1d
CH		 1099
1100 int error_recovering;
bb8c093b 1101 struct iwl4965_rxon_cmd recovery_rxon;
5d08cd1d
CH		 1102
1103 /* 1st responses from initialize and runtime uCode images.
1104 * 4965's initialize alive response contains some calibration data. */
bb8c093b
CH		 1105 struct iwl4965_init_alive_resp card_alive_init;
1106 struct iwl4965_alive_resp card_alive;
5d08cd1d
CH		 1107
1108#ifdef LED
1109 /* LED related variables */
bb8c093b 1110 struct iwl4965_activity_blink activity;
5d08cd1d
CH		 1111 unsigned long led_packets;
1112 int led_state;
1113#endif
1114
1115 u16 active_rate;
1116 u16 active_rate_basic;
1117
1118 u8 call_post_assoc_from_beacon;
1119 u8 assoc_station_added;
1120 u8 use_ant_b_for_management_frame; /* Tx antenna selection */
5d08cd1d 1121 u8 valid_antenna; /* Bit mask of antennas actually connected */
c8b0e6e1 1122#ifdef CONFIG_IWL4965_SENSITIVITY
bb8c093b
CH		 1123 struct iwl4965_sensitivity_data sensitivity_data;
1124 struct iwl4965_chain_noise_data chain_noise_data;
5d08cd1d
CH		 1125 u8 start_calib;
1126 __le16 sensitivity_tbl[HD_TABLE_SIZE];
c8b0e6e1 1127#endif /*CONFIG_IWL4965_SENSITIVITY*/
5d08cd1d 1128
c8b0e6e1 1129#ifdef CONFIG_IWL4965_HT
9e0cc6de 1130 struct iwl_ht_info current_ht_config;
5d08cd1d 1131#endif
5d08cd1d
CH		 1132 u8 last_phy_res[100];
1133
1134 /* Rate scaling data */
bb8c093b 1135 struct iwl4965_lq_mngr lq_mngr;
5d08cd1d
CH		 1136
1137 /* Rate scaling data */
1138 s8 data_retry_limit;
1139 u8 retry_rate;
1140
1141 wait_queue_head_t wait_command_queue;
1142
1143 int activity_timer_active;
1144
1145 /* Rx and Tx DMA processing queues */
bb8c093b
CH		 1146 struct iwl4965_rx_queue rxq;
1147 struct iwl4965_tx_queue txq[IWL_MAX_NUM_QUEUES];
5d08cd1d 1148 unsigned long txq_ctx_active_msk;
bb8c093b 1149 struct iwl4965_kw kw; /* keep warm address */
5d08cd1d
CH		 1150 u32 scd_base_addr; /* scheduler sram base address */
1151
1152 unsigned long status;
1153 u32 config;
1154
1155 int last_rx_rssi; /* From Rx packet statisitics */
1156 int last_rx_noise; /* From beacon statistics */
1157
bb8c093b 1158 struct iwl4965_power_mgr power_data;
5d08cd1d 1159
bb8c093b 1160 struct iwl4965_notif_statistics statistics;
5d08cd1d
CH		 1161 unsigned long last_statistics_time;
1162
1163 /* context information */
1164 u8 essid[IW_ESSID_MAX_SIZE];
1165 u8 essid_len;
1166 u16 rates_mask;
1167
1168 u32 power_mode;
1169 u32 antenna;
1170 u8 bssid[ETH_ALEN];
1171 u16 rts_threshold;
1172 u8 mac_addr[ETH_ALEN];
1173
1174 /*station table variables */
1175 spinlock_t sta_lock;
1176 int num_stations;
bb8c093b 1177 struct iwl4965_station_entry stations[IWL_STATION_COUNT];
5d08cd1d
CH		 1178
1179 /* Indication if ieee80211_ops->open has been called */
1180 int is_open;
1181
1182 u8 mac80211_registered;
1183 int is_abg;
1184
1185 u32 notif_missed_beacons;
1186
1187 /* Rx'd packet timing information */
1188 u32 last_beacon_time;
1189 u64 last_tsf;
1190
1191 /* Duplicate packet detection */
1192 u16 last_seq_num;
1193 u16 last_frag_num;
1194 unsigned long last_packet_time;
bc47279f
BC		 1195
1196 /* Hash table for finding stations in IBSS network */
5d08cd1d
CH		 1197 struct list_head ibss_mac_hash[IWL_IBSS_MAC_HASH_SIZE];
1198
1199 /* eeprom */
bb8c093b 1200 struct iwl4965_eeprom eeprom;
5d08cd1d
CH		 1201
1202 int iw_mode;
1203
1204 struct sk_buff *ibss_beacon;
1205
1206 /* Last Rx'd beacon timestamp */
1207 u32 timestamp0;
1208 u32 timestamp1;
1209 u16 beacon_int;
bb8c093b 1210 struct iwl4965_driver_hw_info hw_setting;
32bfd35d 1211 struct ieee80211_vif *vif;
5d08cd1d
CH		 1212
1213 /* Current association information needed to configure the
1214 * hardware */
1215 u16 assoc_id;
1216 u16 assoc_capability;
1217 u8 ps_mode;
1218
c8b0e6e1 1219#ifdef CONFIG_IWL4965_QOS
bb8c093b 1220 struct iwl4965_qos_info qos_data;
c8b0e6e1 1221#endif /*CONFIG_IWL4965_QOS */
5d08cd1d
CH		 1222
1223 struct workqueue_struct *workqueue;
1224
1225 struct work_struct up;
1226 struct work_struct restart;
1227 struct work_struct calibrated_work;
1228 struct work_struct scan_completed;
1229 struct work_struct rx_replenish;
1230 struct work_struct rf_kill;
1231 struct work_struct abort_scan;
1232 struct work_struct update_link_led;
1233 struct work_struct auth_work;
1234 struct work_struct report_work;
1235 struct work_struct request_scan;
1236 struct work_struct beacon_update;
1237
1238 struct tasklet_struct irq_tasklet;
1239
1240 struct delayed_work init_alive_start;
1241 struct delayed_work alive_start;
1242 struct delayed_work activity_timer;
1243 struct delayed_work thermal_periodic;
1244 struct delayed_work gather_stats;
1245 struct delayed_work scan_check;
1246 struct delayed_work post_associate;
1247
1248#define IWL_DEFAULT_TX_POWER 0x0F
1249 s8 user_txpower_limit;
1250 s8 max_channel_txpower_limit;
1251
1252#ifdef CONFIG_PM
1253 u32 pm_state[16];
1254#endif
1255
c8b0e6e1 1256#ifdef CONFIG_IWL4965_DEBUG
5d08cd1d
CH		 1257 /* debugging info */
1258 u32 framecnt_to_us;
1259 atomic_t restrict_refcnt;
1260#endif
1261
1262 struct work_struct txpower_work;
c8b0e6e1 1263#ifdef CONFIG_IWL4965_SENSITIVITY
5d08cd1d
CH		 1264 struct work_struct sensitivity_work;
1265#endif
1266 struct work_struct statistics_work;
1267 struct timer_list statistics_periodic;
1268
c8b0e6e1 1269#ifdef CONFIG_IWL4965_HT_AGG
5d08cd1d
CH		 1270 struct work_struct agg_work;
1271#endif
bb8c093b 1272}; /*iwl4965_priv */
5d08cd1d 1273
bb8c093b 1274static inline int iwl4965_is_associated(struct iwl4965_priv *priv)
5d08cd1d
CH		 1275{
1276 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1277}
1278
bb8c093b 1279static inline int is_channel_valid(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1280{
1281 if (ch_info == NULL)
1282 return 0;
1283 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1284}
1285
bb8c093b 1286static inline int is_channel_narrow(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1287{
1288 return (ch_info->flags & EEPROM_CHANNEL_NARROW) ? 1 : 0;
1289}
1290
bb8c093b 1291static inline int is_channel_radar(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1292{
1293 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1294}
1295
bb8c093b 1296static inline u8 is_channel_a_band(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1297{
1298 return ch_info->phymode == MODE_IEEE80211A;
1299}
1300
bb8c093b 1301static inline u8 is_channel_bg_band(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1302{
1303 return ((ch_info->phymode == MODE_IEEE80211B) ||
1304 (ch_info->phymode == MODE_IEEE80211G));
1305}
1306
bb8c093b 1307static inline int is_channel_passive(const struct iwl4965_channel_info *ch)
5d08cd1d
CH		 1308{
1309 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1310}
1311
bb8c093b 1312static inline int is_channel_ibss(const struct iwl4965_channel_info *ch)
5d08cd1d
CH		 1313{
1314 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1315}
1316
bb8c093b
CH		 1317extern const struct iwl4965_channel_info *iwl4965_get_channel_info(
1318 const struct iwl4965_priv *priv, int phymode, u16 channel);
5d08cd1d 1319
bb8c093b 1320/* Requires full declaration of iwl4965_priv before including */
5d08cd1d
CH		 1321#include "iwl-4965-io.h"
1322
bb8c093b 1323#endif /* __iwl4965_4965_h__ */
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