]> Git Repo - linux.git/blame - drivers/nvme/host/rdma.c
nvme-rdma: remove redundant reference between ib_device and tagset
[linux.git] / drivers / nvme / host / rdma.c
CommitLineData
5d8762d5 1// SPDX-License-Identifier: GPL-2.0
71102307
CH
2/*
3 * NVMe over Fabrics RDMA host code.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
71102307
CH
5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
71102307
CH
7#include <linux/module.h>
8#include <linux/init.h>
9#include <linux/slab.h>
f41725bb 10#include <rdma/mr_pool.h>
71102307
CH
11#include <linux/err.h>
12#include <linux/string.h>
71102307
CH
13#include <linux/atomic.h>
14#include <linux/blk-mq.h>
0b36658c 15#include <linux/blk-mq-rdma.h>
71102307
CH
16#include <linux/types.h>
17#include <linux/list.h>
18#include <linux/mutex.h>
19#include <linux/scatterlist.h>
20#include <linux/nvme.h>
71102307
CH
21#include <asm/unaligned.h>
22
23#include <rdma/ib_verbs.h>
24#include <rdma/rdma_cm.h>
71102307
CH
25#include <linux/nvme-rdma.h>
26
27#include "nvme.h"
28#include "fabrics.h"
29
30
782d820c 31#define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */
71102307 32
71102307
CH
33#define NVME_RDMA_MAX_SEGMENTS 256
34
64a741c1 35#define NVME_RDMA_MAX_INLINE_SEGMENTS 4
71102307 36
71102307 37struct nvme_rdma_device {
f87c89ad
MG
38 struct ib_device *dev;
39 struct ib_pd *pd;
71102307
CH
40 struct kref ref;
41 struct list_head entry;
64a741c1 42 unsigned int num_inline_segments;
71102307
CH
43};
44
45struct nvme_rdma_qe {
46 struct ib_cqe cqe;
47 void *data;
48 u64 dma;
49};
50
51struct nvme_rdma_queue;
52struct nvme_rdma_request {
d49187e9 53 struct nvme_request req;
71102307
CH
54 struct ib_mr *mr;
55 struct nvme_rdma_qe sqe;
4af7f7ff
SG
56 union nvme_result result;
57 __le16 status;
58 refcount_t ref;
71102307
CH
59 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
60 u32 num_sge;
61 int nents;
71102307
CH
62 struct ib_reg_wr reg_wr;
63 struct ib_cqe reg_cqe;
64 struct nvme_rdma_queue *queue;
65 struct sg_table sg_table;
66 struct scatterlist first_sgl[];
67};
68
69enum nvme_rdma_queue_flags {
5013e98b
SG
70 NVME_RDMA_Q_ALLOCATED = 0,
71 NVME_RDMA_Q_LIVE = 1,
eb1bd249 72 NVME_RDMA_Q_TR_READY = 2,
71102307
CH
73};
74
75struct nvme_rdma_queue {
76 struct nvme_rdma_qe *rsp_ring;
71102307
CH
77 int queue_size;
78 size_t cmnd_capsule_len;
79 struct nvme_rdma_ctrl *ctrl;
80 struct nvme_rdma_device *device;
81 struct ib_cq *ib_cq;
82 struct ib_qp *qp;
83
84 unsigned long flags;
85 struct rdma_cm_id *cm_id;
86 int cm_error;
87 struct completion cm_done;
88};
89
90struct nvme_rdma_ctrl {
71102307
CH
91 /* read only in the hot path */
92 struct nvme_rdma_queue *queues;
71102307
CH
93
94 /* other member variables */
71102307 95 struct blk_mq_tag_set tag_set;
71102307
CH
96 struct work_struct err_work;
97
98 struct nvme_rdma_qe async_event_sqe;
99
71102307
CH
100 struct delayed_work reconnect_work;
101
102 struct list_head list;
103
104 struct blk_mq_tag_set admin_tag_set;
105 struct nvme_rdma_device *device;
106
71102307
CH
107 u32 max_fr_pages;
108
0928f9b4
SG
109 struct sockaddr_storage addr;
110 struct sockaddr_storage src_addr;
71102307
CH
111
112 struct nvme_ctrl ctrl;
64a741c1 113 bool use_inline_data;
b1064d3e 114 u32 io_queues[HCTX_MAX_TYPES];
71102307
CH
115};
116
117static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
118{
119 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
120}
121
122static LIST_HEAD(device_list);
123static DEFINE_MUTEX(device_list_mutex);
124
125static LIST_HEAD(nvme_rdma_ctrl_list);
126static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
127
71102307
CH
128/*
129 * Disabling this option makes small I/O goes faster, but is fundamentally
130 * unsafe. With it turned off we will have to register a global rkey that
131 * allows read and write access to all physical memory.
132 */
133static bool register_always = true;
134module_param(register_always, bool, 0444);
135MODULE_PARM_DESC(register_always,
136 "Use memory registration even for contiguous memory regions");
137
138static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
139 struct rdma_cm_event *event);
140static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
71102307 141
90af3512
SG
142static const struct blk_mq_ops nvme_rdma_mq_ops;
143static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
144
71102307
CH
145/* XXX: really should move to a generic header sooner or later.. */
146static inline void put_unaligned_le24(u32 val, u8 *p)
147{
148 *p++ = val;
149 *p++ = val >> 8;
150 *p++ = val >> 16;
151}
152
153static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
154{
155 return queue - queue->ctrl->queues;
156}
157
ff8519f9
SG
158static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
159{
160 return nvme_rdma_queue_idx(queue) >
b1064d3e
SG
161 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
162 queue->ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
163}
164
71102307
CH
165static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
166{
167 return queue->cmnd_capsule_len - sizeof(struct nvme_command);
168}
169
170static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
171 size_t capsule_size, enum dma_data_direction dir)
172{
173 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
174 kfree(qe->data);
175}
176
177static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
178 size_t capsule_size, enum dma_data_direction dir)
179{
180 qe->data = kzalloc(capsule_size, GFP_KERNEL);
181 if (!qe->data)
182 return -ENOMEM;
183
184 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
185 if (ib_dma_mapping_error(ibdev, qe->dma)) {
186 kfree(qe->data);
6344d02d 187 qe->data = NULL;
71102307
CH
188 return -ENOMEM;
189 }
190
191 return 0;
192}
193
194static void nvme_rdma_free_ring(struct ib_device *ibdev,
195 struct nvme_rdma_qe *ring, size_t ib_queue_size,
196 size_t capsule_size, enum dma_data_direction dir)
197{
198 int i;
199
200 for (i = 0; i < ib_queue_size; i++)
201 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
202 kfree(ring);
203}
204
205static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
206 size_t ib_queue_size, size_t capsule_size,
207 enum dma_data_direction dir)
208{
209 struct nvme_rdma_qe *ring;
210 int i;
211
212 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
213 if (!ring)
214 return NULL;
215
216 for (i = 0; i < ib_queue_size; i++) {
217 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
218 goto out_free_ring;
219 }
220
221 return ring;
222
223out_free_ring:
224 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
225 return NULL;
226}
227
228static void nvme_rdma_qp_event(struct ib_event *event, void *context)
229{
27a4beef
MG
230 pr_debug("QP event %s (%d)\n",
231 ib_event_msg(event->event), event->event);
232
71102307
CH
233}
234
235static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
236{
35da77d5
BVA
237 int ret;
238
239 ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
71102307 240 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
35da77d5
BVA
241 if (ret < 0)
242 return ret;
243 if (ret == 0)
244 return -ETIMEDOUT;
245 WARN_ON_ONCE(queue->cm_error > 0);
71102307
CH
246 return queue->cm_error;
247}
248
249static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
250{
251 struct nvme_rdma_device *dev = queue->device;
252 struct ib_qp_init_attr init_attr;
253 int ret;
254
255 memset(&init_attr, 0, sizeof(init_attr));
256 init_attr.event_handler = nvme_rdma_qp_event;
257 /* +1 for drain */
258 init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
259 /* +1 for drain */
260 init_attr.cap.max_recv_wr = queue->queue_size + 1;
261 init_attr.cap.max_recv_sge = 1;
64a741c1 262 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
71102307
CH
263 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
264 init_attr.qp_type = IB_QPT_RC;
265 init_attr.send_cq = queue->ib_cq;
266 init_attr.recv_cq = queue->ib_cq;
267
268 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
269
270 queue->qp = queue->cm_id->qp;
271 return ret;
272}
273
385475ee
CH
274static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
275 struct request *rq, unsigned int hctx_idx)
71102307 276{
385475ee 277 struct nvme_rdma_ctrl *ctrl = set->driver_data;
71102307 278 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
385475ee 279 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
71102307
CH
280 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
281 struct nvme_rdma_device *dev = queue->device;
282
71102307
CH
283 nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
284 DMA_TO_DEVICE);
285}
286
385475ee
CH
287static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
288 struct request *rq, unsigned int hctx_idx,
289 unsigned int numa_node)
71102307 290{
385475ee 291 struct nvme_rdma_ctrl *ctrl = set->driver_data;
71102307 292 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
385475ee 293 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
71102307
CH
294 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
295 struct nvme_rdma_device *dev = queue->device;
296 struct ib_device *ibdev = dev->dev;
297 int ret;
298
59e29ce6 299 nvme_req(rq)->ctrl = &ctrl->ctrl;
71102307
CH
300 ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command),
301 DMA_TO_DEVICE);
302 if (ret)
303 return ret;
304
71102307
CH
305 req->queue = queue;
306
307 return 0;
71102307
CH
308}
309
71102307
CH
310static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
311 unsigned int hctx_idx)
312{
313 struct nvme_rdma_ctrl *ctrl = data;
314 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
315
d858e5f0 316 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
71102307
CH
317
318 hctx->driver_data = queue;
319 return 0;
320}
321
322static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
323 unsigned int hctx_idx)
324{
325 struct nvme_rdma_ctrl *ctrl = data;
326 struct nvme_rdma_queue *queue = &ctrl->queues[0];
327
328 BUG_ON(hctx_idx != 0);
329
330 hctx->driver_data = queue;
331 return 0;
332}
333
334static void nvme_rdma_free_dev(struct kref *ref)
335{
336 struct nvme_rdma_device *ndev =
337 container_of(ref, struct nvme_rdma_device, ref);
338
339 mutex_lock(&device_list_mutex);
340 list_del(&ndev->entry);
341 mutex_unlock(&device_list_mutex);
342
71102307 343 ib_dealloc_pd(ndev->pd);
71102307
CH
344 kfree(ndev);
345}
346
347static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
348{
349 kref_put(&dev->ref, nvme_rdma_free_dev);
350}
351
352static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
353{
354 return kref_get_unless_zero(&dev->ref);
355}
356
357static struct nvme_rdma_device *
358nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
359{
360 struct nvme_rdma_device *ndev;
361
362 mutex_lock(&device_list_mutex);
363 list_for_each_entry(ndev, &device_list, entry) {
364 if (ndev->dev->node_guid == cm_id->device->node_guid &&
365 nvme_rdma_dev_get(ndev))
366 goto out_unlock;
367 }
368
369 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
370 if (!ndev)
371 goto out_err;
372
373 ndev->dev = cm_id->device;
374 kref_init(&ndev->ref);
375
11975e01
CH
376 ndev->pd = ib_alloc_pd(ndev->dev,
377 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
71102307
CH
378 if (IS_ERR(ndev->pd))
379 goto out_free_dev;
380
71102307
CH
381 if (!(ndev->dev->attrs.device_cap_flags &
382 IB_DEVICE_MEM_MGT_EXTENSIONS)) {
383 dev_err(&ndev->dev->dev,
384 "Memory registrations not supported.\n");
11975e01 385 goto out_free_pd;
71102307
CH
386 }
387
64a741c1 388 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
0a3173a5 389 ndev->dev->attrs.max_send_sge - 1);
71102307
CH
390 list_add(&ndev->entry, &device_list);
391out_unlock:
392 mutex_unlock(&device_list_mutex);
393 return ndev;
394
71102307
CH
395out_free_pd:
396 ib_dealloc_pd(ndev->pd);
397out_free_dev:
398 kfree(ndev);
399out_err:
400 mutex_unlock(&device_list_mutex);
401 return NULL;
402}
403
404static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
405{
eb1bd249
MG
406 struct nvme_rdma_device *dev;
407 struct ib_device *ibdev;
408
409 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
410 return;
411
412 dev = queue->device;
413 ibdev = dev->dev;
71102307 414
f41725bb
IR
415 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
416
eb1bd249
MG
417 /*
418 * The cm_id object might have been destroyed during RDMA connection
419 * establishment error flow to avoid getting other cma events, thus
420 * the destruction of the QP shouldn't use rdma_cm API.
421 */
422 ib_destroy_qp(queue->qp);
71102307
CH
423 ib_free_cq(queue->ib_cq);
424
425 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
426 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
427
428 nvme_rdma_dev_put(dev);
429}
430
f41725bb
IR
431static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev)
432{
433 return min_t(u32, NVME_RDMA_MAX_SEGMENTS,
434 ibdev->attrs.max_fast_reg_page_list_len);
435}
436
ca6e95bb 437static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
71102307 438{
ca6e95bb 439 struct ib_device *ibdev;
71102307
CH
440 const int send_wr_factor = 3; /* MR, SEND, INV */
441 const int cq_factor = send_wr_factor + 1; /* + RECV */
442 int comp_vector, idx = nvme_rdma_queue_idx(queue);
ff8519f9 443 enum ib_poll_context poll_ctx;
71102307
CH
444 int ret;
445
ca6e95bb
SG
446 queue->device = nvme_rdma_find_get_device(queue->cm_id);
447 if (!queue->device) {
448 dev_err(queue->cm_id->device->dev.parent,
449 "no client data found!\n");
450 return -ECONNREFUSED;
451 }
452 ibdev = queue->device->dev;
71102307
CH
453
454 /*
0b36658c
SG
455 * Spread I/O queues completion vectors according their queue index.
456 * Admin queues can always go on completion vector 0.
71102307 457 */
0b36658c 458 comp_vector = idx == 0 ? idx : idx - 1;
71102307 459
ff8519f9
SG
460 /* Polling queues need direct cq polling context */
461 if (nvme_rdma_poll_queue(queue))
462 poll_ctx = IB_POLL_DIRECT;
463 else
464 poll_ctx = IB_POLL_SOFTIRQ;
465
71102307 466 /* +1 for ib_stop_cq */
ca6e95bb
SG
467 queue->ib_cq = ib_alloc_cq(ibdev, queue,
468 cq_factor * queue->queue_size + 1,
ff8519f9 469 comp_vector, poll_ctx);
71102307
CH
470 if (IS_ERR(queue->ib_cq)) {
471 ret = PTR_ERR(queue->ib_cq);
ca6e95bb 472 goto out_put_dev;
71102307
CH
473 }
474
475 ret = nvme_rdma_create_qp(queue, send_wr_factor);
476 if (ret)
477 goto out_destroy_ib_cq;
478
479 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
480 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
481 if (!queue->rsp_ring) {
482 ret = -ENOMEM;
483 goto out_destroy_qp;
484 }
485
f41725bb
IR
486 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
487 queue->queue_size,
488 IB_MR_TYPE_MEM_REG,
489 nvme_rdma_get_max_fr_pages(ibdev));
490 if (ret) {
491 dev_err(queue->ctrl->ctrl.device,
492 "failed to initialize MR pool sized %d for QID %d\n",
493 queue->queue_size, idx);
494 goto out_destroy_ring;
495 }
496
eb1bd249
MG
497 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
498
71102307
CH
499 return 0;
500
f41725bb
IR
501out_destroy_ring:
502 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
503 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
71102307 504out_destroy_qp:
1f61def9 505 rdma_destroy_qp(queue->cm_id);
71102307
CH
506out_destroy_ib_cq:
507 ib_free_cq(queue->ib_cq);
ca6e95bb
SG
508out_put_dev:
509 nvme_rdma_dev_put(queue->device);
71102307
CH
510 return ret;
511}
512
41e8cfa1 513static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
71102307
CH
514 int idx, size_t queue_size)
515{
516 struct nvme_rdma_queue *queue;
8f4e8dac 517 struct sockaddr *src_addr = NULL;
71102307
CH
518 int ret;
519
520 queue = &ctrl->queues[idx];
521 queue->ctrl = ctrl;
522 init_completion(&queue->cm_done);
523
524 if (idx > 0)
525 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
526 else
527 queue->cmnd_capsule_len = sizeof(struct nvme_command);
528
529 queue->queue_size = queue_size;
530
531 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
532 RDMA_PS_TCP, IB_QPT_RC);
533 if (IS_ERR(queue->cm_id)) {
534 dev_info(ctrl->ctrl.device,
535 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
536 return PTR_ERR(queue->cm_id);
537 }
538
8f4e8dac 539 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
0928f9b4 540 src_addr = (struct sockaddr *)&ctrl->src_addr;
8f4e8dac 541
0928f9b4
SG
542 queue->cm_error = -ETIMEDOUT;
543 ret = rdma_resolve_addr(queue->cm_id, src_addr,
544 (struct sockaddr *)&ctrl->addr,
71102307
CH
545 NVME_RDMA_CONNECT_TIMEOUT_MS);
546 if (ret) {
547 dev_info(ctrl->ctrl.device,
548 "rdma_resolve_addr failed (%d).\n", ret);
549 goto out_destroy_cm_id;
550 }
551
552 ret = nvme_rdma_wait_for_cm(queue);
553 if (ret) {
554 dev_info(ctrl->ctrl.device,
d8bfceeb 555 "rdma connection establishment failed (%d)\n", ret);
71102307
CH
556 goto out_destroy_cm_id;
557 }
558
5013e98b 559 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
71102307
CH
560
561 return 0;
562
563out_destroy_cm_id:
564 rdma_destroy_id(queue->cm_id);
eb1bd249 565 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
566 return ret;
567}
568
569static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
570{
a57bd541
SG
571 if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
572 return;
573
71102307
CH
574 rdma_disconnect(queue->cm_id);
575 ib_drain_qp(queue->qp);
576}
577
578static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
579{
5013e98b 580 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
a57bd541
SG
581 return;
582
71102307
CH
583 nvme_rdma_destroy_queue_ib(queue);
584 rdma_destroy_id(queue->cm_id);
585}
586
a57bd541 587static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 588{
a57bd541
SG
589 int i;
590
591 for (i = 1; i < ctrl->ctrl.queue_count; i++)
592 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
593}
594
a57bd541 595static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
596{
597 int i;
598
d858e5f0 599 for (i = 1; i < ctrl->ctrl.queue_count; i++)
a57bd541 600 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
601}
602
68e16fcf
SG
603static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
604{
ff8519f9
SG
605 struct nvme_rdma_queue *queue = &ctrl->queues[idx];
606 bool poll = nvme_rdma_poll_queue(queue);
68e16fcf
SG
607 int ret;
608
609 if (idx)
ff8519f9 610 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll);
68e16fcf
SG
611 else
612 ret = nvmf_connect_admin_queue(&ctrl->ctrl);
613
614 if (!ret)
ff8519f9 615 set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
68e16fcf
SG
616 else
617 dev_info(ctrl->ctrl.device,
618 "failed to connect queue: %d ret=%d\n", idx, ret);
619 return ret;
620}
621
622static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
623{
624 int i, ret = 0;
625
d858e5f0 626 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
68e16fcf
SG
627 ret = nvme_rdma_start_queue(ctrl, i);
628 if (ret)
a57bd541 629 goto out_stop_queues;
71102307
CH
630 }
631
c8dbc37c
SW
632 return 0;
633
a57bd541 634out_stop_queues:
68e16fcf
SG
635 for (i--; i >= 1; i--)
636 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
637 return ret;
638}
639
41e8cfa1 640static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 641{
c248c643 642 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
0b36658c 643 struct ib_device *ibdev = ctrl->device->dev;
c248c643 644 unsigned int nr_io_queues;
71102307
CH
645 int i, ret;
646
c248c643 647 nr_io_queues = min(opts->nr_io_queues, num_online_cpus());
0b36658c
SG
648
649 /*
650 * we map queues according to the device irq vectors for
651 * optimal locality so we don't need more queues than
652 * completion vectors.
653 */
654 nr_io_queues = min_t(unsigned int, nr_io_queues,
655 ibdev->num_comp_vectors);
656
b1064d3e
SG
657 if (opts->nr_write_queues) {
658 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
659 min(opts->nr_write_queues, nr_io_queues);
660 nr_io_queues += ctrl->io_queues[HCTX_TYPE_DEFAULT];
661 } else {
662 ctrl->io_queues[HCTX_TYPE_DEFAULT] = nr_io_queues;
663 }
664
665 ctrl->io_queues[HCTX_TYPE_READ] = nr_io_queues;
666
667 if (opts->nr_poll_queues) {
668 ctrl->io_queues[HCTX_TYPE_POLL] =
669 min(opts->nr_poll_queues, num_online_cpus());
670 nr_io_queues += ctrl->io_queues[HCTX_TYPE_POLL];
671 }
b65bb777 672
c248c643
SG
673 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
674 if (ret)
675 return ret;
676
d858e5f0
SG
677 ctrl->ctrl.queue_count = nr_io_queues + 1;
678 if (ctrl->ctrl.queue_count < 2)
c248c643
SG
679 return 0;
680
681 dev_info(ctrl->ctrl.device,
682 "creating %d I/O queues.\n", nr_io_queues);
683
d858e5f0 684 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
41e8cfa1
SG
685 ret = nvme_rdma_alloc_queue(ctrl, i,
686 ctrl->ctrl.sqsize + 1);
687 if (ret)
71102307 688 goto out_free_queues;
71102307
CH
689 }
690
691 return 0;
692
693out_free_queues:
f361e5a0 694 for (i--; i >= 1; i--)
a57bd541 695 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
696
697 return ret;
698}
699
b28a308e
SG
700static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
701 bool admin)
702{
703 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
704 struct blk_mq_tag_set *set;
705 int ret;
706
707 if (admin) {
708 set = &ctrl->admin_tag_set;
709 memset(set, 0, sizeof(*set));
710 set->ops = &nvme_rdma_admin_mq_ops;
38dabe21 711 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
b28a308e 712 set->reserved_tags = 2; /* connect + keep-alive */
103e515e 713 set->numa_node = nctrl->numa_node;
b28a308e
SG
714 set->cmd_size = sizeof(struct nvme_rdma_request) +
715 SG_CHUNK_SIZE * sizeof(struct scatterlist);
716 set->driver_data = ctrl;
717 set->nr_hw_queues = 1;
718 set->timeout = ADMIN_TIMEOUT;
94f29d4f 719 set->flags = BLK_MQ_F_NO_SCHED;
b28a308e
SG
720 } else {
721 set = &ctrl->tag_set;
722 memset(set, 0, sizeof(*set));
723 set->ops = &nvme_rdma_mq_ops;
5e77d61c 724 set->queue_depth = nctrl->sqsize + 1;
b28a308e 725 set->reserved_tags = 1; /* fabric connect */
103e515e 726 set->numa_node = nctrl->numa_node;
b28a308e
SG
727 set->flags = BLK_MQ_F_SHOULD_MERGE;
728 set->cmd_size = sizeof(struct nvme_rdma_request) +
729 SG_CHUNK_SIZE * sizeof(struct scatterlist);
730 set->driver_data = ctrl;
731 set->nr_hw_queues = nctrl->queue_count - 1;
732 set->timeout = NVME_IO_TIMEOUT;
ff8519f9 733 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
b28a308e
SG
734 }
735
736 ret = blk_mq_alloc_tag_set(set);
737 if (ret)
87fd1253 738 return ERR_PTR(ret);
b28a308e
SG
739
740 return set;
b28a308e
SG
741}
742
3f02fffb
SG
743static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
744 bool remove)
71102307 745{
3f02fffb
SG
746 if (remove) {
747 blk_cleanup_queue(ctrl->ctrl.admin_q);
87fd1253 748 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
3f02fffb 749 }
682630f0
SG
750 if (ctrl->async_event_sqe.data) {
751 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
752 sizeof(struct nvme_command), DMA_TO_DEVICE);
753 ctrl->async_event_sqe.data = NULL;
754 }
a57bd541 755 nvme_rdma_free_queue(&ctrl->queues[0]);
71102307
CH
756}
757
3f02fffb
SG
758static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
759 bool new)
90af3512
SG
760{
761 int error;
762
41e8cfa1 763 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
90af3512
SG
764 if (error)
765 return error;
766
767 ctrl->device = ctrl->queues[0].device;
103e515e 768 ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device);
90af3512 769
f41725bb 770 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev);
90af3512 771
94e42213
SG
772 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
773 sizeof(struct nvme_command), DMA_TO_DEVICE);
774 if (error)
775 goto out_free_queue;
776
3f02fffb
SG
777 if (new) {
778 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
f04b9cc8
SG
779 if (IS_ERR(ctrl->ctrl.admin_tagset)) {
780 error = PTR_ERR(ctrl->ctrl.admin_tagset);
94e42213 781 goto out_free_async_qe;
f04b9cc8 782 }
90af3512 783
3f02fffb
SG
784 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
785 if (IS_ERR(ctrl->ctrl.admin_q)) {
786 error = PTR_ERR(ctrl->ctrl.admin_q);
787 goto out_free_tagset;
788 }
90af3512
SG
789 }
790
68e16fcf 791 error = nvme_rdma_start_queue(ctrl, 0);
90af3512
SG
792 if (error)
793 goto out_cleanup_queue;
794
09fdc23b 795 error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP,
90af3512
SG
796 &ctrl->ctrl.cap);
797 if (error) {
798 dev_err(ctrl->ctrl.device,
799 "prop_get NVME_REG_CAP failed\n");
2e050f00 800 goto out_stop_queue;
90af3512
SG
801 }
802
803 ctrl->ctrl.sqsize =
804 min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize);
805
806 error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
807 if (error)
2e050f00 808 goto out_stop_queue;
90af3512
SG
809
810 ctrl->ctrl.max_hw_sectors =
126e76ff 811 (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9);
90af3512
SG
812
813 error = nvme_init_identify(&ctrl->ctrl);
814 if (error)
2e050f00 815 goto out_stop_queue;
90af3512 816
90af3512
SG
817 return 0;
818
2e050f00
JW
819out_stop_queue:
820 nvme_rdma_stop_queue(&ctrl->queues[0]);
90af3512 821out_cleanup_queue:
3f02fffb
SG
822 if (new)
823 blk_cleanup_queue(ctrl->ctrl.admin_q);
90af3512 824out_free_tagset:
3f02fffb 825 if (new)
87fd1253 826 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
94e42213
SG
827out_free_async_qe:
828 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
829 sizeof(struct nvme_command), DMA_TO_DEVICE);
6344d02d 830 ctrl->async_event_sqe.data = NULL;
90af3512
SG
831out_free_queue:
832 nvme_rdma_free_queue(&ctrl->queues[0]);
833 return error;
834}
835
a57bd541
SG
836static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
837 bool remove)
838{
a57bd541
SG
839 if (remove) {
840 blk_cleanup_queue(ctrl->ctrl.connect_q);
87fd1253 841 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
842 }
843 nvme_rdma_free_io_queues(ctrl);
844}
845
846static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
847{
848 int ret;
849
41e8cfa1 850 ret = nvme_rdma_alloc_io_queues(ctrl);
a57bd541
SG
851 if (ret)
852 return ret;
853
854 if (new) {
855 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
f04b9cc8
SG
856 if (IS_ERR(ctrl->ctrl.tagset)) {
857 ret = PTR_ERR(ctrl->ctrl.tagset);
a57bd541 858 goto out_free_io_queues;
f04b9cc8 859 }
a57bd541
SG
860
861 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
862 if (IS_ERR(ctrl->ctrl.connect_q)) {
863 ret = PTR_ERR(ctrl->ctrl.connect_q);
864 goto out_free_tag_set;
865 }
866 } else {
a57bd541
SG
867 blk_mq_update_nr_hw_queues(&ctrl->tag_set,
868 ctrl->ctrl.queue_count - 1);
869 }
870
68e16fcf 871 ret = nvme_rdma_start_io_queues(ctrl);
a57bd541
SG
872 if (ret)
873 goto out_cleanup_connect_q;
874
875 return 0;
876
877out_cleanup_connect_q:
878 if (new)
879 blk_cleanup_queue(ctrl->ctrl.connect_q);
880out_free_tag_set:
881 if (new)
87fd1253 882 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
883out_free_io_queues:
884 nvme_rdma_free_io_queues(ctrl);
885 return ret;
71102307
CH
886}
887
75862c72
SG
888static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
889 bool remove)
890{
891 blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
892 nvme_rdma_stop_queue(&ctrl->queues[0]);
1007709d
SG
893 if (ctrl->ctrl.admin_tagset)
894 blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset,
895 nvme_cancel_request, &ctrl->ctrl);
75862c72
SG
896 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
897 nvme_rdma_destroy_admin_queue(ctrl, remove);
898}
899
900static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
901 bool remove)
902{
903 if (ctrl->ctrl.queue_count > 1) {
904 nvme_stop_queues(&ctrl->ctrl);
905 nvme_rdma_stop_io_queues(ctrl);
1007709d
SG
906 if (ctrl->ctrl.tagset)
907 blk_mq_tagset_busy_iter(ctrl->ctrl.tagset,
908 nvme_cancel_request, &ctrl->ctrl);
75862c72
SG
909 if (remove)
910 nvme_start_queues(&ctrl->ctrl);
911 nvme_rdma_destroy_io_queues(ctrl, remove);
912 }
913}
914
71102307
CH
915static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
916{
917 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
918
919 if (list_empty(&ctrl->list))
920 goto free_ctrl;
921
922 mutex_lock(&nvme_rdma_ctrl_mutex);
923 list_del(&ctrl->list);
924 mutex_unlock(&nvme_rdma_ctrl_mutex);
925
71102307
CH
926 nvmf_free_options(nctrl->opts);
927free_ctrl:
3d064101 928 kfree(ctrl->queues);
71102307
CH
929 kfree(ctrl);
930}
931
fd8563ce
SG
932static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
933{
934 /* If we are resetting/deleting then do nothing */
ad6a0a52 935 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
fd8563ce
SG
936 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
937 ctrl->ctrl.state == NVME_CTRL_LIVE);
938 return;
939 }
940
941 if (nvmf_should_reconnect(&ctrl->ctrl)) {
942 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
943 ctrl->ctrl.opts->reconnect_delay);
9a6327d2 944 queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
fd8563ce
SG
945 ctrl->ctrl.opts->reconnect_delay * HZ);
946 } else {
12fa1304 947 nvme_delete_ctrl(&ctrl->ctrl);
fd8563ce
SG
948 }
949}
950
c66e2998 951static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
71102307 952{
c66e2998 953 int ret = -EINVAL;
71102307 954 bool changed;
71102307 955
c66e2998 956 ret = nvme_rdma_configure_admin_queue(ctrl, new);
71102307 957 if (ret)
c66e2998
SG
958 return ret;
959
960 if (ctrl->ctrl.icdoff) {
961 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
962 goto destroy_admin;
963 }
964
965 if (!(ctrl->ctrl.sgls & (1 << 2))) {
966 dev_err(ctrl->ctrl.device,
967 "Mandatory keyed sgls are not supported!\n");
968 goto destroy_admin;
969 }
970
971 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
972 dev_warn(ctrl->ctrl.device,
973 "queue_size %zu > ctrl sqsize %u, clamping down\n",
974 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
975 }
976
977 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
978 dev_warn(ctrl->ctrl.device,
979 "sqsize %u > ctrl maxcmd %u, clamping down\n",
980 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
981 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
982 }
71102307 983
64a741c1
SW
984 if (ctrl->ctrl.sgls & (1 << 20))
985 ctrl->use_inline_data = true;
71102307 986
d858e5f0 987 if (ctrl->ctrl.queue_count > 1) {
c66e2998 988 ret = nvme_rdma_configure_io_queues(ctrl, new);
71102307 989 if (ret)
5e1fe61d 990 goto destroy_admin;
71102307
CH
991 }
992
993 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
0a960afd
SG
994 if (!changed) {
995 /* state change failure is ok if we're in DELETING state */
996 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
c66e2998
SG
997 ret = -EINVAL;
998 goto destroy_io;
0a960afd
SG
999 }
1000
d09f2b45 1001 nvme_start_ctrl(&ctrl->ctrl);
c66e2998
SG
1002 return 0;
1003
1004destroy_io:
1005 if (ctrl->ctrl.queue_count > 1)
1006 nvme_rdma_destroy_io_queues(ctrl, new);
1007destroy_admin:
1008 nvme_rdma_stop_queue(&ctrl->queues[0]);
1009 nvme_rdma_destroy_admin_queue(ctrl, new);
1010 return ret;
1011}
1012
1013static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1014{
1015 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1016 struct nvme_rdma_ctrl, reconnect_work);
1017
1018 ++ctrl->ctrl.nr_reconnects;
1019
1020 if (nvme_rdma_setup_ctrl(ctrl, false))
1021 goto requeue;
71102307 1022
5e1fe61d
SG
1023 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1024 ctrl->ctrl.nr_reconnects);
1025
1026 ctrl->ctrl.nr_reconnects = 0;
71102307
CH
1027
1028 return;
1029
71102307 1030requeue:
fd8563ce 1031 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
fdf9dfa8 1032 ctrl->ctrl.nr_reconnects);
fd8563ce 1033 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1034}
1035
1036static void nvme_rdma_error_recovery_work(struct work_struct *work)
1037{
1038 struct nvme_rdma_ctrl *ctrl = container_of(work,
1039 struct nvme_rdma_ctrl, err_work);
1040
e4d753d7 1041 nvme_stop_keep_alive(&ctrl->ctrl);
75862c72 1042 nvme_rdma_teardown_io_queues(ctrl, false);
e818a5b4 1043 nvme_start_queues(&ctrl->ctrl);
75862c72 1044 nvme_rdma_teardown_admin_queue(ctrl, false);
e818a5b4 1045
ad6a0a52 1046 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
187c0832
NC
1047 /* state change failure is ok if we're in DELETING state */
1048 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
d5bf4b7f
SG
1049 return;
1050 }
1051
fd8563ce 1052 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1053}
1054
1055static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1056{
d5bf4b7f 1057 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
71102307
CH
1058 return;
1059
9a6327d2 1060 queue_work(nvme_wq, &ctrl->err_work);
71102307
CH
1061}
1062
1063static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1064 const char *op)
1065{
1066 struct nvme_rdma_queue *queue = cq->cq_context;
1067 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1068
1069 if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1070 dev_info(ctrl->ctrl.device,
1071 "%s for CQE 0x%p failed with status %s (%d)\n",
1072 op, wc->wr_cqe,
1073 ib_wc_status_msg(wc->status), wc->status);
1074 nvme_rdma_error_recovery(ctrl);
1075}
1076
1077static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1078{
1079 if (unlikely(wc->status != IB_WC_SUCCESS))
1080 nvme_rdma_wr_error(cq, wc, "MEMREG");
1081}
1082
1083static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1084{
2f122e4f
SG
1085 struct nvme_rdma_request *req =
1086 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1087 struct request *rq = blk_mq_rq_from_pdu(req);
1088
1089 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1090 nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
2f122e4f
SG
1091 return;
1092 }
1093
1094 if (refcount_dec_and_test(&req->ref))
1095 nvme_end_request(rq, req->status, req->result);
1096
71102307
CH
1097}
1098
1099static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1100 struct nvme_rdma_request *req)
1101{
71102307
CH
1102 struct ib_send_wr wr = {
1103 .opcode = IB_WR_LOCAL_INV,
1104 .next = NULL,
1105 .num_sge = 0,
2f122e4f 1106 .send_flags = IB_SEND_SIGNALED,
71102307
CH
1107 .ex.invalidate_rkey = req->mr->rkey,
1108 };
1109
1110 req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1111 wr.wr_cqe = &req->reg_cqe;
1112
45e3cc1a 1113 return ib_post_send(queue->qp, &wr, NULL);
71102307
CH
1114}
1115
1116static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1117 struct request *rq)
1118{
1119 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307
CH
1120 struct nvme_rdma_device *dev = queue->device;
1121 struct ib_device *ibdev = dev->dev;
71102307 1122
34e08191 1123 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1124 return;
1125
f41725bb
IR
1126 if (req->mr) {
1127 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1128 req->mr = NULL;
1129 }
1130
71102307
CH
1131 ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
1132 req->nents, rq_data_dir(rq) ==
1133 WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1134
1135 nvme_cleanup_cmd(rq);
1136 sg_free_table_chained(&req->sg_table, true);
1137}
1138
1139static int nvme_rdma_set_sg_null(struct nvme_command *c)
1140{
1141 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1142
1143 sg->addr = 0;
1144 put_unaligned_le24(0, sg->length);
1145 put_unaligned_le32(0, sg->key);
1146 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1147 return 0;
1148}
1149
1150static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
64a741c1
SW
1151 struct nvme_rdma_request *req, struct nvme_command *c,
1152 int count)
71102307
CH
1153{
1154 struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
64a741c1
SW
1155 struct scatterlist *sgl = req->sg_table.sgl;
1156 struct ib_sge *sge = &req->sge[1];
1157 u32 len = 0;
1158 int i;
71102307 1159
64a741c1
SW
1160 for (i = 0; i < count; i++, sgl++, sge++) {
1161 sge->addr = sg_dma_address(sgl);
1162 sge->length = sg_dma_len(sgl);
1163 sge->lkey = queue->device->pd->local_dma_lkey;
1164 len += sge->length;
1165 }
71102307
CH
1166
1167 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
64a741c1 1168 sg->length = cpu_to_le32(len);
71102307
CH
1169 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1170
64a741c1 1171 req->num_sge += count;
71102307
CH
1172 return 0;
1173}
1174
1175static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1176 struct nvme_rdma_request *req, struct nvme_command *c)
1177{
1178 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1179
1180 sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
1181 put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
11975e01 1182 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
71102307
CH
1183 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1184 return 0;
1185}
1186
1187static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1188 struct nvme_rdma_request *req, struct nvme_command *c,
1189 int count)
1190{
1191 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1192 int nr;
1193
f41725bb
IR
1194 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1195 if (WARN_ON_ONCE(!req->mr))
1196 return -EAGAIN;
1197
b925a2dc
MG
1198 /*
1199 * Align the MR to a 4K page size to match the ctrl page size and
1200 * the block virtual boundary.
1201 */
1202 nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K);
a7b7c7a1 1203 if (unlikely(nr < count)) {
f41725bb
IR
1204 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1205 req->mr = NULL;
71102307
CH
1206 if (nr < 0)
1207 return nr;
1208 return -EINVAL;
1209 }
1210
1211 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1212
1213 req->reg_cqe.done = nvme_rdma_memreg_done;
1214 memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1215 req->reg_wr.wr.opcode = IB_WR_REG_MR;
1216 req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1217 req->reg_wr.wr.num_sge = 0;
1218 req->reg_wr.mr = req->mr;
1219 req->reg_wr.key = req->mr->rkey;
1220 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1221 IB_ACCESS_REMOTE_READ |
1222 IB_ACCESS_REMOTE_WRITE;
1223
71102307
CH
1224 sg->addr = cpu_to_le64(req->mr->iova);
1225 put_unaligned_le24(req->mr->length, sg->length);
1226 put_unaligned_le32(req->mr->rkey, sg->key);
1227 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1228 NVME_SGL_FMT_INVALIDATE;
1229
1230 return 0;
1231}
1232
1233static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
b131c61d 1234 struct request *rq, struct nvme_command *c)
71102307
CH
1235{
1236 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1237 struct nvme_rdma_device *dev = queue->device;
1238 struct ib_device *ibdev = dev->dev;
f9d03f96 1239 int count, ret;
71102307
CH
1240
1241 req->num_sge = 1;
4af7f7ff 1242 refcount_set(&req->ref, 2); /* send and recv completions */
71102307
CH
1243
1244 c->common.flags |= NVME_CMD_SGL_METABUF;
1245
34e08191 1246 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1247 return nvme_rdma_set_sg_null(c);
1248
1249 req->sg_table.sgl = req->first_sgl;
f9d03f96
CH
1250 ret = sg_alloc_table_chained(&req->sg_table,
1251 blk_rq_nr_phys_segments(rq), req->sg_table.sgl);
71102307
CH
1252 if (ret)
1253 return -ENOMEM;
1254
f9d03f96 1255 req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
71102307 1256
f9d03f96 1257 count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
71102307
CH
1258 rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1259 if (unlikely(count <= 0)) {
94423a8f
MG
1260 ret = -EIO;
1261 goto out_free_table;
71102307
CH
1262 }
1263
64a741c1 1264 if (count <= dev->num_inline_segments) {
b131c61d 1265 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
64a741c1 1266 queue->ctrl->use_inline_data &&
b131c61d 1267 blk_rq_payload_bytes(rq) <=
94423a8f 1268 nvme_rdma_inline_data_size(queue)) {
64a741c1 1269 ret = nvme_rdma_map_sg_inline(queue, req, c, count);
94423a8f
MG
1270 goto out;
1271 }
71102307 1272
64a741c1 1273 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
94423a8f
MG
1274 ret = nvme_rdma_map_sg_single(queue, req, c);
1275 goto out;
1276 }
71102307
CH
1277 }
1278
94423a8f
MG
1279 ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1280out:
1281 if (unlikely(ret))
1282 goto out_unmap_sg;
1283
1284 return 0;
1285
1286out_unmap_sg:
1287 ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
1288 req->nents, rq_data_dir(rq) ==
1289 WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1290out_free_table:
1291 sg_free_table_chained(&req->sg_table, true);
1292 return ret;
71102307
CH
1293}
1294
1295static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1296{
4af7f7ff
SG
1297 struct nvme_rdma_qe *qe =
1298 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1299 struct nvme_rdma_request *req =
1300 container_of(qe, struct nvme_rdma_request, sqe);
1301 struct request *rq = blk_mq_rq_from_pdu(req);
1302
1303 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1304 nvme_rdma_wr_error(cq, wc, "SEND");
4af7f7ff
SG
1305 return;
1306 }
1307
1308 if (refcount_dec_and_test(&req->ref))
1309 nvme_end_request(rq, req->status, req->result);
71102307
CH
1310}
1311
1312static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1313 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
b4b591c8 1314 struct ib_send_wr *first)
71102307 1315{
45e3cc1a 1316 struct ib_send_wr wr;
71102307
CH
1317 int ret;
1318
1319 sge->addr = qe->dma;
1320 sge->length = sizeof(struct nvme_command),
1321 sge->lkey = queue->device->pd->local_dma_lkey;
1322
71102307
CH
1323 wr.next = NULL;
1324 wr.wr_cqe = &qe->cqe;
1325 wr.sg_list = sge;
1326 wr.num_sge = num_sge;
1327 wr.opcode = IB_WR_SEND;
b4b591c8 1328 wr.send_flags = IB_SEND_SIGNALED;
71102307
CH
1329
1330 if (first)
1331 first->next = &wr;
1332 else
1333 first = &wr;
1334
45e3cc1a 1335 ret = ib_post_send(queue->qp, first, NULL);
a7b7c7a1 1336 if (unlikely(ret)) {
71102307
CH
1337 dev_err(queue->ctrl->ctrl.device,
1338 "%s failed with error code %d\n", __func__, ret);
1339 }
1340 return ret;
1341}
1342
1343static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1344 struct nvme_rdma_qe *qe)
1345{
45e3cc1a 1346 struct ib_recv_wr wr;
71102307
CH
1347 struct ib_sge list;
1348 int ret;
1349
1350 list.addr = qe->dma;
1351 list.length = sizeof(struct nvme_completion);
1352 list.lkey = queue->device->pd->local_dma_lkey;
1353
1354 qe->cqe.done = nvme_rdma_recv_done;
1355
1356 wr.next = NULL;
1357 wr.wr_cqe = &qe->cqe;
1358 wr.sg_list = &list;
1359 wr.num_sge = 1;
1360
45e3cc1a 1361 ret = ib_post_recv(queue->qp, &wr, NULL);
a7b7c7a1 1362 if (unlikely(ret)) {
71102307
CH
1363 dev_err(queue->ctrl->ctrl.device,
1364 "%s failed with error code %d\n", __func__, ret);
1365 }
1366 return ret;
1367}
1368
1369static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1370{
1371 u32 queue_idx = nvme_rdma_queue_idx(queue);
1372
1373 if (queue_idx == 0)
1374 return queue->ctrl->admin_tag_set.tags[queue_idx];
1375 return queue->ctrl->tag_set.tags[queue_idx - 1];
1376}
1377
b4b591c8
SG
1378static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1379{
1380 if (unlikely(wc->status != IB_WC_SUCCESS))
1381 nvme_rdma_wr_error(cq, wc, "ASYNC");
1382}
1383
ad22c355 1384static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
71102307
CH
1385{
1386 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1387 struct nvme_rdma_queue *queue = &ctrl->queues[0];
1388 struct ib_device *dev = queue->device->dev;
1389 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1390 struct nvme_command *cmd = sqe->data;
1391 struct ib_sge sge;
1392 int ret;
1393
71102307
CH
1394 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1395
1396 memset(cmd, 0, sizeof(*cmd));
1397 cmd->common.opcode = nvme_admin_async_event;
38dabe21 1398 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
71102307
CH
1399 cmd->common.flags |= NVME_CMD_SGL_METABUF;
1400 nvme_rdma_set_sg_null(cmd);
1401
b4b591c8
SG
1402 sqe->cqe.done = nvme_rdma_async_done;
1403
71102307
CH
1404 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1405 DMA_TO_DEVICE);
1406
b4b591c8 1407 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
71102307
CH
1408 WARN_ON_ONCE(ret);
1409}
1410
1052b8ac
JA
1411static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1412 struct nvme_completion *cqe, struct ib_wc *wc)
71102307 1413{
71102307
CH
1414 struct request *rq;
1415 struct nvme_rdma_request *req;
71102307 1416
71102307
CH
1417 rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
1418 if (!rq) {
1419 dev_err(queue->ctrl->ctrl.device,
1420 "tag 0x%x on QP %#x not found\n",
1421 cqe->command_id, queue->qp->qp_num);
1422 nvme_rdma_error_recovery(queue->ctrl);
1052b8ac 1423 return;
71102307
CH
1424 }
1425 req = blk_mq_rq_to_pdu(rq);
1426
4af7f7ff
SG
1427 req->status = cqe->status;
1428 req->result = cqe->result;
71102307 1429
3ef0279b
SG
1430 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1431 if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) {
1432 dev_err(queue->ctrl->ctrl.device,
1433 "Bogus remote invalidation for rkey %#x\n",
1434 req->mr->rkey);
1435 nvme_rdma_error_recovery(queue->ctrl);
1436 }
f41725bb 1437 } else if (req->mr) {
1052b8ac
JA
1438 int ret;
1439
2f122e4f
SG
1440 ret = nvme_rdma_inv_rkey(queue, req);
1441 if (unlikely(ret < 0)) {
1442 dev_err(queue->ctrl->ctrl.device,
1443 "Queueing INV WR for rkey %#x failed (%d)\n",
1444 req->mr->rkey, ret);
1445 nvme_rdma_error_recovery(queue->ctrl);
1446 }
1447 /* the local invalidation completion will end the request */
1052b8ac 1448 return;
2f122e4f 1449 }
71102307 1450
1052b8ac 1451 if (refcount_dec_and_test(&req->ref))
4af7f7ff 1452 nvme_end_request(rq, req->status, req->result);
71102307
CH
1453}
1454
1052b8ac 1455static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
71102307
CH
1456{
1457 struct nvme_rdma_qe *qe =
1458 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1459 struct nvme_rdma_queue *queue = cq->cq_context;
1460 struct ib_device *ibdev = queue->device->dev;
1461 struct nvme_completion *cqe = qe->data;
1462 const size_t len = sizeof(struct nvme_completion);
71102307
CH
1463
1464 if (unlikely(wc->status != IB_WC_SUCCESS)) {
1465 nvme_rdma_wr_error(cq, wc, "RECV");
1052b8ac 1466 return;
71102307
CH
1467 }
1468
1469 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1470 /*
1471 * AEN requests are special as they don't time out and can
1472 * survive any kind of queue freeze and often don't respond to
1473 * aborts. We don't even bother to allocate a struct request
1474 * for them but rather special case them here.
1475 */
1476 if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
38dabe21 1477 cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH))
7bf58533
CH
1478 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1479 &cqe->result);
71102307 1480 else
1052b8ac 1481 nvme_rdma_process_nvme_rsp(queue, cqe, wc);
71102307
CH
1482 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1483
1484 nvme_rdma_post_recv(queue, qe);
71102307
CH
1485}
1486
1487static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1488{
1489 int ret, i;
1490
1491 for (i = 0; i < queue->queue_size; i++) {
1492 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1493 if (ret)
1494 goto out_destroy_queue_ib;
1495 }
1496
1497 return 0;
1498
1499out_destroy_queue_ib:
1500 nvme_rdma_destroy_queue_ib(queue);
1501 return ret;
1502}
1503
1504static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1505 struct rdma_cm_event *ev)
1506{
7f03953c
SW
1507 struct rdma_cm_id *cm_id = queue->cm_id;
1508 int status = ev->status;
1509 const char *rej_msg;
1510 const struct nvme_rdma_cm_rej *rej_data;
1511 u8 rej_data_len;
1512
1513 rej_msg = rdma_reject_msg(cm_id, status);
1514 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1515
1516 if (rej_data && rej_data_len >= sizeof(u16)) {
1517 u16 sts = le16_to_cpu(rej_data->sts);
71102307
CH
1518
1519 dev_err(queue->ctrl->ctrl.device,
7f03953c
SW
1520 "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1521 status, rej_msg, sts, nvme_rdma_cm_msg(sts));
71102307
CH
1522 } else {
1523 dev_err(queue->ctrl->ctrl.device,
7f03953c 1524 "Connect rejected: status %d (%s).\n", status, rej_msg);
71102307
CH
1525 }
1526
1527 return -ECONNRESET;
1528}
1529
1530static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1531{
71102307
CH
1532 int ret;
1533
ca6e95bb
SG
1534 ret = nvme_rdma_create_queue_ib(queue);
1535 if (ret)
1536 return ret;
71102307
CH
1537
1538 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1539 if (ret) {
1540 dev_err(queue->ctrl->ctrl.device,
1541 "rdma_resolve_route failed (%d).\n",
1542 queue->cm_error);
1543 goto out_destroy_queue;
1544 }
1545
1546 return 0;
1547
1548out_destroy_queue:
1549 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1550 return ret;
1551}
1552
1553static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1554{
1555 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1556 struct rdma_conn_param param = { };
0b857b44 1557 struct nvme_rdma_cm_req priv = { };
71102307
CH
1558 int ret;
1559
1560 param.qp_num = queue->qp->qp_num;
1561 param.flow_control = 1;
1562
1563 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
2ac17c28
SG
1564 /* maximum retry count */
1565 param.retry_count = 7;
71102307
CH
1566 param.rnr_retry_count = 7;
1567 param.private_data = &priv;
1568 param.private_data_len = sizeof(priv);
1569
1570 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1571 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
f994d9dc
JF
1572 /*
1573 * set the admin queue depth to the minimum size
1574 * specified by the Fabrics standard.
1575 */
1576 if (priv.qid == 0) {
7aa1f427
SG
1577 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1578 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
f994d9dc 1579 } else {
c5af8654
JF
1580 /*
1581 * current interpretation of the fabrics spec
1582 * is at minimum you make hrqsize sqsize+1, or a
1583 * 1's based representation of sqsize.
1584 */
f994d9dc 1585 priv.hrqsize = cpu_to_le16(queue->queue_size);
c5af8654 1586 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
f994d9dc 1587 }
71102307
CH
1588
1589 ret = rdma_connect(queue->cm_id, &param);
1590 if (ret) {
1591 dev_err(ctrl->ctrl.device,
1592 "rdma_connect failed (%d).\n", ret);
1593 goto out_destroy_queue_ib;
1594 }
1595
1596 return 0;
1597
1598out_destroy_queue_ib:
1599 nvme_rdma_destroy_queue_ib(queue);
1600 return ret;
1601}
1602
71102307
CH
1603static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1604 struct rdma_cm_event *ev)
1605{
1606 struct nvme_rdma_queue *queue = cm_id->context;
1607 int cm_error = 0;
1608
1609 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1610 rdma_event_msg(ev->event), ev->event,
1611 ev->status, cm_id);
1612
1613 switch (ev->event) {
1614 case RDMA_CM_EVENT_ADDR_RESOLVED:
1615 cm_error = nvme_rdma_addr_resolved(queue);
1616 break;
1617 case RDMA_CM_EVENT_ROUTE_RESOLVED:
1618 cm_error = nvme_rdma_route_resolved(queue);
1619 break;
1620 case RDMA_CM_EVENT_ESTABLISHED:
1621 queue->cm_error = nvme_rdma_conn_established(queue);
1622 /* complete cm_done regardless of success/failure */
1623 complete(&queue->cm_done);
1624 return 0;
1625 case RDMA_CM_EVENT_REJECTED:
abf87d5e 1626 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1627 cm_error = nvme_rdma_conn_rejected(queue, ev);
1628 break;
71102307
CH
1629 case RDMA_CM_EVENT_ROUTE_ERROR:
1630 case RDMA_CM_EVENT_CONNECT_ERROR:
1631 case RDMA_CM_EVENT_UNREACHABLE:
abf87d5e 1632 nvme_rdma_destroy_queue_ib(queue);
249090f9 1633 /* fall through */
abf87d5e 1634 case RDMA_CM_EVENT_ADDR_ERROR:
71102307
CH
1635 dev_dbg(queue->ctrl->ctrl.device,
1636 "CM error event %d\n", ev->event);
1637 cm_error = -ECONNRESET;
1638 break;
1639 case RDMA_CM_EVENT_DISCONNECTED:
1640 case RDMA_CM_EVENT_ADDR_CHANGE:
1641 case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1642 dev_dbg(queue->ctrl->ctrl.device,
1643 "disconnect received - connection closed\n");
1644 nvme_rdma_error_recovery(queue->ctrl);
1645 break;
1646 case RDMA_CM_EVENT_DEVICE_REMOVAL:
e87a911f
SW
1647 /* device removal is handled via the ib_client API */
1648 break;
71102307
CH
1649 default:
1650 dev_err(queue->ctrl->ctrl.device,
1651 "Unexpected RDMA CM event (%d)\n", ev->event);
1652 nvme_rdma_error_recovery(queue->ctrl);
1653 break;
1654 }
1655
1656 if (cm_error) {
1657 queue->cm_error = cm_error;
1658 complete(&queue->cm_done);
1659 }
1660
1661 return 0;
1662}
1663
1664static enum blk_eh_timer_return
1665nvme_rdma_timeout(struct request *rq, bool reserved)
1666{
1667 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
4c174e63
SG
1668 struct nvme_rdma_queue *queue = req->queue;
1669 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
71102307 1670
4c174e63
SG
1671 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
1672 rq->tag, nvme_rdma_queue_idx(queue));
e62a538d 1673
4c174e63
SG
1674 if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
1675 /*
1676 * Teardown immediately if controller times out while starting
1677 * or we are already started error recovery. all outstanding
1678 * requests are completed on shutdown, so we return BLK_EH_DONE.
1679 */
1680 flush_work(&ctrl->err_work);
1681 nvme_rdma_teardown_io_queues(ctrl, false);
1682 nvme_rdma_teardown_admin_queue(ctrl, false);
1683 return BLK_EH_DONE;
1684 }
71102307 1685
4c174e63
SG
1686 dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1687 nvme_rdma_error_recovery(ctrl);
71102307 1688
4c174e63 1689 return BLK_EH_RESET_TIMER;
71102307
CH
1690}
1691
fc17b653 1692static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
71102307
CH
1693 const struct blk_mq_queue_data *bd)
1694{
1695 struct nvme_ns *ns = hctx->queue->queuedata;
1696 struct nvme_rdma_queue *queue = hctx->driver_data;
1697 struct request *rq = bd->rq;
1698 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1699 struct nvme_rdma_qe *sqe = &req->sqe;
1700 struct nvme_command *c = sqe->data;
71102307 1701 struct ib_device *dev;
3bc32bb1 1702 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
fc17b653
CH
1703 blk_status_t ret;
1704 int err;
71102307
CH
1705
1706 WARN_ON_ONCE(rq->tag < 0);
1707
3bc32bb1 1708 if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
6cdefc6e 1709 return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq);
553cd9ef 1710
71102307
CH
1711 dev = queue->device->dev;
1712 ib_dma_sync_single_for_cpu(dev, sqe->dma,
1713 sizeof(struct nvme_command), DMA_TO_DEVICE);
1714
1715 ret = nvme_setup_cmd(ns, rq, c);
fc17b653 1716 if (ret)
71102307
CH
1717 return ret;
1718
71102307
CH
1719 blk_mq_start_request(rq);
1720
fc17b653 1721 err = nvme_rdma_map_data(queue, rq, c);
a7b7c7a1 1722 if (unlikely(err < 0)) {
71102307 1723 dev_err(queue->ctrl->ctrl.device,
fc17b653 1724 "Failed to map data (%d)\n", err);
71102307
CH
1725 nvme_cleanup_cmd(rq);
1726 goto err;
1727 }
1728
b4b591c8
SG
1729 sqe->cqe.done = nvme_rdma_send_done;
1730
71102307
CH
1731 ib_dma_sync_single_for_device(dev, sqe->dma,
1732 sizeof(struct nvme_command), DMA_TO_DEVICE);
1733
fc17b653 1734 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
f41725bb 1735 req->mr ? &req->reg_wr.wr : NULL);
a7b7c7a1 1736 if (unlikely(err)) {
71102307
CH
1737 nvme_rdma_unmap_data(queue, rq);
1738 goto err;
1739 }
1740
fc17b653 1741 return BLK_STS_OK;
71102307 1742err:
fc17b653
CH
1743 if (err == -ENOMEM || err == -EAGAIN)
1744 return BLK_STS_RESOURCE;
1745 return BLK_STS_IOERR;
71102307
CH
1746}
1747
ff8519f9
SG
1748static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx)
1749{
1750 struct nvme_rdma_queue *queue = hctx->driver_data;
1751
1752 return ib_process_cq_direct(queue->ib_cq, -1);
1753}
1754
71102307
CH
1755static void nvme_rdma_complete_rq(struct request *rq)
1756{
1757 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307 1758
77f02a7a
CH
1759 nvme_rdma_unmap_data(req->queue, rq);
1760 nvme_complete_rq(rq);
71102307
CH
1761}
1762
0b36658c
SG
1763static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
1764{
1765 struct nvme_rdma_ctrl *ctrl = set->driver_data;
1766
b65bb777 1767 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
b1064d3e
SG
1768 set->map[HCTX_TYPE_DEFAULT].nr_queues =
1769 ctrl->io_queues[HCTX_TYPE_DEFAULT];
1770 set->map[HCTX_TYPE_READ].nr_queues = ctrl->io_queues[HCTX_TYPE_READ];
b65bb777
SG
1771 if (ctrl->ctrl.opts->nr_write_queues) {
1772 /* separate read/write queues */
b65bb777 1773 set->map[HCTX_TYPE_READ].queue_offset =
b1064d3e 1774 ctrl->io_queues[HCTX_TYPE_DEFAULT];
b65bb777
SG
1775 } else {
1776 /* mixed read/write queues */
b65bb777
SG
1777 set->map[HCTX_TYPE_READ].queue_offset = 0;
1778 }
1779 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
1780 ctrl->device->dev, 0);
1781 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
1782 ctrl->device->dev, 0);
ff8519f9
SG
1783
1784 if (ctrl->ctrl.opts->nr_poll_queues) {
1785 set->map[HCTX_TYPE_POLL].nr_queues =
b1064d3e 1786 ctrl->io_queues[HCTX_TYPE_POLL];
ff8519f9 1787 set->map[HCTX_TYPE_POLL].queue_offset =
b1064d3e 1788 ctrl->io_queues[HCTX_TYPE_DEFAULT];
ff8519f9
SG
1789 if (ctrl->ctrl.opts->nr_write_queues)
1790 set->map[HCTX_TYPE_POLL].queue_offset +=
b1064d3e 1791 ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
1792 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
1793 }
b65bb777 1794 return 0;
0b36658c
SG
1795}
1796
f363b089 1797static const struct blk_mq_ops nvme_rdma_mq_ops = {
71102307
CH
1798 .queue_rq = nvme_rdma_queue_rq,
1799 .complete = nvme_rdma_complete_rq,
71102307
CH
1800 .init_request = nvme_rdma_init_request,
1801 .exit_request = nvme_rdma_exit_request,
71102307 1802 .init_hctx = nvme_rdma_init_hctx,
71102307 1803 .timeout = nvme_rdma_timeout,
0b36658c 1804 .map_queues = nvme_rdma_map_queues,
ff8519f9 1805 .poll = nvme_rdma_poll,
71102307
CH
1806};
1807
f363b089 1808static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
71102307
CH
1809 .queue_rq = nvme_rdma_queue_rq,
1810 .complete = nvme_rdma_complete_rq,
385475ee
CH
1811 .init_request = nvme_rdma_init_request,
1812 .exit_request = nvme_rdma_exit_request,
71102307
CH
1813 .init_hctx = nvme_rdma_init_admin_hctx,
1814 .timeout = nvme_rdma_timeout,
1815};
1816
18398af2 1817static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
71102307 1818{
794a4cb3
SG
1819 cancel_work_sync(&ctrl->err_work);
1820 cancel_delayed_work_sync(&ctrl->reconnect_work);
1821
75862c72 1822 nvme_rdma_teardown_io_queues(ctrl, shutdown);
18398af2 1823 if (shutdown)
71102307 1824 nvme_shutdown_ctrl(&ctrl->ctrl);
18398af2
SG
1825 else
1826 nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
75862c72 1827 nvme_rdma_teardown_admin_queue(ctrl, shutdown);
71102307
CH
1828}
1829
c5017e85 1830static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2461a8dd 1831{
e9bc2587 1832 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
71102307
CH
1833}
1834
71102307
CH
1835static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
1836{
d86c4d8e
CH
1837 struct nvme_rdma_ctrl *ctrl =
1838 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
71102307 1839
d09f2b45 1840 nvme_stop_ctrl(&ctrl->ctrl);
18398af2 1841 nvme_rdma_shutdown_ctrl(ctrl, false);
71102307 1842
ad6a0a52 1843 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
d5bf4b7f
SG
1844 /* state change failure should never happen */
1845 WARN_ON_ONCE(1);
1846 return;
1847 }
1848
c66e2998 1849 if (nvme_rdma_setup_ctrl(ctrl, false))
370ae6e4 1850 goto out_fail;
71102307 1851
71102307
CH
1852 return;
1853
370ae6e4 1854out_fail:
8000d1fd
NC
1855 ++ctrl->ctrl.nr_reconnects;
1856 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1857}
1858
71102307
CH
1859static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
1860 .name = "rdma",
1861 .module = THIS_MODULE,
d3d5b87d 1862 .flags = NVME_F_FABRICS,
71102307
CH
1863 .reg_read32 = nvmf_reg_read32,
1864 .reg_read64 = nvmf_reg_read64,
1865 .reg_write32 = nvmf_reg_write32,
71102307
CH
1866 .free_ctrl = nvme_rdma_free_ctrl,
1867 .submit_async_event = nvme_rdma_submit_async_event,
c5017e85 1868 .delete_ctrl = nvme_rdma_delete_ctrl,
71102307
CH
1869 .get_address = nvmf_get_address,
1870};
1871
36e835f2
JS
1872/*
1873 * Fails a connection request if it matches an existing controller
1874 * (association) with the same tuple:
1875 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
1876 *
1877 * if local address is not specified in the request, it will match an
1878 * existing controller with all the other parameters the same and no
1879 * local port address specified as well.
1880 *
1881 * The ports don't need to be compared as they are intrinsically
1882 * already matched by the port pointers supplied.
1883 */
1884static bool
1885nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
1886{
1887 struct nvme_rdma_ctrl *ctrl;
1888 bool found = false;
1889
1890 mutex_lock(&nvme_rdma_ctrl_mutex);
1891 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
b7c7be6f 1892 found = nvmf_ip_options_match(&ctrl->ctrl, opts);
36e835f2
JS
1893 if (found)
1894 break;
1895 }
1896 mutex_unlock(&nvme_rdma_ctrl_mutex);
1897
1898 return found;
1899}
1900
71102307
CH
1901static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
1902 struct nvmf_ctrl_options *opts)
1903{
1904 struct nvme_rdma_ctrl *ctrl;
1905 int ret;
1906 bool changed;
1907
1908 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
1909 if (!ctrl)
1910 return ERR_PTR(-ENOMEM);
1911 ctrl->ctrl.opts = opts;
1912 INIT_LIST_HEAD(&ctrl->list);
1913
bb59b8e5
SG
1914 if (!(opts->mask & NVMF_OPT_TRSVCID)) {
1915 opts->trsvcid =
1916 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
1917 if (!opts->trsvcid) {
1918 ret = -ENOMEM;
1919 goto out_free_ctrl;
1920 }
1921 opts->mask |= NVMF_OPT_TRSVCID;
1922 }
0928f9b4
SG
1923
1924 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
bb59b8e5 1925 opts->traddr, opts->trsvcid, &ctrl->addr);
71102307 1926 if (ret) {
bb59b8e5
SG
1927 pr_err("malformed address passed: %s:%s\n",
1928 opts->traddr, opts->trsvcid);
71102307
CH
1929 goto out_free_ctrl;
1930 }
1931
8f4e8dac 1932 if (opts->mask & NVMF_OPT_HOST_TRADDR) {
0928f9b4
SG
1933 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
1934 opts->host_traddr, NULL, &ctrl->src_addr);
8f4e8dac 1935 if (ret) {
0928f9b4 1936 pr_err("malformed src address passed: %s\n",
8f4e8dac
MG
1937 opts->host_traddr);
1938 goto out_free_ctrl;
1939 }
1940 }
1941
36e835f2
JS
1942 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
1943 ret = -EALREADY;
1944 goto out_free_ctrl;
1945 }
1946
71102307
CH
1947 INIT_DELAYED_WORK(&ctrl->reconnect_work,
1948 nvme_rdma_reconnect_ctrl_work);
1949 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
d86c4d8e 1950 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
71102307 1951
ff8519f9
SG
1952 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
1953 opts->nr_poll_queues + 1;
c5af8654 1954 ctrl->ctrl.sqsize = opts->queue_size - 1;
71102307
CH
1955 ctrl->ctrl.kato = opts->kato;
1956
1957 ret = -ENOMEM;
d858e5f0 1958 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
71102307
CH
1959 GFP_KERNEL);
1960 if (!ctrl->queues)
3d064101
SG
1961 goto out_free_ctrl;
1962
1963 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
1964 0 /* no quirks, we're perfect! */);
1965 if (ret)
1966 goto out_kfree_queues;
71102307 1967
b754a32c
MG
1968 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
1969 WARN_ON_ONCE(!changed);
1970
c66e2998 1971 ret = nvme_rdma_setup_ctrl(ctrl, true);
71102307 1972 if (ret)
3d064101 1973 goto out_uninit_ctrl;
71102307 1974
0928f9b4 1975 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
71102307
CH
1976 ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
1977
d22524a4 1978 nvme_get_ctrl(&ctrl->ctrl);
71102307
CH
1979
1980 mutex_lock(&nvme_rdma_ctrl_mutex);
1981 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
1982 mutex_unlock(&nvme_rdma_ctrl_mutex);
1983
71102307
CH
1984 return &ctrl->ctrl;
1985
71102307
CH
1986out_uninit_ctrl:
1987 nvme_uninit_ctrl(&ctrl->ctrl);
1988 nvme_put_ctrl(&ctrl->ctrl);
1989 if (ret > 0)
1990 ret = -EIO;
1991 return ERR_PTR(ret);
3d064101
SG
1992out_kfree_queues:
1993 kfree(ctrl->queues);
71102307
CH
1994out_free_ctrl:
1995 kfree(ctrl);
1996 return ERR_PTR(ret);
1997}
1998
1999static struct nvmf_transport_ops nvme_rdma_transport = {
2000 .name = "rdma",
0de5cd36 2001 .module = THIS_MODULE,
71102307 2002 .required_opts = NVMF_OPT_TRADDR,
8f4e8dac 2003 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
b65bb777 2004 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
ff8519f9 2005 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES,
71102307
CH
2006 .create_ctrl = nvme_rdma_create_ctrl,
2007};
2008
e87a911f
SW
2009static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2010{
2011 struct nvme_rdma_ctrl *ctrl;
9bad0404
MG
2012 struct nvme_rdma_device *ndev;
2013 bool found = false;
2014
2015 mutex_lock(&device_list_mutex);
2016 list_for_each_entry(ndev, &device_list, entry) {
2017 if (ndev->dev == ib_device) {
2018 found = true;
2019 break;
2020 }
2021 }
2022 mutex_unlock(&device_list_mutex);
2023
2024 if (!found)
2025 return;
e87a911f
SW
2026
2027 /* Delete all controllers using this device */
2028 mutex_lock(&nvme_rdma_ctrl_mutex);
2029 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2030 if (ctrl->device->dev != ib_device)
2031 continue;
c5017e85 2032 nvme_delete_ctrl(&ctrl->ctrl);
e87a911f
SW
2033 }
2034 mutex_unlock(&nvme_rdma_ctrl_mutex);
2035
b227c59b 2036 flush_workqueue(nvme_delete_wq);
e87a911f
SW
2037}
2038
2039static struct ib_client nvme_rdma_ib_client = {
2040 .name = "nvme_rdma",
e87a911f
SW
2041 .remove = nvme_rdma_remove_one
2042};
2043
71102307
CH
2044static int __init nvme_rdma_init_module(void)
2045{
e87a911f
SW
2046 int ret;
2047
e87a911f 2048 ret = ib_register_client(&nvme_rdma_ib_client);
a56c79cf 2049 if (ret)
9a6327d2 2050 return ret;
a56c79cf
SG
2051
2052 ret = nvmf_register_transport(&nvme_rdma_transport);
2053 if (ret)
2054 goto err_unreg_client;
e87a911f 2055
a56c79cf 2056 return 0;
e87a911f 2057
a56c79cf
SG
2058err_unreg_client:
2059 ib_unregister_client(&nvme_rdma_ib_client);
a56c79cf 2060 return ret;
71102307
CH
2061}
2062
2063static void __exit nvme_rdma_cleanup_module(void)
2064{
71102307 2065 nvmf_unregister_transport(&nvme_rdma_transport);
e87a911f 2066 ib_unregister_client(&nvme_rdma_ib_client);
71102307
CH
2067}
2068
2069module_init(nvme_rdma_init_module);
2070module_exit(nvme_rdma_cleanup_module);
2071
2072MODULE_LICENSE("GPL v2");
This page took 0.702638 seconds and 4 git commands to generate.