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Merge branch 'linux-2.6'
[linux.git] / drivers / scsi / NCR53c406a.c
CommitLineData
1da177e4
LT		 1/*
2 * NCR53c406.c
3 * Low-level SCSI driver for NCR53c406a chip.
4 * Copyright (C) 1994, 1995, 1996 Normunds Saumanis ([email protected])
5 *
6 * LILO command line usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]
7 * Specify IRQ = 0 for non-interrupt driven mode.
8 * FASTPIO = 1 for fast pio mode, 0 for slow mode.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2, or (at your option) any
13 * later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 */
21
22#define NCR53C406A_DEBUG 0
23#define VERBOSE_NCR53C406A_DEBUG 0
24
25/* Set this to 1 for PIO mode (recommended) or to 0 for DMA mode */
26#define USE_PIO 1
27
28#define USE_BIOS 0
29 /* #define BIOS_ADDR 0xD8000 *//* define this if autoprobe fails */
30 /* #define PORT_BASE 0x330 *//* define this if autoprobe fails */
31 /* #define IRQ_LEV 0 *//* define this if autoprobe fails */
32#define DMA_CHAN 5 /* this is ignored if DMA is disabled */
33
34/* Set this to 0 if you encounter kernel lockups while transferring
35 * data in PIO mode */
36#define USE_FAST_PIO 1
37
38/* ============= End of user configurable parameters ============= */
39
40#include <linux/module.h>
41
42#include <linux/errno.h>
43#include <linux/ioport.h>
44#include <linux/sched.h>
45#include <linux/interrupt.h>
46#include <linux/proc_fs.h>
47#include <linux/stat.h>
48#include <linux/init.h>
49#include <linux/bitops.h>
50#include <asm/io.h>
51#include <asm/dma.h>
52#include <asm/irq.h>
53
54#include <linux/blkdev.h>
55#include <linux/spinlock.h>
56#include "scsi.h"
57#include <scsi/scsi_host.h>
58
59/* ============================================================= */
60
61#define WATCHDOG 5000000
62
63#define SYNC_MODE 0 /* Synchronous transfer mode */
64
147a67f0 65#ifdef DEBUG
1da177e4
LT		 66#undef NCR53C406A_DEBUG
67#define NCR53C406A_DEBUG 1
68#endif
69
70#if USE_PIO
71#define USE_DMA 0
72#else
73#define USE_DMA 1
74#endif
75
76/* Default configuration */
77#define C1_IMG 0x07 /* ID=7 */
78#define C2_IMG 0x48 /* FE SCSI2 */
79#if USE_DMA
80#define C3_IMG 0x21 /* CDB TE */
81#else
82#define C3_IMG 0x20 /* CDB */
83#endif
84#define C4_IMG 0x04 /* ANE */
85#define C5_IMG 0xb6 /* AA PI SIE POL */
86
87#define REG0 (outb(C4_IMG, CONFIG4))
88#define REG1 (outb(C5_IMG, CONFIG5))
89
90#if NCR53C406A_DEBUG
91#define DEB(x) x
92#else
93#define DEB(x)
94#endif
95
96#if VERBOSE_NCR53C406A_DEBUG
97#define VDEB(x) x
98#else
99#define VDEB(x)
100#endif
101
102#define LOAD_DMA_COUNT(count) \
103 outb(count & 0xff, TC_LSB); \
104 outb((count >> 8) & 0xff, TC_MSB); \
105 outb((count >> 16) & 0xff, TC_HIGH);
106
107/* Chip commands */
108#define DMA_OP 0x80
109
110#define SCSI_NOP 0x00
111#define FLUSH_FIFO 0x01
112#define CHIP_RESET 0x02
113#define SCSI_RESET 0x03
114#define RESELECT 0x40
115#define SELECT_NO_ATN 0x41
116#define SELECT_ATN 0x42
117#define SELECT_ATN_STOP 0x43
118#define ENABLE_SEL 0x44
119#define DISABLE_SEL 0x45
120#define SELECT_ATN3 0x46
121#define RESELECT3 0x47
122#define TRANSFER_INFO 0x10
123#define INIT_CMD_COMPLETE 0x11
124#define MSG_ACCEPT 0x12
125#define TRANSFER_PAD 0x18
126#define SET_ATN 0x1a
127#define RESET_ATN 0x1b
128#define SEND_MSG 0x20
129#define SEND_STATUS 0x21
130#define SEND_DATA 0x22
131#define DISCONN_SEQ 0x23
132#define TERMINATE_SEQ 0x24
133#define TARG_CMD_COMPLETE 0x25
134#define DISCONN 0x27
135#define RECV_MSG 0x28
136#define RECV_CMD 0x29
137#define RECV_DATA 0x2a
138#define RECV_CMD_SEQ 0x2b
139#define TARGET_ABORT_DMA 0x04
140
141/*----------------------------------------------------------------*/
142/* the following will set the monitor border color (useful to find
143 where something crashed or gets stuck at */
144/* 1 = blue
145 2 = green
146 3 = cyan
147 4 = red
148 5 = magenta
149 6 = yellow
150 7 = white
151*/
152
153#if NCR53C406A_DEBUG
154#define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}
155#else
156#define rtrc(i) {}
157#endif
158/*----------------------------------------------------------------*/
159
160enum Phase {
161 idle,
162 data_out,
163 data_in,
164 command_ph,
165 status_ph,
166 message_out,
167 message_in
168};
169
170/* Static function prototypes */
c7bec5ab 171static void NCR53c406a_intr(void *);
7d12e780 172static irqreturn_t do_NCR53c406a_intr(int, void *);
1da177e4
LT		 173static void chip_init(void);
174static void calc_port_addr(void);
175#ifndef IRQ_LEV
176static int irq_probe(void);
177#endif
178
179/* ================================================================= */
180
181#if USE_BIOS
182static void *bios_base;
183#endif
184
44456d37 185#ifdef PORT_BASE
1da177e4
LT		 186static int port_base = PORT_BASE;
187#else
188static int port_base;
189#endif
190
44456d37 191#ifdef IRQ_LEV
1da177e4
LT		 192static int irq_level = IRQ_LEV;
193#else
194static int irq_level = -1; /* 0 is 'no irq', so use -1 for 'uninitialized' */
195#endif
196
197#if USE_DMA
198static int dma_chan;
199#endif
200
201#if USE_PIO
202static int fast_pio = USE_FAST_PIO;
203#endif
204
205static Scsi_Cmnd *current_SC;
206static char info_msg[256];
207
208/* ================================================================= */
209
210/* possible BIOS locations */
211#if USE_BIOS
212static void *addresses[] = {
213 (void *) 0xd8000,
214 (void *) 0xc8000
215};
6391a113 216#define ADDRESS_COUNT ARRAY_SIZE(addresses)
1da177e4
LT		 217#endif /* USE_BIOS */
218
219/* possible i/o port addresses */
220static unsigned short ports[] = { 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };
6391a113 221#define PORT_COUNT ARRAY_SIZE(ports)
1da177e4 222
db3a8815 223#ifndef MODULE
1da177e4
LT		 224/* possible interrupt channels */
225static unsigned short intrs[] = { 10, 11, 12, 15 };
6391a113 226#define INTR_COUNT ARRAY_SIZE(intrs)
db3a8815 227#endif /* !MODULE */
1da177e4
LT		 228
229/* signatures for NCR 53c406a based controllers */
230#if USE_BIOS
231struct signature {
232 char *signature;
233 int sig_offset;
234 int sig_length;
235} signatures[] __initdata = {
236 /* 1 2 3 4 5 6 */
237 /* 123456789012345678901234567890123456789012345678901234567890 */
238 {
239"Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82},};
240
6391a113 241#define SIGNATURE_COUNT ARRAY_SIZE(signatures)
1da177e4
LT		 242#endif /* USE_BIOS */
243
244/* ============================================================ */
245
246/* Control Register Set 0 */
247static int TC_LSB; /* transfer counter lsb */
248static int TC_MSB; /* transfer counter msb */
249static int SCSI_FIFO; /* scsi fifo register */
250static int CMD_REG; /* command register */
251static int STAT_REG; /* status register */
252static int DEST_ID; /* selection/reselection bus id */
253static int INT_REG; /* interrupt status register */
254static int SRTIMOUT; /* select/reselect timeout reg */
255static int SEQ_REG; /* sequence step register */
256static int SYNCPRD; /* synchronous transfer period */
257static int FIFO_FLAGS; /* indicates # of bytes in fifo */
258static int SYNCOFF; /* synchronous offset register */
259static int CONFIG1; /* configuration register */
260static int CLKCONV; /* clock conversion reg */
261 /*static int TESTREG;*//* test mode register */
262static int CONFIG2; /* Configuration 2 Register */
263static int CONFIG3; /* Configuration 3 Register */
264static int CONFIG4; /* Configuration 4 Register */
265static int TC_HIGH; /* Transfer Counter High */
266 /*static int FIFO_BOTTOM;*//* Reserve FIFO byte register */
267
268/* Control Register Set 1 */
269 /*static int JUMPER_SENSE;*//* Jumper sense port reg (r/w) */
270 /*static int SRAM_PTR;*//* SRAM address pointer reg (r/w) */
271 /*static int SRAM_DATA;*//* SRAM data register (r/w) */
272static int PIO_FIFO; /* PIO FIFO registers (r/w) */
273 /*static int PIO_FIFO1;*//* */
274 /*static int PIO_FIFO2;*//* */
275 /*static int PIO_FIFO3;*//* */
276static int PIO_STATUS; /* PIO status (r/w) */
277 /*static int ATA_CMD;*//* ATA command/status reg (r/w) */
278 /*static int ATA_ERR;*//* ATA features/error register (r/w) */
279static int PIO_FLAG; /* PIO flag interrupt enable (r/w) */
280static int CONFIG5; /* Configuration 5 register (r/w) */
281 /*static int SIGNATURE;*//* Signature Register (r) */
282 /*static int CONFIG6;*//* Configuration 6 register (r) */
283
284/* ============================================================== */
285
286#if USE_DMA
287static __inline__ int NCR53c406a_dma_setup(unsigned char *ptr, unsigned int count, unsigned char mode)
288{
289 unsigned limit;
290 unsigned long flags = 0;
291
292 VDEB(printk("dma: before count=%d ", count));
293 if (dma_chan <= 3) {
294 if (count > 65536)
295 count = 65536;
296 limit = 65536 - (((unsigned) ptr) & 0xFFFF);
297 } else {
298 if (count > (65536 << 1))
299 count = (65536 << 1);
300 limit = (65536 << 1) - (((unsigned) ptr) & 0x1FFFF);
301 }
302
303 if (count > limit)
304 count = limit;
305
306 VDEB(printk("after count=%d\n", count));
307 if ((count & 1) || (((unsigned) ptr) & 1))
308 panic("NCR53c406a: attempted unaligned DMA transfer\n");
309
310 flags = claim_dma_lock();
311 disable_dma(dma_chan);
312 clear_dma_ff(dma_chan);
313 set_dma_addr(dma_chan, (long) ptr);
314 set_dma_count(dma_chan, count);
315 set_dma_mode(dma_chan, mode);
316 enable_dma(dma_chan);
317 release_dma_lock(flags);
318
319 return count;
320}
321
322static __inline__ int NCR53c406a_dma_write(unsigned char *src, unsigned int count)
323{
324 return NCR53c406a_dma_setup(src, count, DMA_MODE_WRITE);
325}
326
327static __inline__ int NCR53c406a_dma_read(unsigned char *src, unsigned int count)
328{
329 return NCR53c406a_dma_setup(src, count, DMA_MODE_READ);
330}
331
332static __inline__ int NCR53c406a_dma_residual(void)
333{
334 register int tmp;
335 unsigned long flags;
336
337 flags = claim_dma_lock();
338 clear_dma_ff(dma_chan);
339 tmp = get_dma_residue(dma_chan);
340 release_dma_lock(flags);
341
342 return tmp;
343}
344#endif /* USE_DMA */
345
346#if USE_PIO
347static __inline__ int NCR53c406a_pio_read(unsigned char *request, unsigned int reqlen)
348{
349 int i;
350 int len; /* current scsi fifo size */
351
352 REG1;
353 while (reqlen) {
354 i = inb(PIO_STATUS);
355 /* VDEB(printk("pio_status=%x\n", i)); */
356 if (i & 0x80)
357 return 0;
358
359 switch (i & 0x1e) {
360 default:
361 case 0x10:
362 len = 0;
363 break;
364 case 0x0:
365 len = 1;
366 break;
367 case 0x8:
368 len = 42;
369 break;
370 case 0xc:
371 len = 84;
372 break;
373 case 0xe:
374 len = 128;
375 break;
376 }
377
378 if ((i & 0x40) && len == 0) { /* fifo empty and interrupt occurred */
379 return 0;
380 }
381
382 if (len) {
383 if (len > reqlen)
384 len = reqlen;
385
386 if (fast_pio && len > 3) {
387 insl(PIO_FIFO, request, len >> 2);
388 request += len & 0xfc;
389 reqlen -= len & 0xfc;
390 } else {
391 while (len--) {
392 *request++ = inb(PIO_FIFO);
393 reqlen--;
394 }
395 }
396 }
397 }
398 return 0;
399}
400
401static __inline__ int NCR53c406a_pio_write(unsigned char *request, unsigned int reqlen)
402{
403 int i = 0;
404 int len; /* current scsi fifo size */
405
406 REG1;
407 while (reqlen && !(i & 0x40)) {
408 i = inb(PIO_STATUS);
409 /* VDEB(printk("pio_status=%x\n", i)); */
410 if (i & 0x80) /* error */
411 return 0;
412
413 switch (i & 0x1e) {
414 case 0x10:
415 len = 128;
416 break;
417 case 0x0:
418 len = 84;
419 break;
420 case 0x8:
421 len = 42;
422 break;
423 case 0xc:
424 len = 1;
425 break;
426 default:
427 case 0xe:
428 len = 0;
429 break;
430 }
431
432 if (len) {
433 if (len > reqlen)
434 len = reqlen;
435
436 if (fast_pio && len > 3) {
437 outsl(PIO_FIFO, request, len >> 2);
438 request += len & 0xfc;
439 reqlen -= len & 0xfc;
440 } else {
441 while (len--) {
442 outb(*request++, PIO_FIFO);
443 reqlen--;
444 }
445 }
446 }
447 }
448 return 0;
449}
450#endif /* USE_PIO */
451
d0be4a7d 452static int __init NCR53c406a_detect(struct scsi_host_template * tpnt)
1da177e4
LT		 453{
454 int present = 0;
455 struct Scsi_Host *shpnt = NULL;
456#ifndef PORT_BASE
457 int i;
458#endif
459
460#if USE_BIOS
461 int ii, jj;
462 bios_base = 0;
463 /* look for a valid signature */
464 for (ii = 0; ii < ADDRESS_COUNT && !bios_base; ii++)
465 for (jj = 0; (jj < SIGNATURE_COUNT) && !bios_base; jj++)
466 if (!memcmp((void *) addresses[ii] + signatures[jj].sig_offset, (void *) signatures[jj].signature, (int) signatures[jj].sig_length))
467 bios_base = addresses[ii];
468
469 if (!bios_base) {
470 printk("NCR53c406a: BIOS signature not found\n");
471 return 0;
472 }
473
474 DEB(printk("NCR53c406a BIOS found at 0x%x\n", (unsigned int) bios_base);
475 );
476#endif /* USE_BIOS */
477
478#ifdef PORT_BASE
479 if (!request_region(port_base, 0x10, "NCR53c406a")) /* ports already snatched */
480 port_base = 0;
481
482#else /* autodetect */
483 if (port_base) { /* LILO override */
484 if (!request_region(port_base, 0x10, "NCR53c406a"))
485 port_base = 0;
486 } else {
487 for (i = 0; i < PORT_COUNT && !port_base; i++) {
488 if (!request_region(ports[i], 0x10, "NCR53c406a")) {
489 DEB(printk("NCR53c406a: port 0x%x in use\n", ports[i]));
490 } else {
491 VDEB(printk("NCR53c406a: port 0x%x available\n", ports[i]));
492 outb(C5_IMG, ports[i] + 0x0d); /* reg set 1 */
493 if ((inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) & 0xf8) == 0x58) {
494 port_base = ports[i];
495 VDEB(printk("NCR53c406a: Sig register valid\n"));
496 VDEB(printk("port_base=0x%x\n", port_base));
497 break;
498 }
499 release_region(ports[i], 0x10);
500 }
501 }
502 }
503#endif /* PORT_BASE */
504
505 if (!port_base) { /* no ports found */
506 printk("NCR53c406a: no available ports found\n");
507 return 0;
508 }
509
510 DEB(printk("NCR53c406a detected\n"));
511
512 calc_port_addr();
513 chip_init();
514
515#ifndef IRQ_LEV
516 if (irq_level < 0) { /* LILO override if >= 0 */
517 irq_level = irq_probe();
518 if (irq_level < 0) { /* Trouble */
519 printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level);
520 goto err_release;
521 }
522 }
523#endif
524
525 DEB(printk("NCR53c406a: using port_base 0x%x\n", port_base));
526
527 present = 1;
528 tpnt->proc_name = "NCR53c406a";
529
530 shpnt = scsi_register(tpnt, 0);
531 if (!shpnt) {
532 printk("NCR53c406a: Unable to register host, giving up.\n");
533 goto err_release;
534 }
535
536 if (irq_level > 0) {
537 if (request_irq(irq_level, do_NCR53c406a_intr, 0, "NCR53c406a", shpnt)) {
538 printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level);
539 goto err_free_scsi;
540 }
541 tpnt->can_queue = 1;
542 DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level));
543 } else if (irq_level == 0) {
544 tpnt->can_queue = 0;
545 DEB(printk("NCR53c406a: No interrupts detected\n"));
546 printk("NCR53c406a driver no longer supports polling interface\n");
547 printk("Please email [email protected]\n");
548
549#if USE_DMA
550 printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");
551#endif /* USE_DMA */
552 goto err_free_scsi;
553 } else {
554 DEB(printk("NCR53c406a: Shouldn't get here!\n"));
555 goto err_free_scsi;
556 }
557
558#if USE_DMA
559 dma_chan = DMA_CHAN;
560 if (request_dma(dma_chan, "NCR53c406a") != 0) {
561 printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan);
562 goto err_free_irq;
563 }
564
565 DEB(printk("Allocated DMA channel %d\n", dma_chan));
566#endif /* USE_DMA */
567
568 shpnt->irq = irq_level;
569 shpnt->io_port = port_base;
570 shpnt->n_io_port = 0x10;
571#if USE_DMA
572 shpnt->dma = dma_chan;
573#endif
574
575#if USE_DMA
576 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.", port_base, irq_level, dma_chan);
577#else
578 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.", port_base, irq_level, fast_pio ? "fast" : "slow");
579#endif
580
581 return (present);
582
583#if USE_DMA
584 err_free_irq:
585 if (irq_level)
586 free_irq(irq_level, shpnt);
587#endif
588 err_free_scsi:
589 scsi_unregister(shpnt);
590 err_release:
591 release_region(port_base, 0x10);
592 return 0;
593}
594
595static int NCR53c406a_release(struct Scsi_Host *shost)
596{
597 if (shost->irq)
598 free_irq(shost->irq, NULL);
599#ifdef USE_DMA
600 if (shost->dma_channel != 0xff)
601 free_dma(shost->dma_channel);
602#endif
603 if (shost->io_port && shost->n_io_port)
604 release_region(shost->io_port, shost->n_io_port);
605
606 scsi_unregister(shost);
607 return 0;
608}
609
db3a8815 610#ifndef MODULE
1da177e4
LT		 611/* called from init/main.c */
612static int __init NCR53c406a_setup(char *str)
613{
614 static size_t setup_idx = 0;
615 size_t i;
616 int ints[4];
617
618 DEB(printk("NCR53c406a: Setup called\n");
619 );
620
621 if (setup_idx >= PORT_COUNT - 1) {
622 printk("NCR53c406a: Setup called too many times. Bad LILO params?\n");
623 return 0;
624 }
625 get_options(str, 4, ints);
626 if (ints[0] < 1 || ints[0] > 3) {
627 printk("NCR53c406a: Malformed command line\n");
628 printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n");
629 return 0;
630 }
631 for (i = 0; i < PORT_COUNT && !port_base; i++)
632 if (ports[i] == ints[1]) {
633 port_base = ints[1];
634 DEB(printk("NCR53c406a: Specified port_base 0x%x\n", port_base);
635 )
636 }
637 if (!port_base) {
638 printk("NCR53c406a: Invalid PORTBASE 0x%x specified\n", ints[1]);
639 return 0;
640 }
641
642 if (ints[0] > 1) {
643 if (ints[2] == 0) {
644 irq_level = 0;
645 DEB(printk("NCR53c406a: Specified irq %d\n", irq_level);
646 )
647 } else
648 for (i = 0; i < INTR_COUNT && irq_level < 0; i++)
649 if (intrs[i] == ints[2]) {
650 irq_level = ints[2];
651 DEB(printk("NCR53c406a: Specified irq %d\n", port_base);
652 )
653 }
654 if (irq_level < 0)
655 printk("NCR53c406a: Invalid IRQ %d specified\n", ints[2]);
656 }
657
658 if (ints[0] > 2)
659 fast_pio = ints[3];
660
661 DEB(printk("NCR53c406a: port_base=0x%x, irq=%d, fast_pio=%d\n", port_base, irq_level, fast_pio);)
662 return 1;
663}
664
665__setup("ncr53c406a=", NCR53c406a_setup);
666
db3a8815
JG		 667#endif /* !MODULE */
668
1da177e4
LT		 669static const char *NCR53c406a_info(struct Scsi_Host *SChost)
670{
671 DEB(printk("NCR53c406a_info called\n"));
672 return (info_msg);
673}
674
675#if 0
676static void wait_intr(void)
677{
678 unsigned long i = jiffies + WATCHDOG;
679
680 while (time_after(i, jiffies) && !(inb(STAT_REG) & 0xe0)) { /* wait for a pseudo-interrupt */
681 cpu_relax();
682 barrier();
683 }
684
685 if (time_before_eq(i, jiffies)) { /* Timed out */
686 rtrc(0);
687 current_SC->result = DID_TIME_OUT << 16;
688 current_SC->SCp.phase = idle;
689 current_SC->scsi_done(current_SC);
690 return;
691 }
692
c7bec5ab 693 NCR53c406a_intr(NULL);
1da177e4
LT		 694}
695#endif
696
697static int NCR53c406a_queue(Scsi_Cmnd * SCpnt, void (*done) (Scsi_Cmnd *))
698{
699 int i;
700
701 VDEB(printk("NCR53c406a_queue called\n"));
702 DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n", SCpnt->cmnd[0], SCpnt->cmd_len, SCpnt->target, SCpnt->lun, SCpnt->request_bufflen));
703
704#if 0
705 VDEB(for (i = 0; i < SCpnt->cmd_len; i++)
706 printk("cmd[%d]=%02x ", i, SCpnt->cmnd[i]));
707 VDEB(printk("\n"));
708#endif
709
710 current_SC = SCpnt;
711 current_SC->scsi_done = done;
712 current_SC->SCp.phase = command_ph;
713 current_SC->SCp.Status = 0;
714 current_SC->SCp.Message = 0;
715
716 /* We are locked here already by the mid layer */
717 REG0;
422c0d61 718 outb(scmd_id(SCpnt), DEST_ID); /* set destination */
1da177e4
LT		 719 outb(FLUSH_FIFO, CMD_REG); /* reset the fifos */
720
721 for (i = 0; i < SCpnt->cmd_len; i++) {
722 outb(SCpnt->cmnd[i], SCSI_FIFO);
723 }
724 outb(SELECT_NO_ATN, CMD_REG);
725
726 rtrc(1);
727 return 0;
728}
729
1da177e4
LT		 730static int NCR53c406a_host_reset(Scsi_Cmnd * SCpnt)
731{
732 DEB(printk("NCR53c406a_reset called\n"));
df0ae249
JG		 733
734 spin_lock_irq(SCpnt->device->host->host_lock);
735
1da177e4
LT		 736 outb(C4_IMG, CONFIG4); /* Select reg set 0 */
737 outb(CHIP_RESET, CMD_REG);
738 outb(SCSI_NOP, CMD_REG); /* required after reset */
739 outb(SCSI_RESET, CMD_REG);
740 chip_init();
741
742 rtrc(2);
df0ae249
JG		 743
744 spin_unlock_irq(SCpnt->device->host->host_lock);
745
1da177e4
LT		 746 return SUCCESS;
747}
748
1da177e4
LT		 749static int NCR53c406a_biosparm(struct scsi_device *disk,
750 struct block_device *dev,
751 sector_t capacity, int *info_array)
752{
753 int size;
754
755 DEB(printk("NCR53c406a_biosparm called\n"));
756
757 size = capacity;
758 info_array[0] = 64; /* heads */
759 info_array[1] = 32; /* sectors */
760 info_array[2] = size >> 11; /* cylinders */
761 if (info_array[2] > 1024) { /* big disk */
762 info_array[0] = 255;
763 info_array[1] = 63;
764 info_array[2] = size / (255 * 63);
765 }
766 return 0;
767}
768
7d12e780 769static irqreturn_t do_NCR53c406a_intr(int unused, void *dev_id)
1da177e4
LT		 770{
771 unsigned long flags;
772 struct Scsi_Host *dev = dev_id;
773
774 spin_lock_irqsave(dev->host_lock, flags);
c7bec5ab 775 NCR53c406a_intr(dev_id);
1da177e4
LT		 776 spin_unlock_irqrestore(dev->host_lock, flags);
777 return IRQ_HANDLED;
778}
779
c7bec5ab 780static void NCR53c406a_intr(void *dev_id)
1da177e4
LT		 781{
782 DEB(unsigned char fifo_size;
783 )
784 DEB(unsigned char seq_reg;
785 )
786 unsigned char status, int_reg;
787#if USE_PIO
788 unsigned char pio_status;
789 struct scatterlist *sglist;
790 unsigned int sgcount;
791#endif
792
793 VDEB(printk("NCR53c406a_intr called\n"));
794
795#if USE_PIO
796 REG1;
797 pio_status = inb(PIO_STATUS);
798#endif
799 REG0;
800 status = inb(STAT_REG);
801 DEB(seq_reg = inb(SEQ_REG));
802 int_reg = inb(INT_REG);
803 DEB(fifo_size = inb(FIFO_FLAGS) & 0x1f);
804
805#if NCR53C406A_DEBUG
806 printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x", status, seq_reg, int_reg, fifo_size);
807#if (USE_DMA)
808 printk("\n");
809#else
810 printk(", pio=%02x\n", pio_status);
811#endif /* USE_DMA */
812#endif /* NCR53C406A_DEBUG */
813
814 if (int_reg & 0x80) { /* SCSI reset intr */
815 rtrc(3);
816 DEB(printk("NCR53c406a: reset intr received\n"));
817 current_SC->SCp.phase = idle;
818 current_SC->result = DID_RESET << 16;
819 current_SC->scsi_done(current_SC);
820 return;
821 }
822#if USE_PIO
823 if (pio_status & 0x80) {
824 printk("NCR53C406A: Warning: PIO error!\n");
825 current_SC->SCp.phase = idle;
826 current_SC->result = DID_ERROR << 16;
827 current_SC->scsi_done(current_SC);
828 return;
829 }
830#endif /* USE_PIO */
831
832 if (status & 0x20) { /* Parity error */
833 printk("NCR53c406a: Warning: parity error!\n");
834 current_SC->SCp.phase = idle;
835 current_SC->result = DID_PARITY << 16;
836 current_SC->scsi_done(current_SC);
837 return;
838 }
839
840 if (status & 0x40) { /* Gross error */
841 printk("NCR53c406a: Warning: gross error!\n");
842 current_SC->SCp.phase = idle;
843 current_SC->result = DID_ERROR << 16;
844 current_SC->scsi_done(current_SC);
845 return;
846 }
847
848 if (int_reg & 0x20) { /* Disconnect */
849 DEB(printk("NCR53c406a: disconnect intr received\n"));
850 if (current_SC->SCp.phase != message_in) { /* Unexpected disconnect */
851 current_SC->result = DID_NO_CONNECT << 16;
852 } else { /* Command complete, return status and message */
853 current_SC->result = (current_SC->SCp.Status & 0xff)
854 | ((current_SC->SCp.Message & 0xff) << 8) | (DID_OK << 16);
855 }
856
857 rtrc(0);
858 current_SC->SCp.phase = idle;
859 current_SC->scsi_done(current_SC);
860 return;
861 }
862
863 switch (status & 0x07) { /* scsi phase */
864 case 0x00: /* DATA-OUT */
865 if (int_reg & 0x10) { /* Target requesting info transfer */
866 rtrc(5);
867 current_SC->SCp.phase = data_out;
868 VDEB(printk("NCR53c406a: Data-Out phase\n"));
869 outb(FLUSH_FIFO, CMD_REG);
870 LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
871#if USE_DMA /* No s/g support for DMA */
872 NCR53c406a_dma_write(current_SC->request_buffer, current_SC->request_bufflen);
873#endif /* USE_DMA */
874 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
875#if USE_PIO
876 if (!current_SC->use_sg) /* Don't use scatter-gather */
877 NCR53c406a_pio_write(current_SC->request_buffer, current_SC->request_bufflen);
878 else { /* use scatter-gather */
879 sgcount = current_SC->use_sg;
880 sglist = current_SC->request_buffer;
881 while (sgcount--) {
882 NCR53c406a_pio_write(page_address(sglist->page) + sglist->offset, sglist->length);
883 sglist++;
884 }
885 }
886 REG0;
887#endif /* USE_PIO */
888 }
889 break;
890
891 case 0x01: /* DATA-IN */
892 if (int_reg & 0x10) { /* Target requesting info transfer */
893 rtrc(6);
894 current_SC->SCp.phase = data_in;
895 VDEB(printk("NCR53c406a: Data-In phase\n"));
896 outb(FLUSH_FIFO, CMD_REG);
897 LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
898#if USE_DMA /* No s/g support for DMA */
899 NCR53c406a_dma_read(current_SC->request_buffer, current_SC->request_bufflen);
900#endif /* USE_DMA */
901 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
902#if USE_PIO
903 if (!current_SC->use_sg) /* Don't use scatter-gather */
904 NCR53c406a_pio_read(current_SC->request_buffer, current_SC->request_bufflen);
905 else { /* Use scatter-gather */
906 sgcount = current_SC->use_sg;
907 sglist = current_SC->request_buffer;
908 while (sgcount--) {
909 NCR53c406a_pio_read(page_address(sglist->page) + sglist->offset, sglist->length);
910 sglist++;
911 }
912 }
913 REG0;
914#endif /* USE_PIO */
915 }
916 break;
917
918 case 0x02: /* COMMAND */
919 current_SC->SCp.phase = command_ph;
920 printk("NCR53c406a: Warning: Unknown interrupt occurred in command phase!\n");
921 break;
922
923 case 0x03: /* STATUS */
924 rtrc(7);
925 current_SC->SCp.phase = status_ph;
926 VDEB(printk("NCR53c406a: Status phase\n"));
927 outb(FLUSH_FIFO, CMD_REG);
928 outb(INIT_CMD_COMPLETE, CMD_REG);
929 break;
930
931 case 0x04: /* Reserved */
932 case 0x05: /* Reserved */
933 printk("NCR53c406a: WARNING: Reserved phase!!!\n");
934 break;
935
936 case 0x06: /* MESSAGE-OUT */
937 DEB(printk("NCR53c406a: Message-Out phase\n"));
938 current_SC->SCp.phase = message_out;
939 outb(SET_ATN, CMD_REG); /* Reject the message */
940 outb(MSG_ACCEPT, CMD_REG);
941 break;
942
943 case 0x07: /* MESSAGE-IN */
944 rtrc(4);
945 VDEB(printk("NCR53c406a: Message-In phase\n"));
946 current_SC->SCp.phase = message_in;
947
948 current_SC->SCp.Status = inb(SCSI_FIFO);
949 current_SC->SCp.Message = inb(SCSI_FIFO);
950
951 VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS) & 0x1f));
952 DEB(printk("Status = %02x Message = %02x\n", current_SC->SCp.Status, current_SC->SCp.Message));
953
954 if (current_SC->SCp.Message == SAVE_POINTERS || current_SC->SCp.Message == DISCONNECT) {
955 outb(SET_ATN, CMD_REG); /* Reject message */
956 DEB(printk("Discarding SAVE_POINTERS message\n"));
957 }
958 outb(MSG_ACCEPT, CMD_REG);
959 break;
960 }
961}
962
963#ifndef IRQ_LEV
964static int irq_probe(void)
965{
966 int irqs, irq;
967 unsigned long i;
968
969 inb(INT_REG); /* clear the interrupt register */
970 irqs = probe_irq_on();
971
972 /* Invalid command will cause an interrupt */
973 REG0;
974 outb(0xff, CMD_REG);
975
976 /* Wait for the interrupt to occur */
977 i = jiffies + WATCHDOG;
978 while (time_after(i, jiffies) && !(inb(STAT_REG) & 0x80))
979 barrier();
980 if (time_before_eq(i, jiffies)) { /* Timed out, must be hardware trouble */
981 probe_irq_off(irqs);
982 return -1;
983 }
984
985 irq = probe_irq_off(irqs);
986
987 /* Kick the chip */
988 outb(CHIP_RESET, CMD_REG);
989 outb(SCSI_NOP, CMD_REG);
990 chip_init();
991
992 return irq;
993}
994#endif /* IRQ_LEV */
995
996static void chip_init(void)
997{
998 REG1;
999#if USE_DMA
1000 outb(0x00, PIO_STATUS);
1001#else /* USE_PIO */
1002 outb(0x01, PIO_STATUS);
1003#endif
1004 outb(0x00, PIO_FLAG);
1005
1006 outb(C4_IMG, CONFIG4); /* REG0; */
1007 outb(C3_IMG, CONFIG3);
1008 outb(C2_IMG, CONFIG2);
1009 outb(C1_IMG, CONFIG1);
1010
1011 outb(0x05, CLKCONV); /* clock conversion factor */
1012 outb(0x9C, SRTIMOUT); /* Selection timeout */
1013 outb(0x05, SYNCPRD); /* Synchronous transfer period */
1014 outb(SYNC_MODE, SYNCOFF); /* synchronous mode */
1015}
1016
1017static void __init calc_port_addr(void)
1018{
1019 /* Control Register Set 0 */
1020 TC_LSB = (port_base + 0x00);
1021 TC_MSB = (port_base + 0x01);
1022 SCSI_FIFO = (port_base + 0x02);
1023 CMD_REG = (port_base + 0x03);
1024 STAT_REG = (port_base + 0x04);
1025 DEST_ID = (port_base + 0x04);
1026 INT_REG = (port_base + 0x05);
1027 SRTIMOUT = (port_base + 0x05);
1028 SEQ_REG = (port_base + 0x06);
1029 SYNCPRD = (port_base + 0x06);
1030 FIFO_FLAGS = (port_base + 0x07);
1031 SYNCOFF = (port_base + 0x07);
1032 CONFIG1 = (port_base + 0x08);
1033 CLKCONV = (port_base + 0x09);
1034 /* TESTREG = (port_base+0x0A); */
1035 CONFIG2 = (port_base + 0x0B);
1036 CONFIG3 = (port_base + 0x0C);
1037 CONFIG4 = (port_base + 0x0D);
1038 TC_HIGH = (port_base + 0x0E);
1039 /* FIFO_BOTTOM = (port_base+0x0F); */
1040
1041 /* Control Register Set 1 */
1042 /* JUMPER_SENSE = (port_base+0x00); */
1043 /* SRAM_PTR = (port_base+0x01); */
1044 /* SRAM_DATA = (port_base+0x02); */
1045 PIO_FIFO = (port_base + 0x04);
1046 /* PIO_FIFO1 = (port_base+0x05); */
1047 /* PIO_FIFO2 = (port_base+0x06); */
1048 /* PIO_FIFO3 = (port_base+0x07); */
1049 PIO_STATUS = (port_base + 0x08);
1050 /* ATA_CMD = (port_base+0x09); */
1051 /* ATA_ERR = (port_base+0x0A); */
1052 PIO_FLAG = (port_base + 0x0B);
1053 CONFIG5 = (port_base + 0x0D);
1054 /* SIGNATURE = (port_base+0x0E); */
1055 /* CONFIG6 = (port_base+0x0F); */
1056}
1057
1058MODULE_LICENSE("GPL");
1059
1060/* NOTE: scatter-gather support only works in PIO mode.
1061 * Use SG_NONE if DMA mode is enabled!
1062 */
1063
d0be4a7d 1064static struct scsi_host_template driver_template =
1da177e4
LT		 1065{
1066 .proc_name = "NCR53c406a" /* proc_name */,
1067 .name = "NCR53c406a" /* name */,
1068 .detect = NCR53c406a_detect /* detect */,
1069 .release = NCR53c406a_release,
1070 .info = NCR53c406a_info /* info */,
1071 .queuecommand = NCR53c406a_queue /* queuecommand */,
1da177e4
LT		 1072 .eh_host_reset_handler = NCR53c406a_host_reset /* reset */,
1073 .bios_param = NCR53c406a_biosparm /* biosparm */,
1074 .can_queue = 1 /* can_queue */,
1075 .this_id = 7 /* SCSI ID of the chip */,
1076 .sg_tablesize = 32 /*SG_ALL*/ /*SG_NONE*/,
1077 .cmd_per_lun = 1 /* commands per lun */,
1078 .unchecked_isa_dma = 1 /* unchecked_isa_dma */,
1079 .use_clustering = ENABLE_CLUSTERING
1080};
1081
1082#include "scsi_module.c"
1083
1084/*
1085 * Overrides for Emacs so that we get a uniform tabbing style.
1086 * Emacs will notice this stuff at the end of the file and automatically
1087 * adjust the settings for this buffer only. This must remain at the end
1088 * of the file.
1089 * ---------------------------------------------------------------------------
1090 * Local variables:
1091 * c-indent-level: 4
1092 * c-brace-imaginary-offset: 0
1093 * c-brace-offset: -4
1094 * c-argdecl-indent: 4
1095 * c-label-offset: -4
1096 * c-continued-statement-offset: 4
1097 * c-continued-brace-offset: 0
1098 * indent-tabs-mode: nil
1099 * tab-width: 8
1100 * End:
1101 */
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