[linux.git] / sound / soc / intel / avs / avs.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
 *
 * Authors: Cezary Rojewski <[email protected]>
 *          Amadeusz Slawinski <[email protected]>
 */

#ifndef __SOUND_SOC_INTEL_AVS_H
#define __SOUND_SOC_INTEL_AVS_H

#include <linux/device.h>
#include <linux/firmware.h>
#include <sound/hda_codec.h>
#include <sound/hda_register.h>
#include <sound/soc-component.h>
#include "messages.h"
#include "registers.h"

struct avs_dev;
struct avs_tplg;
struct avs_tplg_library;
struct avs_soc_component;

/*
 * struct avs_dsp_ops - Platform-specific DSP operations
 *
 * @power: Power on or off DSP cores
 * @reset: Enter or exit reset state on DSP cores
 * @stall: Stall or run DSP cores
 * @irq_handler: Top half of IPC servicing
 * @irq_thread: Bottom half of IPC servicing
 * @int_control: Enable or disable IPC interrupts
 */
struct avs_dsp_ops {
	int (* const power)(struct avs_dev *, u32, bool);
	int (* const reset)(struct avs_dev *, u32, bool);
	int (* const stall)(struct avs_dev *, u32, bool);
	irqreturn_t (* const irq_handler)(int, void *);
	irqreturn_t (* const irq_thread)(int, void *);
	void (* const int_control)(struct avs_dev *, bool);
	int (* const load_basefw)(struct avs_dev *, struct firmware *);
	int (* const load_lib)(struct avs_dev *, struct firmware *, u32);
	int (* const transfer_mods)(struct avs_dev *, bool, struct avs_module_entry *, u32);
};

#define avs_dsp_op(adev, op, ...) \
	((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__))

#define AVS_PLATATTR_CLDMA		BIT_ULL(0)
#define AVS_PLATATTR_IMR		BIT_ULL(1)

#define avs_platattr_test(adev, attr) \
	((adev)->spec->attributes & AVS_PLATATTR_##attr)

/* Platform specific descriptor */
struct avs_spec {
	const char *name;

	const struct avs_dsp_ops *const dsp_ops;
	struct avs_fw_version min_fw_version; /* anything below is rejected */

	const u32 core_init_mask;	/* used during DSP boot */
	const u64 attributes;		/* bitmask of AVS_PLATATTR_* */
	const u32 sram_base_offset;
	const u32 sram_window_size;
	const u32 rom_status;
};

struct avs_fw_entry {
	char *name;
	const struct firmware *fw;

	struct list_head node;
};

/*
 * struct avs_dev - Intel HD-Audio driver data
 *
 * @dev: PCI device
 * @dsp_ba: DSP bar address
 * @spec: platform-specific descriptor
 * @fw_cfg: Firmware configuration, obtained through FW_CONFIG message
 * @hw_cfg: Hardware configuration, obtained through HW_CONFIG message
 * @mods_info: Available module-types, obtained through MODULES_INFO message
 * @mod_idas: Module instance ID pool, one per module-type
 * @modres_mutex: For synchronizing any @mods_info updates
 * @ppl_ida: Pipeline instance ID pool
 * @fw_list: List of libraries loaded, including base firmware
 */
struct avs_dev {
	struct hda_bus base;
	struct device *dev;

	void __iomem *dsp_ba;
	const struct avs_spec *spec;
	struct avs_ipc *ipc;

	struct avs_fw_cfg fw_cfg;
	struct avs_hw_cfg hw_cfg;
	struct avs_mods_info *mods_info;
	struct ida **mod_idas;
	struct mutex modres_mutex;
	struct ida ppl_ida;
	struct list_head fw_list;
	int *core_refs;		/* reference count per core */
	char **lib_names;

	struct completion fw_ready;

	struct nhlt_acpi_table *nhlt;
	struct list_head comp_list;
	struct mutex comp_list_mutex;
	struct list_head path_list;
	spinlock_t path_list_lock;
	struct mutex path_mutex;
};

/* from hda_bus to avs_dev */
#define hda_to_avs(hda) container_of(hda, struct avs_dev, base)
/* from hdac_bus to avs_dev */
#define hdac_to_avs(hdac) hda_to_avs(to_hda_bus(hdac))
/* from device to avs_dev */
#define to_avs_dev(dev) \
({ \
	struct hdac_bus *__bus = dev_get_drvdata(dev); \
	hdac_to_avs(__bus); \
})

int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power);
int avs_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset);
int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall);
int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask);
int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask);

/* Inter Process Communication */

struct avs_ipc_msg {
	union {
		u64 header;
		union avs_global_msg glb;
		union avs_reply_msg rsp;
	};
	void *data;
	size_t size;
};

/*
 * struct avs_ipc - DSP IPC context
 *
 * @dev: PCI device
 * @rx: Reply message cache
 * @default_timeout_ms: default message timeout in MS
 * @ready: whether firmware is ready and communication is open
 * @rx_completed: whether RX for previously sent TX has been received
 * @rx_lock: for serializing manipulation of rx_* fields
 * @msg_lock: for synchronizing request handling
 * @done_completion: DONE-part of IPC i.e. ROM and ACKs from FW
 * @busy_completion: BUSY-part of IPC i.e. receiving responses from FW
 */
struct avs_ipc {
	struct device *dev;

	struct avs_ipc_msg rx;
	u32 default_timeout_ms;
	bool ready;

	bool rx_completed;
	spinlock_t rx_lock;
	struct mutex msg_mutex;
	struct completion done_completion;
	struct completion busy_completion;
};

#define AVS_EIPC	EREMOTEIO
/*
 * IPC handlers may return positive value (firmware error code) what denotes
 * successful HOST <-> DSP communication yet failure to process specific request.
 *
 * Below macro converts returned value to linux kernel error code.
 * All IPC callers MUST use it as soon as firmware error code is consumed.
 */
#define AVS_IPC_RET(ret) \
	(((ret) <= 0) ? (ret) : -AVS_EIPC)

static inline void avs_ipc_err(struct avs_dev *adev, struct avs_ipc_msg *tx,
			       const char *name, int error)
{
	/*
	 * If IPC channel is blocked e.g.: due to ongoing recovery,
	 * -EPERM error code is expected and thus it's not an actual error.
	 */
	if (error == -EPERM)
		dev_dbg(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
			tx->glb.primary, tx->glb.ext.val, error);
	else
		dev_err(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
			tx->glb.primary, tx->glb.ext.val, error);
}

irqreturn_t avs_dsp_irq_handler(int irq, void *dev_id);
irqreturn_t avs_dsp_irq_thread(int irq, void *dev_id);
void avs_dsp_process_response(struct avs_dev *adev, u64 header);
int avs_dsp_send_msg_timeout(struct avs_dev *adev,
			     struct avs_ipc_msg *request,
			     struct avs_ipc_msg *reply, int timeout);
int avs_dsp_send_msg(struct avs_dev *adev,
		     struct avs_ipc_msg *request, struct avs_ipc_msg *reply);
int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev,
				 struct avs_ipc_msg *request, int timeout);
int avs_dsp_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request);
void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable);
int avs_ipc_init(struct avs_ipc *ipc, struct device *dev);
void avs_ipc_block(struct avs_ipc *ipc);

/* Firmware resources management */

int avs_get_module_entry(struct avs_dev *adev, const guid_t *uuid, struct avs_module_entry *entry);
int avs_get_module_id_entry(struct avs_dev *adev, u32 module_id, struct avs_module_entry *entry);
int avs_get_module_id(struct avs_dev *adev, const guid_t *uuid);
bool avs_is_module_ida_empty(struct avs_dev *adev, u32 module_id);

int avs_module_info_init(struct avs_dev *adev, bool purge);
void avs_module_info_free(struct avs_dev *adev);
int avs_module_id_alloc(struct avs_dev *adev, u16 module_id);
void avs_module_id_free(struct avs_dev *adev, u16 module_id, u8 instance_id);
int avs_request_firmware(struct avs_dev *adev, const struct firmware **fw_p, const char *name);
void avs_release_last_firmware(struct avs_dev *adev);
void avs_release_firmwares(struct avs_dev *adev);

int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id,
			u8 core_id, u8 domain, void *param, u32 param_size,
			u16 *instance_id);
void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id,
			   u8 ppl_instance_id, u8 core_id);
int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
			    bool lp, u16 attributes, u8 *instance_id);
int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id);

/* Firmware loading */

void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable);
void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable);
void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable);

int avs_dsp_load_libraries(struct avs_dev *adev, struct avs_tplg_library *libs, u32 num_libs);
int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge);
int avs_dsp_first_boot_firmware(struct avs_dev *adev);

int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw);
int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);
int avs_cldma_transfer_modules(struct avs_dev *adev, bool load,
			       struct avs_module_entry *mods, u32 num_mods);
int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw);
int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);
int avs_hda_transfer_modules(struct avs_dev *adev, bool load,
			     struct avs_module_entry *mods, u32 num_mods);

/* Soc component members */

struct avs_soc_component {
	struct snd_soc_component base;
	struct avs_tplg *tplg;

	struct list_head node;
};

#define to_avs_soc_component(comp) \
	container_of(comp, struct avs_soc_component, base)

extern const struct snd_soc_dai_ops avs_dai_fe_ops;

#endif /* __SOUND_SOC_INTEL_AVS_H */
Commit	Line	Data
9fe51c55 CR	1	/* SPDX-License-Identifier: GPL-2.0-only */
	2	/*
	3	* Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
	4	*
	5	* Authors: Cezary Rojewski <[email protected]>
	6	* Amadeusz Slawinski <[email protected]>
	7	*/
	8
	9	#ifndef __SOUND_SOC_INTEL_AVS_H
	10	#define __SOUND_SOC_INTEL_AVS_H
	11
	12	#include <linux/device.h>
b27f4523	13	#include <linux/firmware.h>
9fe51c55	14	#include <sound/hda_codec.h>
b27f4523	15	#include <sound/hda_register.h>
34ae2cd5	16	#include <sound/soc-component.h>
2879516f	17	#include "messages.h"
b27f4523	18	#include "registers.h"
9fe51c55 CR	19
9fe51c55 CR	20	struct avs_dev;
34ae2cd5	21	struct avs_tplg;
81a29910 CR	22	struct avs_tplg_library;
81a29910 CR	23	struct avs_soc_component;
9fe51c55	24
2879516f CR	25	/*
	26	* struct avs_dsp_ops - Platform-specific DSP operations
	27	*
	28	* @power: Power on or off DSP cores
	29	* @reset: Enter or exit reset state on DSP cores
	30	* @stall: Stall or run DSP cores
	31	* @irq_handler: Top half of IPC servicing
	32	* @irq_thread: Bottom half of IPC servicing
	33	* @int_control: Enable or disable IPC interrupts
	34	*/
9fe51c55 CR	35	struct avs_dsp_ops {
	36	int (* const power)(struct avs_dev *, u32, bool);
	37	int (* const reset)(struct avs_dev *, u32, bool);
	38	int (* const stall)(struct avs_dev *, u32, bool);
2879516f CR	39	irqreturn_t (* const irq_handler)(int, void *);
	40	irqreturn_t (* const irq_thread)(int, void *);
	41	void (* const int_control)(struct avs_dev *, bool);
b27f4523 CR	42	int (* const load_basefw)(struct avs_dev , struct firmware );
	43	int (* const load_lib)(struct avs_dev , struct firmware , u32);
	44	int (* const transfer_mods)(struct avs_dev , bool, struct avs_module_entry , u32);
9fe51c55 CR	45	};
	46
	47	#define avs_dsp_op(adev, op, ...) \
	48	((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__))
	49
65794fe1	50	#define AVS_PLATATTR_CLDMA BIT_ULL(0)
092cf7b2	51	#define AVS_PLATATTR_IMR BIT_ULL(1)
65794fe1	52
9fe51c55 CR	53	#define avs_platattr_test(adev, attr) \
	54	((adev)->spec->attributes & AVS_PLATATTR_##attr)
	55
	56	/* Platform specific descriptor */
	57	struct avs_spec {
	58	const char *name;
	59
	60	const struct avs_dsp_ops *const dsp_ops;
b27f4523	61	struct avs_fw_version min_fw_version; /* anything below is rejected */
9fe51c55 CR	62
	63	const u32 core_init_mask; /* used during DSP boot */
	64	const u64 attributes; /* bitmask of AVS_PLATATTR_* */
2879516f CR	65	const u32 sram_base_offset;
	66	const u32 sram_window_size;
	67	const u32 rom_status;
9fe51c55 CR	68	};
9fe51c55 CR	69
c1a427e8 CR	70	struct avs_fw_entry {
	71	char *name;
	72	const struct firmware *fw;
	73
	74	struct list_head node;
	75	};
	76
9fe51c55 CR	77	/*
	78	* struct avs_dev - Intel HD-Audio driver data
	79	*
	80	* @dev: PCI device
	81	* @dsp_ba: DSP bar address
	82	* @spec: platform-specific descriptor
c1a427e8 CR	83	* @fw_cfg: Firmware configuration, obtained through FW_CONFIG message
	84	* @hw_cfg: Hardware configuration, obtained through HW_CONFIG message
	85	* @mods_info: Available module-types, obtained through MODULES_INFO message
	86	* @mod_idas: Module instance ID pool, one per module-type
	87	* @modres_mutex: For synchronizing any @mods_info updates
	88	* @ppl_ida: Pipeline instance ID pool
	89	* @fw_list: List of libraries loaded, including base firmware
9fe51c55 CR	90	*/
	91	struct avs_dev {
	92	struct hda_bus base;
	93	struct device *dev;
	94
	95	void __iomem *dsp_ba;
	96	const struct avs_spec *spec;
2879516f CR	97	struct avs_ipc *ipc;
2879516f CR	98
c1a427e8 CR	99	struct avs_fw_cfg fw_cfg;
	100	struct avs_hw_cfg hw_cfg;
	101	struct avs_mods_info *mods_info;
	102	struct ida **mod_idas;
	103	struct mutex modres_mutex;
	104	struct ida ppl_ida;
	105	struct list_head fw_list;
215e67b2	106	int core_refs; / reference count per core */
b27f4523	107	char **lib_names;
c1a427e8	108
2879516f	109	struct completion fw_ready;
0ef88207	110
274d79e5	111	struct nhlt_acpi_table *nhlt;
0ef88207 CR	112	struct list_head comp_list;
	113	struct mutex comp_list_mutex;
	114	struct list_head path_list;
	115	spinlock_t path_list_lock;
	116	struct mutex path_mutex;
9fe51c55 CR	117	};
	118
	119	/* from hda_bus to avs_dev */
	120	#define hda_to_avs(hda) container_of(hda, struct avs_dev, base)
	121	/* from hdac_bus to avs_dev */
	122	#define hdac_to_avs(hdac) hda_to_avs(to_hda_bus(hdac))
	123	/* from device to avs_dev */
	124	#define to_avs_dev(dev) \
	125	({ \
	126	struct hdac_bus *__bus = dev_get_drvdata(dev); \
	127	hdac_to_avs(__bus); \
	128	})
	129
	130	int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power);
	131	int avs_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset);
	132	int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall);
	133	int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask);
	134	int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask);
	135
2879516f CR	136	/* Inter Process Communication */
	137
	138	struct avs_ipc_msg {
	139	union {
	140	u64 header;
	141	union avs_global_msg glb;
	142	union avs_reply_msg rsp;
	143	};
	144	void *data;
	145	size_t size;
	146	};
	147
	148	/*
	149	* struct avs_ipc - DSP IPC context
	150	*
	151	* @dev: PCI device
	152	* @rx: Reply message cache
	153	* @default_timeout_ms: default message timeout in MS
	154	* @ready: whether firmware is ready and communication is open
	155	* @rx_completed: whether RX for previously sent TX has been received
	156	* @rx_lock: for serializing manipulation of rx_* fields
	157	* @msg_lock: for synchronizing request handling
	158	* @done_completion: DONE-part of IPC i.e. ROM and ACKs from FW
	159	* @busy_completion: BUSY-part of IPC i.e. receiving responses from FW
	160	*/
	161	struct avs_ipc {
	162	struct device *dev;
	163
	164	struct avs_ipc_msg rx;
	165	u32 default_timeout_ms;
	166	bool ready;
	167
	168	bool rx_completed;
	169	spinlock_t rx_lock;
	170	struct mutex msg_mutex;
	171	struct completion done_completion;
	172	struct completion busy_completion;
	173	};
	174
	175	#define AVS_EIPC EREMOTEIO
	176	/*
	177	* IPC handlers may return positive value (firmware error code) what denotes
	178	* successful HOST <-> DSP communication yet failure to process specific request.
	179	*
	180	* Below macro converts returned value to linux kernel error code.
	181	* All IPC callers MUST use it as soon as firmware error code is consumed.
	182	*/
	183	#define AVS_IPC_RET(ret) \
	184	(((ret) <= 0) ? (ret) : -AVS_EIPC)
	185
	186	static inline void avs_ipc_err(struct avs_dev adev, struct avs_ipc_msg tx,
	187	const char *name, int error)
	188	{
	189	/*
	190	* If IPC channel is blocked e.g.: due to ongoing recovery,
	191	* -EPERM error code is expected and thus it's not an actual error.
	192	*/
	193	if (error == -EPERM)
	194	dev_dbg(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
	195	tx->glb.primary, tx->glb.ext.val, error);
	196	else
	197	dev_err(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
	198	tx->glb.primary, tx->glb.ext.val, error);
	199	}
200
201	irqreturn_t avs_dsp_irq_handler(int irq, void *dev_id);
202	irqreturn_t avs_dsp_irq_thread(int irq, void *dev_id);
203	void avs_dsp_process_response(struct avs_dev *adev, u64 header);
204	int avs_dsp_send_msg_timeout(struct avs_dev *adev,
205	struct avs_ipc_msg *request,
206	struct avs_ipc_msg *reply, int timeout);
207	int avs_dsp_send_msg(struct avs_dev *adev,
208	struct avs_ipc_msg request, struct avs_ipc_msg reply);
209	int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev,
210	struct avs_ipc_msg *request, int timeout);
211	int avs_dsp_send_rom_msg(struct avs_dev adev, struct avs_ipc_msg request);
212	void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable);
213	int avs_ipc_init(struct avs_ipc ipc, struct device dev);
214	void avs_ipc_block(struct avs_ipc *ipc);
215
c1a427e8 CR	216	/* Firmware resources management */
	217
	218	int avs_get_module_entry(struct avs_dev adev, const guid_t uuid, struct avs_module_entry *entry);
	219	int avs_get_module_id_entry(struct avs_dev adev, u32 module_id, struct avs_module_entry entry);
	220	int avs_get_module_id(struct avs_dev adev, const guid_t uuid);
	221	bool avs_is_module_ida_empty(struct avs_dev *adev, u32 module_id);
	222
	223	int avs_module_info_init(struct avs_dev *adev, bool purge);
	224	void avs_module_info_free(struct avs_dev *adev);
	225	int avs_module_id_alloc(struct avs_dev *adev, u16 module_id);
	226	void avs_module_id_free(struct avs_dev *adev, u16 module_id, u8 instance_id);
	227	int avs_request_firmware(struct avs_dev adev, const struct firmware fw_p, const char name);
	228	void avs_release_last_firmware(struct avs_dev *adev);
	229	void avs_release_firmwares(struct avs_dev *adev);
	230
215e67b2 CR	231	int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id,
	232	u8 core_id, u8 domain, void *param, u32 param_size,
	233	u16 *instance_id);
	234	void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id,
	235	u8 ppl_instance_id, u8 core_id);
	236	int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
	237	bool lp, u16 attributes, u8 *instance_id);
	238	int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id);
	239
b27f4523 CR	240	/* Firmware loading */
	241
	242	void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable);
	243	void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable);
	244	void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable);
	245
81a29910	246	int avs_dsp_load_libraries(struct avs_dev adev, struct avs_tplg_library libs, u32 num_libs);
b27f4523 CR	247	int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge);
	248	int avs_dsp_first_boot_firmware(struct avs_dev *adev);
	249
65794fe1 CR	250	int avs_cldma_load_basefw(struct avs_dev adev, struct firmware fw);
	251	int avs_cldma_load_library(struct avs_dev adev, struct firmware lib, u32 id);
	252	int avs_cldma_transfer_modules(struct avs_dev *adev, bool load,
	253	struct avs_module_entry *mods, u32 num_mods);
092cf7b2 CR	254	int avs_hda_load_basefw(struct avs_dev adev, struct firmware fw);
	255	int avs_hda_load_library(struct avs_dev adev, struct firmware lib, u32 id);
	256	int avs_hda_transfer_modules(struct avs_dev *adev, bool load,
	257	struct avs_module_entry *mods, u32 num_mods);
65794fe1	258
34ae2cd5 CR	259	/* Soc component members */
	260
	261	struct avs_soc_component {
	262	struct snd_soc_component base;
	263	struct avs_tplg *tplg;
	264
	265	struct list_head node;
	266	};
	267
	268	#define to_avs_soc_component(comp) \
	269	container_of(comp, struct avs_soc_component, base)
	270
d73d1b67 CR	271	extern const struct snd_soc_dai_ops avs_dai_fe_ops;
d73d1b67 CR	272
9fe51c55	273	#endif /* __SOUND_SOC_INTEL_AVS_H */