[linux.git] / drivers / pwm / pwm-mxs.c

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/slab.h>
#include <linux/stmp_device.h>

#define SET	0x4
#define CLR	0x8
#define TOG	0xc

#define PWM_CTRL		0x0
#define PWM_ACTIVE0		0x10
#define PWM_PERIOD0		0x20
#define  PERIOD_PERIOD(p)	((p) & 0xffff)
#define  PERIOD_PERIOD_MAX	0x10000
#define  PERIOD_ACTIVE_HIGH	(3 << 16)
#define  PERIOD_INACTIVE_LOW	(2 << 18)
#define  PERIOD_CDIV(div)	(((div) & 0x7) << 20)
#define  PERIOD_CDIV_MAX	8

static const unsigned int cdiv[PERIOD_CDIV_MAX] = {
	1, 2, 4, 8, 16, 64, 256, 1024
};

struct mxs_pwm_chip {
	struct pwm_chip chip;
	struct clk *clk;
	void __iomem *base;
};

#define to_mxs_pwm_chip(_chip) container_of(_chip, struct mxs_pwm_chip, chip)

static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
			  int duty_ns, int period_ns)
{
	struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
	int ret, div = 0;
	unsigned int period_cycles, duty_cycles;
	unsigned long rate;
	unsigned long long c;

	rate = clk_get_rate(mxs->clk);
	while (1) {
		c = rate / cdiv[div];
		c = c * period_ns;
		do_div(c, 1000000000);
		if (c < PERIOD_PERIOD_MAX)
			break;
		div++;
		if (div >= PERIOD_CDIV_MAX)
			return -EINVAL;
	}

	period_cycles = c;
	c *= duty_ns;
	do_div(c, period_ns);
	duty_cycles = c;

	/*
	 * If the PWM channel is disabled, make sure to turn on the clock
	 * before writing the register. Otherwise, keep it enabled.
	 */
	if (!pwm_is_enabled(pwm)) {
		ret = clk_prepare_enable(mxs->clk);
		if (ret)
			return ret;
	}

	writel(duty_cycles << 16,
			mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20);
	writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH |
	       PERIOD_INACTIVE_LOW | PERIOD_CDIV(div),
			mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20);

	/*
	 * If the PWM is not enabled, turn the clock off again to save power.
	 */
	if (!pwm_is_enabled(pwm))
		clk_disable_unprepare(mxs->clk);

	return 0;
}

static int mxs_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
	int ret;

	ret = clk_prepare_enable(mxs->clk);
	if (ret)
		return ret;

	writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET);

	return 0;
}

static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);

	writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR);

	clk_disable_unprepare(mxs->clk);
}

static const struct pwm_ops mxs_pwm_ops = {
	.config = mxs_pwm_config,
	.enable = mxs_pwm_enable,
	.disable = mxs_pwm_disable,
	.owner = THIS_MODULE,
};

static int mxs_pwm_probe(struct platform_device *pdev)
{
	struct device_node *np = pdev->dev.of_node;
	struct mxs_pwm_chip *mxs;
	struct resource *res;
	int ret;

	mxs = devm_kzalloc(&pdev->dev, sizeof(*mxs), GFP_KERNEL);
	if (!mxs)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	mxs->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(mxs->base))
		return PTR_ERR(mxs->base);

	mxs->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(mxs->clk))
		return PTR_ERR(mxs->clk);

	mxs->chip.dev = &pdev->dev;
	mxs->chip.ops = &mxs_pwm_ops;
	mxs->chip.base = -1;

	ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm);
	if (ret < 0) {
		dev_err(&pdev->dev, "failed to get pwm number: %d\n", ret);
		return ret;
	}

	ret = pwmchip_add(&mxs->chip);
	if (ret < 0) {
		dev_err(&pdev->dev, "failed to add pwm chip %d\n", ret);
		return ret;
	}

	platform_set_drvdata(pdev, mxs);

	ret = stmp_reset_block(mxs->base);
	if (ret)
		goto pwm_remove;

	return 0;

pwm_remove:
	pwmchip_remove(&mxs->chip);
	return ret;
}

static int mxs_pwm_remove(struct platform_device *pdev)
{
	struct mxs_pwm_chip *mxs = platform_get_drvdata(pdev);

	return pwmchip_remove(&mxs->chip);
}

static const struct of_device_id mxs_pwm_dt_ids[] = {
	{ .compatible = "fsl,imx23-pwm", },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mxs_pwm_dt_ids);

static struct platform_driver mxs_pwm_driver = {
	.driver = {
		.name = "mxs-pwm",
		.of_match_table = mxs_pwm_dt_ids,
	},
	.probe = mxs_pwm_probe,
	.remove = mxs_pwm_remove,
};
module_platform_driver(mxs_pwm_driver);

MODULE_ALIAS("platform:mxs-pwm");
MODULE_AUTHOR("Shawn Guo <[email protected]>");
MODULE_DESCRIPTION("Freescale MXS PWM Driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
4dce82c1 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
	12	#include <linux/clk.h>
	13	#include <linux/err.h>
	14	#include <linux/io.h>
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
	17	#include <linux/of.h>
	18	#include <linux/of_address.h>
	19	#include <linux/platform_device.h>
	20	#include <linux/pwm.h>
	21	#include <linux/slab.h>
01bf32e9	22	#include <linux/stmp_device.h>
4dce82c1 SG	23
	24	#define SET 0x4
	25	#define CLR 0x8
	26	#define TOG 0xc
	27
	28	#define PWM_CTRL 0x0
	29	#define PWM_ACTIVE0 0x10
	30	#define PWM_PERIOD0 0x20
	31	#define PERIOD_PERIOD(p) ((p) & 0xffff)
	32	#define PERIOD_PERIOD_MAX 0x10000
	33	#define PERIOD_ACTIVE_HIGH (3 << 16)
	34	#define PERIOD_INACTIVE_LOW (2 << 18)
	35	#define PERIOD_CDIV(div) (((div) & 0x7) << 20)
	36	#define PERIOD_CDIV_MAX 8
	37
24ccea1c GH	38	static const unsigned int cdiv[PERIOD_CDIV_MAX] = {
	39	1, 2, 4, 8, 16, 64, 256, 1024
	40	};
	41
4dce82c1 SG	42	struct mxs_pwm_chip {
4dce82c1 SG	43	struct pwm_chip chip;
4dce82c1 SG	44	struct clk *clk;
	45	void __iomem *base;
	46	};
	47
	48	#define to_mxs_pwm_chip(_chip) container_of(_chip, struct mxs_pwm_chip, chip)
	49
	50	static int mxs_pwm_config(struct pwm_chip chip, struct pwm_device pwm,
	51	int duty_ns, int period_ns)
	52	{
	53	struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
	54	int ret, div = 0;
	55	unsigned int period_cycles, duty_cycles;
	56	unsigned long rate;
	57	unsigned long long c;
	58
	59	rate = clk_get_rate(mxs->clk);
	60	while (1) {
24ccea1c	61	c = rate / cdiv[div];
4dce82c1 SG	62	c = c * period_ns;
	63	do_div(c, 1000000000);
	64	if (c < PERIOD_PERIOD_MAX)
	65	break;
	66	div++;
24ccea1c	67	if (div >= PERIOD_CDIV_MAX)
4dce82c1 SG	68	return -EINVAL;
	69	}
	70
	71	period_cycles = c;
	72	c *= duty_ns;
	73	do_div(c, period_ns);
	74	duty_cycles = c;
	75
	76	/*
	77	* If the PWM channel is disabled, make sure to turn on the clock
	78	* before writing the register. Otherwise, keep it enabled.
	79	*/
5c31252c	80	if (!pwm_is_enabled(pwm)) {
4dce82c1 SG	81	ret = clk_prepare_enable(mxs->clk);
	82	if (ret)
	83	return ret;
	84	}
	85
	86	writel(duty_cycles << 16,
	87	mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20);
	88	writel(PERIOD_PERIOD(period_cycles) \| PERIOD_ACTIVE_HIGH \|
	89	PERIOD_INACTIVE_LOW \| PERIOD_CDIV(div),
	90	mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20);
	91
	92	/*
	93	* If the PWM is not enabled, turn the clock off again to save power.
	94	*/
5c31252c	95	if (!pwm_is_enabled(pwm))
4dce82c1 SG	96	clk_disable_unprepare(mxs->clk);
	97
	98	return 0;
	99	}
	100
	101	static int mxs_pwm_enable(struct pwm_chip chip, struct pwm_device pwm)
	102	{
	103	struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
	104	int ret;
	105
	106	ret = clk_prepare_enable(mxs->clk);
	107	if (ret)
	108	return ret;
	109
	110	writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET);
	111
	112	return 0;
	113	}
	114
	115	static void mxs_pwm_disable(struct pwm_chip chip, struct pwm_device pwm)
	116	{
	117	struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
	118
	119	writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR);
	120
	121	clk_disable_unprepare(mxs->clk);
	122	}
	123
	124	static const struct pwm_ops mxs_pwm_ops = {
	125	.config = mxs_pwm_config,
	126	.enable = mxs_pwm_enable,
	127	.disable = mxs_pwm_disable,
	128	.owner = THIS_MODULE,
	129	};
	130
	131	static int mxs_pwm_probe(struct platform_device *pdev)
	132	{
	133	struct device_node *np = pdev->dev.of_node;
	134	struct mxs_pwm_chip *mxs;
22d260bd	135	struct resource *res;
4dce82c1 SG	136	int ret;
	137
	138	mxs = devm_kzalloc(&pdev->dev, sizeof(*mxs), GFP_KERNEL);
	139	if (!mxs)
	140	return -ENOMEM;
	141
22d260bd	142	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6d4294d1 TR	143	mxs->base = devm_ioremap_resource(&pdev->dev, res);
	144	if (IS_ERR(mxs->base))
	145	return PTR_ERR(mxs->base);
4dce82c1	146
22d260bd SG	147	mxs->clk = devm_clk_get(&pdev->dev, NULL);
	148	if (IS_ERR(mxs->clk))
	149	return PTR_ERR(mxs->clk);
4dce82c1 SG	150
	151	mxs->chip.dev = &pdev->dev;
	152	mxs->chip.ops = &mxs_pwm_ops;
	153	mxs->chip.base = -1;
8c0216f3	154
4dce82c1 SG	155	ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm);
	156	if (ret < 0) {
	157	dev_err(&pdev->dev, "failed to get pwm number: %d\n", ret);
22d260bd	158	return ret;
4dce82c1 SG	159	}
	160
	161	ret = pwmchip_add(&mxs->chip);
	162	if (ret < 0) {
	163	dev_err(&pdev->dev, "failed to add pwm chip %d\n", ret);
22d260bd	164	return ret;
4dce82c1 SG	165	}
4dce82c1 SG	166
4dce82c1 SG	167	platform_set_drvdata(pdev, mxs);
4dce82c1 SG	168
cfb9e4c4 FE	169	ret = stmp_reset_block(mxs->base);
	170	if (ret)
	171	goto pwm_remove;
4dce82c1 SG	172
4dce82c1 SG	173	return 0;
cfb9e4c4 FE	174
	175	pwm_remove:
	176	pwmchip_remove(&mxs->chip);
	177	return ret;
4dce82c1 SG	178	}
4dce82c1 SG	179
77f37917	180	static int mxs_pwm_remove(struct platform_device *pdev)
4dce82c1 SG	181	{
	182	struct mxs_pwm_chip *mxs = platform_get_drvdata(pdev);
	183
457fd768	184	return pwmchip_remove(&mxs->chip);
4dce82c1 SG	185	}
4dce82c1 SG	186
f1a8870a	187	static const struct of_device_id mxs_pwm_dt_ids[] = {
071407ee	188	{ .compatible = "fsl,imx23-pwm", },
4dce82c1 SG	189	{ /* sentinel */ }
	190	};
	191	MODULE_DEVICE_TABLE(of, mxs_pwm_dt_ids);
	192
	193	static struct platform_driver mxs_pwm_driver = {
	194	.driver = {
	195	.name = "mxs-pwm",
de02cb88	196	.of_match_table = mxs_pwm_dt_ids,
4dce82c1 SG	197	},
4dce82c1 SG	198	.probe = mxs_pwm_probe,
fd109112	199	.remove = mxs_pwm_remove,
4dce82c1 SG	200	};
	201	module_platform_driver(mxs_pwm_driver);
	202
	203	MODULE_ALIAS("platform:mxs-pwm");
	204	MODULE_AUTHOR("Shawn Guo <[email protected]>");
	205	MODULE_DESCRIPTION("Freescale MXS PWM Driver");
	206	MODULE_LICENSE("GPL v2");