]> Git Repo - linux.git/blame - drivers/net/e1000e/netdev.c
projects / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
drivers/md/md.c: use %pU to print UUIDs
[linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <[email protected]>
24 e1000-devel Mailing List <[email protected]>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
bc7f75fa
AK		 48
49#include "e1000.h"
50
3be8c940 51#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
8c81c9c3 60 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 61 [board_80003es2lan] = &e1000_es2_info,
62 [board_ich8lan] = &e1000_ich8_info,
63 [board_ich9lan] = &e1000_ich9_info,
f4187b56 64 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 65 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 66};
67
bc7f75fa
AK		 68/**
69 * e1000_desc_unused - calculate if we have unused descriptors
70 **/
71static int e1000_desc_unused(struct e1000_ring *ring)
72{
73 if (ring->next_to_clean > ring->next_to_use)
74 return ring->next_to_clean - ring->next_to_use - 1;
75
76 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
77}
78
79/**
ad68076e 80 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 81 * @adapter: board private structure
82 * @status: descriptor status field as written by hardware
83 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
84 * @skb: pointer to sk_buff to be indicated to stack
85 **/
86static void e1000_receive_skb(struct e1000_adapter *adapter,
87 struct net_device *netdev,
88 struct sk_buff *skb,
a39fe742 89 u8 status, __le16 vlan)
bc7f75fa
AK		 90{
91 skb->protocol = eth_type_trans(skb, netdev);
92
93 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 94 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
95 le16_to_cpu(vlan), skb);
bc7f75fa 96 else
89c88b16 97 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 98}
99
100/**
101 * e1000_rx_checksum - Receive Checksum Offload for 82543
102 * @adapter: board private structure
103 * @status_err: receive descriptor status and error fields
104 * @csum: receive descriptor csum field
105 * @sk_buff: socket buffer with received data
106 **/
107static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
108 u32 csum, struct sk_buff *skb)
109{
110 u16 status = (u16)status_err;
111 u8 errors = (u8)(status_err >> 24);
112 skb->ip_summed = CHECKSUM_NONE;
113
114 /* Ignore Checksum bit is set */
115 if (status & E1000_RXD_STAT_IXSM)
116 return;
117 /* TCP/UDP checksum error bit is set */
118 if (errors & E1000_RXD_ERR_TCPE) {
119 /* let the stack verify checksum errors */
120 adapter->hw_csum_err++;
121 return;
122 }
123
124 /* TCP/UDP Checksum has not been calculated */
125 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
126 return;
127
128 /* It must be a TCP or UDP packet with a valid checksum */
129 if (status & E1000_RXD_STAT_TCPCS) {
130 /* TCP checksum is good */
131 skb->ip_summed = CHECKSUM_UNNECESSARY;
132 } else {
ad68076e
BA		 133 /*
134 * IP fragment with UDP payload
135 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 136 * and then put the value in host order for further stack use.
137 */
a39fe742
AV		 138 __sum16 sum = (__force __sum16)htons(csum);
139 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 140 skb->ip_summed = CHECKSUM_COMPLETE;
141 }
142 adapter->hw_csum_good++;
143}
144
145/**
146 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
147 * @adapter: address of board private structure
148 **/
149static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
150 int cleaned_count)
151{
152 struct net_device *netdev = adapter->netdev;
153 struct pci_dev *pdev = adapter->pdev;
154 struct e1000_ring *rx_ring = adapter->rx_ring;
155 struct e1000_rx_desc *rx_desc;
156 struct e1000_buffer *buffer_info;
157 struct sk_buff *skb;
158 unsigned int i;
89d71a66 159 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 160
161 i = rx_ring->next_to_use;
162 buffer_info = &rx_ring->buffer_info[i];
163
164 while (cleaned_count--) {
165 skb = buffer_info->skb;
166 if (skb) {
167 skb_trim(skb, 0);
168 goto map_skb;
169 }
170
89d71a66 171 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 172 if (!skb) {
173 /* Better luck next round */
174 adapter->alloc_rx_buff_failed++;
175 break;
176 }
177
bc7f75fa
AK		 178 buffer_info->skb = skb;
179map_skb:
180 buffer_info->dma = pci_map_single(pdev, skb->data,
181 adapter->rx_buffer_len,
182 PCI_DMA_FROMDEVICE);
8d8bb39b 183 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 184 dev_err(&pdev->dev, "RX DMA map failed\n");
185 adapter->rx_dma_failed++;
186 break;
187 }
188
189 rx_desc = E1000_RX_DESC(*rx_ring, i);
190 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
191
192 i++;
193 if (i == rx_ring->count)
194 i = 0;
195 buffer_info = &rx_ring->buffer_info[i];
196 }
197
198 if (rx_ring->next_to_use != i) {
199 rx_ring->next_to_use = i;
200 if (i-- == 0)
201 i = (rx_ring->count - 1);
202
ad68076e
BA		 203 /*
204 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 205 * know there are new descriptors to fetch. (Only
206 * applicable for weak-ordered memory model archs,
ad68076e
BA		 207 * such as IA-64).
208 */
bc7f75fa
AK		 209 wmb();
210 writel(i, adapter->hw.hw_addr + rx_ring->tail);
211 }
212}
213
214/**
215 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
216 * @adapter: address of board private structure
217 **/
218static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
219 int cleaned_count)
220{
221 struct net_device *netdev = adapter->netdev;
222 struct pci_dev *pdev = adapter->pdev;
223 union e1000_rx_desc_packet_split *rx_desc;
224 struct e1000_ring *rx_ring = adapter->rx_ring;
225 struct e1000_buffer *buffer_info;
226 struct e1000_ps_page *ps_page;
227 struct sk_buff *skb;
228 unsigned int i, j;
229
230 i = rx_ring->next_to_use;
231 buffer_info = &rx_ring->buffer_info[i];
232
233 while (cleaned_count--) {
234 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
235
236 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 237 ps_page = &buffer_info->ps_pages[j];
238 if (j >= adapter->rx_ps_pages) {
239 /* all unused desc entries get hw null ptr */
a39fe742 240 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 241 continue;
242 }
243 if (!ps_page->page) {
244 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 245 if (!ps_page->page) {
47f44e40
AK		 246 adapter->alloc_rx_buff_failed++;
247 goto no_buffers;
248 }
249 ps_page->dma = pci_map_page(pdev,
250 ps_page->page,
251 0, PAGE_SIZE,
252 PCI_DMA_FROMDEVICE);
8d8bb39b 253 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 254 dev_err(&adapter->pdev->dev,
255 "RX DMA page map failed\n");
256 adapter->rx_dma_failed++;
257 goto no_buffers;
bc7f75fa 258 }
bc7f75fa 259 }
47f44e40
AK		 260 /*
261 * Refresh the desc even if buffer_addrs
262 * didn't change because each write-back
263 * erases this info.
264 */
265 rx_desc->read.buffer_addr[j+1] =
266 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 267 }
268
89d71a66
ED		 269 skb = netdev_alloc_skb_ip_align(netdev,
270 adapter->rx_ps_bsize0);
bc7f75fa
AK		 271
272 if (!skb) {
273 adapter->alloc_rx_buff_failed++;
274 break;
275 }
276
bc7f75fa
AK		 277 buffer_info->skb = skb;
278 buffer_info->dma = pci_map_single(pdev, skb->data,
279 adapter->rx_ps_bsize0,
280 PCI_DMA_FROMDEVICE);
8d8bb39b 281 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 282 dev_err(&pdev->dev, "RX DMA map failed\n");
283 adapter->rx_dma_failed++;
284 /* cleanup skb */
285 dev_kfree_skb_any(skb);
286 buffer_info->skb = NULL;
287 break;
288 }
289
290 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
291
292 i++;
293 if (i == rx_ring->count)
294 i = 0;
295 buffer_info = &rx_ring->buffer_info[i];
296 }
297
298no_buffers:
299 if (rx_ring->next_to_use != i) {
300 rx_ring->next_to_use = i;
301
302 if (!(i--))
303 i = (rx_ring->count - 1);
304
ad68076e
BA		 305 /*
306 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 307 * know there are new descriptors to fetch. (Only
308 * applicable for weak-ordered memory model archs,
ad68076e
BA		 309 * such as IA-64).
310 */
bc7f75fa 311 wmb();
ad68076e
BA		 312 /*
313 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 314 * descriptors are 32 bytes...so we increment tail
315 * twice as much.
316 */
317 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
318 }
319}
320
97ac8cae
BA		 321/**
322 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
323 * @adapter: address of board private structure
97ac8cae
BA		 324 * @cleaned_count: number of buffers to allocate this pass
325 **/
326
327static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
328 int cleaned_count)
329{
330 struct net_device *netdev = adapter->netdev;
331 struct pci_dev *pdev = adapter->pdev;
332 struct e1000_rx_desc *rx_desc;
333 struct e1000_ring *rx_ring = adapter->rx_ring;
334 struct e1000_buffer *buffer_info;
335 struct sk_buff *skb;
336 unsigned int i;
89d71a66 337 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 338
339 i = rx_ring->next_to_use;
340 buffer_info = &rx_ring->buffer_info[i];
341
342 while (cleaned_count--) {
343 skb = buffer_info->skb;
344 if (skb) {
345 skb_trim(skb, 0);
346 goto check_page;
347 }
348
89d71a66 349 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 350 if (unlikely(!skb)) {
351 /* Better luck next round */
352 adapter->alloc_rx_buff_failed++;
353 break;
354 }
355
97ac8cae
BA		 356 buffer_info->skb = skb;
357check_page:
358 /* allocate a new page if necessary */
359 if (!buffer_info->page) {
360 buffer_info->page = alloc_page(GFP_ATOMIC);
361 if (unlikely(!buffer_info->page)) {
362 adapter->alloc_rx_buff_failed++;
363 break;
364 }
365 }
366
367 if (!buffer_info->dma)
368 buffer_info->dma = pci_map_page(pdev,
369 buffer_info->page, 0,
370 PAGE_SIZE,
371 PCI_DMA_FROMDEVICE);
372
373 rx_desc = E1000_RX_DESC(*rx_ring, i);
374 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
375
376 if (unlikely(++i == rx_ring->count))
377 i = 0;
378 buffer_info = &rx_ring->buffer_info[i];
379 }
380
381 if (likely(rx_ring->next_to_use != i)) {
382 rx_ring->next_to_use = i;
383 if (unlikely(i-- == 0))
384 i = (rx_ring->count - 1);
385
386 /* Force memory writes to complete before letting h/w
387 * know there are new descriptors to fetch. (Only
388 * applicable for weak-ordered memory model archs,
389 * such as IA-64). */
390 wmb();
391 writel(i, adapter->hw.hw_addr + rx_ring->tail);
392 }
393}
394
bc7f75fa
AK		 395/**
396 * e1000_clean_rx_irq - Send received data up the network stack; legacy
397 * @adapter: board private structure
398 *
399 * the return value indicates whether actual cleaning was done, there
400 * is no guarantee that everything was cleaned
401 **/
402static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
403 int *work_done, int work_to_do)
404{
405 struct net_device *netdev = adapter->netdev;
406 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 407 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 408 struct e1000_ring *rx_ring = adapter->rx_ring;
409 struct e1000_rx_desc *rx_desc, *next_rxd;
410 struct e1000_buffer *buffer_info, *next_buffer;
411 u32 length;
412 unsigned int i;
413 int cleaned_count = 0;
414 bool cleaned = 0;
415 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
416
417 i = rx_ring->next_to_clean;
418 rx_desc = E1000_RX_DESC(*rx_ring, i);
419 buffer_info = &rx_ring->buffer_info[i];
420
421 while (rx_desc->status & E1000_RXD_STAT_DD) {
422 struct sk_buff *skb;
423 u8 status;
424
425 if (*work_done >= work_to_do)
426 break;
427 (*work_done)++;
428
429 status = rx_desc->status;
430 skb = buffer_info->skb;
431 buffer_info->skb = NULL;
432
433 prefetch(skb->data - NET_IP_ALIGN);
434
435 i++;
436 if (i == rx_ring->count)
437 i = 0;
438 next_rxd = E1000_RX_DESC(*rx_ring, i);
439 prefetch(next_rxd);
440
441 next_buffer = &rx_ring->buffer_info[i];
442
443 cleaned = 1;
444 cleaned_count++;
445 pci_unmap_single(pdev,
446 buffer_info->dma,
447 adapter->rx_buffer_len,
448 PCI_DMA_FROMDEVICE);
449 buffer_info->dma = 0;
450
451 length = le16_to_cpu(rx_desc->length);
452
453 /* !EOP means multiple descriptors were used to store a single
454 * packet, also make sure the frame isn't just CRC only */
455 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
456 /* All receives must fit into a single buffer */
3bb99fe2 457 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 458 /* recycle */
459 buffer_info->skb = skb;
460 goto next_desc;
461 }
462
463 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
464 /* recycle */
465 buffer_info->skb = skb;
466 goto next_desc;
467 }
468
eb7c3adb
JK		 469 /* adjust length to remove Ethernet CRC */
470 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
471 length -= 4;
472
bc7f75fa
AK		 473 total_rx_bytes += length;
474 total_rx_packets++;
475
ad68076e
BA		 476 /*
477 * code added for copybreak, this should improve
bc7f75fa 478 * performance for small packets with large amounts
ad68076e
BA		 479 * of reassembly being done in the stack
480 */
bc7f75fa
AK		 481 if (length < copybreak) {
482 struct sk_buff *new_skb =
89d71a66 483 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 484 if (new_skb) {
808ff676
BA		 485 skb_copy_to_linear_data_offset(new_skb,
486 -NET_IP_ALIGN,
487 (skb->data -
488 NET_IP_ALIGN),
489 (length +
490 NET_IP_ALIGN));
bc7f75fa
AK		 491 /* save the skb in buffer_info as good */
492 buffer_info->skb = skb;
493 skb = new_skb;
494 }
495 /* else just continue with the old one */
496 }
497 /* end copybreak code */
498 skb_put(skb, length);
499
500 /* Receive Checksum Offload */
501 e1000_rx_checksum(adapter,
502 (u32)(status) |
503 ((u32)(rx_desc->errors) << 24),
504 le16_to_cpu(rx_desc->csum), skb);
505
506 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
507
508next_desc:
509 rx_desc->status = 0;
510
511 /* return some buffers to hardware, one at a time is too slow */
512 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
513 adapter->alloc_rx_buf(adapter, cleaned_count);
514 cleaned_count = 0;
515 }
516
517 /* use prefetched values */
518 rx_desc = next_rxd;
519 buffer_info = next_buffer;
520 }
521 rx_ring->next_to_clean = i;
522
523 cleaned_count = e1000_desc_unused(rx_ring);
524 if (cleaned_count)
525 adapter->alloc_rx_buf(adapter, cleaned_count);
526
bc7f75fa 527 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 528 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 529 netdev->stats.rx_bytes += total_rx_bytes;
530 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 531 return cleaned;
532}
533
bc7f75fa
AK		 534static void e1000_put_txbuf(struct e1000_adapter *adapter,
535 struct e1000_buffer *buffer_info)
536{
03b1320d
AD		 537 if (buffer_info->dma) {
538 if (buffer_info->mapped_as_page)
539 pci_unmap_page(adapter->pdev, buffer_info->dma,
540 buffer_info->length, PCI_DMA_TODEVICE);
541 else
542 pci_unmap_single(adapter->pdev, buffer_info->dma,
543 buffer_info->length,
544 PCI_DMA_TODEVICE);
545 buffer_info->dma = 0;
546 }
bc7f75fa
AK		 547 if (buffer_info->skb) {
548 dev_kfree_skb_any(buffer_info->skb);
549 buffer_info->skb = NULL;
550 }
1b7719c4 551 buffer_info->time_stamp = 0;
bc7f75fa
AK		 552}
553
41cec6f1 554static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 555{
41cec6f1
BA		 556 struct e1000_adapter *adapter = container_of(work,
557 struct e1000_adapter,
558 print_hang_task);
bc7f75fa
AK		 559 struct e1000_ring *tx_ring = adapter->tx_ring;
560 unsigned int i = tx_ring->next_to_clean;
561 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
562 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 563 struct e1000_hw *hw = &adapter->hw;
564 u16 phy_status, phy_1000t_status, phy_ext_status;
565 u16 pci_status;
566
567 e1e_rphy(hw, PHY_STATUS, &phy_status);
568 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
569 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 570
41cec6f1
BA		 571 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
572
573 /* detected Hardware unit hang */
574 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 575 " TDH <%x>\n"
576 " TDT <%x>\n"
577 " next_to_use <%x>\n"
578 " next_to_clean <%x>\n"
579 "buffer_info[next_to_clean]:\n"
580 " time_stamp <%lx>\n"
581 " next_to_watch <%x>\n"
582 " jiffies <%lx>\n"
41cec6f1
BA		 583 " next_to_watch.status <%x>\n"
584 "MAC Status <%x>\n"
585 "PHY Status <%x>\n"
586 "PHY 1000BASE-T Status <%x>\n"
587 "PHY Extended Status <%x>\n"
588 "PCI Status <%x>\n",
44defeb3
JK		 589 readl(adapter->hw.hw_addr + tx_ring->head),
590 readl(adapter->hw.hw_addr + tx_ring->tail),
591 tx_ring->next_to_use,
592 tx_ring->next_to_clean,
593 tx_ring->buffer_info[eop].time_stamp,
594 eop,
595 jiffies,
41cec6f1
BA		 596 eop_desc->upper.fields.status,
597 er32(STATUS),
598 phy_status,
599 phy_1000t_status,
600 phy_ext_status,
601 pci_status);
bc7f75fa
AK		 602}
603
604/**
605 * e1000_clean_tx_irq - Reclaim resources after transmit completes
606 * @adapter: board private structure
607 *
608 * the return value indicates whether actual cleaning was done, there
609 * is no guarantee that everything was cleaned
610 **/
611static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
612{
613 struct net_device *netdev = adapter->netdev;
614 struct e1000_hw *hw = &adapter->hw;
615 struct e1000_ring *tx_ring = adapter->tx_ring;
616 struct e1000_tx_desc *tx_desc, *eop_desc;
617 struct e1000_buffer *buffer_info;
618 unsigned int i, eop;
619 unsigned int count = 0;
bc7f75fa
AK		 620 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
621
622 i = tx_ring->next_to_clean;
623 eop = tx_ring->buffer_info[i].next_to_watch;
624 eop_desc = E1000_TX_DESC(*tx_ring, eop);
625
12d04a3c
AD		 626 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
627 (count < tx_ring->count)) {
a86043c2
JB		 628 bool cleaned = false;
629 for (; !cleaned; count++) {
bc7f75fa
AK		 630 tx_desc = E1000_TX_DESC(*tx_ring, i);
631 buffer_info = &tx_ring->buffer_info[i];
632 cleaned = (i == eop);
633
634 if (cleaned) {
635 struct sk_buff *skb = buffer_info->skb;
636 unsigned int segs, bytecount;
637 segs = skb_shinfo(skb)->gso_segs ?: 1;
638 /* multiply data chunks by size of headers */
639 bytecount = ((segs - 1) * skb_headlen(skb)) +
640 skb->len;
641 total_tx_packets += segs;
642 total_tx_bytes += bytecount;
643 }
644
645 e1000_put_txbuf(adapter, buffer_info);
646 tx_desc->upper.data = 0;
647
648 i++;
649 if (i == tx_ring->count)
650 i = 0;
651 }
652
653 eop = tx_ring->buffer_info[i].next_to_watch;
654 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 655 }
656
657 tx_ring->next_to_clean = i;
658
659#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 660 if (count && netif_carrier_ok(netdev) &&
661 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 662 /* Make sure that anybody stopping the queue after this
663 * sees the new next_to_clean.
664 */
665 smp_mb();
666
667 if (netif_queue_stopped(netdev) &&
668 !(test_bit(__E1000_DOWN, &adapter->state))) {
669 netif_wake_queue(netdev);
670 ++adapter->restart_queue;
671 }
672 }
673
674 if (adapter->detect_tx_hung) {
41cec6f1
BA		 675 /*
676 * Detect a transmit hang in hardware, this serializes the
677 * check with the clearing of time_stamp and movement of i
678 */
bc7f75fa 679 adapter->detect_tx_hung = 0;
12d04a3c
AD		 680 if (tx_ring->buffer_info[i].time_stamp &&
681 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 682 + (adapter->tx_timeout_factor * HZ)) &&
683 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 684 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 685 netif_stop_queue(netdev);
686 }
687 }
688 adapter->total_tx_bytes += total_tx_bytes;
689 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 690 netdev->stats.tx_bytes += total_tx_bytes;
691 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 692 return (count < tx_ring->count);
bc7f75fa
AK		 693}
694
bc7f75fa
AK		 695/**
696 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
697 * @adapter: board private structure
698 *
699 * the return value indicates whether actual cleaning was done, there
700 * is no guarantee that everything was cleaned
701 **/
702static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
703 int *work_done, int work_to_do)
704{
3bb99fe2 705 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 706 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
707 struct net_device *netdev = adapter->netdev;
708 struct pci_dev *pdev = adapter->pdev;
709 struct e1000_ring *rx_ring = adapter->rx_ring;
710 struct e1000_buffer *buffer_info, *next_buffer;
711 struct e1000_ps_page *ps_page;
712 struct sk_buff *skb;
713 unsigned int i, j;
714 u32 length, staterr;
715 int cleaned_count = 0;
716 bool cleaned = 0;
717 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
718
719 i = rx_ring->next_to_clean;
720 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
721 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
722 buffer_info = &rx_ring->buffer_info[i];
723
724 while (staterr & E1000_RXD_STAT_DD) {
725 if (*work_done >= work_to_do)
726 break;
727 (*work_done)++;
728 skb = buffer_info->skb;
729
730 /* in the packet split case this is header only */
731 prefetch(skb->data - NET_IP_ALIGN);
732
733 i++;
734 if (i == rx_ring->count)
735 i = 0;
736 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
737 prefetch(next_rxd);
738
739 next_buffer = &rx_ring->buffer_info[i];
740
741 cleaned = 1;
742 cleaned_count++;
743 pci_unmap_single(pdev, buffer_info->dma,
744 adapter->rx_ps_bsize0,
745 PCI_DMA_FROMDEVICE);
746 buffer_info->dma = 0;
747
748 if (!(staterr & E1000_RXD_STAT_EOP)) {
3bb99fe2
BA		 749 e_dbg("Packet Split buffers didn't pick up the full "
750 "packet\n");
bc7f75fa
AK		 751 dev_kfree_skb_irq(skb);
752 goto next_desc;
753 }
754
755 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
756 dev_kfree_skb_irq(skb);
757 goto next_desc;
758 }
759
760 length = le16_to_cpu(rx_desc->wb.middle.length0);
761
762 if (!length) {
3bb99fe2
BA		 763 e_dbg("Last part of the packet spanning multiple "
764 "descriptors\n");
bc7f75fa
AK		 765 dev_kfree_skb_irq(skb);
766 goto next_desc;
767 }
768
769 /* Good Receive */
770 skb_put(skb, length);
771
772 {
ad68076e
BA		 773 /*
774 * this looks ugly, but it seems compiler issues make it
775 * more efficient than reusing j
776 */
bc7f75fa
AK		 777 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
778
ad68076e
BA		 779 /*
780 * page alloc/put takes too long and effects small packet
781 * throughput, so unsplit small packets and save the alloc/put
782 * only valid in softirq (napi) context to call kmap_*
783 */
bc7f75fa
AK		 784 if (l1 && (l1 <= copybreak) &&
785 ((length + l1) <= adapter->rx_ps_bsize0)) {
786 u8 *vaddr;
787
47f44e40 788 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 789
ad68076e
BA		 790 /*
791 * there is no documentation about how to call
bc7f75fa 792 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 793 * very long
794 */
bc7f75fa
AK		 795 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
796 PAGE_SIZE, PCI_DMA_FROMDEVICE);
797 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
798 memcpy(skb_tail_pointer(skb), vaddr, l1);
799 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
800 pci_dma_sync_single_for_device(pdev, ps_page->dma,
801 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 802
eb7c3adb
JK		 803 /* remove the CRC */
804 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
805 l1 -= 4;
806
bc7f75fa
AK		 807 skb_put(skb, l1);
808 goto copydone;
809 } /* if */
810 }
811
812 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
813 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
814 if (!length)
815 break;
816
47f44e40 817 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 818 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
819 PCI_DMA_FROMDEVICE);
820 ps_page->dma = 0;
821 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
822 ps_page->page = NULL;
823 skb->len += length;
824 skb->data_len += length;
825 skb->truesize += length;
826 }
827
eb7c3adb
JK		 828 /* strip the ethernet crc, problem is we're using pages now so
829 * this whole operation can get a little cpu intensive
830 */
831 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
832 pskb_trim(skb, skb->len - 4);
833
bc7f75fa
AK		 834copydone:
835 total_rx_bytes += skb->len;
836 total_rx_packets++;
837
838 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
839 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
840
841 if (rx_desc->wb.upper.header_status &
842 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
843 adapter->rx_hdr_split++;
844
845 e1000_receive_skb(adapter, netdev, skb,
846 staterr, rx_desc->wb.middle.vlan);
847
848next_desc:
849 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
850 buffer_info->skb = NULL;
851
852 /* return some buffers to hardware, one at a time is too slow */
853 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
854 adapter->alloc_rx_buf(adapter, cleaned_count);
855 cleaned_count = 0;
856 }
857
858 /* use prefetched values */
859 rx_desc = next_rxd;
860 buffer_info = next_buffer;
861
862 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
863 }
864 rx_ring->next_to_clean = i;
865
866 cleaned_count = e1000_desc_unused(rx_ring);
867 if (cleaned_count)
868 adapter->alloc_rx_buf(adapter, cleaned_count);
869
bc7f75fa 870 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 871 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 872 netdev->stats.rx_bytes += total_rx_bytes;
873 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 874 return cleaned;
875}
876
97ac8cae
BA		 877/**
878 * e1000_consume_page - helper function
879 **/
880static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
881 u16 length)
882{
883 bi->page = NULL;
884 skb->len += length;
885 skb->data_len += length;
886 skb->truesize += length;
887}
888
889/**
890 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
891 * @adapter: board private structure
892 *
893 * the return value indicates whether actual cleaning was done, there
894 * is no guarantee that everything was cleaned
895 **/
896
897static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
898 int *work_done, int work_to_do)
899{
900 struct net_device *netdev = adapter->netdev;
901 struct pci_dev *pdev = adapter->pdev;
902 struct e1000_ring *rx_ring = adapter->rx_ring;
903 struct e1000_rx_desc *rx_desc, *next_rxd;
904 struct e1000_buffer *buffer_info, *next_buffer;
905 u32 length;
906 unsigned int i;
907 int cleaned_count = 0;
908 bool cleaned = false;
909 unsigned int total_rx_bytes=0, total_rx_packets=0;
910
911 i = rx_ring->next_to_clean;
912 rx_desc = E1000_RX_DESC(*rx_ring, i);
913 buffer_info = &rx_ring->buffer_info[i];
914
915 while (rx_desc->status & E1000_RXD_STAT_DD) {
916 struct sk_buff *skb;
917 u8 status;
918
919 if (*work_done >= work_to_do)
920 break;
921 (*work_done)++;
922
923 status = rx_desc->status;
924 skb = buffer_info->skb;
925 buffer_info->skb = NULL;
926
927 ++i;
928 if (i == rx_ring->count)
929 i = 0;
930 next_rxd = E1000_RX_DESC(*rx_ring, i);
931 prefetch(next_rxd);
932
933 next_buffer = &rx_ring->buffer_info[i];
934
935 cleaned = true;
936 cleaned_count++;
937 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
938 PCI_DMA_FROMDEVICE);
939 buffer_info->dma = 0;
940
941 length = le16_to_cpu(rx_desc->length);
942
943 /* errors is only valid for DD + EOP descriptors */
944 if (unlikely((status & E1000_RXD_STAT_EOP) &&
945 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
946 /* recycle both page and skb */
947 buffer_info->skb = skb;
948 /* an error means any chain goes out the window
949 * too */
950 if (rx_ring->rx_skb_top)
951 dev_kfree_skb(rx_ring->rx_skb_top);
952 rx_ring->rx_skb_top = NULL;
953 goto next_desc;
954 }
955
956#define rxtop rx_ring->rx_skb_top
957 if (!(status & E1000_RXD_STAT_EOP)) {
958 /* this descriptor is only the beginning (or middle) */
959 if (!rxtop) {
960 /* this is the beginning of a chain */
961 rxtop = skb;
962 skb_fill_page_desc(rxtop, 0, buffer_info->page,
963 0, length);
964 } else {
965 /* this is the middle of a chain */
966 skb_fill_page_desc(rxtop,
967 skb_shinfo(rxtop)->nr_frags,
968 buffer_info->page, 0, length);
969 /* re-use the skb, only consumed the page */
970 buffer_info->skb = skb;
971 }
972 e1000_consume_page(buffer_info, rxtop, length);
973 goto next_desc;
974 } else {
975 if (rxtop) {
976 /* end of the chain */
977 skb_fill_page_desc(rxtop,
978 skb_shinfo(rxtop)->nr_frags,
979 buffer_info->page, 0, length);
980 /* re-use the current skb, we only consumed the
981 * page */
982 buffer_info->skb = skb;
983 skb = rxtop;
984 rxtop = NULL;
985 e1000_consume_page(buffer_info, skb, length);
986 } else {
987 /* no chain, got EOP, this buf is the packet
988 * copybreak to save the put_page/alloc_page */
989 if (length <= copybreak &&
990 skb_tailroom(skb) >= length) {
991 u8 *vaddr;
992 vaddr = kmap_atomic(buffer_info->page,
993 KM_SKB_DATA_SOFTIRQ);
994 memcpy(skb_tail_pointer(skb), vaddr,
995 length);
996 kunmap_atomic(vaddr,
997 KM_SKB_DATA_SOFTIRQ);
998 /* re-use the page, so don't erase
999 * buffer_info->page */
1000 skb_put(skb, length);
1001 } else {
1002 skb_fill_page_desc(skb, 0,
1003 buffer_info->page, 0,
1004 length);
1005 e1000_consume_page(buffer_info, skb,
1006 length);
1007 }
1008 }
1009 }
1010
1011 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1012 e1000_rx_checksum(adapter,
1013 (u32)(status) |
1014 ((u32)(rx_desc->errors) << 24),
1015 le16_to_cpu(rx_desc->csum), skb);
1016
1017 /* probably a little skewed due to removing CRC */
1018 total_rx_bytes += skb->len;
1019 total_rx_packets++;
1020
1021 /* eth type trans needs skb->data to point to something */
1022 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1023 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1024 dev_kfree_skb(skb);
1025 goto next_desc;
1026 }
1027
1028 e1000_receive_skb(adapter, netdev, skb, status,
1029 rx_desc->special);
1030
1031next_desc:
1032 rx_desc->status = 0;
1033
1034 /* return some buffers to hardware, one at a time is too slow */
1035 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1036 adapter->alloc_rx_buf(adapter, cleaned_count);
1037 cleaned_count = 0;
1038 }
1039
1040 /* use prefetched values */
1041 rx_desc = next_rxd;
1042 buffer_info = next_buffer;
1043 }
1044 rx_ring->next_to_clean = i;
1045
1046 cleaned_count = e1000_desc_unused(rx_ring);
1047 if (cleaned_count)
1048 adapter->alloc_rx_buf(adapter, cleaned_count);
1049
1050 adapter->total_rx_bytes += total_rx_bytes;
1051 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1052 netdev->stats.rx_bytes += total_rx_bytes;
1053 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1054 return cleaned;
1055}
1056
bc7f75fa
AK		 1057/**
1058 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1059 * @adapter: board private structure
1060 **/
1061static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1062{
1063 struct e1000_ring *rx_ring = adapter->rx_ring;
1064 struct e1000_buffer *buffer_info;
1065 struct e1000_ps_page *ps_page;
1066 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1067 unsigned int i, j;
1068
1069 /* Free all the Rx ring sk_buffs */
1070 for (i = 0; i < rx_ring->count; i++) {
1071 buffer_info = &rx_ring->buffer_info[i];
1072 if (buffer_info->dma) {
1073 if (adapter->clean_rx == e1000_clean_rx_irq)
1074 pci_unmap_single(pdev, buffer_info->dma,
1075 adapter->rx_buffer_len,
1076 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1077 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1078 pci_unmap_page(pdev, buffer_info->dma,
1079 PAGE_SIZE,
1080 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1081 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1082 pci_unmap_single(pdev, buffer_info->dma,
1083 adapter->rx_ps_bsize0,
1084 PCI_DMA_FROMDEVICE);
1085 buffer_info->dma = 0;
1086 }
1087
97ac8cae
BA		 1088 if (buffer_info->page) {
1089 put_page(buffer_info->page);
1090 buffer_info->page = NULL;
1091 }
1092
bc7f75fa
AK		 1093 if (buffer_info->skb) {
1094 dev_kfree_skb(buffer_info->skb);
1095 buffer_info->skb = NULL;
1096 }
1097
1098 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1099 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1100 if (!ps_page->page)
1101 break;
1102 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1103 PCI_DMA_FROMDEVICE);
1104 ps_page->dma = 0;
1105 put_page(ps_page->page);
1106 ps_page->page = NULL;
1107 }
1108 }
1109
1110 /* there also may be some cached data from a chained receive */
1111 if (rx_ring->rx_skb_top) {
1112 dev_kfree_skb(rx_ring->rx_skb_top);
1113 rx_ring->rx_skb_top = NULL;
1114 }
1115
bc7f75fa
AK		 1116 /* Zero out the descriptor ring */
1117 memset(rx_ring->desc, 0, rx_ring->size);
1118
1119 rx_ring->next_to_clean = 0;
1120 rx_ring->next_to_use = 0;
1121
1122 writel(0, adapter->hw.hw_addr + rx_ring->head);
1123 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1124}
1125
a8f88ff5
JB		 1126static void e1000e_downshift_workaround(struct work_struct *work)
1127{
1128 struct e1000_adapter *adapter = container_of(work,
1129 struct e1000_adapter, downshift_task);
1130
1131 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1132}
1133
bc7f75fa
AK		 1134/**
1135 * e1000_intr_msi - Interrupt Handler
1136 * @irq: interrupt number
1137 * @data: pointer to a network interface device structure
1138 **/
1139static irqreturn_t e1000_intr_msi(int irq, void *data)
1140{
1141 struct net_device *netdev = data;
1142 struct e1000_adapter *adapter = netdev_priv(netdev);
1143 struct e1000_hw *hw = &adapter->hw;
1144 u32 icr = er32(ICR);
1145
ad68076e
BA		 1146 /*
1147 * read ICR disables interrupts using IAM
1148 */
bc7f75fa 1149
573cca8c 1150 if (icr & E1000_ICR_LSC) {
bc7f75fa 1151 hw->mac.get_link_status = 1;
ad68076e
BA		 1152 /*
1153 * ICH8 workaround-- Call gig speed drop workaround on cable
1154 * disconnect (LSC) before accessing any PHY registers
1155 */
bc7f75fa
AK		 1156 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1157 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1158 schedule_work(&adapter->downshift_task);
bc7f75fa 1159
ad68076e
BA		 1160 /*
1161 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1162 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1163 * adapter in watchdog
1164 */
bc7f75fa
AK		 1165 if (netif_carrier_ok(netdev) &&
1166 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1167 /* disable receives */
1168 u32 rctl = er32(RCTL);
1169 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1170 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1171 }
1172 /* guard against interrupt when we're going down */
1173 if (!test_bit(__E1000_DOWN, &adapter->state))
1174 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1175 }
1176
288379f0 1177 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1178 adapter->total_tx_bytes = 0;
1179 adapter->total_tx_packets = 0;
1180 adapter->total_rx_bytes = 0;
1181 adapter->total_rx_packets = 0;
288379f0 1182 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1183 }
1184
1185 return IRQ_HANDLED;
1186}
1187
1188/**
1189 * e1000_intr - Interrupt Handler
1190 * @irq: interrupt number
1191 * @data: pointer to a network interface device structure
1192 **/
1193static irqreturn_t e1000_intr(int irq, void *data)
1194{
1195 struct net_device *netdev = data;
1196 struct e1000_adapter *adapter = netdev_priv(netdev);
1197 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1198 u32 rctl, icr = er32(ICR);
4662e82b 1199
a68ea775 1200 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1201 return IRQ_NONE; /* Not our interrupt */
1202
ad68076e
BA		 1203 /*
1204 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1205 * not set, then the adapter didn't send an interrupt
1206 */
bc7f75fa
AK		 1207 if (!(icr & E1000_ICR_INT_ASSERTED))
1208 return IRQ_NONE;
1209
ad68076e
BA		 1210 /*
1211 * Interrupt Auto-Mask...upon reading ICR,
1212 * interrupts are masked. No need for the
1213 * IMC write
1214 */
bc7f75fa 1215
573cca8c 1216 if (icr & E1000_ICR_LSC) {
bc7f75fa 1217 hw->mac.get_link_status = 1;
ad68076e
BA		 1218 /*
1219 * ICH8 workaround-- Call gig speed drop workaround on cable
1220 * disconnect (LSC) before accessing any PHY registers
1221 */
bc7f75fa
AK		 1222 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1223 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1224 schedule_work(&adapter->downshift_task);
bc7f75fa 1225
ad68076e
BA		 1226 /*
1227 * 80003ES2LAN workaround--
bc7f75fa
AK		 1228 * For packet buffer work-around on link down event;
1229 * disable receives here in the ISR and
1230 * reset adapter in watchdog
1231 */
1232 if (netif_carrier_ok(netdev) &&
1233 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1234 /* disable receives */
1235 rctl = er32(RCTL);
1236 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1237 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1238 }
1239 /* guard against interrupt when we're going down */
1240 if (!test_bit(__E1000_DOWN, &adapter->state))
1241 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1242 }
1243
288379f0 1244 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1245 adapter->total_tx_bytes = 0;
1246 adapter->total_tx_packets = 0;
1247 adapter->total_rx_bytes = 0;
1248 adapter->total_rx_packets = 0;
288379f0 1249 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1250 }
1251
1252 return IRQ_HANDLED;
1253}
1254
4662e82b
BA		 1255static irqreturn_t e1000_msix_other(int irq, void *data)
1256{
1257 struct net_device *netdev = data;
1258 struct e1000_adapter *adapter = netdev_priv(netdev);
1259 struct e1000_hw *hw = &adapter->hw;
1260 u32 icr = er32(ICR);
1261
1262 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1263 if (!test_bit(__E1000_DOWN, &adapter->state))
1264 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1265 return IRQ_NONE;
1266 }
1267
1268 if (icr & adapter->eiac_mask)
1269 ew32(ICS, (icr & adapter->eiac_mask));
1270
1271 if (icr & E1000_ICR_OTHER) {
1272 if (!(icr & E1000_ICR_LSC))
1273 goto no_link_interrupt;
1274 hw->mac.get_link_status = 1;
1275 /* guard against interrupt when we're going down */
1276 if (!test_bit(__E1000_DOWN, &adapter->state))
1277 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1278 }
1279
1280no_link_interrupt:
a3c69fef
JB		 1281 if (!test_bit(__E1000_DOWN, &adapter->state))
1282 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1283
1284 return IRQ_HANDLED;
1285}
1286
1287
1288static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1289{
1290 struct net_device *netdev = data;
1291 struct e1000_adapter *adapter = netdev_priv(netdev);
1292 struct e1000_hw *hw = &adapter->hw;
1293 struct e1000_ring *tx_ring = adapter->tx_ring;
1294
1295
1296 adapter->total_tx_bytes = 0;
1297 adapter->total_tx_packets = 0;
1298
1299 if (!e1000_clean_tx_irq(adapter))
1300 /* Ring was not completely cleaned, so fire another interrupt */
1301 ew32(ICS, tx_ring->ims_val);
1302
1303 return IRQ_HANDLED;
1304}
1305
1306static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1307{
1308 struct net_device *netdev = data;
1309 struct e1000_adapter *adapter = netdev_priv(netdev);
1310
1311 /* Write the ITR value calculated at the end of the
1312 * previous interrupt.
1313 */
1314 if (adapter->rx_ring->set_itr) {
1315 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1316 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1317 adapter->rx_ring->set_itr = 0;
1318 }
1319
288379f0 1320 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1321 adapter->total_rx_bytes = 0;
1322 adapter->total_rx_packets = 0;
288379f0 1323 __napi_schedule(&adapter->napi);
4662e82b
BA		 1324 }
1325 return IRQ_HANDLED;
1326}
1327
1328/**
1329 * e1000_configure_msix - Configure MSI-X hardware
1330 *
1331 * e1000_configure_msix sets up the hardware to properly
1332 * generate MSI-X interrupts.
1333 **/
1334static void e1000_configure_msix(struct e1000_adapter *adapter)
1335{
1336 struct e1000_hw *hw = &adapter->hw;
1337 struct e1000_ring *rx_ring = adapter->rx_ring;
1338 struct e1000_ring *tx_ring = adapter->tx_ring;
1339 int vector = 0;
1340 u32 ctrl_ext, ivar = 0;
1341
1342 adapter->eiac_mask = 0;
1343
1344 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1345 if (hw->mac.type == e1000_82574) {
1346 u32 rfctl = er32(RFCTL);
1347 rfctl |= E1000_RFCTL_ACK_DIS;
1348 ew32(RFCTL, rfctl);
1349 }
1350
1351#define E1000_IVAR_INT_ALLOC_VALID 0x8
1352 /* Configure Rx vector */
1353 rx_ring->ims_val = E1000_IMS_RXQ0;
1354 adapter->eiac_mask |= rx_ring->ims_val;
1355 if (rx_ring->itr_val)
1356 writel(1000000000 / (rx_ring->itr_val * 256),
1357 hw->hw_addr + rx_ring->itr_register);
1358 else
1359 writel(1, hw->hw_addr + rx_ring->itr_register);
1360 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1361
1362 /* Configure Tx vector */
1363 tx_ring->ims_val = E1000_IMS_TXQ0;
1364 vector++;
1365 if (tx_ring->itr_val)
1366 writel(1000000000 / (tx_ring->itr_val * 256),
1367 hw->hw_addr + tx_ring->itr_register);
1368 else
1369 writel(1, hw->hw_addr + tx_ring->itr_register);
1370 adapter->eiac_mask |= tx_ring->ims_val;
1371 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1372
1373 /* set vector for Other Causes, e.g. link changes */
1374 vector++;
1375 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1376 if (rx_ring->itr_val)
1377 writel(1000000000 / (rx_ring->itr_val * 256),
1378 hw->hw_addr + E1000_EITR_82574(vector));
1379 else
1380 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1381
1382 /* Cause Tx interrupts on every write back */
1383 ivar |= (1 << 31);
1384
1385 ew32(IVAR, ivar);
1386
1387 /* enable MSI-X PBA support */
1388 ctrl_ext = er32(CTRL_EXT);
1389 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1390
1391 /* Auto-Mask Other interrupts upon ICR read */
1392#define E1000_EIAC_MASK_82574 0x01F00000
1393 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1394 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1395 ew32(CTRL_EXT, ctrl_ext);
1396 e1e_flush();
1397}
1398
1399void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1400{
1401 if (adapter->msix_entries) {
1402 pci_disable_msix(adapter->pdev);
1403 kfree(adapter->msix_entries);
1404 adapter->msix_entries = NULL;
1405 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1406 pci_disable_msi(adapter->pdev);
1407 adapter->flags &= ~FLAG_MSI_ENABLED;
1408 }
1409
1410 return;
1411}
1412
1413/**
1414 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1415 *
1416 * Attempt to configure interrupts using the best available
1417 * capabilities of the hardware and kernel.
1418 **/
1419void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1420{
1421 int err;
1422 int numvecs, i;
1423
1424
1425 switch (adapter->int_mode) {
1426 case E1000E_INT_MODE_MSIX:
1427 if (adapter->flags & FLAG_HAS_MSIX) {
1428 numvecs = 3; /* RxQ0, TxQ0 and other */
1429 adapter->msix_entries = kcalloc(numvecs,
1430 sizeof(struct msix_entry),
1431 GFP_KERNEL);
1432 if (adapter->msix_entries) {
1433 for (i = 0; i < numvecs; i++)
1434 adapter->msix_entries[i].entry = i;
1435
1436 err = pci_enable_msix(adapter->pdev,
1437 adapter->msix_entries,
1438 numvecs);
1439 if (err == 0)
1440 return;
1441 }
1442 /* MSI-X failed, so fall through and try MSI */
1443 e_err("Failed to initialize MSI-X interrupts. "
1444 "Falling back to MSI interrupts.\n");
1445 e1000e_reset_interrupt_capability(adapter);
1446 }
1447 adapter->int_mode = E1000E_INT_MODE_MSI;
1448 /* Fall through */
1449 case E1000E_INT_MODE_MSI:
1450 if (!pci_enable_msi(adapter->pdev)) {
1451 adapter->flags |= FLAG_MSI_ENABLED;
1452 } else {
1453 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1454 e_err("Failed to initialize MSI interrupts. Falling "
1455 "back to legacy interrupts.\n");
1456 }
1457 /* Fall through */
1458 case E1000E_INT_MODE_LEGACY:
1459 /* Don't do anything; this is the system default */
1460 break;
1461 }
1462
1463 return;
1464}
1465
1466/**
1467 * e1000_request_msix - Initialize MSI-X interrupts
1468 *
1469 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1470 * kernel.
1471 **/
1472static int e1000_request_msix(struct e1000_adapter *adapter)
1473{
1474 struct net_device *netdev = adapter->netdev;
1475 int err = 0, vector = 0;
1476
1477 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1478 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1479 else
1480 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1481 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1482 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1483 netdev);
1484 if (err)
1485 goto out;
1486 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1487 adapter->rx_ring->itr_val = adapter->itr;
1488 vector++;
1489
1490 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1491 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1492 else
1493 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1494 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1495 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1496 netdev);
1497 if (err)
1498 goto out;
1499 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1500 adapter->tx_ring->itr_val = adapter->itr;
1501 vector++;
1502
1503 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1504 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1505 if (err)
1506 goto out;
1507
1508 e1000_configure_msix(adapter);
1509 return 0;
1510out:
1511 return err;
1512}
1513
f8d59f78
BA		 1514/**
1515 * e1000_request_irq - initialize interrupts
1516 *
1517 * Attempts to configure interrupts using the best available
1518 * capabilities of the hardware and kernel.
1519 **/
bc7f75fa
AK		 1520static int e1000_request_irq(struct e1000_adapter *adapter)
1521{
1522 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1523 int err;
1524
4662e82b
BA		 1525 if (adapter->msix_entries) {
1526 err = e1000_request_msix(adapter);
1527 if (!err)
1528 return err;
1529 /* fall back to MSI */
1530 e1000e_reset_interrupt_capability(adapter);
1531 adapter->int_mode = E1000E_INT_MODE_MSI;
1532 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1533 }
4662e82b 1534 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1535 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1536 netdev->name, netdev);
1537 if (!err)
1538 return err;
bc7f75fa 1539
4662e82b
BA		 1540 /* fall back to legacy interrupt */
1541 e1000e_reset_interrupt_capability(adapter);
1542 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1543 }
1544
a0607fd3 1545 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1546 netdev->name, netdev);
1547 if (err)
1548 e_err("Unable to allocate interrupt, Error: %d\n", err);
1549
bc7f75fa
AK		 1550 return err;
1551}
1552
1553static void e1000_free_irq(struct e1000_adapter *adapter)
1554{
1555 struct net_device *netdev = adapter->netdev;
1556
4662e82b
BA		 1557 if (adapter->msix_entries) {
1558 int vector = 0;
1559
1560 free_irq(adapter->msix_entries[vector].vector, netdev);
1561 vector++;
1562
1563 free_irq(adapter->msix_entries[vector].vector, netdev);
1564 vector++;
1565
1566 /* Other Causes interrupt vector */
1567 free_irq(adapter->msix_entries[vector].vector, netdev);
1568 return;
bc7f75fa 1569 }
4662e82b
BA		 1570
1571 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1572}
1573
1574/**
1575 * e1000_irq_disable - Mask off interrupt generation on the NIC
1576 **/
1577static void e1000_irq_disable(struct e1000_adapter *adapter)
1578{
1579 struct e1000_hw *hw = &adapter->hw;
1580
bc7f75fa 1581 ew32(IMC, ~0);
4662e82b
BA		 1582 if (adapter->msix_entries)
1583 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1584 e1e_flush();
1585 synchronize_irq(adapter->pdev->irq);
1586}
1587
1588/**
1589 * e1000_irq_enable - Enable default interrupt generation settings
1590 **/
1591static void e1000_irq_enable(struct e1000_adapter *adapter)
1592{
1593 struct e1000_hw *hw = &adapter->hw;
1594
4662e82b
BA		 1595 if (adapter->msix_entries) {
1596 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1597 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1598 } else {
1599 ew32(IMS, IMS_ENABLE_MASK);
1600 }
74ef9c39 1601 e1e_flush();
bc7f75fa
AK		 1602}
1603
1604/**
1605 * e1000_get_hw_control - get control of the h/w from f/w
1606 * @adapter: address of board private structure
1607 *
489815ce 1608 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1609 * For ASF and Pass Through versions of f/w this means that
1610 * the driver is loaded. For AMT version (only with 82573)
1611 * of the f/w this means that the network i/f is open.
1612 **/
1613static void e1000_get_hw_control(struct e1000_adapter *adapter)
1614{
1615 struct e1000_hw *hw = &adapter->hw;
1616 u32 ctrl_ext;
1617 u32 swsm;
1618
1619 /* Let firmware know the driver has taken over */
1620 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1621 swsm = er32(SWSM);
1622 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1623 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1624 ctrl_ext = er32(CTRL_EXT);
ad68076e 1625 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1626 }
1627}
1628
1629/**
1630 * e1000_release_hw_control - release control of the h/w to f/w
1631 * @adapter: address of board private structure
1632 *
489815ce 1633 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1634 * For ASF and Pass Through versions of f/w this means that the
1635 * driver is no longer loaded. For AMT version (only with 82573) i
1636 * of the f/w this means that the network i/f is closed.
1637 *
1638 **/
1639static void e1000_release_hw_control(struct e1000_adapter *adapter)
1640{
1641 struct e1000_hw *hw = &adapter->hw;
1642 u32 ctrl_ext;
1643 u32 swsm;
1644
1645 /* Let firmware taken over control of h/w */
1646 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1647 swsm = er32(SWSM);
1648 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1649 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1650 ctrl_ext = er32(CTRL_EXT);
ad68076e 1651 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1652 }
1653}
1654
bc7f75fa
AK		 1655/**
1656 * @e1000_alloc_ring - allocate memory for a ring structure
1657 **/
1658static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1659 struct e1000_ring *ring)
1660{
1661 struct pci_dev *pdev = adapter->pdev;
1662
1663 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1664 GFP_KERNEL);
1665 if (!ring->desc)
1666 return -ENOMEM;
1667
1668 return 0;
1669}
1670
1671/**
1672 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1673 * @adapter: board private structure
1674 *
1675 * Return 0 on success, negative on failure
1676 **/
1677int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1678{
1679 struct e1000_ring *tx_ring = adapter->tx_ring;
1680 int err = -ENOMEM, size;
1681
1682 size = sizeof(struct e1000_buffer) * tx_ring->count;
1683 tx_ring->buffer_info = vmalloc(size);
1684 if (!tx_ring->buffer_info)
1685 goto err;
1686 memset(tx_ring->buffer_info, 0, size);
1687
1688 /* round up to nearest 4K */
1689 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1690 tx_ring->size = ALIGN(tx_ring->size, 4096);
1691
1692 err = e1000_alloc_ring_dma(adapter, tx_ring);
1693 if (err)
1694 goto err;
1695
1696 tx_ring->next_to_use = 0;
1697 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1698
1699 return 0;
1700err:
1701 vfree(tx_ring->buffer_info);
44defeb3 1702 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1703 return err;
1704}
1705
1706/**
1707 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1708 * @adapter: board private structure
1709 *
1710 * Returns 0 on success, negative on failure
1711 **/
1712int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1713{
1714 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1715 struct e1000_buffer *buffer_info;
1716 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1717
1718 size = sizeof(struct e1000_buffer) * rx_ring->count;
1719 rx_ring->buffer_info = vmalloc(size);
1720 if (!rx_ring->buffer_info)
1721 goto err;
1722 memset(rx_ring->buffer_info, 0, size);
1723
47f44e40
AK		 1724 for (i = 0; i < rx_ring->count; i++) {
1725 buffer_info = &rx_ring->buffer_info[i];
1726 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1727 sizeof(struct e1000_ps_page),
1728 GFP_KERNEL);
1729 if (!buffer_info->ps_pages)
1730 goto err_pages;
1731 }
bc7f75fa
AK		 1732
1733 desc_len = sizeof(union e1000_rx_desc_packet_split);
1734
1735 /* Round up to nearest 4K */
1736 rx_ring->size = rx_ring->count * desc_len;
1737 rx_ring->size = ALIGN(rx_ring->size, 4096);
1738
1739 err = e1000_alloc_ring_dma(adapter, rx_ring);
1740 if (err)
47f44e40 1741 goto err_pages;
bc7f75fa
AK		 1742
1743 rx_ring->next_to_clean = 0;
1744 rx_ring->next_to_use = 0;
1745 rx_ring->rx_skb_top = NULL;
1746
1747 return 0;
47f44e40
AK		 1748
1749err_pages:
1750 for (i = 0; i < rx_ring->count; i++) {
1751 buffer_info = &rx_ring->buffer_info[i];
1752 kfree(buffer_info->ps_pages);
1753 }
bc7f75fa
AK		 1754err:
1755 vfree(rx_ring->buffer_info);
44defeb3 1756 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1757 return err;
1758}
1759
1760/**
1761 * e1000_clean_tx_ring - Free Tx Buffers
1762 * @adapter: board private structure
1763 **/
1764static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1765{
1766 struct e1000_ring *tx_ring = adapter->tx_ring;
1767 struct e1000_buffer *buffer_info;
1768 unsigned long size;
1769 unsigned int i;
1770
1771 for (i = 0; i < tx_ring->count; i++) {
1772 buffer_info = &tx_ring->buffer_info[i];
1773 e1000_put_txbuf(adapter, buffer_info);
1774 }
1775
1776 size = sizeof(struct e1000_buffer) * tx_ring->count;
1777 memset(tx_ring->buffer_info, 0, size);
1778
1779 memset(tx_ring->desc, 0, tx_ring->size);
1780
1781 tx_ring->next_to_use = 0;
1782 tx_ring->next_to_clean = 0;
1783
1784 writel(0, adapter->hw.hw_addr + tx_ring->head);
1785 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1786}
1787
1788/**
1789 * e1000e_free_tx_resources - Free Tx Resources per Queue
1790 * @adapter: board private structure
1791 *
1792 * Free all transmit software resources
1793 **/
1794void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1795{
1796 struct pci_dev *pdev = adapter->pdev;
1797 struct e1000_ring *tx_ring = adapter->tx_ring;
1798
1799 e1000_clean_tx_ring(adapter);
1800
1801 vfree(tx_ring->buffer_info);
1802 tx_ring->buffer_info = NULL;
1803
1804 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1805 tx_ring->dma);
1806 tx_ring->desc = NULL;
1807}
1808
1809/**
1810 * e1000e_free_rx_resources - Free Rx Resources
1811 * @adapter: board private structure
1812 *
1813 * Free all receive software resources
1814 **/
1815
1816void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1817{
1818 struct pci_dev *pdev = adapter->pdev;
1819 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1820 int i;
bc7f75fa
AK		 1821
1822 e1000_clean_rx_ring(adapter);
1823
47f44e40
AK		 1824 for (i = 0; i < rx_ring->count; i++) {
1825 kfree(rx_ring->buffer_info[i].ps_pages);
1826 }
1827
bc7f75fa
AK		 1828 vfree(rx_ring->buffer_info);
1829 rx_ring->buffer_info = NULL;
1830
bc7f75fa
AK		 1831 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1832 rx_ring->dma);
1833 rx_ring->desc = NULL;
1834}
1835
1836/**
1837 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1838 * @adapter: pointer to adapter
1839 * @itr_setting: current adapter->itr
1840 * @packets: the number of packets during this measurement interval
1841 * @bytes: the number of bytes during this measurement interval
1842 *
bc7f75fa
AK		 1843 * Stores a new ITR value based on packets and byte
1844 * counts during the last interrupt. The advantage of per interrupt
1845 * computation is faster updates and more accurate ITR for the current
1846 * traffic pattern. Constants in this function were computed
1847 * based on theoretical maximum wire speed and thresholds were set based
1848 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1849 * while increasing bulk throughput. This functionality is controlled
1850 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1851 **/
1852static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1853 u16 itr_setting, int packets,
1854 int bytes)
1855{
1856 unsigned int retval = itr_setting;
1857
1858 if (packets == 0)
1859 goto update_itr_done;
1860
1861 switch (itr_setting) {
1862 case lowest_latency:
1863 /* handle TSO and jumbo frames */
1864 if (bytes/packets > 8000)
1865 retval = bulk_latency;
1866 else if ((packets < 5) && (bytes > 512)) {
1867 retval = low_latency;
1868 }
1869 break;
1870 case low_latency: /* 50 usec aka 20000 ints/s */
1871 if (bytes > 10000) {
1872 /* this if handles the TSO accounting */
1873 if (bytes/packets > 8000) {
1874 retval = bulk_latency;
1875 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1876 retval = bulk_latency;
1877 } else if ((packets > 35)) {
1878 retval = lowest_latency;
1879 }
1880 } else if (bytes/packets > 2000) {
1881 retval = bulk_latency;
1882 } else if (packets <= 2 && bytes < 512) {
1883 retval = lowest_latency;
1884 }
1885 break;
1886 case bulk_latency: /* 250 usec aka 4000 ints/s */
1887 if (bytes > 25000) {
1888 if (packets > 35) {
1889 retval = low_latency;
1890 }
1891 } else if (bytes < 6000) {
1892 retval = low_latency;
1893 }
1894 break;
1895 }
1896
1897update_itr_done:
1898 return retval;
1899}
1900
1901static void e1000_set_itr(struct e1000_adapter *adapter)
1902{
1903 struct e1000_hw *hw = &adapter->hw;
1904 u16 current_itr;
1905 u32 new_itr = adapter->itr;
1906
1907 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1908 if (adapter->link_speed != SPEED_1000) {
1909 current_itr = 0;
1910 new_itr = 4000;
1911 goto set_itr_now;
1912 }
1913
1914 adapter->tx_itr = e1000_update_itr(adapter,
1915 adapter->tx_itr,
1916 adapter->total_tx_packets,
1917 adapter->total_tx_bytes);
1918 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1919 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1920 adapter->tx_itr = low_latency;
1921
1922 adapter->rx_itr = e1000_update_itr(adapter,
1923 adapter->rx_itr,
1924 adapter->total_rx_packets,
1925 adapter->total_rx_bytes);
1926 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1927 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1928 adapter->rx_itr = low_latency;
1929
1930 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1931
1932 switch (current_itr) {
1933 /* counts and packets in update_itr are dependent on these numbers */
1934 case lowest_latency:
1935 new_itr = 70000;
1936 break;
1937 case low_latency:
1938 new_itr = 20000; /* aka hwitr = ~200 */
1939 break;
1940 case bulk_latency:
1941 new_itr = 4000;
1942 break;
1943 default:
1944 break;
1945 }
1946
1947set_itr_now:
1948 if (new_itr != adapter->itr) {
ad68076e
BA		 1949 /*
1950 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1951 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1952 * increasing
1953 */
bc7f75fa
AK		 1954 new_itr = new_itr > adapter->itr ?
1955 min(adapter->itr + (new_itr >> 2), new_itr) :
1956 new_itr;
1957 adapter->itr = new_itr;
4662e82b
BA		 1958 adapter->rx_ring->itr_val = new_itr;
1959 if (adapter->msix_entries)
1960 adapter->rx_ring->set_itr = 1;
1961 else
1962 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1963 }
1964}
1965
4662e82b
BA		 1966/**
1967 * e1000_alloc_queues - Allocate memory for all rings
1968 * @adapter: board private structure to initialize
1969 **/
1970static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1971{
1972 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1973 if (!adapter->tx_ring)
1974 goto err;
1975
1976 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1977 if (!adapter->rx_ring)
1978 goto err;
1979
1980 return 0;
1981err:
1982 e_err("Unable to allocate memory for queues\n");
1983 kfree(adapter->rx_ring);
1984 kfree(adapter->tx_ring);
1985 return -ENOMEM;
1986}
1987
bc7f75fa
AK		 1988/**
1989 * e1000_clean - NAPI Rx polling callback
ad68076e 1990 * @napi: struct associated with this polling callback
489815ce 1991 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 1992 **/
1993static int e1000_clean(struct napi_struct *napi, int budget)
1994{
1995 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 1996 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1997 struct net_device *poll_dev = adapter->netdev;
679e8a0f 1998 int tx_cleaned = 1, work_done = 0;
bc7f75fa 1999
4cf1653a 2000 adapter = netdev_priv(poll_dev);
bc7f75fa 2001
4662e82b
BA		 2002 if (adapter->msix_entries &&
2003 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2004 goto clean_rx;
2005
92af3e95 2006 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2007
4662e82b 2008clean_rx:
bc7f75fa 2009 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2010
12d04a3c 2011 if (!tx_cleaned)
d2c7ddd6 2012 work_done = budget;
bc7f75fa 2013
53e52c72
DM		 2014 /* If budget not fully consumed, exit the polling mode */
2015 if (work_done < budget) {
bc7f75fa
AK		 2016 if (adapter->itr_setting & 3)
2017 e1000_set_itr(adapter);
288379f0 2018 napi_complete(napi);
a3c69fef
JB		 2019 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2020 if (adapter->msix_entries)
2021 ew32(IMS, adapter->rx_ring->ims_val);
2022 else
2023 e1000_irq_enable(adapter);
2024 }
bc7f75fa
AK		 2025 }
2026
2027 return work_done;
2028}
2029
2030static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2031{
2032 struct e1000_adapter *adapter = netdev_priv(netdev);
2033 struct e1000_hw *hw = &adapter->hw;
2034 u32 vfta, index;
2035
2036 /* don't update vlan cookie if already programmed */
2037 if ((adapter->hw.mng_cookie.status &
2038 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2039 (vid == adapter->mng_vlan_id))
2040 return;
caaddaf8 2041
bc7f75fa 2042 /* add VID to filter table */
caaddaf8
BA		 2043 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2044 index = (vid >> 5) & 0x7F;
2045 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2046 vfta |= (1 << (vid & 0x1F));
2047 hw->mac.ops.write_vfta(hw, index, vfta);
2048 }
bc7f75fa
AK		 2049}
2050
2051static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2052{
2053 struct e1000_adapter *adapter = netdev_priv(netdev);
2054 struct e1000_hw *hw = &adapter->hw;
2055 u32 vfta, index;
2056
74ef9c39
JB		 2057 if (!test_bit(__E1000_DOWN, &adapter->state))
2058 e1000_irq_disable(adapter);
bc7f75fa 2059 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2060
2061 if (!test_bit(__E1000_DOWN, &adapter->state))
2062 e1000_irq_enable(adapter);
bc7f75fa
AK		 2063
2064 if ((adapter->hw.mng_cookie.status &
2065 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2066 (vid == adapter->mng_vlan_id)) {
2067 /* release control to f/w */
2068 e1000_release_hw_control(adapter);
2069 return;
2070 }
2071
2072 /* remove VID from filter table */
caaddaf8
BA		 2073 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2074 index = (vid >> 5) & 0x7F;
2075 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2076 vfta &= ~(1 << (vid & 0x1F));
2077 hw->mac.ops.write_vfta(hw, index, vfta);
2078 }
bc7f75fa
AK		 2079}
2080
2081static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2082{
2083 struct net_device *netdev = adapter->netdev;
2084 u16 vid = adapter->hw.mng_cookie.vlan_id;
2085 u16 old_vid = adapter->mng_vlan_id;
2086
2087 if (!adapter->vlgrp)
2088 return;
2089
2090 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2091 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2092 if (adapter->hw.mng_cookie.status &
2093 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2094 e1000_vlan_rx_add_vid(netdev, vid);
2095 adapter->mng_vlan_id = vid;
2096 }
2097
2098 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2099 (vid != old_vid) &&
2100 !vlan_group_get_device(adapter->vlgrp, old_vid))
2101 e1000_vlan_rx_kill_vid(netdev, old_vid);
2102 } else {
2103 adapter->mng_vlan_id = vid;
2104 }
2105}
2106
2107
2108static void e1000_vlan_rx_register(struct net_device *netdev,
2109 struct vlan_group *grp)
2110{
2111 struct e1000_adapter *adapter = netdev_priv(netdev);
2112 struct e1000_hw *hw = &adapter->hw;
2113 u32 ctrl, rctl;
2114
74ef9c39
JB		 2115 if (!test_bit(__E1000_DOWN, &adapter->state))
2116 e1000_irq_disable(adapter);
bc7f75fa
AK		 2117 adapter->vlgrp = grp;
2118
2119 if (grp) {
2120 /* enable VLAN tag insert/strip */
2121 ctrl = er32(CTRL);
2122 ctrl |= E1000_CTRL_VME;
2123 ew32(CTRL, ctrl);
2124
2125 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2126 /* enable VLAN receive filtering */
2127 rctl = er32(RCTL);
bc7f75fa
AK		 2128 rctl &= ~E1000_RCTL_CFIEN;
2129 ew32(RCTL, rctl);
2130 e1000_update_mng_vlan(adapter);
2131 }
2132 } else {
2133 /* disable VLAN tag insert/strip */
2134 ctrl = er32(CTRL);
2135 ctrl &= ~E1000_CTRL_VME;
2136 ew32(CTRL, ctrl);
2137
2138 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2139 if (adapter->mng_vlan_id !=
2140 (u16)E1000_MNG_VLAN_NONE) {
2141 e1000_vlan_rx_kill_vid(netdev,
2142 adapter->mng_vlan_id);
2143 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2144 }
2145 }
2146 }
2147
74ef9c39
JB		 2148 if (!test_bit(__E1000_DOWN, &adapter->state))
2149 e1000_irq_enable(adapter);
bc7f75fa
AK		 2150}
2151
2152static void e1000_restore_vlan(struct e1000_adapter *adapter)
2153{
2154 u16 vid;
2155
2156 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2157
2158 if (!adapter->vlgrp)
2159 return;
2160
2161 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2162 if (!vlan_group_get_device(adapter->vlgrp, vid))
2163 continue;
2164 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2165 }
2166}
2167
2168static void e1000_init_manageability(struct e1000_adapter *adapter)
2169{
2170 struct e1000_hw *hw = &adapter->hw;
2171 u32 manc, manc2h;
2172
2173 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2174 return;
2175
2176 manc = er32(MANC);
2177
ad68076e
BA		 2178 /*
2179 * enable receiving management packets to the host. this will probably
bc7f75fa 2180 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2181 * the packets will be handled on SMBUS
2182 */
bc7f75fa
AK		 2183 manc |= E1000_MANC_EN_MNG2HOST;
2184 manc2h = er32(MANC2H);
2185#define E1000_MNG2HOST_PORT_623 (1 << 5)
2186#define E1000_MNG2HOST_PORT_664 (1 << 6)
2187 manc2h |= E1000_MNG2HOST_PORT_623;
2188 manc2h |= E1000_MNG2HOST_PORT_664;
2189 ew32(MANC2H, manc2h);
2190 ew32(MANC, manc);
2191}
2192
2193/**
2194 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2195 * @adapter: board private structure
2196 *
2197 * Configure the Tx unit of the MAC after a reset.
2198 **/
2199static void e1000_configure_tx(struct e1000_adapter *adapter)
2200{
2201 struct e1000_hw *hw = &adapter->hw;
2202 struct e1000_ring *tx_ring = adapter->tx_ring;
2203 u64 tdba;
2204 u32 tdlen, tctl, tipg, tarc;
2205 u32 ipgr1, ipgr2;
2206
2207 /* Setup the HW Tx Head and Tail descriptor pointers */
2208 tdba = tx_ring->dma;
2209 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2210 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2211 ew32(TDBAH, (tdba >> 32));
2212 ew32(TDLEN, tdlen);
2213 ew32(TDH, 0);
2214 ew32(TDT, 0);
2215 tx_ring->head = E1000_TDH;
2216 tx_ring->tail = E1000_TDT;
2217
2218 /* Set the default values for the Tx Inter Packet Gap timer */
2219 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2220 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2221 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2222
2223 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2224 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2225
2226 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2227 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2228 ew32(TIPG, tipg);
2229
2230 /* Set the Tx Interrupt Delay register */
2231 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2232 /* Tx irq moderation */
bc7f75fa
AK		 2233 ew32(TADV, adapter->tx_abs_int_delay);
2234
2235 /* Program the Transmit Control Register */
2236 tctl = er32(TCTL);
2237 tctl &= ~E1000_TCTL_CT;
2238 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2239 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2240
2241 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2242 tarc = er32(TARC(0));
ad68076e
BA		 2243 /*
2244 * set the speed mode bit, we'll clear it if we're not at
2245 * gigabit link later
2246 */
bc7f75fa
AK		 2247#define SPEED_MODE_BIT (1 << 21)
2248 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2249 ew32(TARC(0), tarc);
bc7f75fa
AK		 2250 }
2251
2252 /* errata: program both queues to unweighted RR */
2253 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2254 tarc = er32(TARC(0));
bc7f75fa 2255 tarc |= 1;
e9ec2c0f
JK		 2256 ew32(TARC(0), tarc);
2257 tarc = er32(TARC(1));
bc7f75fa 2258 tarc |= 1;
e9ec2c0f 2259 ew32(TARC(1), tarc);
bc7f75fa
AK		 2260 }
2261
bc7f75fa
AK		 2262 /* Setup Transmit Descriptor Settings for eop descriptor */
2263 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2264
2265 /* only set IDE if we are delaying interrupts using the timers */
2266 if (adapter->tx_int_delay)
2267 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2268
2269 /* enable Report Status bit */
2270 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2271
2272 ew32(TCTL, tctl);
2273
edfea6e6
SH		 2274 e1000e_config_collision_dist(hw);
2275
bc7f75fa
AK		 2276 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2277}
2278
2279/**
2280 * e1000_setup_rctl - configure the receive control registers
2281 * @adapter: Board private structure
2282 **/
2283#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2284 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2285static void e1000_setup_rctl(struct e1000_adapter *adapter)
2286{
2287 struct e1000_hw *hw = &adapter->hw;
2288 u32 rctl, rfctl;
2289 u32 psrctl = 0;
2290 u32 pages = 0;
2291
2292 /* Program MC offset vector base */
2293 rctl = er32(RCTL);
2294 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2295 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2296 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2297 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2298
2299 /* Do not Store bad packets */
2300 rctl &= ~E1000_RCTL_SBP;
2301
2302 /* Enable Long Packet receive */
2303 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2304 rctl &= ~E1000_RCTL_LPE;
2305 else
2306 rctl |= E1000_RCTL_LPE;
2307
eb7c3adb
JK		 2308 /* Some systems expect that the CRC is included in SMBUS traffic. The
2309 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2310 * host memory when this is enabled
2311 */
2312 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2313 rctl |= E1000_RCTL_SECRC;
5918bd88 2314
a4f58f54
BA		 2315 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2316 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2317 u16 phy_data;
2318
2319 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2320 phy_data &= 0xfff8;
2321 phy_data |= (1 << 2);
2322 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2323
2324 e1e_rphy(hw, 22, &phy_data);
2325 phy_data &= 0x0fff;
2326 phy_data |= (1 << 14);
2327 e1e_wphy(hw, 0x10, 0x2823);
2328 e1e_wphy(hw, 0x11, 0x0003);
2329 e1e_wphy(hw, 22, phy_data);
2330 }
2331
bc7f75fa
AK		 2332 /* Setup buffer sizes */
2333 rctl &= ~E1000_RCTL_SZ_4096;
2334 rctl |= E1000_RCTL_BSEX;
2335 switch (adapter->rx_buffer_len) {
2336 case 256:
2337 rctl |= E1000_RCTL_SZ_256;
2338 rctl &= ~E1000_RCTL_BSEX;
2339 break;
2340 case 512:
2341 rctl |= E1000_RCTL_SZ_512;
2342 rctl &= ~E1000_RCTL_BSEX;
2343 break;
2344 case 1024:
2345 rctl |= E1000_RCTL_SZ_1024;
2346 rctl &= ~E1000_RCTL_BSEX;
2347 break;
2348 case 2048:
2349 default:
2350 rctl |= E1000_RCTL_SZ_2048;
2351 rctl &= ~E1000_RCTL_BSEX;
2352 break;
2353 case 4096:
2354 rctl |= E1000_RCTL_SZ_4096;
2355 break;
2356 case 8192:
2357 rctl |= E1000_RCTL_SZ_8192;
2358 break;
2359 case 16384:
2360 rctl |= E1000_RCTL_SZ_16384;
2361 break;
2362 }
2363
2364 /*
2365 * 82571 and greater support packet-split where the protocol
2366 * header is placed in skb->data and the packet data is
2367 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2368 * In the case of a non-split, skb->data is linearly filled,
2369 * followed by the page buffers. Therefore, skb->data is
2370 * sized to hold the largest protocol header.
2371 *
2372 * allocations using alloc_page take too long for regular MTU
2373 * so only enable packet split for jumbo frames
2374 *
2375 * Using pages when the page size is greater than 16k wastes
2376 * a lot of memory, since we allocate 3 pages at all times
2377 * per packet.
2378 */
bc7f75fa 2379 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2380 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2381 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2382 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2383 else
2384 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2385
2386 if (adapter->rx_ps_pages) {
2387 /* Configure extra packet-split registers */
2388 rfctl = er32(RFCTL);
2389 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2390 /*
2391 * disable packet split support for IPv6 extension headers,
2392 * because some malformed IPv6 headers can hang the Rx
2393 */
bc7f75fa
AK		 2394 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2395 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2396
2397 ew32(RFCTL, rfctl);
2398
140a7480
AK		 2399 /* Enable Packet split descriptors */
2400 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2401
2402 psrctl |= adapter->rx_ps_bsize0 >>
2403 E1000_PSRCTL_BSIZE0_SHIFT;
2404
2405 switch (adapter->rx_ps_pages) {
2406 case 3:
2407 psrctl |= PAGE_SIZE <<
2408 E1000_PSRCTL_BSIZE3_SHIFT;
2409 case 2:
2410 psrctl |= PAGE_SIZE <<
2411 E1000_PSRCTL_BSIZE2_SHIFT;
2412 case 1:
2413 psrctl |= PAGE_SIZE >>
2414 E1000_PSRCTL_BSIZE1_SHIFT;
2415 break;
2416 }
2417
2418 ew32(PSRCTL, psrctl);
2419 }
2420
2421 ew32(RCTL, rctl);
318a94d6
JK		 2422 /* just started the receive unit, no need to restart */
2423 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2424}
2425
2426/**
2427 * e1000_configure_rx - Configure Receive Unit after Reset
2428 * @adapter: board private structure
2429 *
2430 * Configure the Rx unit of the MAC after a reset.
2431 **/
2432static void e1000_configure_rx(struct e1000_adapter *adapter)
2433{
2434 struct e1000_hw *hw = &adapter->hw;
2435 struct e1000_ring *rx_ring = adapter->rx_ring;
2436 u64 rdba;
2437 u32 rdlen, rctl, rxcsum, ctrl_ext;
2438
2439 if (adapter->rx_ps_pages) {
2440 /* this is a 32 byte descriptor */
2441 rdlen = rx_ring->count *
2442 sizeof(union e1000_rx_desc_packet_split);
2443 adapter->clean_rx = e1000_clean_rx_irq_ps;
2444 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2445 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2446 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2447 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2448 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2449 } else {
97ac8cae 2450 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2451 adapter->clean_rx = e1000_clean_rx_irq;
2452 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2453 }
2454
2455 /* disable receives while setting up the descriptors */
2456 rctl = er32(RCTL);
2457 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2458 e1e_flush();
2459 msleep(10);
2460
2461 /* set the Receive Delay Timer Register */
2462 ew32(RDTR, adapter->rx_int_delay);
2463
2464 /* irq moderation */
2465 ew32(RADV, adapter->rx_abs_int_delay);
2466 if (adapter->itr_setting != 0)
ad68076e 2467 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2468
2469 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2470 /* Auto-Mask interrupts upon ICR access */
2471 ctrl_ext |= E1000_CTRL_EXT_IAME;
2472 ew32(IAM, 0xffffffff);
2473 ew32(CTRL_EXT, ctrl_ext);
2474 e1e_flush();
2475
ad68076e
BA		 2476 /*
2477 * Setup the HW Rx Head and Tail Descriptor Pointers and
2478 * the Base and Length of the Rx Descriptor Ring
2479 */
bc7f75fa 2480 rdba = rx_ring->dma;
284901a9 2481 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2482 ew32(RDBAH, (rdba >> 32));
2483 ew32(RDLEN, rdlen);
2484 ew32(RDH, 0);
2485 ew32(RDT, 0);
2486 rx_ring->head = E1000_RDH;
2487 rx_ring->tail = E1000_RDT;
2488
2489 /* Enable Receive Checksum Offload for TCP and UDP */
2490 rxcsum = er32(RXCSUM);
2491 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2492 rxcsum |= E1000_RXCSUM_TUOFL;
2493
ad68076e
BA		 2494 /*
2495 * IPv4 payload checksum for UDP fragments must be
2496 * used in conjunction with packet-split.
2497 */
bc7f75fa
AK		 2498 if (adapter->rx_ps_pages)
2499 rxcsum |= E1000_RXCSUM_IPPCSE;
2500 } else {
2501 rxcsum &= ~E1000_RXCSUM_TUOFL;
2502 /* no need to clear IPPCSE as it defaults to 0 */
2503 }
2504 ew32(RXCSUM, rxcsum);
2505
ad68076e
BA		 2506 /*
2507 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2508 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2509 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2510 */
53ec5498
BA		 2511 if (adapter->flags & FLAG_HAS_ERT) {
2512 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2513 u32 rxdctl = er32(RXDCTL(0));
2514 ew32(RXDCTL(0), rxdctl | 0x3);
2515 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2516 /*
2517 * With jumbo frames and early-receive enabled,
2518 * excessive C-state transition latencies result in
2519 * dropped transactions.
2520 */
2521 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2522 adapter->netdev->name, 55);
2523 } else {
2524 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2525 adapter->netdev->name,
2526 PM_QOS_DEFAULT_VALUE);
2527 }
97ac8cae 2528 }
bc7f75fa
AK		 2529
2530 /* Enable Receives */
2531 ew32(RCTL, rctl);
2532}
2533
2534/**
e2de3eb6 2535 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2536 * @hw: pointer to the HW structure
2537 * @mc_addr_list: array of multicast addresses to program
2538 * @mc_addr_count: number of multicast addresses to program
2539 * @rar_used_count: the first RAR register free to program
2540 * @rar_count: total number of supported Receive Address Registers
2541 *
2542 * Updates the Receive Address Registers and Multicast Table Array.
2543 * The caller must have a packed mc_addr_list of multicast addresses.
2544 * The parameter rar_count will usually be hw->mac.rar_entry_count
2545 * unless there are workarounds that change this. Currently no func pointer
2546 * exists and all implementations are handled in the generic version of this
2547 * function.
2548 **/
e2de3eb6
JK		 2549static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2550 u32 mc_addr_count, u32 rar_used_count,
2551 u32 rar_count)
bc7f75fa 2552{
e2de3eb6 2553 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2554 rar_used_count, rar_count);
2555}
2556
2557/**
2558 * e1000_set_multi - Multicast and Promiscuous mode set
2559 * @netdev: network interface device structure
2560 *
2561 * The set_multi entry point is called whenever the multicast address
2562 * list or the network interface flags are updated. This routine is
2563 * responsible for configuring the hardware for proper multicast,
2564 * promiscuous mode, and all-multi behavior.
2565 **/
2566static void e1000_set_multi(struct net_device *netdev)
2567{
2568 struct e1000_adapter *adapter = netdev_priv(netdev);
2569 struct e1000_hw *hw = &adapter->hw;
2570 struct e1000_mac_info *mac = &hw->mac;
2571 struct dev_mc_list *mc_ptr;
2572 u8 *mta_list;
2573 u32 rctl;
2574 int i;
2575
2576 /* Check for Promiscuous and All Multicast modes */
2577
2578 rctl = er32(RCTL);
2579
2580 if (netdev->flags & IFF_PROMISC) {
2581 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2582 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2583 } else {
746b9f02
PM		 2584 if (netdev->flags & IFF_ALLMULTI) {
2585 rctl |= E1000_RCTL_MPE;
2586 rctl &= ~E1000_RCTL_UPE;
2587 } else {
2588 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2589 }
78ed11a5 2590 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2591 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2592 }
2593
2594 ew32(RCTL, rctl);
2595
2596 if (netdev->mc_count) {
2597 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2598 if (!mta_list)
2599 return;
2600
2601 /* prepare a packed array of only addresses. */
2602 mc_ptr = netdev->mc_list;
2603
2604 for (i = 0; i < netdev->mc_count; i++) {
2605 if (!mc_ptr)
2606 break;
2607 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2608 ETH_ALEN);
2609 mc_ptr = mc_ptr->next;
2610 }
2611
e2de3eb6 2612 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2613 mac->rar_entry_count);
2614 kfree(mta_list);
2615 } else {
2616 /*
2617 * if we're called from probe, we might not have
2618 * anything to do here, so clear out the list
2619 */
e2de3eb6 2620 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2621 }
2622}
2623
2624/**
ad68076e 2625 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2626 * @adapter: private board structure
2627 **/
2628static void e1000_configure(struct e1000_adapter *adapter)
2629{
2630 e1000_set_multi(adapter->netdev);
2631
2632 e1000_restore_vlan(adapter);
2633 e1000_init_manageability(adapter);
2634
2635 e1000_configure_tx(adapter);
2636 e1000_setup_rctl(adapter);
2637 e1000_configure_rx(adapter);
ad68076e 2638 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2639}
2640
2641/**
2642 * e1000e_power_up_phy - restore link in case the phy was powered down
2643 * @adapter: address of board private structure
2644 *
2645 * The phy may be powered down to save power and turn off link when the
2646 * driver is unloaded and wake on lan is not enabled (among others)
2647 * *** this routine MUST be followed by a call to e1000e_reset ***
2648 **/
2649void e1000e_power_up_phy(struct e1000_adapter *adapter)
2650{
17f208de
BA		 2651 if (adapter->hw.phy.ops.power_up)
2652 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 2653
2654 adapter->hw.mac.ops.setup_link(&adapter->hw);
2655}
2656
2657/**
2658 * e1000_power_down_phy - Power down the PHY
2659 *
17f208de
BA		 2660 * Power down the PHY so no link is implied when interface is down.
2661 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 2662 */
2663static void e1000_power_down_phy(struct e1000_adapter *adapter)
2664{
bc7f75fa 2665 /* WoL is enabled */
23b66e2b 2666 if (adapter->wol)
bc7f75fa
AK		 2667 return;
2668
17f208de
BA		 2669 if (adapter->hw.phy.ops.power_down)
2670 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 2671}
2672
2673/**
2674 * e1000e_reset - bring the hardware into a known good state
2675 *
2676 * This function boots the hardware and enables some settings that
2677 * require a configuration cycle of the hardware - those cannot be
2678 * set/changed during runtime. After reset the device needs to be
ad68076e 2679 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2680 */
2681void e1000e_reset(struct e1000_adapter *adapter)
2682{
2683 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2684 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2685 struct e1000_hw *hw = &adapter->hw;
2686 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2687 u32 pba = adapter->pba;
bc7f75fa
AK		 2688 u16 hwm;
2689
ad68076e 2690 /* reset Packet Buffer Allocation to default */
318a94d6 2691 ew32(PBA, pba);
df762464 2692
318a94d6 2693 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2694 /*
2695 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2696 * large enough to accommodate two full transmit packets,
2697 * rounded up to the next 1KB and expressed in KB. Likewise,
2698 * the Rx FIFO should be large enough to accommodate at least
2699 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2700 * expressed in KB.
2701 */
df762464 2702 pba = er32(PBA);
bc7f75fa 2703 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2704 tx_space = pba >> 16;
bc7f75fa 2705 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2706 pba &= 0xffff;
ad68076e
BA		 2707 /*
2708 * the Tx fifo also stores 16 bytes of information about the tx
2709 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2710 */
2711 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2712 sizeof(struct e1000_tx_desc) -
2713 ETH_FCS_LEN) * 2;
2714 min_tx_space = ALIGN(min_tx_space, 1024);
2715 min_tx_space >>= 10;
2716 /* software strips receive CRC, so leave room for it */
318a94d6 2717 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2718 min_rx_space = ALIGN(min_rx_space, 1024);
2719 min_rx_space >>= 10;
2720
ad68076e
BA		 2721 /*
2722 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2723 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2724 * allocation, take space away from current Rx allocation
2725 */
df762464
AK		 2726 if ((tx_space < min_tx_space) &&
2727 ((min_tx_space - tx_space) < pba)) {
2728 pba -= min_tx_space - tx_space;
bc7f75fa 2729
ad68076e
BA		 2730 /*
2731 * if short on Rx space, Rx wins and must trump tx
2732 * adjustment or use Early Receive if available
2733 */
df762464 2734 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2735 (!(adapter->flags & FLAG_HAS_ERT)))
2736 /* ERT enabled in e1000_configure_rx */
df762464 2737 pba = min_rx_space;
bc7f75fa 2738 }
df762464
AK		 2739
2740 ew32(PBA, pba);
bc7f75fa
AK		 2741 }
2742
bc7f75fa 2743
ad68076e
BA		 2744 /*
2745 * flow control settings
2746 *
38eb394e 2747 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2748 * (or the size used for early receive) above it in the Rx FIFO.
2749 * Set it to the lower of:
2750 * - 90% of the Rx FIFO size, and
2751 * - the full Rx FIFO size minus the early receive size (for parts
2752 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 2753 * - the full Rx FIFO size minus one full frame
ad68076e 2754 */
38eb394e
BA		 2755 if (hw->mac.type == e1000_pchlan) {
2756 /*
2757 * Workaround PCH LOM adapter hangs with certain network
2758 * loads. If hangs persist, try disabling Tx flow control.
2759 */
2760 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2761 fc->high_water = 0x3500;
2762 fc->low_water = 0x1500;
2763 } else {
2764 fc->high_water = 0x5000;
2765 fc->low_water = 0x3000;
2766 }
2767 } else {
2768 if ((adapter->flags & FLAG_HAS_ERT) &&
2769 (adapter->netdev->mtu > ETH_DATA_LEN))
2770 hwm = min(((pba << 10) * 9 / 10),
2771 ((pba << 10) - (E1000_ERT_2048 << 3)));
2772 else
2773 hwm = min(((pba << 10) * 9 / 10),
2774 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2775
38eb394e
BA		 2776 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2777 fc->low_water = fc->high_water - 8;
2778 }
bc7f75fa
AK		 2779
2780 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2781 fc->pause_time = 0xFFFF;
bc7f75fa 2782 else
318a94d6
JK		 2783 fc->pause_time = E1000_FC_PAUSE_TIME;
2784 fc->send_xon = 1;
5c48ef3e 2785 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2786
2787 /* Allow time for pending master requests to run */
2788 mac->ops.reset_hw(hw);
97ac8cae
BA		 2789
2790 /*
2791 * For parts with AMT enabled, let the firmware know
2792 * that the network interface is in control
2793 */
c43bc57e 2794 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2795 e1000_get_hw_control(adapter);
2796
bc7f75fa 2797 ew32(WUC, 0);
a4f58f54
BA		 2798 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2799 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 2800
2801 if (mac->ops.init_hw(hw))
44defeb3 2802 e_err("Hardware Error\n");
bc7f75fa 2803
38eb394e
BA		 2804 /* additional part of the flow-control workaround above */
2805 if (hw->mac.type == e1000_pchlan)
2806 ew32(FCRTV_PCH, 0x1000);
2807
bc7f75fa
AK		 2808 e1000_update_mng_vlan(adapter);
2809
2810 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2811 ew32(VET, ETH_P_8021Q);
2812
2813 e1000e_reset_adaptive(hw);
2814 e1000_get_phy_info(hw);
2815
918d7197
BA		 2816 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2817 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2818 u16 phy_data = 0;
ad68076e
BA		 2819 /*
2820 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2821 * the return value of this function because there is nothing
ad68076e
BA		 2822 * different we would do if it failed
2823 */
bc7f75fa
AK		 2824 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2825 phy_data &= ~IGP02E1000_PM_SPD;
2826 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2827 }
bc7f75fa
AK		 2828}
2829
2830int e1000e_up(struct e1000_adapter *adapter)
2831{
2832 struct e1000_hw *hw = &adapter->hw;
2833
53ec5498
BA		 2834 /* DMA latency requirement to workaround early-receive/jumbo issue */
2835 if (adapter->flags & FLAG_HAS_ERT)
2836 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
2837 adapter->netdev->name,
2838 PM_QOS_DEFAULT_VALUE);
2839
bc7f75fa
AK		 2840 /* hardware has been reset, we need to reload some things */
2841 e1000_configure(adapter);
2842
2843 clear_bit(__E1000_DOWN, &adapter->state);
2844
2845 napi_enable(&adapter->napi);
4662e82b
BA		 2846 if (adapter->msix_entries)
2847 e1000_configure_msix(adapter);
bc7f75fa
AK		 2848 e1000_irq_enable(adapter);
2849
4cb9be7a
JB		 2850 netif_wake_queue(adapter->netdev);
2851
bc7f75fa
AK		 2852 /* fire a link change interrupt to start the watchdog */
2853 ew32(ICS, E1000_ICS_LSC);
2854 return 0;
2855}
2856
2857void e1000e_down(struct e1000_adapter *adapter)
2858{
2859 struct net_device *netdev = adapter->netdev;
2860 struct e1000_hw *hw = &adapter->hw;
2861 u32 tctl, rctl;
2862
ad68076e
BA		 2863 /*
2864 * signal that we're down so the interrupt handler does not
2865 * reschedule our watchdog timer
2866 */
bc7f75fa
AK		 2867 set_bit(__E1000_DOWN, &adapter->state);
2868
2869 /* disable receives in the hardware */
2870 rctl = er32(RCTL);
2871 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2872 /* flush and sleep below */
2873
4cb9be7a 2874 netif_stop_queue(netdev);
bc7f75fa
AK		 2875
2876 /* disable transmits in the hardware */
2877 tctl = er32(TCTL);
2878 tctl &= ~E1000_TCTL_EN;
2879 ew32(TCTL, tctl);
2880 /* flush both disables and wait for them to finish */
2881 e1e_flush();
2882 msleep(10);
2883
2884 napi_disable(&adapter->napi);
2885 e1000_irq_disable(adapter);
2886
2887 del_timer_sync(&adapter->watchdog_timer);
2888 del_timer_sync(&adapter->phy_info_timer);
2889
2890 netdev->tx_queue_len = adapter->tx_queue_len;
2891 netif_carrier_off(netdev);
2892 adapter->link_speed = 0;
2893 adapter->link_duplex = 0;
2894
52cc3086
JK		 2895 if (!pci_channel_offline(adapter->pdev))
2896 e1000e_reset(adapter);
bc7f75fa
AK		 2897 e1000_clean_tx_ring(adapter);
2898 e1000_clean_rx_ring(adapter);
2899
53ec5498
BA		 2900 if (adapter->flags & FLAG_HAS_ERT)
2901 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
2902 adapter->netdev->name);
2903
bc7f75fa
AK		 2904 /*
2905 * TODO: for power management, we could drop the link and
2906 * pci_disable_device here.
2907 */
2908}
2909
2910void e1000e_reinit_locked(struct e1000_adapter *adapter)
2911{
2912 might_sleep();
2913 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2914 msleep(1);
2915 e1000e_down(adapter);
2916 e1000e_up(adapter);
2917 clear_bit(__E1000_RESETTING, &adapter->state);
2918}
2919
2920/**
2921 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2922 * @adapter: board private structure to initialize
2923 *
2924 * e1000_sw_init initializes the Adapter private data structure.
2925 * Fields are initialized based on PCI device information and
2926 * OS network device settings (MTU size).
2927 **/
2928static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2929{
bc7f75fa
AK		 2930 struct net_device *netdev = adapter->netdev;
2931
2932 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2933 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2934 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2935 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2936
4662e82b 2937 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2938
4662e82b
BA		 2939 if (e1000_alloc_queues(adapter))
2940 return -ENOMEM;
bc7f75fa 2941
bc7f75fa 2942 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2943 e1000_irq_disable(adapter);
2944
bc7f75fa
AK		 2945 set_bit(__E1000_DOWN, &adapter->state);
2946 return 0;
bc7f75fa
AK		 2947}
2948
f8d59f78
BA		 2949/**
2950 * e1000_intr_msi_test - Interrupt Handler
2951 * @irq: interrupt number
2952 * @data: pointer to a network interface device structure
2953 **/
2954static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2955{
2956 struct net_device *netdev = data;
2957 struct e1000_adapter *adapter = netdev_priv(netdev);
2958 struct e1000_hw *hw = &adapter->hw;
2959 u32 icr = er32(ICR);
2960
3bb99fe2 2961 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 2962 if (icr & E1000_ICR_RXSEQ) {
2963 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2964 wmb();
2965 }
2966
2967 return IRQ_HANDLED;
2968}
2969
2970/**
2971 * e1000_test_msi_interrupt - Returns 0 for successful test
2972 * @adapter: board private struct
2973 *
2974 * code flow taken from tg3.c
2975 **/
2976static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2977{
2978 struct net_device *netdev = adapter->netdev;
2979 struct e1000_hw *hw = &adapter->hw;
2980 int err;
2981
2982 /* poll_enable hasn't been called yet, so don't need disable */
2983 /* clear any pending events */
2984 er32(ICR);
2985
2986 /* free the real vector and request a test handler */
2987 e1000_free_irq(adapter);
4662e82b 2988 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 2989
2990 /* Assume that the test fails, if it succeeds then the test
2991 * MSI irq handler will unset this flag */
2992 adapter->flags |= FLAG_MSI_TEST_FAILED;
2993
2994 err = pci_enable_msi(adapter->pdev);
2995 if (err)
2996 goto msi_test_failed;
2997
a0607fd3 2998 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 2999 netdev->name, netdev);
3000 if (err) {
3001 pci_disable_msi(adapter->pdev);
3002 goto msi_test_failed;
3003 }
3004
3005 wmb();
3006
3007 e1000_irq_enable(adapter);
3008
3009 /* fire an unusual interrupt on the test handler */
3010 ew32(ICS, E1000_ICS_RXSEQ);
3011 e1e_flush();
3012 msleep(50);
3013
3014 e1000_irq_disable(adapter);
3015
3016 rmb();
3017
3018 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3019 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3020 err = -EIO;
3021 e_info("MSI interrupt test failed!\n");
3022 }
3023
3024 free_irq(adapter->pdev->irq, netdev);
3025 pci_disable_msi(adapter->pdev);
3026
3027 if (err == -EIO)
3028 goto msi_test_failed;
3029
3030 /* okay so the test worked, restore settings */
3bb99fe2 3031 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3032msi_test_failed:
4662e82b 3033 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3034 e1000_request_irq(adapter);
3035 return err;
3036}
3037
3038/**
3039 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3040 * @adapter: board private struct
3041 *
3042 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3043 **/
3044static int e1000_test_msi(struct e1000_adapter *adapter)
3045{
3046 int err;
3047 u16 pci_cmd;
3048
3049 if (!(adapter->flags & FLAG_MSI_ENABLED))
3050 return 0;
3051
3052 /* disable SERR in case the MSI write causes a master abort */
3053 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3054 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3055 pci_cmd & ~PCI_COMMAND_SERR);
3056
3057 err = e1000_test_msi_interrupt(adapter);
3058
3059 /* restore previous setting of command word */
3060 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3061
3062 /* success ! */
3063 if (!err)
3064 return 0;
3065
3066 /* EIO means MSI test failed */
3067 if (err != -EIO)
3068 return err;
3069
3070 /* back to INTx mode */
3071 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3072
3073 e1000_free_irq(adapter);
3074
3075 err = e1000_request_irq(adapter);
3076
3077 return err;
3078}
3079
bc7f75fa
AK		 3080/**
3081 * e1000_open - Called when a network interface is made active
3082 * @netdev: network interface device structure
3083 *
3084 * Returns 0 on success, negative value on failure
3085 *
3086 * The open entry point is called when a network interface is made
3087 * active by the system (IFF_UP). At this point all resources needed
3088 * for transmit and receive operations are allocated, the interrupt
3089 * handler is registered with the OS, the watchdog timer is started,
3090 * and the stack is notified that the interface is ready.
3091 **/
3092static int e1000_open(struct net_device *netdev)
3093{
3094 struct e1000_adapter *adapter = netdev_priv(netdev);
3095 struct e1000_hw *hw = &adapter->hw;
3096 int err;
3097
3098 /* disallow open during test */
3099 if (test_bit(__E1000_TESTING, &adapter->state))
3100 return -EBUSY;
3101
9c563d20
JB		 3102 netif_carrier_off(netdev);
3103
bc7f75fa
AK		 3104 /* allocate transmit descriptors */
3105 err = e1000e_setup_tx_resources(adapter);
3106 if (err)
3107 goto err_setup_tx;
3108
3109 /* allocate receive descriptors */
3110 err = e1000e_setup_rx_resources(adapter);
3111 if (err)
3112 goto err_setup_rx;
3113
3114 e1000e_power_up_phy(adapter);
3115
3116 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3117 if ((adapter->hw.mng_cookie.status &
3118 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3119 e1000_update_mng_vlan(adapter);
3120
ad68076e
BA		 3121 /*
3122 * If AMT is enabled, let the firmware know that the network
3123 * interface is now open
3124 */
c43bc57e 3125 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3126 e1000_get_hw_control(adapter);
3127
ad68076e
BA		 3128 /*
3129 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3130 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3131 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3132 * clean_rx handler before we do so.
3133 */
bc7f75fa
AK		 3134 e1000_configure(adapter);
3135
3136 err = e1000_request_irq(adapter);
3137 if (err)
3138 goto err_req_irq;
3139
f8d59f78
BA		 3140 /*
3141 * Work around PCIe errata with MSI interrupts causing some chipsets to
3142 * ignore e1000e MSI messages, which means we need to test our MSI
3143 * interrupt now
3144 */
4662e82b 3145 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3146 err = e1000_test_msi(adapter);
3147 if (err) {
3148 e_err("Interrupt allocation failed\n");
3149 goto err_req_irq;
3150 }
3151 }
3152
bc7f75fa
AK		 3153 /* From here on the code is the same as e1000e_up() */
3154 clear_bit(__E1000_DOWN, &adapter->state);
3155
3156 napi_enable(&adapter->napi);
3157
3158 e1000_irq_enable(adapter);
3159
4cb9be7a 3160 netif_start_queue(netdev);
d55b53ff 3161
bc7f75fa
AK		 3162 /* fire a link status change interrupt to start the watchdog */
3163 ew32(ICS, E1000_ICS_LSC);
3164
3165 return 0;
3166
3167err_req_irq:
3168 e1000_release_hw_control(adapter);
3169 e1000_power_down_phy(adapter);
3170 e1000e_free_rx_resources(adapter);
3171err_setup_rx:
3172 e1000e_free_tx_resources(adapter);
3173err_setup_tx:
3174 e1000e_reset(adapter);
3175
3176 return err;
3177}
3178
3179/**
3180 * e1000_close - Disables a network interface
3181 * @netdev: network interface device structure
3182 *
3183 * Returns 0, this is not allowed to fail
3184 *
3185 * The close entry point is called when an interface is de-activated
3186 * by the OS. The hardware is still under the drivers control, but
3187 * needs to be disabled. A global MAC reset is issued to stop the
3188 * hardware, and all transmit and receive resources are freed.
3189 **/
3190static int e1000_close(struct net_device *netdev)
3191{
3192 struct e1000_adapter *adapter = netdev_priv(netdev);
3193
3194 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3195 e1000e_down(adapter);
3196 e1000_power_down_phy(adapter);
3197 e1000_free_irq(adapter);
3198
3199 e1000e_free_tx_resources(adapter);
3200 e1000e_free_rx_resources(adapter);
3201
ad68076e
BA		 3202 /*
3203 * kill manageability vlan ID if supported, but not if a vlan with
3204 * the same ID is registered on the host OS (let 8021q kill it)
3205 */
bc7f75fa
AK		 3206 if ((adapter->hw.mng_cookie.status &
3207 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3208 !(adapter->vlgrp &&
3209 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3210 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3211
ad68076e
BA		 3212 /*
3213 * If AMT is enabled, let the firmware know that the network
3214 * interface is now closed
3215 */
c43bc57e 3216 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3217 e1000_release_hw_control(adapter);
3218
3219 return 0;
3220}
3221/**
3222 * e1000_set_mac - Change the Ethernet Address of the NIC
3223 * @netdev: network interface device structure
3224 * @p: pointer to an address structure
3225 *
3226 * Returns 0 on success, negative on failure
3227 **/
3228static int e1000_set_mac(struct net_device *netdev, void *p)
3229{
3230 struct e1000_adapter *adapter = netdev_priv(netdev);
3231 struct sockaddr *addr = p;
3232
3233 if (!is_valid_ether_addr(addr->sa_data))
3234 return -EADDRNOTAVAIL;
3235
3236 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3237 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3238
3239 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3240
3241 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3242 /* activate the work around */
3243 e1000e_set_laa_state_82571(&adapter->hw, 1);
3244
ad68076e
BA		 3245 /*
3246 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3247 * between the time RAR[0] gets clobbered and the time it
3248 * gets fixed (in e1000_watchdog), the actual LAA is in one
3249 * of the RARs and no incoming packets directed to this port
3250 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3251 * RAR[14]
3252 */
bc7f75fa
AK		 3253 e1000e_rar_set(&adapter->hw,
3254 adapter->hw.mac.addr,
3255 adapter->hw.mac.rar_entry_count - 1);
3256 }
3257
3258 return 0;
3259}
3260
a8f88ff5
JB		 3261/**
3262 * e1000e_update_phy_task - work thread to update phy
3263 * @work: pointer to our work struct
3264 *
3265 * this worker thread exists because we must acquire a
3266 * semaphore to read the phy, which we could msleep while
3267 * waiting for it, and we can't msleep in a timer.
3268 **/
3269static void e1000e_update_phy_task(struct work_struct *work)
3270{
3271 struct e1000_adapter *adapter = container_of(work,
3272 struct e1000_adapter, update_phy_task);
3273 e1000_get_phy_info(&adapter->hw);
3274}
3275
ad68076e
BA		 3276/*
3277 * Need to wait a few seconds after link up to get diagnostic information from
3278 * the phy
3279 */
bc7f75fa
AK		 3280static void e1000_update_phy_info(unsigned long data)
3281{
3282 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3283 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3284}
3285
3286/**
3287 * e1000e_update_stats - Update the board statistics counters
3288 * @adapter: board private structure
3289 **/
3290void e1000e_update_stats(struct e1000_adapter *adapter)
3291{
7274c20f 3292 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3293 struct e1000_hw *hw = &adapter->hw;
3294 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3295 u16 phy_data;
bc7f75fa
AK		 3296
3297 /*
3298 * Prevent stats update while adapter is being reset, or if the pci
3299 * connection is down.
3300 */
3301 if (adapter->link_speed == 0)
3302 return;
3303 if (pci_channel_offline(pdev))
3304 return;
3305
bc7f75fa
AK		 3306 adapter->stats.crcerrs += er32(CRCERRS);
3307 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3308 adapter->stats.gorc += er32(GORCL);
3309 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3310 adapter->stats.bprc += er32(BPRC);
3311 adapter->stats.mprc += er32(MPRC);
3312 adapter->stats.roc += er32(ROC);
3313
bc7f75fa 3314 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3315 if ((hw->phy.type == e1000_phy_82578) ||
3316 (hw->phy.type == e1000_phy_82577)) {
3317 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
3318 e1e_rphy(hw, HV_SCC_LOWER, &phy_data);
3319 adapter->stats.scc += phy_data;
3320
3321 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
3322 e1e_rphy(hw, HV_ECOL_LOWER, &phy_data);
3323 adapter->stats.ecol += phy_data;
3324
3325 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
3326 e1e_rphy(hw, HV_MCC_LOWER, &phy_data);
3327 adapter->stats.mcc += phy_data;
3328
3329 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
3330 e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data);
3331 adapter->stats.latecol += phy_data;
3332
3333 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
3334 e1e_rphy(hw, HV_DC_LOWER, &phy_data);
3335 adapter->stats.dc += phy_data;
3336 } else {
3337 adapter->stats.scc += er32(SCC);
3338 adapter->stats.ecol += er32(ECOL);
3339 adapter->stats.mcc += er32(MCC);
3340 adapter->stats.latecol += er32(LATECOL);
3341 adapter->stats.dc += er32(DC);
3342 }
bc7f75fa
AK		 3343 adapter->stats.xonrxc += er32(XONRXC);
3344 adapter->stats.xontxc += er32(XONTXC);
3345 adapter->stats.xoffrxc += er32(XOFFRXC);
3346 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3347 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3348 adapter->stats.gotc += er32(GOTCL);
3349 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3350 adapter->stats.rnbc += er32(RNBC);
3351 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3352
3353 adapter->stats.mptc += er32(MPTC);
3354 adapter->stats.bptc += er32(BPTC);
3355
3356 /* used for adaptive IFS */
3357
3358 hw->mac.tx_packet_delta = er32(TPT);
3359 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3360 if ((hw->phy.type == e1000_phy_82578) ||
3361 (hw->phy.type == e1000_phy_82577)) {
3362 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
3363 e1e_rphy(hw, HV_COLC_LOWER, &phy_data);
3364 hw->mac.collision_delta = phy_data;
3365 } else {
3366 hw->mac.collision_delta = er32(COLC);
3367 }
bc7f75fa
AK		 3368 adapter->stats.colc += hw->mac.collision_delta;
3369
3370 adapter->stats.algnerrc += er32(ALGNERRC);
3371 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3372 if ((hw->phy.type == e1000_phy_82578) ||
3373 (hw->phy.type == e1000_phy_82577)) {
3374 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
3375 e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data);
3376 adapter->stats.tncrs += phy_data;
3377 } else {
3378 if ((hw->mac.type != e1000_82574) &&
3379 (hw->mac.type != e1000_82583))
3380 adapter->stats.tncrs += er32(TNCRS);
3381 }
bc7f75fa
AK		 3382 adapter->stats.cexterr += er32(CEXTERR);
3383 adapter->stats.tsctc += er32(TSCTC);
3384 adapter->stats.tsctfc += er32(TSCTFC);
3385
bc7f75fa 3386 /* Fill out the OS statistics structure */
7274c20f
AK		 3387 netdev->stats.multicast = adapter->stats.mprc;
3388 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3389
3390 /* Rx Errors */
3391
ad68076e
BA		 3392 /*
3393 * RLEC on some newer hardware can be incorrect so build
3394 * our own version based on RUC and ROC
3395 */
7274c20f 3396 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3397 adapter->stats.crcerrs + adapter->stats.algnerrc +
3398 adapter->stats.ruc + adapter->stats.roc +
3399 adapter->stats.cexterr;
7274c20f 3400 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3401 adapter->stats.roc;
7274c20f
AK		 3402 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3403 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3404 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3405
3406 /* Tx Errors */
7274c20f 3407 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3408 adapter->stats.latecol;
7274c20f
AK		 3409 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3410 netdev->stats.tx_window_errors = adapter->stats.latecol;
3411 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3412
3413 /* Tx Dropped needs to be maintained elsewhere */
3414
bc7f75fa
AK		 3415 /* Management Stats */
3416 adapter->stats.mgptc += er32(MGTPTC);
3417 adapter->stats.mgprc += er32(MGTPRC);
3418 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3419}
3420
7c25769f
BA		 3421/**
3422 * e1000_phy_read_status - Update the PHY register status snapshot
3423 * @adapter: board private structure
3424 **/
3425static void e1000_phy_read_status(struct e1000_adapter *adapter)
3426{
3427 struct e1000_hw *hw = &adapter->hw;
3428 struct e1000_phy_regs *phy = &adapter->phy_regs;
3429 int ret_val;
7c25769f
BA		 3430
3431 if ((er32(STATUS) & E1000_STATUS_LU) &&
3432 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3433 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3434 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3435 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3436 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3437 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3438 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3439 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3440 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3441 if (ret_val)
44defeb3 3442 e_warn("Error reading PHY register\n");
7c25769f
BA		 3443 } else {
3444 /*
3445 * Do not read PHY registers if link is not up
3446 * Set values to typical power-on defaults
3447 */
3448 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3449 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3450 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3451 BMSR_ERCAP);
3452 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3453 ADVERTISE_ALL | ADVERTISE_CSMA);
3454 phy->lpa = 0;
3455 phy->expansion = EXPANSION_ENABLENPAGE;
3456 phy->ctrl1000 = ADVERTISE_1000FULL;
3457 phy->stat1000 = 0;
3458 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3459 }
7c25769f
BA		 3460}
3461
bc7f75fa
AK		 3462static void e1000_print_link_info(struct e1000_adapter *adapter)
3463{
bc7f75fa
AK		 3464 struct e1000_hw *hw = &adapter->hw;
3465 u32 ctrl = er32(CTRL);
3466
8f12fe86
BA		 3467 /* Link status message must follow this format for user tools */
3468 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3469 "Flow Control: %s\n",
3470 adapter->netdev->name,
44defeb3
JK		 3471 adapter->link_speed,
3472 (adapter->link_duplex == FULL_DUPLEX) ?
3473 "Full Duplex" : "Half Duplex",
3474 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3475 "RX/TX" :
3476 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3477 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3478}
3479
a20e4cf9 3480bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3481{
3482 struct e1000_hw *hw = &adapter->hw;
3483 bool link_active = 0;
3484 s32 ret_val = 0;
3485
3486 /*
3487 * get_link_status is set on LSC (link status) interrupt or
3488 * Rx sequence error interrupt. get_link_status will stay
3489 * false until the check_for_link establishes link
3490 * for copper adapters ONLY
3491 */
3492 switch (hw->phy.media_type) {
3493 case e1000_media_type_copper:
3494 if (hw->mac.get_link_status) {
3495 ret_val = hw->mac.ops.check_for_link(hw);
3496 link_active = !hw->mac.get_link_status;
3497 } else {
3498 link_active = 1;
3499 }
3500 break;
3501 case e1000_media_type_fiber:
3502 ret_val = hw->mac.ops.check_for_link(hw);
3503 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3504 break;
3505 case e1000_media_type_internal_serdes:
3506 ret_val = hw->mac.ops.check_for_link(hw);
3507 link_active = adapter->hw.mac.serdes_has_link;
3508 break;
3509 default:
3510 case e1000_media_type_unknown:
3511 break;
3512 }
3513
3514 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3515 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3516 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3517 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3518 }
3519
3520 return link_active;
3521}
3522
3523static void e1000e_enable_receives(struct e1000_adapter *adapter)
3524{
3525 /* make sure the receive unit is started */
3526 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3527 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3528 struct e1000_hw *hw = &adapter->hw;
3529 u32 rctl = er32(RCTL);
3530 ew32(RCTL, rctl | E1000_RCTL_EN);
3531 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3532 }
3533}
3534
bc7f75fa
AK		 3535/**
3536 * e1000_watchdog - Timer Call-back
3537 * @data: pointer to adapter cast into an unsigned long
3538 **/
3539static void e1000_watchdog(unsigned long data)
3540{
3541 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3542
3543 /* Do the rest outside of interrupt context */
3544 schedule_work(&adapter->watchdog_task);
3545
3546 /* TODO: make this use queue_delayed_work() */
3547}
3548
3549static void e1000_watchdog_task(struct work_struct *work)
3550{
3551 struct e1000_adapter *adapter = container_of(work,
3552 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3553 struct net_device *netdev = adapter->netdev;
3554 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3555 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3556 struct e1000_ring *tx_ring = adapter->tx_ring;
3557 struct e1000_hw *hw = &adapter->hw;
3558 u32 link, tctl;
bc7f75fa
AK		 3559 int tx_pending = 0;
3560
318a94d6
JK		 3561 link = e1000_has_link(adapter);
3562 if ((netif_carrier_ok(netdev)) && link) {
3563 e1000e_enable_receives(adapter);
bc7f75fa 3564 goto link_up;
bc7f75fa
AK		 3565 }
3566
3567 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3568 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3569 e1000_update_mng_vlan(adapter);
3570
bc7f75fa
AK		 3571 if (link) {
3572 if (!netif_carrier_ok(netdev)) {
3573 bool txb2b = 1;
318a94d6 3574 /* update snapshot of PHY registers on LSC */
7c25769f 3575 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3576 mac->ops.get_link_up_info(&adapter->hw,
3577 &adapter->link_speed,
3578 &adapter->link_duplex);
3579 e1000_print_link_info(adapter);
f4187b56
BA		 3580 /*
3581 * On supported PHYs, check for duplex mismatch only
3582 * if link has autonegotiated at 10/100 half
3583 */
3584 if ((hw->phy.type == e1000_phy_igp_3 ||
3585 hw->phy.type == e1000_phy_bm) &&
3586 (hw->mac.autoneg == true) &&
3587 (adapter->link_speed == SPEED_10 ||
3588 adapter->link_speed == SPEED_100) &&
3589 (adapter->link_duplex == HALF_DUPLEX)) {
3590 u16 autoneg_exp;
3591
3592 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3593
3594 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3595 e_info("Autonegotiated half duplex but"
3596 " link partner cannot autoneg. "
3597 " Try forcing full duplex if "
3598 "link gets many collisions.\n");
3599 }
3600
ad68076e
BA		 3601 /*
3602 * tweak tx_queue_len according to speed/duplex
3603 * and adjust the timeout factor
3604 */
bc7f75fa
AK		 3605 netdev->tx_queue_len = adapter->tx_queue_len;
3606 adapter->tx_timeout_factor = 1;
3607 switch (adapter->link_speed) {
3608 case SPEED_10:
3609 txb2b = 0;
3610 netdev->tx_queue_len = 10;
10f1b492 3611 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3612 break;
3613 case SPEED_100:
3614 txb2b = 0;
3615 netdev->tx_queue_len = 100;
4c86e0b9 3616 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 3617 break;
3618 }
3619
ad68076e
BA		 3620 /*
3621 * workaround: re-program speed mode bit after
3622 * link-up event
3623 */
bc7f75fa
AK		 3624 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3625 !txb2b) {
3626 u32 tarc0;
e9ec2c0f 3627 tarc0 = er32(TARC(0));
bc7f75fa 3628 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3629 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3630 }
3631
ad68076e
BA		 3632 /*
3633 * disable TSO for pcie and 10/100 speeds, to avoid
3634 * some hardware issues
3635 */
bc7f75fa
AK		 3636 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3637 switch (adapter->link_speed) {
3638 case SPEED_10:
3639 case SPEED_100:
44defeb3 3640 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3641 netdev->features &= ~NETIF_F_TSO;
3642 netdev->features &= ~NETIF_F_TSO6;
3643 break;
3644 case SPEED_1000:
3645 netdev->features |= NETIF_F_TSO;
3646 netdev->features |= NETIF_F_TSO6;
3647 break;
3648 default:
3649 /* oops */
3650 break;
3651 }
3652 }
3653
ad68076e
BA		 3654 /*
3655 * enable transmits in the hardware, need to do this
3656 * after setting TARC(0)
3657 */
bc7f75fa
AK		 3658 tctl = er32(TCTL);
3659 tctl |= E1000_TCTL_EN;
3660 ew32(TCTL, tctl);
3661
75eb0fad
BA		 3662 /*
3663 * Perform any post-link-up configuration before
3664 * reporting link up.
3665 */
3666 if (phy->ops.cfg_on_link_up)
3667 phy->ops.cfg_on_link_up(hw);
3668
bc7f75fa 3669 netif_carrier_on(netdev);
bc7f75fa
AK		 3670
3671 if (!test_bit(__E1000_DOWN, &adapter->state))
3672 mod_timer(&adapter->phy_info_timer,
3673 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3674 }
3675 } else {
3676 if (netif_carrier_ok(netdev)) {
3677 adapter->link_speed = 0;
3678 adapter->link_duplex = 0;
8f12fe86
BA		 3679 /* Link status message must follow this format */
3680 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3681 adapter->netdev->name);
bc7f75fa 3682 netif_carrier_off(netdev);
bc7f75fa
AK		 3683 if (!test_bit(__E1000_DOWN, &adapter->state))
3684 mod_timer(&adapter->phy_info_timer,
3685 round_jiffies(jiffies + 2 * HZ));
3686
3687 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3688 schedule_work(&adapter->reset_task);
3689 }
3690 }
3691
3692link_up:
3693 e1000e_update_stats(adapter);
3694
3695 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3696 adapter->tpt_old = adapter->stats.tpt;
3697 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3698 adapter->colc_old = adapter->stats.colc;
3699
7c25769f
BA		 3700 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3701 adapter->gorc_old = adapter->stats.gorc;
3702 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3703 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3704
3705 e1000e_update_adaptive(&adapter->hw);
3706
3707 if (!netif_carrier_ok(netdev)) {
3708 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3709 tx_ring->count);
3710 if (tx_pending) {
ad68076e
BA		 3711 /*
3712 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3713 * but we've got queued Tx work that's never going
3714 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3715 * (Do the reset outside of interrupt context).
3716 */
bc7f75fa
AK		 3717 adapter->tx_timeout_count++;
3718 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 3719 /* return immediately since reset is imminent */
3720 return;
bc7f75fa
AK		 3721 }
3722 }
3723
ad68076e 3724 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3725 if (adapter->msix_entries)
3726 ew32(ICS, adapter->rx_ring->ims_val);
3727 else
3728 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3729
3730 /* Force detection of hung controller every watchdog period */
3731 adapter->detect_tx_hung = 1;
3732
ad68076e
BA		 3733 /*
3734 * With 82571 controllers, LAA may be overwritten due to controller
3735 * reset from the other port. Set the appropriate LAA in RAR[0]
3736 */
bc7f75fa
AK		 3737 if (e1000e_get_laa_state_82571(hw))
3738 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3739
3740 /* Reset the timer */
3741 if (!test_bit(__E1000_DOWN, &adapter->state))
3742 mod_timer(&adapter->watchdog_timer,
3743 round_jiffies(jiffies + 2 * HZ));
3744}
3745
3746#define E1000_TX_FLAGS_CSUM 0x00000001
3747#define E1000_TX_FLAGS_VLAN 0x00000002
3748#define E1000_TX_FLAGS_TSO 0x00000004
3749#define E1000_TX_FLAGS_IPV4 0x00000008
3750#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3751#define E1000_TX_FLAGS_VLAN_SHIFT 16
3752
3753static int e1000_tso(struct e1000_adapter *adapter,
3754 struct sk_buff *skb)
3755{
3756 struct e1000_ring *tx_ring = adapter->tx_ring;
3757 struct e1000_context_desc *context_desc;
3758 struct e1000_buffer *buffer_info;
3759 unsigned int i;
3760 u32 cmd_length = 0;
3761 u16 ipcse = 0, tucse, mss;
3762 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3763 int err;
3764
3d5e33c9
BA		 3765 if (!skb_is_gso(skb))
3766 return 0;
bc7f75fa 3767
3d5e33c9
BA		 3768 if (skb_header_cloned(skb)) {
3769 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3770 if (err)
3771 return err;
bc7f75fa
AK		 3772 }
3773
3d5e33c9
BA		 3774 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3775 mss = skb_shinfo(skb)->gso_size;
3776 if (skb->protocol == htons(ETH_P_IP)) {
3777 struct iphdr *iph = ip_hdr(skb);
3778 iph->tot_len = 0;
3779 iph->check = 0;
3780 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
3781 0, IPPROTO_TCP, 0);
3782 cmd_length = E1000_TXD_CMD_IP;
3783 ipcse = skb_transport_offset(skb) - 1;
3784 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3785 ipv6_hdr(skb)->payload_len = 0;
3786 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3787 &ipv6_hdr(skb)->daddr,
3788 0, IPPROTO_TCP, 0);
3789 ipcse = 0;
3790 }
3791 ipcss = skb_network_offset(skb);
3792 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3793 tucss = skb_transport_offset(skb);
3794 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3795 tucse = 0;
3796
3797 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3798 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3799
3800 i = tx_ring->next_to_use;
3801 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3802 buffer_info = &tx_ring->buffer_info[i];
3803
3804 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3805 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3806 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3807 context_desc->upper_setup.tcp_fields.tucss = tucss;
3808 context_desc->upper_setup.tcp_fields.tucso = tucso;
3809 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3810 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3811 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3812 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3813
3814 buffer_info->time_stamp = jiffies;
3815 buffer_info->next_to_watch = i;
3816
3817 i++;
3818 if (i == tx_ring->count)
3819 i = 0;
3820 tx_ring->next_to_use = i;
3821
3822 return 1;
bc7f75fa
AK		 3823}
3824
3825static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3826{
3827 struct e1000_ring *tx_ring = adapter->tx_ring;
3828 struct e1000_context_desc *context_desc;
3829 struct e1000_buffer *buffer_info;
3830 unsigned int i;
3831 u8 css;
af807c82 3832 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3833 __be16 protocol;
bc7f75fa 3834
af807c82
DG		 3835 if (skb->ip_summed != CHECKSUM_PARTIAL)
3836 return 0;
bc7f75fa 3837
5f66f208
AJ		 3838 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3839 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3840 else
3841 protocol = skb->protocol;
3842
3f518390 3843 switch (protocol) {
09640e63 3844 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3845 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3846 cmd_len |= E1000_TXD_CMD_TCP;
3847 break;
09640e63 3848 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3849 /* XXX not handling all IPV6 headers */
3850 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3851 cmd_len |= E1000_TXD_CMD_TCP;
3852 break;
3853 default:
3854 if (unlikely(net_ratelimit()))
5f66f208
AJ		 3855 e_warn("checksum_partial proto=%x!\n",
3856 be16_to_cpu(protocol));
af807c82 3857 break;
bc7f75fa
AK		 3858 }
3859
af807c82
DG		 3860 css = skb_transport_offset(skb);
3861
3862 i = tx_ring->next_to_use;
3863 buffer_info = &tx_ring->buffer_info[i];
3864 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3865
3866 context_desc->lower_setup.ip_config = 0;
3867 context_desc->upper_setup.tcp_fields.tucss = css;
3868 context_desc->upper_setup.tcp_fields.tucso =
3869 css + skb->csum_offset;
3870 context_desc->upper_setup.tcp_fields.tucse = 0;
3871 context_desc->tcp_seg_setup.data = 0;
3872 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3873
3874 buffer_info->time_stamp = jiffies;
3875 buffer_info->next_to_watch = i;
3876
3877 i++;
3878 if (i == tx_ring->count)
3879 i = 0;
3880 tx_ring->next_to_use = i;
3881
3882 return 1;
bc7f75fa
AK		 3883}
3884
3885#define E1000_MAX_PER_TXD 8192
3886#define E1000_MAX_TXD_PWR 12
3887
3888static int e1000_tx_map(struct e1000_adapter *adapter,
3889 struct sk_buff *skb, unsigned int first,
3890 unsigned int max_per_txd, unsigned int nr_frags,
3891 unsigned int mss)
3892{
3893 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 3894 struct pci_dev *pdev = adapter->pdev;
1b7719c4 3895 struct e1000_buffer *buffer_info;
8ddc951c 3896 unsigned int len = skb_headlen(skb);
03b1320d 3897 unsigned int offset = 0, size, count = 0, i;
bc7f75fa
AK		 3898 unsigned int f;
3899
3900 i = tx_ring->next_to_use;
3901
3902 while (len) {
1b7719c4 3903 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3904 size = min(len, max_per_txd);
3905
bc7f75fa 3906 buffer_info->length = size;
bc7f75fa 3907 buffer_info->time_stamp = jiffies;
bc7f75fa 3908 buffer_info->next_to_watch = i;
03b1320d
AD		 3909 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
3910 size, PCI_DMA_TODEVICE);
3911 buffer_info->mapped_as_page = false;
3912 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3913 goto dma_error;
bc7f75fa
AK		 3914
3915 len -= size;
3916 offset += size;
03b1320d 3917 count++;
1b7719c4
AD		 3918
3919 if (len) {
3920 i++;
3921 if (i == tx_ring->count)
3922 i = 0;
3923 }
bc7f75fa
AK		 3924 }
3925
3926 for (f = 0; f < nr_frags; f++) {
3927 struct skb_frag_struct *frag;
3928
3929 frag = &skb_shinfo(skb)->frags[f];
3930 len = frag->size;
03b1320d 3931 offset = frag->page_offset;
bc7f75fa
AK		 3932
3933 while (len) {
1b7719c4
AD		 3934 i++;
3935 if (i == tx_ring->count)
3936 i = 0;
3937
bc7f75fa
AK		 3938 buffer_info = &tx_ring->buffer_info[i];
3939 size = min(len, max_per_txd);
bc7f75fa
AK		 3940
3941 buffer_info->length = size;
3942 buffer_info->time_stamp = jiffies;
bc7f75fa 3943 buffer_info->next_to_watch = i;
03b1320d
AD		 3944 buffer_info->dma = pci_map_page(pdev, frag->page,
3945 offset, size,
3946 PCI_DMA_TODEVICE);
3947 buffer_info->mapped_as_page = true;
3948 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3949 goto dma_error;
bc7f75fa
AK		 3950
3951 len -= size;
3952 offset += size;
3953 count++;
bc7f75fa
AK		 3954 }
3955 }
3956
bc7f75fa
AK		 3957 tx_ring->buffer_info[i].skb = skb;
3958 tx_ring->buffer_info[first].next_to_watch = i;
3959
3960 return count;
03b1320d
AD		 3961
3962dma_error:
3963 dev_err(&pdev->dev, "TX DMA map failed\n");
3964 buffer_info->dma = 0;
3965 count--;
3966
3967 while (count >= 0) {
3968 count--;
3969 i--;
3970 if (i < 0)
3971 i += tx_ring->count;
3972 buffer_info = &tx_ring->buffer_info[i];
3973 e1000_put_txbuf(adapter, buffer_info);;
3974 }
3975
3976 return 0;
bc7f75fa
AK		 3977}
3978
3979static void e1000_tx_queue(struct e1000_adapter *adapter,
3980 int tx_flags, int count)
3981{
3982 struct e1000_ring *tx_ring = adapter->tx_ring;
3983 struct e1000_tx_desc *tx_desc = NULL;
3984 struct e1000_buffer *buffer_info;
3985 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3986 unsigned int i;
3987
3988 if (tx_flags & E1000_TX_FLAGS_TSO) {
3989 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3990 E1000_TXD_CMD_TSE;
3991 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3992
3993 if (tx_flags & E1000_TX_FLAGS_IPV4)
3994 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3995 }
3996
3997 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3998 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3999 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4000 }
4001
4002 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4003 txd_lower |= E1000_TXD_CMD_VLE;
4004 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4005 }
4006
4007 i = tx_ring->next_to_use;
4008
4009 while (count--) {
4010 buffer_info = &tx_ring->buffer_info[i];
4011 tx_desc = E1000_TX_DESC(*tx_ring, i);
4012 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4013 tx_desc->lower.data =
4014 cpu_to_le32(txd_lower | buffer_info->length);
4015 tx_desc->upper.data = cpu_to_le32(txd_upper);
4016
4017 i++;
4018 if (i == tx_ring->count)
4019 i = 0;
4020 }
4021
4022 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4023
ad68076e
BA		 4024 /*
4025 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4026 * know there are new descriptors to fetch. (Only
4027 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4028 * such as IA-64).
4029 */
bc7f75fa
AK		 4030 wmb();
4031
4032 tx_ring->next_to_use = i;
4033 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4034 /*
4035 * we need this if more than one processor can write to our tail
4036 * at a time, it synchronizes IO on IA64/Altix systems
4037 */
bc7f75fa
AK		 4038 mmiowb();
4039}
4040
4041#define MINIMUM_DHCP_PACKET_SIZE 282
4042static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4043 struct sk_buff *skb)
4044{
4045 struct e1000_hw *hw = &adapter->hw;
4046 u16 length, offset;
4047
4048 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4049 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4050 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4051 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4052 return 0;
4053 }
4054
4055 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4056 return 0;
4057
4058 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4059 return 0;
4060
4061 {
4062 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4063 struct udphdr *udp;
4064
4065 if (ip->protocol != IPPROTO_UDP)
4066 return 0;
4067
4068 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4069 if (ntohs(udp->dest) != 67)
4070 return 0;
4071
4072 offset = (u8 *)udp + 8 - skb->data;
4073 length = skb->len - offset;
4074 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4075 }
4076
4077 return 0;
4078}
4079
4080static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4081{
4082 struct e1000_adapter *adapter = netdev_priv(netdev);
4083
4084 netif_stop_queue(netdev);
ad68076e
BA		 4085 /*
4086 * Herbert's original patch had:
bc7f75fa 4087 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4088 * but since that doesn't exist yet, just open code it.
4089 */
bc7f75fa
AK		 4090 smp_mb();
4091
ad68076e
BA		 4092 /*
4093 * We need to check again in a case another CPU has just
4094 * made room available.
4095 */
bc7f75fa
AK		 4096 if (e1000_desc_unused(adapter->tx_ring) < size)
4097 return -EBUSY;
4098
4099 /* A reprieve! */
4100 netif_start_queue(netdev);
4101 ++adapter->restart_queue;
4102 return 0;
4103}
4104
4105static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4106{
4107 struct e1000_adapter *adapter = netdev_priv(netdev);
4108
4109 if (e1000_desc_unused(adapter->tx_ring) >= size)
4110 return 0;
4111 return __e1000_maybe_stop_tx(netdev, size);
4112}
4113
4114#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4115static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4116 struct net_device *netdev)
bc7f75fa
AK		 4117{
4118 struct e1000_adapter *adapter = netdev_priv(netdev);
4119 struct e1000_ring *tx_ring = adapter->tx_ring;
4120 unsigned int first;
4121 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4122 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4123 unsigned int tx_flags = 0;
4e6c709c 4124 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4125 unsigned int nr_frags;
4126 unsigned int mss;
bc7f75fa
AK		 4127 int count = 0;
4128 int tso;
4129 unsigned int f;
bc7f75fa
AK		 4130
4131 if (test_bit(__E1000_DOWN, &adapter->state)) {
4132 dev_kfree_skb_any(skb);
4133 return NETDEV_TX_OK;
4134 }
4135
4136 if (skb->len <= 0) {
4137 dev_kfree_skb_any(skb);
4138 return NETDEV_TX_OK;
4139 }
4140
4141 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4142 /*
4143 * The controller does a simple calculation to
bc7f75fa
AK		 4144 * make sure there is enough room in the FIFO before
4145 * initiating the DMA for each buffer. The calc is:
4146 * 4 = ceil(buffer len/mss). To make sure we don't
4147 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4148 * drops.
4149 */
bc7f75fa
AK		 4150 if (mss) {
4151 u8 hdr_len;
4152 max_per_txd = min(mss << 2, max_per_txd);
4153 max_txd_pwr = fls(max_per_txd) - 1;
4154
ad68076e
BA		 4155 /*
4156 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4157 * points to just header, pull a few bytes of payload from
4158 * frags into skb->data
4159 */
bc7f75fa 4160 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4161 /*
4162 * we do this workaround for ES2LAN, but it is un-necessary,
4163 * avoiding it could save a lot of cycles
4164 */
4e6c709c 4165 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4166 unsigned int pull_size;
4167
4168 pull_size = min((unsigned int)4, skb->data_len);
4169 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4170 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4171 dev_kfree_skb_any(skb);
4172 return NETDEV_TX_OK;
4173 }
4174 len = skb->len - skb->data_len;
4175 }
4176 }
4177
4178 /* reserve a descriptor for the offload context */
4179 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4180 count++;
4181 count++;
4182
4183 count += TXD_USE_COUNT(len, max_txd_pwr);
4184
4185 nr_frags = skb_shinfo(skb)->nr_frags;
4186 for (f = 0; f < nr_frags; f++)
4187 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4188 max_txd_pwr);
4189
4190 if (adapter->hw.mac.tx_pkt_filtering)
4191 e1000_transfer_dhcp_info(adapter, skb);
4192
ad68076e
BA		 4193 /*
4194 * need: count + 2 desc gap to keep tail from touching
4195 * head, otherwise try next time
4196 */
92af3e95 4197 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4198 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4199
4200 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4201 tx_flags |= E1000_TX_FLAGS_VLAN;
4202 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4203 }
4204
4205 first = tx_ring->next_to_use;
4206
4207 tso = e1000_tso(adapter, skb);
4208 if (tso < 0) {
4209 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4210 return NETDEV_TX_OK;
4211 }
4212
4213 if (tso)
4214 tx_flags |= E1000_TX_FLAGS_TSO;
4215 else if (e1000_tx_csum(adapter, skb))
4216 tx_flags |= E1000_TX_FLAGS_CSUM;
4217
ad68076e
BA		 4218 /*
4219 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4220 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4221 * no longer assume, we must.
4222 */
bc7f75fa
AK		 4223 if (skb->protocol == htons(ETH_P_IP))
4224 tx_flags |= E1000_TX_FLAGS_IPV4;
4225
1b7719c4 4226 /* if count is 0 then mapping error has occured */
bc7f75fa 4227 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4228 if (count) {
4229 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4230 /* Make sure there is space in the ring for the next send. */
4231 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4232
4233 } else {
bc7f75fa 4234 dev_kfree_skb_any(skb);
1b7719c4
AD		 4235 tx_ring->buffer_info[first].time_stamp = 0;
4236 tx_ring->next_to_use = first;
bc7f75fa
AK		 4237 }
4238
bc7f75fa
AK		 4239 return NETDEV_TX_OK;
4240}
4241
4242/**
4243 * e1000_tx_timeout - Respond to a Tx Hang
4244 * @netdev: network interface device structure
4245 **/
4246static void e1000_tx_timeout(struct net_device *netdev)
4247{
4248 struct e1000_adapter *adapter = netdev_priv(netdev);
4249
4250 /* Do the reset outside of interrupt context */
4251 adapter->tx_timeout_count++;
4252 schedule_work(&adapter->reset_task);
4253}
4254
4255static void e1000_reset_task(struct work_struct *work)
4256{
4257 struct e1000_adapter *adapter;
4258 adapter = container_of(work, struct e1000_adapter, reset_task);
4259
4260 e1000e_reinit_locked(adapter);
4261}
4262
4263/**
4264 * e1000_get_stats - Get System Network Statistics
4265 * @netdev: network interface device structure
4266 *
4267 * Returns the address of the device statistics structure.
4268 * The statistics are actually updated from the timer callback.
4269 **/
4270static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4271{
bc7f75fa 4272 /* only return the current stats */
7274c20f 4273 return &netdev->stats;
bc7f75fa
AK		 4274}
4275
4276/**
4277 * e1000_change_mtu - Change the Maximum Transfer Unit
4278 * @netdev: network interface device structure
4279 * @new_mtu: new value for maximum frame size
4280 *
4281 * Returns 0 on success, negative on failure
4282 **/
4283static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4284{
4285 struct e1000_adapter *adapter = netdev_priv(netdev);
4286 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4287
2adc55c9
BA		 4288 /* Jumbo frame support */
4289 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4290 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4291 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4292 return -EINVAL;
4293 }
4294
2adc55c9
BA		 4295 /* Supported frame sizes */
4296 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4297 (max_frame > adapter->max_hw_frame_size)) {
4298 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4299 return -EINVAL;
4300 }
4301
4302 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4303 msleep(1);
610c9928 4304 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4305 adapter->max_frame_size = max_frame;
610c9928
BA		 4306 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4307 netdev->mtu = new_mtu;
bc7f75fa
AK		 4308 if (netif_running(netdev))
4309 e1000e_down(adapter);
4310
ad68076e
BA		 4311 /*
4312 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4313 * means we reserve 2 more, this pushes us to allocate from the next
4314 * larger slab size.
ad68076e 4315 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4316 * However with the new *_jumbo_rx* routines, jumbo receives will use
4317 * fragmented skbs
ad68076e 4318 */
bc7f75fa
AK		 4319
4320 if (max_frame <= 256)
4321 adapter->rx_buffer_len = 256;
4322 else if (max_frame <= 512)
4323 adapter->rx_buffer_len = 512;
4324 else if (max_frame <= 1024)
4325 adapter->rx_buffer_len = 1024;
4326 else if (max_frame <= 2048)
4327 adapter->rx_buffer_len = 2048;
4328 else
4329 adapter->rx_buffer_len = 4096;
4330
4331 /* adjust allocation if LPE protects us, and we aren't using SBP */
4332 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4333 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4334 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4335 + ETH_FCS_LEN;
bc7f75fa 4336
bc7f75fa
AK		 4337 if (netif_running(netdev))
4338 e1000e_up(adapter);
4339 else
4340 e1000e_reset(adapter);
4341
4342 clear_bit(__E1000_RESETTING, &adapter->state);
4343
4344 return 0;
4345}
4346
4347static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4348 int cmd)
4349{
4350 struct e1000_adapter *adapter = netdev_priv(netdev);
4351 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4352
318a94d6 4353 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4354 return -EOPNOTSUPP;
4355
4356 switch (cmd) {
4357 case SIOCGMIIPHY:
4358 data->phy_id = adapter->hw.phy.addr;
4359 break;
4360 case SIOCGMIIREG:
b16a002e
BA		 4361 e1000_phy_read_status(adapter);
4362
7c25769f
BA		 4363 switch (data->reg_num & 0x1F) {
4364 case MII_BMCR:
4365 data->val_out = adapter->phy_regs.bmcr;
4366 break;
4367 case MII_BMSR:
4368 data->val_out = adapter->phy_regs.bmsr;
4369 break;
4370 case MII_PHYSID1:
4371 data->val_out = (adapter->hw.phy.id >> 16);
4372 break;
4373 case MII_PHYSID2:
4374 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4375 break;
4376 case MII_ADVERTISE:
4377 data->val_out = adapter->phy_regs.advertise;
4378 break;
4379 case MII_LPA:
4380 data->val_out = adapter->phy_regs.lpa;
4381 break;
4382 case MII_EXPANSION:
4383 data->val_out = adapter->phy_regs.expansion;
4384 break;
4385 case MII_CTRL1000:
4386 data->val_out = adapter->phy_regs.ctrl1000;
4387 break;
4388 case MII_STAT1000:
4389 data->val_out = adapter->phy_regs.stat1000;
4390 break;
4391 case MII_ESTATUS:
4392 data->val_out = adapter->phy_regs.estatus;
4393 break;
4394 default:
bc7f75fa
AK		 4395 return -EIO;
4396 }
bc7f75fa
AK		 4397 break;
4398 case SIOCSMIIREG:
4399 default:
4400 return -EOPNOTSUPP;
4401 }
4402 return 0;
4403}
4404
4405static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4406{
4407 switch (cmd) {
4408 case SIOCGMIIPHY:
4409 case SIOCGMIIREG:
4410 case SIOCSMIIREG:
4411 return e1000_mii_ioctl(netdev, ifr, cmd);
4412 default:
4413 return -EOPNOTSUPP;
4414 }
4415}
4416
a4f58f54
BA		 4417static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4418{
4419 struct e1000_hw *hw = &adapter->hw;
4420 u32 i, mac_reg;
4421 u16 phy_reg;
4422 int retval = 0;
4423
4424 /* copy MAC RARs to PHY RARs */
4425 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4426 mac_reg = er32(RAL(i));
4427 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4428 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4429 mac_reg = er32(RAH(i));
4430 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4431 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4432 }
4433
4434 /* copy MAC MTA to PHY MTA */
4435 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4436 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4437 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4438 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4439 }
4440
4441 /* configure PHY Rx Control register */
4442 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4443 mac_reg = er32(RCTL);
4444 if (mac_reg & E1000_RCTL_UPE)
4445 phy_reg |= BM_RCTL_UPE;
4446 if (mac_reg & E1000_RCTL_MPE)
4447 phy_reg |= BM_RCTL_MPE;
4448 phy_reg &= ~(BM_RCTL_MO_MASK);
4449 if (mac_reg & E1000_RCTL_MO_3)
4450 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4451 << BM_RCTL_MO_SHIFT);
4452 if (mac_reg & E1000_RCTL_BAM)
4453 phy_reg |= BM_RCTL_BAM;
4454 if (mac_reg & E1000_RCTL_PMCF)
4455 phy_reg |= BM_RCTL_PMCF;
4456 mac_reg = er32(CTRL);
4457 if (mac_reg & E1000_CTRL_RFCE)
4458 phy_reg |= BM_RCTL_RFCE;
4459 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4460
4461 /* enable PHY wakeup in MAC register */
4462 ew32(WUFC, wufc);
4463 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4464
4465 /* configure and enable PHY wakeup in PHY registers */
4466 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4467 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4468
4469 /* activate PHY wakeup */
94d8186a 4470 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4471 if (retval) {
4472 e_err("Could not acquire PHY\n");
4473 return retval;
4474 }
4475 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4476 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4477 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4478 if (retval) {
4479 e_err("Could not read PHY page 769\n");
4480 goto out;
4481 }
4482 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4483 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4484 if (retval)
4485 e_err("Could not set PHY Host Wakeup bit\n");
4486out:
94d8186a 4487 hw->phy.ops.release(hw);
a4f58f54
BA		 4488
4489 return retval;
4490}
4491
4f9de721 4492static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
bc7f75fa
AK		 4493{
4494 struct net_device *netdev = pci_get_drvdata(pdev);
4495 struct e1000_adapter *adapter = netdev_priv(netdev);
4496 struct e1000_hw *hw = &adapter->hw;
4497 u32 ctrl, ctrl_ext, rctl, status;
4498 u32 wufc = adapter->wol;
4499 int retval = 0;
4500
4501 netif_device_detach(netdev);
4502
4503 if (netif_running(netdev)) {
4504 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4505 e1000e_down(adapter);
4506 e1000_free_irq(adapter);
4507 }
4662e82b 4508 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4509
4510 retval = pci_save_state(pdev);
4511 if (retval)
4512 return retval;
4513
4514 status = er32(STATUS);
4515 if (status & E1000_STATUS_LU)
4516 wufc &= ~E1000_WUFC_LNKC;
4517
4518 if (wufc) {
4519 e1000_setup_rctl(adapter);
4520 e1000_set_multi(netdev);
4521
4522 /* turn on all-multi mode if wake on multicast is enabled */
4523 if (wufc & E1000_WUFC_MC) {
4524 rctl = er32(RCTL);
4525 rctl |= E1000_RCTL_MPE;
4526 ew32(RCTL, rctl);
4527 }
4528
4529 ctrl = er32(CTRL);
4530 /* advertise wake from D3Cold */
4531 #define E1000_CTRL_ADVD3WUC 0x00100000
4532 /* phy power management enable */
4533 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4534 ctrl |= E1000_CTRL_ADVD3WUC;
4535 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4536 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4537 ew32(CTRL, ctrl);
4538
318a94d6
JK		 4539 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4540 adapter->hw.phy.media_type ==
4541 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4542 /* keep the laser running in D3 */
4543 ctrl_ext = er32(CTRL_EXT);
93a23f48 4544 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 4545 ew32(CTRL_EXT, ctrl_ext);
4546 }
4547
97ac8cae
BA		 4548 if (adapter->flags & FLAG_IS_ICH)
4549 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4550
bc7f75fa
AK		 4551 /* Allow time for pending master requests to run */
4552 e1000e_disable_pcie_master(&adapter->hw);
4553
82776a4b 4554 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4555 /* enable wakeup by the PHY */
4556 retval = e1000_init_phy_wakeup(adapter, wufc);
4557 if (retval)
4558 return retval;
4559 } else {
4560 /* enable wakeup by the MAC */
4561 ew32(WUFC, wufc);
4562 ew32(WUC, E1000_WUC_PME_EN);
4563 }
bc7f75fa
AK		 4564 } else {
4565 ew32(WUC, 0);
4566 ew32(WUFC, 0);
bc7f75fa
AK		 4567 }
4568
4f9de721
RW		 4569 *enable_wake = !!wufc;
4570
bc7f75fa 4571 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4572 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4573 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4574 *enable_wake = true;
bc7f75fa
AK		 4575
4576 if (adapter->hw.phy.type == e1000_phy_igp_3)
4577 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4578
ad68076e
BA		 4579 /*
4580 * Release control of h/w to f/w. If f/w is AMT enabled, this
4581 * would have already happened in close and is redundant.
4582 */
bc7f75fa
AK		 4583 e1000_release_hw_control(adapter);
4584
4585 pci_disable_device(pdev);
4586
4f9de721
RW		 4587 return 0;
4588}
4589
4590static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4591{
4592 if (sleep && wake) {
4593 pci_prepare_to_sleep(pdev);
4594 return;
4595 }
4596
4597 pci_wake_from_d3(pdev, wake);
4598 pci_set_power_state(pdev, PCI_D3hot);
4599}
4600
4601static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4602 bool wake)
4603{
4604 struct net_device *netdev = pci_get_drvdata(pdev);
4605 struct e1000_adapter *adapter = netdev_priv(netdev);
4606
005cbdfc
AD		 4607 /*
4608 * The pci-e switch on some quad port adapters will report a
4609 * correctable error when the MAC transitions from D0 to D3. To
4610 * prevent this we need to mask off the correctable errors on the
4611 * downstream port of the pci-e switch.
4612 */
4613 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4614 struct pci_dev *us_dev = pdev->bus->self;
4615 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4616 u16 devctl;
4617
4618 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4619 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4620 (devctl & ~PCI_EXP_DEVCTL_CERE));
4621
4f9de721 4622 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4623
4624 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4625 } else {
4f9de721 4626 e1000_power_off(pdev, sleep, wake);
005cbdfc 4627 }
bc7f75fa
AK		 4628}
4629
1eae4eb2
AK		 4630static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4631{
4632 int pos;
1eae4eb2
AK		 4633 u16 val;
4634
4635 /*
4636 * 82573 workaround - disable L1 ASPM on mobile chipsets
4637 *
4638 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4639 * resulting in lost data or garbage information on the pci-e link
4640 * level. This could result in (false) bad EEPROM checksum errors,
4641 * long ping times (up to 2s) or even a system freeze/hang.
4642 *
4643 * Unfortunately this feature saves about 1W power consumption when
4644 * active.
4645 */
4646 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4647 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4648 if (val & 0x2) {
4649 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4650 val &= ~0x2;
4651 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4652 }
4653}
4654
bc7f75fa 4655#ifdef CONFIG_PM
4f9de721
RW		 4656static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4657{
4658 int retval;
4659 bool wake;
4660
4661 retval = __e1000_shutdown(pdev, &wake);
4662 if (!retval)
4663 e1000_complete_shutdown(pdev, true, wake);
4664
4665 return retval;
4666}
4667
bc7f75fa
AK		 4668static int e1000_resume(struct pci_dev *pdev)
4669{
4670 struct net_device *netdev = pci_get_drvdata(pdev);
4671 struct e1000_adapter *adapter = netdev_priv(netdev);
4672 struct e1000_hw *hw = &adapter->hw;
4673 u32 err;
4674
4675 pci_set_power_state(pdev, PCI_D0);
4676 pci_restore_state(pdev);
1eae4eb2 4677 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4678
f0f422e5 4679 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4680 if (err) {
4681 dev_err(&pdev->dev,
4682 "Cannot enable PCI device from suspend\n");
4683 return err;
4684 }
4685
4686 pci_set_master(pdev);
4687
4688 pci_enable_wake(pdev, PCI_D3hot, 0);
4689 pci_enable_wake(pdev, PCI_D3cold, 0);
4690
4662e82b 4691 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4692 if (netif_running(netdev)) {
4693 err = e1000_request_irq(adapter);
4694 if (err)
4695 return err;
4696 }
4697
4698 e1000e_power_up_phy(adapter);
a4f58f54
BA		 4699
4700 /* report the system wakeup cause from S3/S4 */
4701 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4702 u16 phy_data;
4703
4704 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4705 if (phy_data) {
4706 e_info("PHY Wakeup cause - %s\n",
4707 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4708 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4709 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4710 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4711 phy_data & E1000_WUS_LNKC ? "Link Status "
4712 " Change" : "other");
4713 }
4714 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4715 } else {
4716 u32 wus = er32(WUS);
4717 if (wus) {
4718 e_info("MAC Wakeup cause - %s\n",
4719 wus & E1000_WUS_EX ? "Unicast Packet" :
4720 wus & E1000_WUS_MC ? "Multicast Packet" :
4721 wus & E1000_WUS_BC ? "Broadcast Packet" :
4722 wus & E1000_WUS_MAG ? "Magic Packet" :
4723 wus & E1000_WUS_LNKC ? "Link Status Change" :
4724 "other");
4725 }
4726 ew32(WUS, ~0);
4727 }
4728
bc7f75fa 4729 e1000e_reset(adapter);
bc7f75fa
AK		 4730
4731 e1000_init_manageability(adapter);
4732
4733 if (netif_running(netdev))
4734 e1000e_up(adapter);
4735
4736 netif_device_attach(netdev);
4737
ad68076e
BA		 4738 /*
4739 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4740 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4741 * under the control of the driver.
4742 */
c43bc57e 4743 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4744 e1000_get_hw_control(adapter);
4745
4746 return 0;
4747}
4748#endif
4749
4750static void e1000_shutdown(struct pci_dev *pdev)
4751{
4f9de721
RW		 4752 bool wake = false;
4753
4754 __e1000_shutdown(pdev, &wake);
4755
4756 if (system_state == SYSTEM_POWER_OFF)
4757 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 4758}
4759
4760#ifdef CONFIG_NET_POLL_CONTROLLER
4761/*
4762 * Polling 'interrupt' - used by things like netconsole to send skbs
4763 * without having to re-enable interrupts. It's not called while
4764 * the interrupt routine is executing.
4765 */
4766static void e1000_netpoll(struct net_device *netdev)
4767{
4768 struct e1000_adapter *adapter = netdev_priv(netdev);
4769
4770 disable_irq(adapter->pdev->irq);
4771 e1000_intr(adapter->pdev->irq, netdev);
4772
bc7f75fa
AK		 4773 enable_irq(adapter->pdev->irq);
4774}
4775#endif
4776
4777/**
4778 * e1000_io_error_detected - called when PCI error is detected
4779 * @pdev: Pointer to PCI device
4780 * @state: The current pci connection state
4781 *
4782 * This function is called after a PCI bus error affecting
4783 * this device has been detected.
4784 */
4785static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4786 pci_channel_state_t state)
4787{
4788 struct net_device *netdev = pci_get_drvdata(pdev);
4789 struct e1000_adapter *adapter = netdev_priv(netdev);
4790
4791 netif_device_detach(netdev);
4792
c93b5a76
MM		 4793 if (state == pci_channel_io_perm_failure)
4794 return PCI_ERS_RESULT_DISCONNECT;
4795
bc7f75fa
AK		 4796 if (netif_running(netdev))
4797 e1000e_down(adapter);
4798 pci_disable_device(pdev);
4799
4800 /* Request a slot slot reset. */
4801 return PCI_ERS_RESULT_NEED_RESET;
4802}
4803
4804/**
4805 * e1000_io_slot_reset - called after the pci bus has been reset.
4806 * @pdev: Pointer to PCI device
4807 *
4808 * Restart the card from scratch, as if from a cold-boot. Implementation
4809 * resembles the first-half of the e1000_resume routine.
4810 */
4811static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4812{
4813 struct net_device *netdev = pci_get_drvdata(pdev);
4814 struct e1000_adapter *adapter = netdev_priv(netdev);
4815 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4816 int err;
111b9dc5 4817 pci_ers_result_t result;
bc7f75fa 4818
1eae4eb2 4819 e1000e_disable_l1aspm(pdev);
f0f422e5 4820 err = pci_enable_device_mem(pdev);
6e4f6f6b 4821 if (err) {
bc7f75fa
AK		 4822 dev_err(&pdev->dev,
4823 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4824 result = PCI_ERS_RESULT_DISCONNECT;
4825 } else {
4826 pci_set_master(pdev);
4827 pci_restore_state(pdev);
bc7f75fa 4828
111b9dc5
JB		 4829 pci_enable_wake(pdev, PCI_D3hot, 0);
4830 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4831
111b9dc5
JB		 4832 e1000e_reset(adapter);
4833 ew32(WUS, ~0);
4834 result = PCI_ERS_RESULT_RECOVERED;
4835 }
bc7f75fa 4836
111b9dc5
JB		 4837 pci_cleanup_aer_uncorrect_error_status(pdev);
4838
4839 return result;
bc7f75fa
AK		 4840}
4841
4842/**
4843 * e1000_io_resume - called when traffic can start flowing again.
4844 * @pdev: Pointer to PCI device
4845 *
4846 * This callback is called when the error recovery driver tells us that
4847 * its OK to resume normal operation. Implementation resembles the
4848 * second-half of the e1000_resume routine.
4849 */
4850static void e1000_io_resume(struct pci_dev *pdev)
4851{
4852 struct net_device *netdev = pci_get_drvdata(pdev);
4853 struct e1000_adapter *adapter = netdev_priv(netdev);
4854
4855 e1000_init_manageability(adapter);
4856
4857 if (netif_running(netdev)) {
4858 if (e1000e_up(adapter)) {
4859 dev_err(&pdev->dev,
4860 "can't bring device back up after reset\n");
4861 return;
4862 }
4863 }
4864
4865 netif_device_attach(netdev);
4866
ad68076e
BA		 4867 /*
4868 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4869 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4870 * under the control of the driver.
4871 */
c43bc57e 4872 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4873 e1000_get_hw_control(adapter);
4874
4875}
4876
4877static void e1000_print_device_info(struct e1000_adapter *adapter)
4878{
4879 struct e1000_hw *hw = &adapter->hw;
4880 struct net_device *netdev = adapter->netdev;
69e3fd8c 4881 u32 pba_num;
bc7f75fa
AK		 4882
4883 /* print bus type/speed/width info */
7c510e4b 4884 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4885 /* bus width */
4886 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4887 "Width x1"),
4888 /* MAC address */
7c510e4b 4889 netdev->dev_addr);
44defeb3
JK		 4890 e_info("Intel(R) PRO/%s Network Connection\n",
4891 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4892 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4893 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4894 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4895}
4896
10aa4c04
AK		 4897static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4898{
4899 struct e1000_hw *hw = &adapter->hw;
4900 int ret_val;
4901 u16 buf = 0;
4902
4903 if (hw->mac.type != e1000_82573)
4904 return;
4905
4906 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4907 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4908 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4909 dev_warn(&adapter->pdev->dev,
4910 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4911 }
4912
4913 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4914 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4915 /* ASPM enable */
6c2a9efa
FP		 4916 dev_warn(&adapter->pdev->dev,
4917 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4918 }
4919}
4920
651c2466
SH		 4921static const struct net_device_ops e1000e_netdev_ops = {
4922 .ndo_open = e1000_open,
4923 .ndo_stop = e1000_close,
00829823 4924 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4925 .ndo_get_stats = e1000_get_stats,
4926 .ndo_set_multicast_list = e1000_set_multi,
4927 .ndo_set_mac_address = e1000_set_mac,
4928 .ndo_change_mtu = e1000_change_mtu,
4929 .ndo_do_ioctl = e1000_ioctl,
4930 .ndo_tx_timeout = e1000_tx_timeout,
4931 .ndo_validate_addr = eth_validate_addr,
4932
4933 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4934 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4935 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4936#ifdef CONFIG_NET_POLL_CONTROLLER
4937 .ndo_poll_controller = e1000_netpoll,
4938#endif
4939};
4940
bc7f75fa
AK		 4941/**
4942 * e1000_probe - Device Initialization Routine
4943 * @pdev: PCI device information struct
4944 * @ent: entry in e1000_pci_tbl
4945 *
4946 * Returns 0 on success, negative on failure
4947 *
4948 * e1000_probe initializes an adapter identified by a pci_dev structure.
4949 * The OS initialization, configuring of the adapter private structure,
4950 * and a hardware reset occur.
4951 **/
4952static int __devinit e1000_probe(struct pci_dev *pdev,
4953 const struct pci_device_id *ent)
4954{
4955 struct net_device *netdev;
4956 struct e1000_adapter *adapter;
4957 struct e1000_hw *hw;
4958 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4959 resource_size_t mmio_start, mmio_len;
4960 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4961
4962 static int cards_found;
4963 int i, err, pci_using_dac;
4964 u16 eeprom_data = 0;
4965 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4966
1eae4eb2 4967 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4968
f0f422e5 4969 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4970 if (err)
4971 return err;
4972
4973 pci_using_dac = 0;
6a35528a 4974 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 4975 if (!err) {
6a35528a 4976 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK		 4977 if (!err)
4978 pci_using_dac = 1;
4979 } else {
284901a9 4980 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK		 4981 if (err) {
4982 err = pci_set_consistent_dma_mask(pdev,
284901a9 4983 DMA_BIT_MASK(32));
bc7f75fa
AK		 4984 if (err) {
4985 dev_err(&pdev->dev, "No usable DMA "
4986 "configuration, aborting\n");
4987 goto err_dma;
4988 }
4989 }
4990 }
4991
e8de1481 4992 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 4993 pci_select_bars(pdev, IORESOURCE_MEM),
4994 e1000e_driver_name);
bc7f75fa
AK		 4995 if (err)
4996 goto err_pci_reg;
4997
68eac460 4998 /* AER (Advanced Error Reporting) hooks */
19d5afd4 4999 pci_enable_pcie_error_reporting(pdev);
68eac460 5000
bc7f75fa 5001 pci_set_master(pdev);
438b365a
BA		 5002 /* PCI config space info */
5003 err = pci_save_state(pdev);
5004 if (err)
5005 goto err_alloc_etherdev;
bc7f75fa
AK		 5006
5007 err = -ENOMEM;
5008 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5009 if (!netdev)
5010 goto err_alloc_etherdev;
5011
bc7f75fa
AK		 5012 SET_NETDEV_DEV(netdev, &pdev->dev);
5013
5014 pci_set_drvdata(pdev, netdev);
5015 adapter = netdev_priv(netdev);
5016 hw = &adapter->hw;
5017 adapter->netdev = netdev;
5018 adapter->pdev = pdev;
5019 adapter->ei = ei;
5020 adapter->pba = ei->pba;
5021 adapter->flags = ei->flags;
eb7c3adb 5022 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5023 adapter->hw.adapter = adapter;
5024 adapter->hw.mac.type = ei->mac;
2adc55c9 5025 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5026 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5027
5028 mmio_start = pci_resource_start(pdev, 0);
5029 mmio_len = pci_resource_len(pdev, 0);
5030
5031 err = -EIO;
5032 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5033 if (!adapter->hw.hw_addr)
5034 goto err_ioremap;
5035
5036 if ((adapter->flags & FLAG_HAS_FLASH) &&
5037 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5038 flash_start = pci_resource_start(pdev, 1);
5039 flash_len = pci_resource_len(pdev, 1);
5040 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5041 if (!adapter->hw.flash_address)
5042 goto err_flashmap;
5043 }
5044
5045 /* construct the net_device struct */
651c2466 5046 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5047 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5048 netdev->watchdog_timeo = 5 * HZ;
5049 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5050 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5051
5052 netdev->mem_start = mmio_start;
5053 netdev->mem_end = mmio_start + mmio_len;
5054
5055 adapter->bd_number = cards_found++;
5056
4662e82b
BA		 5057 e1000e_check_options(adapter);
5058
bc7f75fa
AK		 5059 /* setup adapter struct */
5060 err = e1000_sw_init(adapter);
5061 if (err)
5062 goto err_sw_init;
5063
5064 err = -EIO;
5065
5066 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5067 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5068 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5069
69e3fd8c 5070 err = ei->get_variants(adapter);
bc7f75fa
AK		 5071 if (err)
5072 goto err_hw_init;
5073
4a770358
BA		 5074 if ((adapter->flags & FLAG_IS_ICH) &&
5075 (adapter->flags & FLAG_READ_ONLY_NVM))
5076 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5077
bc7f75fa
AK		 5078 hw->mac.ops.get_bus_info(&adapter->hw);
5079
318a94d6 5080 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5081
5082 /* Copper options */
318a94d6 5083 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5084 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5085 adapter->hw.phy.disable_polarity_correction = 0;
5086 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5087 }
5088
5089 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5090 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5091
5092 netdev->features = NETIF_F_SG |
5093 NETIF_F_HW_CSUM |
5094 NETIF_F_HW_VLAN_TX |
5095 NETIF_F_HW_VLAN_RX;
5096
5097 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5098 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5099
5100 netdev->features |= NETIF_F_TSO;
5101 netdev->features |= NETIF_F_TSO6;
5102
a5136e23
JK		 5103 netdev->vlan_features |= NETIF_F_TSO;
5104 netdev->vlan_features |= NETIF_F_TSO6;
5105 netdev->vlan_features |= NETIF_F_HW_CSUM;
5106 netdev->vlan_features |= NETIF_F_SG;
5107
bc7f75fa
AK		 5108 if (pci_using_dac)
5109 netdev->features |= NETIF_F_HIGHDMA;
5110
bc7f75fa
AK		 5111 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5112 adapter->flags |= FLAG_MNG_PT_ENABLED;
5113
ad68076e
BA		 5114 /*
5115 * before reading the NVM, reset the controller to
5116 * put the device in a known good starting state
5117 */
bc7f75fa
AK		 5118 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5119
5120 /*
5121 * systems with ASPM and others may see the checksum fail on the first
5122 * attempt. Let's give it a few tries
5123 */
5124 for (i = 0;; i++) {
5125 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5126 break;
5127 if (i == 2) {
44defeb3 5128 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5129 err = -EIO;
5130 goto err_eeprom;
5131 }
5132 }
5133
10aa4c04
AK		 5134 e1000_eeprom_checks(adapter);
5135
bc7f75fa
AK		 5136 /* copy the MAC address out of the NVM */
5137 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5138 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5139
5140 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5141 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5142
5143 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5144 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5145 err = -EIO;
5146 goto err_eeprom;
5147 }
5148
5149 init_timer(&adapter->watchdog_timer);
5150 adapter->watchdog_timer.function = &e1000_watchdog;
5151 adapter->watchdog_timer.data = (unsigned long) adapter;
5152
5153 init_timer(&adapter->phy_info_timer);
5154 adapter->phy_info_timer.function = &e1000_update_phy_info;
5155 adapter->phy_info_timer.data = (unsigned long) adapter;
5156
5157 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5158 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5159 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5160 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5161 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5162
bc7f75fa
AK		 5163 /* Initialize link parameters. User can change them with ethtool */
5164 adapter->hw.mac.autoneg = 1;
309af40b 5165 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5166 adapter->hw.fc.requested_mode = e1000_fc_default;
5167 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5168 adapter->hw.phy.autoneg_advertised = 0x2f;
5169
5170 /* ring size defaults */
5171 adapter->rx_ring->count = 256;
5172 adapter->tx_ring->count = 256;
5173
5174 /*
5175 * Initial Wake on LAN setting - If APM wake is enabled in
5176 * the EEPROM, enable the ACPI Magic Packet filter
5177 */
5178 if (adapter->flags & FLAG_APME_IN_WUC) {
5179 /* APME bit in EEPROM is mapped to WUC.APME */
5180 eeprom_data = er32(WUC);
5181 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5182 if (eeprom_data & E1000_WUC_PHY_WAKE)
5183 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5184 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5185 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5186 (adapter->hw.bus.func == 1))
5187 e1000_read_nvm(&adapter->hw,
5188 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5189 else
5190 e1000_read_nvm(&adapter->hw,
5191 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5192 }
5193
5194 /* fetch WoL from EEPROM */
5195 if (eeprom_data & eeprom_apme_mask)
5196 adapter->eeprom_wol |= E1000_WUFC_MAG;
5197
5198 /*
5199 * now that we have the eeprom settings, apply the special cases
5200 * where the eeprom may be wrong or the board simply won't support
5201 * wake on lan on a particular port
5202 */
5203 if (!(adapter->flags & FLAG_HAS_WOL))
5204 adapter->eeprom_wol = 0;
5205
5206 /* initialize the wol settings based on the eeprom settings */
5207 adapter->wol = adapter->eeprom_wol;
6ff68026 5208 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5209
84527590
BA		 5210 /* save off EEPROM version number */
5211 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5212
bc7f75fa
AK		 5213 /* reset the hardware with the new settings */
5214 e1000e_reset(adapter);
5215
ad68076e
BA		 5216 /*
5217 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5218 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5219 * under the control of the driver.
5220 */
c43bc57e 5221 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5222 e1000_get_hw_control(adapter);
5223
bc7f75fa
AK		 5224 strcpy(netdev->name, "eth%d");
5225 err = register_netdev(netdev);
5226 if (err)
5227 goto err_register;
5228
9c563d20
JB		 5229 /* carrier off reporting is important to ethtool even BEFORE open */
5230 netif_carrier_off(netdev);
5231
bc7f75fa
AK		 5232 e1000_print_device_info(adapter);
5233
5234 return 0;
5235
5236err_register:
c43bc57e
JB		 5237 if (!(adapter->flags & FLAG_HAS_AMT))
5238 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5239err_eeprom:
5240 if (!e1000_check_reset_block(&adapter->hw))
5241 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5242err_hw_init:
bc7f75fa 5243
bc7f75fa
AK		 5244 kfree(adapter->tx_ring);
5245 kfree(adapter->rx_ring);
5246err_sw_init:
c43bc57e
JB		 5247 if (adapter->hw.flash_address)
5248 iounmap(adapter->hw.flash_address);
e82f54ba 5249 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5250err_flashmap:
bc7f75fa
AK		 5251 iounmap(adapter->hw.hw_addr);
5252err_ioremap:
5253 free_netdev(netdev);
5254err_alloc_etherdev:
f0f422e5
BA		 5255 pci_release_selected_regions(pdev,
5256 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5257err_pci_reg:
5258err_dma:
5259 pci_disable_device(pdev);
5260 return err;
5261}
5262
5263/**
5264 * e1000_remove - Device Removal Routine
5265 * @pdev: PCI device information struct
5266 *
5267 * e1000_remove is called by the PCI subsystem to alert the driver
5268 * that it should release a PCI device. The could be caused by a
5269 * Hot-Plug event, or because the driver is going to be removed from
5270 * memory.
5271 **/
5272static void __devexit e1000_remove(struct pci_dev *pdev)
5273{
5274 struct net_device *netdev = pci_get_drvdata(pdev);
5275 struct e1000_adapter *adapter = netdev_priv(netdev);
5276
ad68076e
BA		 5277 /*
5278 * flush_scheduled work may reschedule our watchdog task, so
5279 * explicitly disable watchdog tasks from being rescheduled
5280 */
bc7f75fa
AK		 5281 set_bit(__E1000_DOWN, &adapter->state);
5282 del_timer_sync(&adapter->watchdog_timer);
5283 del_timer_sync(&adapter->phy_info_timer);
5284
41cec6f1
BA		 5285 cancel_work_sync(&adapter->reset_task);
5286 cancel_work_sync(&adapter->watchdog_task);
5287 cancel_work_sync(&adapter->downshift_task);
5288 cancel_work_sync(&adapter->update_phy_task);
5289 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5290 flush_scheduled_work();
5291
17f208de
BA		 5292 if (!(netdev->flags & IFF_UP))
5293 e1000_power_down_phy(adapter);
5294
5295 unregister_netdev(netdev);
5296
ad68076e
BA		 5297 /*
5298 * Release control of h/w to f/w. If f/w is AMT enabled, this
5299 * would have already happened in close and is redundant.
5300 */
bc7f75fa
AK		 5301 e1000_release_hw_control(adapter);
5302
4662e82b 5303 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5304 kfree(adapter->tx_ring);
5305 kfree(adapter->rx_ring);
5306
5307 iounmap(adapter->hw.hw_addr);
5308 if (adapter->hw.flash_address)
5309 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5310 pci_release_selected_regions(pdev,
5311 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5312
5313 free_netdev(netdev);
5314
111b9dc5 5315 /* AER disable */
19d5afd4 5316 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5317
bc7f75fa
AK		 5318 pci_disable_device(pdev);
5319}
5320
5321/* PCI Error Recovery (ERS) */
5322static struct pci_error_handlers e1000_err_handler = {
5323 .error_detected = e1000_io_error_detected,
5324 .slot_reset = e1000_io_slot_reset,
5325 .resume = e1000_io_resume,
5326};
5327
5328static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 5329 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5330 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5331 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5332 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5333 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5334 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5335 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5336 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5337 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5338
bc7f75fa
AK		 5339 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5340 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5341 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5342 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5343
bc7f75fa
AK		 5344 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5345 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5346 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5347
4662e82b 5348 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5349 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5350 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5351
bc7f75fa
AK		 5352 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5353 board_80003es2lan },
5354 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5355 board_80003es2lan },
5356 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5357 board_80003es2lan },
5358 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5359 board_80003es2lan },
ad68076e 5360
bc7f75fa
AK		 5361 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5362 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5363 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5364 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5365 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5366 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5367 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5368 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5369
bc7f75fa
AK		 5370 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5371 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5372 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5373 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5374 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5375 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5376 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5377 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5378 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5379
5380 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5381 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5382 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5383
f4187b56
BA		 5384 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5385 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5386
a4f58f54
BA		 5387 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5388 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5389 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5390 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5391
bc7f75fa
AK		 5392 { } /* terminate list */
5393};
5394MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5395
5396/* PCI Device API Driver */
5397static struct pci_driver e1000_driver = {
5398 .name = e1000e_driver_name,
5399 .id_table = e1000_pci_tbl,
5400 .probe = e1000_probe,
5401 .remove = __devexit_p(e1000_remove),
5402#ifdef CONFIG_PM
ad68076e 5403 /* Power Management Hooks */
bc7f75fa
AK		 5404 .suspend = e1000_suspend,
5405 .resume = e1000_resume,
5406#endif
5407 .shutdown = e1000_shutdown,
5408 .err_handler = &e1000_err_handler
5409};
5410
5411/**
5412 * e1000_init_module - Driver Registration Routine
5413 *
5414 * e1000_init_module is the first routine called when the driver is
5415 * loaded. All it does is register with the PCI subsystem.
5416 **/
5417static int __init e1000_init_module(void)
5418{
5419 int ret;
5420 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5421 e1000e_driver_name, e1000e_driver_version);
c7e54b1b 5422 printk(KERN_INFO "%s: Copyright (c) 1999 - 2009 Intel Corporation.\n",
bc7f75fa
AK		 5423 e1000e_driver_name);
5424 ret = pci_register_driver(&e1000_driver);
53ec5498 5425
bc7f75fa
AK		 5426 return ret;
5427}
5428module_init(e1000_init_module);
5429
5430/**
5431 * e1000_exit_module - Driver Exit Cleanup Routine
5432 *
5433 * e1000_exit_module is called just before the driver is removed
5434 * from memory.
5435 **/
5436static void __exit e1000_exit_module(void)
5437{
5438 pci_unregister_driver(&e1000_driver);
5439}
5440module_exit(e1000_exit_module);
5441
5442
5443MODULE_AUTHOR("Intel Corporation, <[email protected]>");
5444MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5445MODULE_LICENSE("GPL");
5446MODULE_VERSION(DRV_VERSION);
5447
5448/* e1000_main.c */
Empty description
This page took 1.281853 seconds and 4 git commands to generate.