projects / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 21e59123 SG |
1 | /* |
| 2 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or modify | |
| 5 | * it under the terms of the GNU General Public License version 2 as | |
| 6 | * published by the Free Software Foundation. | |
| 7 | */ | |
| 8 | ||
| 9 | #include <linux/err.h> | |
| 10 | #include <linux/init.h> | |
| 11 | #include <linux/io.h> | |
| 12 | #include <linux/module.h> | |
| 13 | #include <linux/of.h> | |
| 14 | #include <linux/of_device.h> | |
| 15 | #include <linux/pinctrl/pinctrl.h> | |
| 16 | ||
| 17 | #include "pinctrl-imx.h" | |
| 18 | ||
| 19 | enum imx6sl_pads { | |
| 20 | MX6SL_PAD_RESERVE0 = 0, | |
| 21 | MX6SL_PAD_RESERVE1 = 1, | |
| 22 | MX6SL_PAD_RESERVE2 = 2, | |
| 23 | MX6SL_PAD_RESERVE3 = 3, | |
| 24 | MX6SL_PAD_RESERVE4 = 4, | |
| 25 | MX6SL_PAD_RESERVE5 = 5, | |
| 26 | MX6SL_PAD_RESERVE6 = 6, | |
| 27 | MX6SL_PAD_RESERVE7 = 7, | |
| 28 | MX6SL_PAD_RESERVE8 = 8, | |
| 29 | MX6SL_PAD_RESERVE9 = 9, | |
| 30 | MX6SL_PAD_RESERVE10 = 10, | |
| 31 | MX6SL_PAD_RESERVE11 = 11, | |
| 32 | MX6SL_PAD_RESERVE12 = 12, | |
| 33 | MX6SL_PAD_RESERVE13 = 13, | |
| 34 | MX6SL_PAD_RESERVE14 = 14, | |
| 35 | MX6SL_PAD_RESERVE15 = 15, | |
| 36 | MX6SL_PAD_RESERVE16 = 16, | |
| 37 | MX6SL_PAD_RESERVE17 = 17, | |
| 38 | MX6SL_PAD_RESERVE18 = 18, | |
| 39 | MX6SL_PAD_AUD_MCLK = 19, | |
| 40 | MX6SL_PAD_AUD_RXC = 20, | |
| 41 | MX6SL_PAD_AUD_RXD = 21, | |
| 42 | MX6SL_PAD_AUD_RXFS = 22, | |
| 43 | MX6SL_PAD_AUD_TXC = 23, | |
| 44 | MX6SL_PAD_AUD_TXD = 24, | |
| 45 | MX6SL_PAD_AUD_TXFS = 25, | |
| 46 | MX6SL_PAD_ECSPI1_MISO = 26, | |
| 47 | MX6SL_PAD_ECSPI1_MOSI = 27, | |
| 48 | MX6SL_PAD_ECSPI1_SCLK = 28, | |
| 49 | MX6SL_PAD_ECSPI1_SS0 = 29, | |
| 50 | MX6SL_PAD_ECSPI2_MISO = 30, | |
| 51 | MX6SL_PAD_ECSPI2_MOSI = 31, | |
| 52 | MX6SL_PAD_ECSPI2_SCLK = 32, | |
| 53 | MX6SL_PAD_ECSPI2_SS0 = 33, | |
| 54 | MX6SL_PAD_EPDC_BDR0 = 34, | |
| 55 | MX6SL_PAD_EPDC_BDR1 = 35, | |
| 56 | MX6SL_PAD_EPDC_D0 = 36, | |
| 57 | MX6SL_PAD_EPDC_D1 = 37, | |
| 58 | MX6SL_PAD_EPDC_D10 = 38, | |
| 59 | MX6SL_PAD_EPDC_D11 = 39, | |
| 60 | MX6SL_PAD_EPDC_D12 = 40, | |
| 61 | MX6SL_PAD_EPDC_D13 = 41, | |
| 62 | MX6SL_PAD_EPDC_D14 = 42, | |
| 63 | MX6SL_PAD_EPDC_D15 = 43, | |
| 64 | MX6SL_PAD_EPDC_D2 = 44, | |
| 65 | MX6SL_PAD_EPDC_D3 = 45, | |
| 66 | MX6SL_PAD_EPDC_D4 = 46, | |
| 67 | MX6SL_PAD_EPDC_D5 = 47, | |
| 68 | MX6SL_PAD_EPDC_D6 = 48, | |
| 69 | MX6SL_PAD_EPDC_D7 = 49, | |
| 70 | MX6SL_PAD_EPDC_D8 = 50, | |
| 71 | MX6SL_PAD_EPDC_D9 = 51, | |
| 72 | MX6SL_PAD_EPDC_GDCLK = 52, | |
| 73 | MX6SL_PAD_EPDC_GDOE = 53, | |
| 74 | MX6SL_PAD_EPDC_GDRL = 54, | |
| 75 | MX6SL_PAD_EPDC_GDSP = 55, | |
| 76 | MX6SL_PAD_EPDC_PWRCOM = 56, | |
| 77 | MX6SL_PAD_EPDC_PWRCTRL0 = 57, | |
| 78 | MX6SL_PAD_EPDC_PWRCTRL1 = 58, | |
| 79 | MX6SL_PAD_EPDC_PWRCTRL2 = 59, | |
| 80 | MX6SL_PAD_EPDC_PWRCTRL3 = 60, | |
| 81 | MX6SL_PAD_EPDC_PWRINT = 61, | |
| 82 | MX6SL_PAD_EPDC_PWRSTAT = 62, | |
| 83 | MX6SL_PAD_EPDC_PWRWAKEUP = 63, | |
| 84 | MX6SL_PAD_EPDC_SDCE0 = 64, | |
| 85 | MX6SL_PAD_EPDC_SDCE1 = 65, | |
| 86 | MX6SL_PAD_EPDC_SDCE2 = 66, | |
| 87 | MX6SL_PAD_EPDC_SDCE3 = 67, | |
| 88 | MX6SL_PAD_EPDC_SDCLK = 68, | |
| 89 | MX6SL_PAD_EPDC_SDLE = 69, | |
| 90 | MX6SL_PAD_EPDC_SDOE = 70, | |
| 91 | MX6SL_PAD_EPDC_SDSHR = 71, | |
| 92 | MX6SL_PAD_EPDC_VCOM0 = 72, | |
| 93 | MX6SL_PAD_EPDC_VCOM1 = 73, | |
| 94 | MX6SL_PAD_FEC_CRS_DV = 74, | |
| 95 | MX6SL_PAD_FEC_MDC = 75, | |
| 96 | MX6SL_PAD_FEC_MDIO = 76, | |
| 97 | MX6SL_PAD_FEC_REF_CLK = 77, | |
| 98 | MX6SL_PAD_FEC_RX_ER = 78, | |
| 99 | MX6SL_PAD_FEC_RXD0 = 79, | |
| 100 | MX6SL_PAD_FEC_RXD1 = 80, | |
| 101 | MX6SL_PAD_FEC_TX_CLK = 81, | |
| 102 | MX6SL_PAD_FEC_TX_EN = 82, | |
| 103 | MX6SL_PAD_FEC_TXD0 = 83, | |
| 104 | MX6SL_PAD_FEC_TXD1 = 84, | |
| 105 | MX6SL_PAD_HSIC_DAT = 85, | |
| 106 | MX6SL_PAD_HSIC_STROBE = 86, | |
| 107 | MX6SL_PAD_I2C1_SCL = 87, | |
| 108 | MX6SL_PAD_I2C1_SDA = 88, | |
| 109 | MX6SL_PAD_I2C2_SCL = 89, | |
| 110 | MX6SL_PAD_I2C2_SDA = 90, | |
| 111 | MX6SL_PAD_KEY_COL0 = 91, | |
| 112 | MX6SL_PAD_KEY_COL1 = 92, | |
| 113 | MX6SL_PAD_KEY_COL2 = 93, | |
| 114 | MX6SL_PAD_KEY_COL3 = 94, | |
| 115 | MX6SL_PAD_KEY_COL4 = 95, | |
| 116 | MX6SL_PAD_KEY_COL5 = 96, | |
| 117 | MX6SL_PAD_KEY_COL6 = 97, | |
| 118 | MX6SL_PAD_KEY_COL7 = 98, | |
| 119 | MX6SL_PAD_KEY_ROW0 = 99, | |
| 120 | MX6SL_PAD_KEY_ROW1 = 100, | |
| 121 | MX6SL_PAD_KEY_ROW2 = 101, | |
| 122 | MX6SL_PAD_KEY_ROW3 = 102, | |
| 123 | MX6SL_PAD_KEY_ROW4 = 103, | |
| 124 | MX6SL_PAD_KEY_ROW5 = 104, | |
| 125 | MX6SL_PAD_KEY_ROW6 = 105, | |
| 126 | MX6SL_PAD_KEY_ROW7 = 106, | |
| 127 | MX6SL_PAD_LCD_CLK = 107, | |
| 128 | MX6SL_PAD_LCD_DAT0 = 108, | |
| 129 | MX6SL_PAD_LCD_DAT1 = 109, | |
| 130 | MX6SL_PAD_LCD_DAT10 = 110, | |
| 131 | MX6SL_PAD_LCD_DAT11 = 111, | |
| 132 | MX6SL_PAD_LCD_DAT12 = 112, | |
| 133 | MX6SL_PAD_LCD_DAT13 = 113, | |
| 134 | MX6SL_PAD_LCD_DAT14 = 114, | |
| 135 | MX6SL_PAD_LCD_DAT15 = 115, | |
| 136 | MX6SL_PAD_LCD_DAT16 = 116, | |
| 137 | MX6SL_PAD_LCD_DAT17 = 117, | |
| 138 | MX6SL_PAD_LCD_DAT18 = 118, | |
| 139 | MX6SL_PAD_LCD_DAT19 = 119, | |
| 140 | MX6SL_PAD_LCD_DAT2 = 120, | |
| 141 | MX6SL_PAD_LCD_DAT20 = 121, | |
| 142 | MX6SL_PAD_LCD_DAT21 = 122, | |
| 143 | MX6SL_PAD_LCD_DAT22 = 123, | |
| 144 | MX6SL_PAD_LCD_DAT23 = 124, | |
| 145 | MX6SL_PAD_LCD_DAT3 = 125, | |
| 146 | MX6SL_PAD_LCD_DAT4 = 126, | |
| 147 | MX6SL_PAD_LCD_DAT5 = 127, | |
| 148 | MX6SL_PAD_LCD_DAT6 = 128, | |
| 149 | MX6SL_PAD_LCD_DAT7 = 129, | |
| 150 | MX6SL_PAD_LCD_DAT8 = 130, | |
| 151 | MX6SL_PAD_LCD_DAT9 = 131, | |
| 152 | MX6SL_PAD_LCD_ENABLE = 132, | |
| 153 | MX6SL_PAD_LCD_HSYNC = 133, | |
| 154 | MX6SL_PAD_LCD_RESET = 134, | |
| 155 | MX6SL_PAD_LCD_VSYNC = 135, | |
| 156 | MX6SL_PAD_PWM1 = 136, | |
| 157 | MX6SL_PAD_REF_CLK_24M = 137, | |
| 158 | MX6SL_PAD_REF_CLK_32K = 138, | |
| 159 | MX6SL_PAD_SD1_CLK = 139, | |
| 160 | MX6SL_PAD_SD1_CMD = 140, | |
| 161 | MX6SL_PAD_SD1_DAT0 = 141, | |
| 162 | MX6SL_PAD_SD1_DAT1 = 142, | |
| 163 | MX6SL_PAD_SD1_DAT2 = 143, | |
| 164 | MX6SL_PAD_SD1_DAT3 = 144, | |
| 165 | MX6SL_PAD_SD1_DAT4 = 145, | |
| 166 | MX6SL_PAD_SD1_DAT5 = 146, | |
| 167 | MX6SL_PAD_SD1_DAT6 = 147, | |
| 168 | MX6SL_PAD_SD1_DAT7 = 148, | |
| 169 | MX6SL_PAD_SD2_CLK = 149, | |
| 170 | MX6SL_PAD_SD2_CMD = 150, | |
| 171 | MX6SL_PAD_SD2_DAT0 = 151, | |
| 172 | MX6SL_PAD_SD2_DAT1 = 152, | |
| 173 | MX6SL_PAD_SD2_DAT2 = 153, | |
| 174 | MX6SL_PAD_SD2_DAT3 = 154, | |
| 175 | MX6SL_PAD_SD2_DAT4 = 155, | |
| 176 | MX6SL_PAD_SD2_DAT5 = 156, | |
| 177 | MX6SL_PAD_SD2_DAT6 = 157, | |
| 178 | MX6SL_PAD_SD2_DAT7 = 158, | |
| 179 | MX6SL_PAD_SD2_RST = 159, | |
| 180 | MX6SL_PAD_SD3_CLK = 160, | |
| 181 | MX6SL_PAD_SD3_CMD = 161, | |
| 182 | MX6SL_PAD_SD3_DAT0 = 162, | |
| 183 | MX6SL_PAD_SD3_DAT1 = 163, | |
| 184 | MX6SL_PAD_SD3_DAT2 = 164, | |
| 185 | MX6SL_PAD_SD3_DAT3 = 165, | |
| 186 | MX6SL_PAD_UART1_RXD = 166, | |
| 187 | MX6SL_PAD_UART1_TXD = 167, | |
| 188 | MX6SL_PAD_WDOG_B = 168, | |
| 189 | }; | |
| 190 | ||
| 191 | /* Pad names for the pinmux subsystem */ | |
| 192 | static const struct pinctrl_pin_desc imx6sl_pinctrl_pads[] = { | |
| 193 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE0), | |
| 194 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE1), | |
| 195 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE2), | |
| 196 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE3), | |
| 197 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE4), | |
| 198 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE5), | |
| 199 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE6), | |
| 200 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE7), | |
| 201 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE8), | |
| 202 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE9), | |
| 203 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE10), | |
| 204 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE11), | |
| 205 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE12), | |
| 206 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE13), | |
| 207 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE14), | |
| 208 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE15), | |
| 209 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE16), | |
| 210 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE17), | |
| 211 | IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE18), | |
| 212 | IMX_PINCTRL_PIN(MX6SL_PAD_AUD_MCLK), | |
| 213 | IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXC), | |
| 214 | IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXD), | |
| 215 | IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXFS), | |
| 216 | IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXC), | |
| 217 | IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXD), | |
| 218 | IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXFS), | |
| 219 | IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MISO), | |
| 220 | IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MOSI), | |
| 221 | IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SCLK), | |
| 222 | IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SS0), | |
| 223 | IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MISO), | |
| 224 | IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MOSI), | |
| 225 | IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SCLK), | |
| 226 | IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SS0), | |
| 227 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR0), | |
| 228 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR1), | |
| 229 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D0), | |
| 230 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D1), | |
| 231 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D10), | |
| 232 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D11), | |
| 233 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D12), | |
| 234 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D13), | |
| 235 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D14), | |
| 236 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D15), | |
| 237 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D2), | |
| 238 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D3), | |
| 239 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D4), | |
| 240 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D5), | |
| 241 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D6), | |
| 242 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D7), | |
| 243 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D8), | |
| 244 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D9), | |
| 245 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDCLK), | |
| 246 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDOE), | |
| 247 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDRL), | |
| 248 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDSP), | |
| 249 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCOM), | |
| 250 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL0), | |
| 251 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL1), | |
| 252 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL2), | |
| 253 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL3), | |
| 254 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRINT), | |
| 255 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRSTAT), | |
| 256 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRWAKEUP), | |
| 257 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE0), | |
| 258 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE1), | |
| 259 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE2), | |
| 260 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE3), | |
| 261 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCLK), | |
| 262 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDLE), | |
| 263 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDOE), | |
| 264 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDSHR), | |
| 265 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM0), | |
| 266 | IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM1), | |
| 267 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_CRS_DV), | |
| 268 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDC), | |
| 269 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDIO), | |
| 270 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_REF_CLK), | |
| 271 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RX_ER), | |
| 272 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD0), | |
| 273 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD1), | |
| 274 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_CLK), | |
| 275 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_EN), | |
| 276 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD0), | |
| 277 | IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD1), | |
| 278 | IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_DAT), | |
| 279 | IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_STROBE), | |
| 280 | IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SCL), | |
| 281 | IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SDA), | |
| 282 | IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SCL), | |
| 283 | IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SDA), | |
| 284 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL0), | |
| 285 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL1), | |
| 286 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL2), | |
| 287 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL3), | |
| 288 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL4), | |
| 289 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL5), | |
| 290 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL6), | |
| 291 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL7), | |
| 292 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW0), | |
| 293 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW1), | |
| 294 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW2), | |
| 295 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW3), | |
| 296 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW4), | |
| 297 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW5), | |
| 298 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW6), | |
| 299 | IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW7), | |
| 300 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_CLK), | |
| 301 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT0), | |
| 302 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT1), | |
| 303 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT10), | |
| 304 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT11), | |
| 305 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT12), | |
| 306 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT13), | |
| 307 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT14), | |
| 308 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT15), | |
| 309 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT16), | |
| 310 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT17), | |
| 311 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT18), | |
| 312 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT19), | |
| 313 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT2), | |
| 314 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT20), | |
| 315 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT21), | |
| 316 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT22), | |
| 317 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT23), | |
| 318 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT3), | |
| 319 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT4), | |
| 320 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT5), | |
| 321 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT6), | |
| 322 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT7), | |
| 323 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT8), | |
| 324 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT9), | |
| 325 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_ENABLE), | |
| 326 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_HSYNC), | |
| 327 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_RESET), | |
| 328 | IMX_PINCTRL_PIN(MX6SL_PAD_LCD_VSYNC), | |
| 329 | IMX_PINCTRL_PIN(MX6SL_PAD_PWM1), | |
| 330 | IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_24M), | |
| 331 | IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_32K), | |
| 332 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CLK), | |
| 333 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CMD), | |
| 334 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT0), | |
| 335 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT1), | |
| 336 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT2), | |
| 337 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT3), | |
| 338 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT4), | |
| 339 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT5), | |
| 340 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT6), | |
| 341 | IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT7), | |
| 342 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CLK), | |
| 343 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CMD), | |
| 344 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT0), | |
| 345 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT1), | |
| 346 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT2), | |
| 347 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT3), | |
| 348 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT4), | |
| 349 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT5), | |
| 350 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT6), | |
| 351 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT7), | |
| 352 | IMX_PINCTRL_PIN(MX6SL_PAD_SD2_RST), | |
| 353 | IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CLK), | |
| 354 | IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CMD), | |
| 355 | IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT0), | |
| 356 | IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT1), | |
| 357 | IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT2), | |
| 358 | IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT3), | |
| 359 | IMX_PINCTRL_PIN(MX6SL_PAD_UART1_RXD), | |
| 360 | IMX_PINCTRL_PIN(MX6SL_PAD_UART1_TXD), | |
| 361 | IMX_PINCTRL_PIN(MX6SL_PAD_WDOG_B), | |
| 362 | }; | |
| 363 | ||
| 364 | static struct imx_pinctrl_soc_info imx6sl_pinctrl_info = { | |
| 365 | .pins = imx6sl_pinctrl_pads, | |
| 366 | .npins = ARRAY_SIZE(imx6sl_pinctrl_pads), | |
| 367 | }; | |
| 368 | ||
| 369 | static struct of_device_id imx6sl_pinctrl_of_match[] = { | |
| 370 | { .compatible = "fsl,imx6sl-iomuxc", }, | |
| 371 | { /* sentinel */ } | |
| 372 | }; | |
| 373 | ||
| 374 | static int imx6sl_pinctrl_probe(struct platform_device *pdev) | |
| 375 | { | |
| 376 | return imx_pinctrl_probe(pdev, &imx6sl_pinctrl_info); | |
| 377 | } | |
| 378 | ||
| 379 | static struct platform_driver imx6sl_pinctrl_driver = { | |
| 380 | .driver = { | |
| 381 | .name = "imx6sl-pinctrl", | |
| 382 | .owner = THIS_MODULE, | |
| 606fca94 | 383 | .of_match_table = imx6sl_pinctrl_of_match, |
| 21e59123 SG |
384 | }, |
| 385 | .probe = imx6sl_pinctrl_probe, | |
| 386 | .remove = imx_pinctrl_remove, | |
| 387 | }; | |
| 388 | ||
| 389 | static int __init imx6sl_pinctrl_init(void) | |
| 390 | { | |
| 391 | return platform_driver_register(&imx6sl_pinctrl_driver); | |
| 392 | } | |
| 393 | arch_initcall(imx6sl_pinctrl_init); | |
| 394 | ||
| 395 | static void __exit imx6sl_pinctrl_exit(void) | |
| 396 | { | |
| 397 | platform_driver_unregister(&imx6sl_pinctrl_driver); | |
| 398 | } | |
| 399 | module_exit(imx6sl_pinctrl_exit); | |
| 400 | ||
| 401 | MODULE_AUTHOR("Shawn Guo <[email protected]>"); | |
| 402 | MODULE_DESCRIPTION("Freescale imx6sl pinctrl driver"); | |
| 403 | MODULE_LICENSE("GPL v2"); |