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4a77a6cf JR |
1 | /* |
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | |
3 | * Author: Joerg Roedel <[email protected]> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #ifndef __LINUX_IOMMU_H | |
20 | #define __LINUX_IOMMU_H | |
21 | ||
74315ccc | 22 | #include <linux/errno.h> |
9a08d376 | 23 | #include <linux/err.h> |
d0f60a44 | 24 | #include <linux/of.h> |
76582d0a | 25 | #include <linux/types.h> |
315786eb | 26 | #include <linux/scatterlist.h> |
56fa4849 | 27 | #include <trace/events/iommu.h> |
74315ccc | 28 | |
ca13bb3d WD |
29 | #define IOMMU_READ (1 << 0) |
30 | #define IOMMU_WRITE (1 << 1) | |
31 | #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ | |
a720b41c | 32 | #define IOMMU_NOEXEC (1 << 3) |
4a77a6cf | 33 | |
905d66c1 | 34 | struct iommu_ops; |
d72e31c9 | 35 | struct iommu_group; |
ff21776d | 36 | struct bus_type; |
4a77a6cf | 37 | struct device; |
4f3f8d9d | 38 | struct iommu_domain; |
ba1eabfa | 39 | struct notifier_block; |
4f3f8d9d OBC |
40 | |
41 | /* iommu fault flags */ | |
42 | #define IOMMU_FAULT_READ 0x0 | |
43 | #define IOMMU_FAULT_WRITE 0x1 | |
44 | ||
45 | typedef int (*iommu_fault_handler_t)(struct iommu_domain *, | |
77ca2332 | 46 | struct device *, unsigned long, int, void *); |
4a77a6cf | 47 | |
0ff64f80 JR |
48 | struct iommu_domain_geometry { |
49 | dma_addr_t aperture_start; /* First address that can be mapped */ | |
50 | dma_addr_t aperture_end; /* Last address that can be mapped */ | |
51 | bool force_aperture; /* DMA only allowed in mappable range? */ | |
52 | }; | |
53 | ||
4a77a6cf | 54 | struct iommu_domain { |
b22f6434 | 55 | const struct iommu_ops *ops; |
4a77a6cf | 56 | void *priv; |
4f3f8d9d | 57 | iommu_fault_handler_t handler; |
77ca2332 | 58 | void *handler_token; |
0ff64f80 | 59 | struct iommu_domain_geometry geometry; |
4a77a6cf JR |
60 | }; |
61 | ||
1aed0748 JR |
62 | enum iommu_cap { |
63 | IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA | |
64 | transactions */ | |
65 | IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */ | |
c4986649 | 66 | IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ |
1aed0748 | 67 | }; |
dbb9fd86 | 68 | |
7cabf491 VS |
69 | /* |
70 | * Following constraints are specifc to FSL_PAMUV1: | |
71 | * -aperture must be power of 2, and naturally aligned | |
72 | * -number of windows must be power of 2, and address space size | |
73 | * of each window is determined by aperture size / # of windows | |
74 | * -the actual size of the mapped region of a window must be power | |
75 | * of 2 starting with 4KB and physical address must be naturally | |
76 | * aligned. | |
77 | * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints. | |
78 | * The caller can invoke iommu_domain_get_attr to check if the underlying | |
79 | * iommu implementation supports these constraints. | |
80 | */ | |
81 | ||
0cd76dd1 | 82 | enum iommu_attr { |
0ff64f80 | 83 | DOMAIN_ATTR_GEOMETRY, |
d2e12160 | 84 | DOMAIN_ATTR_PAGING, |
69356712 | 85 | DOMAIN_ATTR_WINDOWS, |
7cabf491 VS |
86 | DOMAIN_ATTR_FSL_PAMU_STASH, |
87 | DOMAIN_ATTR_FSL_PAMU_ENABLE, | |
88 | DOMAIN_ATTR_FSL_PAMUV1, | |
c02607aa | 89 | DOMAIN_ATTR_NESTING, /* two stages of translation */ |
a8b8a88a | 90 | DOMAIN_ATTR_MAX, |
0cd76dd1 JR |
91 | }; |
92 | ||
39d4ebb9 JR |
93 | #ifdef CONFIG_IOMMU_API |
94 | ||
7d3002cc OBC |
95 | /** |
96 | * struct iommu_ops - iommu ops and capabilities | |
97 | * @domain_init: init iommu domain | |
98 | * @domain_destroy: destroy iommu domain | |
99 | * @attach_dev: attach device to an iommu domain | |
100 | * @detach_dev: detach device from an iommu domain | |
101 | * @map: map a physically contiguous memory region to an iommu domain | |
102 | * @unmap: unmap a physically contiguous memory region from an iommu domain | |
315786eb OH |
103 | * @map_sg: map a scatter-gather list of physically contiguous memory chunks |
104 | * to an iommu domain | |
7d3002cc | 105 | * @iova_to_phys: translate iova to physical address |
d72e31c9 AW |
106 | * @add_device: add device to iommu grouping |
107 | * @remove_device: remove device from iommu grouping | |
0cd76dd1 JR |
108 | * @domain_get_attr: Query domain attributes |
109 | * @domain_set_attr: Change domain attributes | |
d0f60a44 | 110 | * @of_xlate: add OF master IDs to iommu grouping |
7d3002cc | 111 | * @pgsize_bitmap: bitmap of supported page sizes |
1cd076bf | 112 | * @priv: per-instance data private to the iommu driver |
7d3002cc | 113 | */ |
4a77a6cf | 114 | struct iommu_ops { |
3c0e0ca0 | 115 | bool (*capable)(enum iommu_cap); |
4a77a6cf JR |
116 | int (*domain_init)(struct iommu_domain *domain); |
117 | void (*domain_destroy)(struct iommu_domain *domain); | |
118 | int (*attach_dev)(struct iommu_domain *domain, struct device *dev); | |
119 | void (*detach_dev)(struct iommu_domain *domain, struct device *dev); | |
67651786 | 120 | int (*map)(struct iommu_domain *domain, unsigned long iova, |
5009065d OBC |
121 | phys_addr_t paddr, size_t size, int prot); |
122 | size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, | |
123 | size_t size); | |
315786eb OH |
124 | size_t (*map_sg)(struct iommu_domain *domain, unsigned long iova, |
125 | struct scatterlist *sg, unsigned int nents, int prot); | |
bb5547ac | 126 | phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova); |
d72e31c9 AW |
127 | int (*add_device)(struct device *dev); |
128 | void (*remove_device)(struct device *dev); | |
1460432c | 129 | int (*device_group)(struct device *dev, unsigned int *groupid); |
0cd76dd1 JR |
130 | int (*domain_get_attr)(struct iommu_domain *domain, |
131 | enum iommu_attr attr, void *data); | |
132 | int (*domain_set_attr)(struct iommu_domain *domain, | |
133 | enum iommu_attr attr, void *data); | |
d7787d57 JR |
134 | |
135 | /* Window handling functions */ | |
136 | int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f | 137 | phys_addr_t paddr, u64 size, int prot); |
d7787d57 | 138 | void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr); |
69356712 JR |
139 | /* Set the numer of window per domain */ |
140 | int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count); | |
141 | /* Get the numer of window per domain */ | |
142 | u32 (*domain_get_windows)(struct iommu_domain *domain); | |
d7787d57 | 143 | |
d0f60a44 WD |
144 | #ifdef CONFIG_OF_IOMMU |
145 | int (*of_xlate)(struct device *dev, struct of_phandle_args *args); | |
146 | #endif | |
147 | ||
7d3002cc | 148 | unsigned long pgsize_bitmap; |
1cd076bf | 149 | void *priv; |
4a77a6cf JR |
150 | }; |
151 | ||
d72e31c9 AW |
152 | #define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */ |
153 | #define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */ | |
154 | #define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */ | |
155 | #define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */ | |
156 | #define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */ | |
157 | #define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */ | |
158 | ||
b22f6434 | 159 | extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops); |
a1b60c1c | 160 | extern bool iommu_present(struct bus_type *bus); |
3c0e0ca0 | 161 | extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap); |
905d66c1 | 162 | extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); |
aa16bea9 | 163 | extern struct iommu_group *iommu_group_get_by_id(int id); |
4a77a6cf JR |
164 | extern void iommu_domain_free(struct iommu_domain *domain); |
165 | extern int iommu_attach_device(struct iommu_domain *domain, | |
166 | struct device *dev); | |
167 | extern void iommu_detach_device(struct iommu_domain *domain, | |
168 | struct device *dev); | |
cefc53c7 | 169 | extern int iommu_map(struct iommu_domain *domain, unsigned long iova, |
7d3002cc OBC |
170 | phys_addr_t paddr, size_t size, int prot); |
171 | extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
172 | size_t size); | |
315786eb OH |
173 | extern size_t default_iommu_map_sg(struct iommu_domain *domain, unsigned long iova, |
174 | struct scatterlist *sg,unsigned int nents, | |
175 | int prot); | |
bb5547ac | 176 | extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); |
4f3f8d9d | 177 | extern void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 178 | iommu_fault_handler_t handler, void *token); |
d72e31c9 AW |
179 | |
180 | extern int iommu_attach_group(struct iommu_domain *domain, | |
181 | struct iommu_group *group); | |
182 | extern void iommu_detach_group(struct iommu_domain *domain, | |
183 | struct iommu_group *group); | |
184 | extern struct iommu_group *iommu_group_alloc(void); | |
185 | extern void *iommu_group_get_iommudata(struct iommu_group *group); | |
186 | extern void iommu_group_set_iommudata(struct iommu_group *group, | |
187 | void *iommu_data, | |
188 | void (*release)(void *iommu_data)); | |
189 | extern int iommu_group_set_name(struct iommu_group *group, const char *name); | |
190 | extern int iommu_group_add_device(struct iommu_group *group, | |
191 | struct device *dev); | |
192 | extern void iommu_group_remove_device(struct device *dev); | |
193 | extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, | |
194 | int (*fn)(struct device *, void *)); | |
195 | extern struct iommu_group *iommu_group_get(struct device *dev); | |
196 | extern void iommu_group_put(struct iommu_group *group); | |
197 | extern int iommu_group_register_notifier(struct iommu_group *group, | |
198 | struct notifier_block *nb); | |
199 | extern int iommu_group_unregister_notifier(struct iommu_group *group, | |
200 | struct notifier_block *nb); | |
201 | extern int iommu_group_id(struct iommu_group *group); | |
104a1c13 | 202 | extern struct iommu_group *iommu_group_get_for_dev(struct device *dev); |
4f3f8d9d | 203 | |
0cd76dd1 JR |
204 | extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr, |
205 | void *data); | |
206 | extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, | |
207 | void *data); | |
c61959ec AW |
208 | struct device *iommu_device_create(struct device *parent, void *drvdata, |
209 | const struct attribute_group **groups, | |
210 | const char *fmt, ...); | |
211 | void iommu_device_destroy(struct device *dev); | |
212 | int iommu_device_link(struct device *dev, struct device *link); | |
213 | void iommu_device_unlink(struct device *dev, struct device *link); | |
4f3f8d9d | 214 | |
d7787d57 JR |
215 | /* Window handling function prototypes */ |
216 | extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f VS |
217 | phys_addr_t offset, u64 size, |
218 | int prot); | |
d7787d57 | 219 | extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr); |
4f3f8d9d OBC |
220 | /** |
221 | * report_iommu_fault() - report about an IOMMU fault to the IOMMU framework | |
222 | * @domain: the iommu domain where the fault has happened | |
223 | * @dev: the device where the fault has happened | |
224 | * @iova: the faulting address | |
225 | * @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...) | |
226 | * | |
227 | * This function should be called by the low-level IOMMU implementations | |
228 | * whenever IOMMU faults happen, to allow high-level users, that are | |
229 | * interested in such events, to know about them. | |
230 | * | |
231 | * This event may be useful for several possible use cases: | |
232 | * - mere logging of the event | |
233 | * - dynamic TLB/PTE loading | |
234 | * - if restarting of the faulting device is required | |
235 | * | |
236 | * Returns 0 on success and an appropriate error code otherwise (if dynamic | |
237 | * PTE/TLB loading will one day be supported, implementations will be able | |
238 | * to tell whether it succeeded or not according to this return value). | |
0ed6d2d2 OBC |
239 | * |
240 | * Specifically, -ENOSYS is returned if a fault handler isn't installed | |
241 | * (though fault handlers can also return -ENOSYS, in case they want to | |
242 | * elicit the default behavior of the IOMMU drivers). | |
4f3f8d9d OBC |
243 | */ |
244 | static inline int report_iommu_fault(struct iommu_domain *domain, | |
245 | struct device *dev, unsigned long iova, int flags) | |
246 | { | |
0ed6d2d2 | 247 | int ret = -ENOSYS; |
4a77a6cf | 248 | |
4f3f8d9d OBC |
249 | /* |
250 | * if upper layers showed interest and installed a fault handler, | |
251 | * invoke it. | |
252 | */ | |
253 | if (domain->handler) | |
77ca2332 OBC |
254 | ret = domain->handler(domain, dev, iova, flags, |
255 | domain->handler_token); | |
4a77a6cf | 256 | |
56fa4849 | 257 | trace_io_page_fault(dev, iova, flags); |
4f3f8d9d | 258 | return ret; |
4a77a6cf JR |
259 | } |
260 | ||
315786eb OH |
261 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
262 | unsigned long iova, struct scatterlist *sg, | |
263 | unsigned int nents, int prot) | |
264 | { | |
265 | return domain->ops->map_sg(domain, iova, sg, nents, prot); | |
266 | } | |
267 | ||
4a77a6cf JR |
268 | #else /* CONFIG_IOMMU_API */ |
269 | ||
39d4ebb9 | 270 | struct iommu_ops {}; |
d72e31c9 | 271 | struct iommu_group {}; |
4a77a6cf | 272 | |
a1b60c1c | 273 | static inline bool iommu_present(struct bus_type *bus) |
4a77a6cf JR |
274 | { |
275 | return false; | |
276 | } | |
277 | ||
3c0e0ca0 JR |
278 | static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap) |
279 | { | |
280 | return false; | |
281 | } | |
282 | ||
905d66c1 | 283 | static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) |
4a77a6cf JR |
284 | { |
285 | return NULL; | |
286 | } | |
287 | ||
b62dfd29 AK |
288 | static inline struct iommu_group *iommu_group_get_by_id(int id) |
289 | { | |
290 | return NULL; | |
291 | } | |
292 | ||
4a77a6cf JR |
293 | static inline void iommu_domain_free(struct iommu_domain *domain) |
294 | { | |
295 | } | |
296 | ||
297 | static inline int iommu_attach_device(struct iommu_domain *domain, | |
298 | struct device *dev) | |
299 | { | |
300 | return -ENODEV; | |
301 | } | |
302 | ||
303 | static inline void iommu_detach_device(struct iommu_domain *domain, | |
304 | struct device *dev) | |
305 | { | |
306 | } | |
307 | ||
cefc53c7 JR |
308 | static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, |
309 | phys_addr_t paddr, int gfp_order, int prot) | |
310 | { | |
311 | return -ENODEV; | |
312 | } | |
313 | ||
314 | static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
315 | int gfp_order) | |
316 | { | |
317 | return -ENODEV; | |
318 | } | |
319 | ||
315786eb OH |
320 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
321 | unsigned long iova, struct scatterlist *sg, | |
322 | unsigned int nents, int prot) | |
323 | { | |
324 | return -ENODEV; | |
325 | } | |
326 | ||
d7787d57 JR |
327 | static inline int iommu_domain_window_enable(struct iommu_domain *domain, |
328 | u32 wnd_nr, phys_addr_t paddr, | |
80f97f0f | 329 | u64 size, int prot) |
d7787d57 JR |
330 | { |
331 | return -ENODEV; | |
332 | } | |
333 | ||
334 | static inline void iommu_domain_window_disable(struct iommu_domain *domain, | |
335 | u32 wnd_nr) | |
336 | { | |
337 | } | |
338 | ||
bb5547ac | 339 | static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) |
4a77a6cf JR |
340 | { |
341 | return 0; | |
342 | } | |
343 | ||
4f3f8d9d | 344 | static inline void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 345 | iommu_fault_handler_t handler, void *token) |
4f3f8d9d OBC |
346 | { |
347 | } | |
348 | ||
bef83de5 AW |
349 | static inline int iommu_attach_group(struct iommu_domain *domain, |
350 | struct iommu_group *group) | |
d72e31c9 AW |
351 | { |
352 | return -ENODEV; | |
353 | } | |
354 | ||
bef83de5 AW |
355 | static inline void iommu_detach_group(struct iommu_domain *domain, |
356 | struct iommu_group *group) | |
d72e31c9 AW |
357 | { |
358 | } | |
359 | ||
bef83de5 | 360 | static inline struct iommu_group *iommu_group_alloc(void) |
d72e31c9 AW |
361 | { |
362 | return ERR_PTR(-ENODEV); | |
363 | } | |
364 | ||
bef83de5 | 365 | static inline void *iommu_group_get_iommudata(struct iommu_group *group) |
d72e31c9 AW |
366 | { |
367 | return NULL; | |
368 | } | |
369 | ||
bef83de5 AW |
370 | static inline void iommu_group_set_iommudata(struct iommu_group *group, |
371 | void *iommu_data, | |
372 | void (*release)(void *iommu_data)) | |
d72e31c9 AW |
373 | { |
374 | } | |
375 | ||
bef83de5 AW |
376 | static inline int iommu_group_set_name(struct iommu_group *group, |
377 | const char *name) | |
d72e31c9 AW |
378 | { |
379 | return -ENODEV; | |
380 | } | |
381 | ||
bef83de5 AW |
382 | static inline int iommu_group_add_device(struct iommu_group *group, |
383 | struct device *dev) | |
d72e31c9 AW |
384 | { |
385 | return -ENODEV; | |
386 | } | |
387 | ||
bef83de5 | 388 | static inline void iommu_group_remove_device(struct device *dev) |
d72e31c9 AW |
389 | { |
390 | } | |
391 | ||
bef83de5 AW |
392 | static inline int iommu_group_for_each_dev(struct iommu_group *group, |
393 | void *data, | |
394 | int (*fn)(struct device *, void *)) | |
d72e31c9 AW |
395 | { |
396 | return -ENODEV; | |
397 | } | |
398 | ||
bef83de5 | 399 | static inline struct iommu_group *iommu_group_get(struct device *dev) |
d72e31c9 AW |
400 | { |
401 | return NULL; | |
402 | } | |
403 | ||
bef83de5 | 404 | static inline void iommu_group_put(struct iommu_group *group) |
d72e31c9 AW |
405 | { |
406 | } | |
407 | ||
bef83de5 AW |
408 | static inline int iommu_group_register_notifier(struct iommu_group *group, |
409 | struct notifier_block *nb) | |
1460432c AW |
410 | { |
411 | return -ENODEV; | |
412 | } | |
413 | ||
bef83de5 AW |
414 | static inline int iommu_group_unregister_notifier(struct iommu_group *group, |
415 | struct notifier_block *nb) | |
d72e31c9 AW |
416 | { |
417 | return 0; | |
418 | } | |
419 | ||
bef83de5 | 420 | static inline int iommu_group_id(struct iommu_group *group) |
d72e31c9 AW |
421 | { |
422 | return -ENODEV; | |
423 | } | |
1460432c | 424 | |
0cd76dd1 JR |
425 | static inline int iommu_domain_get_attr(struct iommu_domain *domain, |
426 | enum iommu_attr attr, void *data) | |
427 | { | |
428 | return -EINVAL; | |
429 | } | |
430 | ||
431 | static inline int iommu_domain_set_attr(struct iommu_domain *domain, | |
432 | enum iommu_attr attr, void *data) | |
433 | { | |
434 | return -EINVAL; | |
435 | } | |
436 | ||
e09f8ea5 AW |
437 | static inline struct device *iommu_device_create(struct device *parent, |
438 | void *drvdata, | |
439 | const struct attribute_group **groups, | |
440 | const char *fmt, ...) | |
c61959ec AW |
441 | { |
442 | return ERR_PTR(-ENODEV); | |
443 | } | |
444 | ||
e09f8ea5 | 445 | static inline void iommu_device_destroy(struct device *dev) |
c61959ec AW |
446 | { |
447 | } | |
448 | ||
e09f8ea5 | 449 | static inline int iommu_device_link(struct device *dev, struct device *link) |
c61959ec AW |
450 | { |
451 | return -EINVAL; | |
452 | } | |
453 | ||
e09f8ea5 | 454 | static inline void iommu_device_unlink(struct device *dev, struct device *link) |
c61959ec AW |
455 | { |
456 | } | |
457 | ||
4a77a6cf JR |
458 | #endif /* CONFIG_IOMMU_API */ |
459 | ||
460 | #endif /* __LINUX_IOMMU_H */ |