]>
Commit | Line | Data |
---|---|---|
09c434b8 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* Low-level parallel port routines for the Multiface 3 card |
3 | * | |
4 | * Author: Joerg Dorchain <[email protected]> | |
5 | * | |
6 | * (C) The elitist m68k Users(TM) | |
7 | * | |
8 | * based on the existing parport_amiga and lp_mfc | |
9 | * | |
10 | * | |
11 | * From the MFC3 documentation: | |
12 | * | |
13 | * Miscellaneous PIA Details | |
14 | * ------------------------- | |
15 | * | |
16 | * The two open-drain interrupt outputs /IRQA and /IRQB are routed to | |
17 | * /INT2 of the Z2 bus. | |
18 | * | |
19 | * The CPU data bus of the PIA (D0-D7) is connected to D8-D15 on the Z2 | |
20 | * bus. This means that any PIA registers are accessed at even addresses. | |
21 | * | |
22 | * Centronics Pin Connections for the PIA | |
23 | * -------------------------------------- | |
24 | * | |
25 | * The following table shows the connections between the PIA and the | |
26 | * Centronics interface connector. These connections implement a single, but | |
27 | * very complete, Centronics type interface. The Pin column gives the pin | |
28 | * numbers of the PIA. The Centronics pin numbers can be found in the section | |
29 | * "Parallel Connectors". | |
30 | * | |
31 | * | |
32 | * Pin | PIA | Dir | Centronics Names | |
33 | * -------+-----+-----+--------------------------------------------------------- | |
34 | * 19 | CB2 | --> | /STROBE (aka /DRDY) | |
35 | * 10-17 | PBx | <-> | DATA0 - DATA7 | |
36 | * 18 | CB1 | <-- | /ACK | |
37 | * 40 | CA1 | <-- | BUSY | |
38 | * 3 | PA1 | <-- | PAPER-OUT (aka POUT) | |
39 | * 4 | PA2 | <-- | SELECTED (aka SEL) | |
40 | * 9 | PA7 | --> | /INIT (aka /RESET or /INPUT-PRIME) | |
41 | * 6 | PA4 | <-- | /ERROR (aka /FAULT) | |
42 | * 7 | PA5 | --> | DIR (aka /SELECT-IN) | |
43 | * 8 | PA6 | --> | /AUTO-FEED-XT | |
44 | * 39 | CA2 | --> | open | |
45 | * 5 | PA3 | <-- | /ACK (same as CB1!) | |
46 | * 2 | PA0 | <-- | BUSY (same as CA1!) | |
47 | * -------+-----+-----+--------------------------------------------------------- | |
48 | * | |
49 | * Should be enough to understand some of the driver. | |
50 | * | |
51 | * Per convention for normal use the port registers are visible. | |
52 | * If you need the data direction registers, restore the value in the | |
53 | * control register. | |
54 | */ | |
55 | ||
56 | #include "multiface.h" | |
57 | #include <linux/module.h> | |
58 | #include <linux/init.h> | |
59 | #include <linux/parport.h> | |
60 | #include <linux/delay.h> | |
61 | #include <linux/mc6821.h> | |
62 | #include <linux/zorro.h> | |
63 | #include <linux/interrupt.h> | |
64 | #include <asm/setup.h> | |
65 | #include <asm/amigahw.h> | |
66 | #include <asm/irq.h> | |
67 | #include <asm/amigaints.h> | |
68 | ||
69 | /* Maximum Number of Cards supported */ | |
70 | #define MAX_MFC 5 | |
71 | ||
72 | #undef DEBUG | |
1da177e4 LT |
73 | |
74 | static struct parport *this_port[MAX_MFC] = {NULL, }; | |
75 | static volatile int dummy; /* for trigger readds */ | |
76 | ||
77 | #define pia(dev) ((struct pia *)(dev->base)) | |
78 | static struct parport_operations pp_mfc3_ops; | |
79 | ||
80 | static void mfc3_write_data(struct parport *p, unsigned char data) | |
81 | { | |
46aea0d4 | 82 | pr_debug("write_data %c\n", data); |
1da177e4 LT |
83 | |
84 | dummy = pia(p)->pprb; /* clears irq bit */ | |
85 | /* Triggers also /STROBE.*/ | |
86 | pia(p)->pprb = data; | |
87 | } | |
88 | ||
89 | static unsigned char mfc3_read_data(struct parport *p) | |
90 | { | |
91 | /* clears interrupt bit. Triggers also /STROBE. */ | |
92 | return pia(p)->pprb; | |
93 | } | |
94 | ||
95 | static unsigned char control_pc_to_mfc3(unsigned char control) | |
96 | { | |
97 | unsigned char ret = 32|64; | |
98 | ||
99 | if (control & PARPORT_CONTROL_SELECT) /* XXX: What is SELECP? */ | |
100 | ret &= ~32; /* /SELECT_IN */ | |
101 | if (control & PARPORT_CONTROL_INIT) /* INITP */ | |
102 | ret |= 128; | |
103 | if (control & PARPORT_CONTROL_AUTOFD) /* AUTOLF */ | |
104 | ret &= ~64; | |
105 | if (control & PARPORT_CONTROL_STROBE) /* Strobe */ | |
106 | /* Handled directly by hardware */; | |
107 | return ret; | |
108 | } | |
109 | ||
110 | static unsigned char control_mfc3_to_pc(unsigned char control) | |
111 | { | |
112 | unsigned char ret = PARPORT_CONTROL_STROBE | |
113 | | PARPORT_CONTROL_AUTOFD | PARPORT_CONTROL_SELECT; | |
114 | ||
115 | if (control & 128) /* /INITP */ | |
116 | ret |= PARPORT_CONTROL_INIT; | |
117 | if (control & 64) /* /AUTOLF */ | |
118 | ret &= ~PARPORT_CONTROL_AUTOFD; | |
119 | if (control & 32) /* /SELECT_IN */ | |
120 | ret &= ~PARPORT_CONTROL_SELECT; | |
121 | return ret; | |
122 | } | |
123 | ||
124 | static void mfc3_write_control(struct parport *p, unsigned char control) | |
125 | { | |
46aea0d4 | 126 | pr_debug("write_control %02x\n", control); |
1da177e4 LT |
127 | pia(p)->ppra = (pia(p)->ppra & 0x1f) | control_pc_to_mfc3(control); |
128 | } | |
129 | ||
130 | static unsigned char mfc3_read_control( struct parport *p) | |
131 | { | |
46aea0d4 | 132 | pr_debug("read_control\n"); |
1da177e4 LT |
133 | return control_mfc3_to_pc(pia(p)->ppra & 0xe0); |
134 | } | |
135 | ||
136 | static unsigned char mfc3_frob_control( struct parport *p, unsigned char mask, unsigned char val) | |
137 | { | |
138 | unsigned char old; | |
139 | ||
46aea0d4 | 140 | pr_debug("frob_control mask %02x, value %02x\n", mask, val); |
1da177e4 LT |
141 | old = mfc3_read_control(p); |
142 | mfc3_write_control(p, (old & ~mask) ^ val); | |
143 | return old; | |
144 | } | |
145 | ||
1da177e4 LT |
146 | static unsigned char status_mfc3_to_pc(unsigned char status) |
147 | { | |
148 | unsigned char ret = PARPORT_STATUS_BUSY; | |
149 | ||
150 | if (status & 1) /* Busy */ | |
151 | ret &= ~PARPORT_STATUS_BUSY; | |
152 | if (status & 2) /* PaperOut */ | |
153 | ret |= PARPORT_STATUS_PAPEROUT; | |
154 | if (status & 4) /* Selected */ | |
155 | ret |= PARPORT_STATUS_SELECT; | |
156 | if (status & 8) /* Ack */ | |
157 | ret |= PARPORT_STATUS_ACK; | |
158 | if (status & 16) /* /ERROR */ | |
159 | ret |= PARPORT_STATUS_ERROR; | |
160 | ||
161 | return ret; | |
162 | } | |
163 | ||
1da177e4 LT |
164 | static unsigned char mfc3_read_status(struct parport *p) |
165 | { | |
166 | unsigned char status; | |
167 | ||
168 | status = status_mfc3_to_pc(pia(p)->ppra & 0x1f); | |
46aea0d4 | 169 | pr_debug("read_status %02x\n", status); |
1da177e4 LT |
170 | return status; |
171 | } | |
172 | ||
df4c756e | 173 | static int use_cnt; |
1da177e4 | 174 | |
7d12e780 | 175 | static irqreturn_t mfc3_interrupt(int irq, void *dev_id) |
1da177e4 LT |
176 | { |
177 | int i; | |
178 | ||
179 | for( i = 0; i < MAX_MFC; i++) | |
180 | if (this_port[i] != NULL) | |
181 | if (pia(this_port[i])->crb & 128) { /* Board caused interrupt */ | |
182 | dummy = pia(this_port[i])->pprb; /* clear irq bit */ | |
f230d101 | 183 | parport_generic_irq(this_port[i]); |
1da177e4 LT |
184 | } |
185 | return IRQ_HANDLED; | |
186 | } | |
187 | ||
188 | static void mfc3_enable_irq(struct parport *p) | |
189 | { | |
190 | pia(p)->crb |= PIA_C1_ENABLE_IRQ; | |
191 | } | |
192 | ||
193 | static void mfc3_disable_irq(struct parport *p) | |
194 | { | |
195 | pia(p)->crb &= ~PIA_C1_ENABLE_IRQ; | |
196 | } | |
197 | ||
198 | static void mfc3_data_forward(struct parport *p) | |
199 | { | |
46aea0d4 | 200 | pr_debug("forward\n"); |
1da177e4 LT |
201 | pia(p)->crb &= ~PIA_DDR; /* make data direction register visible */ |
202 | pia(p)->pddrb = 255; /* all pins output */ | |
203 | pia(p)->crb |= PIA_DDR; /* make data register visible - default */ | |
204 | } | |
205 | ||
206 | static void mfc3_data_reverse(struct parport *p) | |
207 | { | |
46aea0d4 | 208 | pr_debug("reverse\n"); |
1da177e4 LT |
209 | pia(p)->crb &= ~PIA_DDR; /* make data direction register visible */ |
210 | pia(p)->pddrb = 0; /* all pins input */ | |
211 | pia(p)->crb |= PIA_DDR; /* make data register visible - default */ | |
212 | } | |
213 | ||
214 | static void mfc3_init_state(struct pardevice *dev, struct parport_state *s) | |
215 | { | |
216 | s->u.amiga.data = 0; | |
217 | s->u.amiga.datadir = 255; | |
218 | s->u.amiga.status = 0; | |
219 | s->u.amiga.statusdir = 0xe0; | |
220 | } | |
221 | ||
222 | static void mfc3_save_state(struct parport *p, struct parport_state *s) | |
223 | { | |
224 | s->u.amiga.data = pia(p)->pprb; | |
225 | pia(p)->crb &= ~PIA_DDR; | |
226 | s->u.amiga.datadir = pia(p)->pddrb; | |
227 | pia(p)->crb |= PIA_DDR; | |
228 | s->u.amiga.status = pia(p)->ppra; | |
229 | pia(p)->cra &= ~PIA_DDR; | |
230 | s->u.amiga.statusdir = pia(p)->pddrb; | |
231 | pia(p)->cra |= PIA_DDR; | |
232 | } | |
233 | ||
234 | static void mfc3_restore_state(struct parport *p, struct parport_state *s) | |
235 | { | |
236 | pia(p)->pprb = s->u.amiga.data; | |
237 | pia(p)->crb &= ~PIA_DDR; | |
238 | pia(p)->pddrb = s->u.amiga.datadir; | |
239 | pia(p)->crb |= PIA_DDR; | |
240 | pia(p)->ppra = s->u.amiga.status; | |
241 | pia(p)->cra &= ~PIA_DDR; | |
242 | pia(p)->pddrb = s->u.amiga.statusdir; | |
243 | pia(p)->cra |= PIA_DDR; | |
244 | } | |
245 | ||
246 | static struct parport_operations pp_mfc3_ops = { | |
247 | .write_data = mfc3_write_data, | |
248 | .read_data = mfc3_read_data, | |
249 | ||
250 | .write_control = mfc3_write_control, | |
251 | .read_control = mfc3_read_control, | |
252 | .frob_control = mfc3_frob_control, | |
253 | ||
254 | .read_status = mfc3_read_status, | |
255 | ||
256 | .enable_irq = mfc3_enable_irq, | |
257 | .disable_irq = mfc3_disable_irq, | |
258 | ||
259 | .data_forward = mfc3_data_forward, | |
260 | .data_reverse = mfc3_data_reverse, | |
261 | ||
262 | .init_state = mfc3_init_state, | |
263 | .save_state = mfc3_save_state, | |
264 | .restore_state = mfc3_restore_state, | |
265 | ||
266 | .epp_write_data = parport_ieee1284_epp_write_data, | |
267 | .epp_read_data = parport_ieee1284_epp_read_data, | |
268 | .epp_write_addr = parport_ieee1284_epp_write_addr, | |
269 | .epp_read_addr = parport_ieee1284_epp_read_addr, | |
270 | ||
271 | .ecp_write_data = parport_ieee1284_ecp_write_data, | |
272 | .ecp_read_data = parport_ieee1284_ecp_read_data, | |
273 | .ecp_write_addr = parport_ieee1284_ecp_write_addr, | |
274 | ||
275 | .compat_write_data = parport_ieee1284_write_compat, | |
276 | .nibble_read_data = parport_ieee1284_read_nibble, | |
277 | .byte_read_data = parport_ieee1284_read_byte, | |
278 | ||
279 | .owner = THIS_MODULE, | |
280 | }; | |
281 | ||
282 | /* ----------- Initialisation code --------------------------------- */ | |
283 | ||
284 | static int __init parport_mfc3_init(void) | |
285 | { | |
286 | struct parport *p; | |
287 | int pias = 0; | |
288 | struct pia *pp; | |
289 | struct zorro_dev *z = NULL; | |
290 | ||
291 | if (!MACH_IS_AMIGA) | |
292 | return -ENODEV; | |
293 | ||
294 | while ((z = zorro_find_device(ZORRO_PROD_BSC_MULTIFACE_III, z))) { | |
295 | unsigned long piabase = z->resource.start+PIABASE; | |
296 | if (!request_mem_region(piabase, sizeof(struct pia), "PIA")) | |
297 | continue; | |
298 | ||
6112ea08 | 299 | pp = ZTWO_VADDR(piabase); |
1da177e4 LT |
300 | pp->crb = 0; |
301 | pp->pddrb = 255; /* all data pins output */ | |
302 | pp->crb = PIA_DDR|32|8; | |
303 | dummy = pp->pddrb; /* reading clears interrupt */ | |
304 | pp->cra = 0; | |
305 | pp->pddra = 0xe0; /* /RESET, /DIR ,/AUTO-FEED output */ | |
306 | pp->cra = PIA_DDR; | |
307 | pp->ppra = 0; /* reset printer */ | |
308 | udelay(10); | |
309 | pp->ppra = 128; | |
310 | p = parport_register_port((unsigned long)pp, IRQ_AMIGA_PORTS, | |
311 | PARPORT_DMA_NONE, &pp_mfc3_ops); | |
312 | if (!p) | |
313 | goto out_port; | |
314 | ||
315 | if (p->irq != PARPORT_IRQ_NONE) { | |
316 | if (use_cnt++ == 0) | |
dace1453 | 317 | if (request_irq(IRQ_AMIGA_PORTS, mfc3_interrupt, IRQF_SHARED, p->name, &pp_mfc3_ops)) |
1da177e4 LT |
318 | goto out_irq; |
319 | } | |
c15a3837 | 320 | p->dev = &z->dev; |
1da177e4 LT |
321 | |
322 | this_port[pias++] = p; | |
decf26f6 | 323 | pr_info("%s: Multiface III port using irq\n", p->name); |
1da177e4 LT |
324 | /* XXX: set operating mode */ |
325 | ||
326 | p->private_data = (void *)piabase; | |
327 | parport_announce_port (p); | |
328 | ||
329 | if (pias >= MAX_MFC) | |
330 | break; | |
331 | continue; | |
332 | ||
333 | out_irq: | |
334 | parport_put_port(p); | |
335 | out_port: | |
336 | release_mem_region(piabase, sizeof(struct pia)); | |
337 | } | |
338 | ||
339 | return pias ? 0 : -ENODEV; | |
340 | } | |
341 | ||
342 | static void __exit parport_mfc3_exit(void) | |
343 | { | |
344 | int i; | |
345 | ||
346 | for (i = 0; i < MAX_MFC; i++) { | |
347 | if (!this_port[i]) | |
348 | continue; | |
349 | parport_remove_port(this_port[i]); | |
49966bae | 350 | if (this_port[i]->irq != PARPORT_IRQ_NONE) { |
1da177e4 LT |
351 | if (--use_cnt == 0) |
352 | free_irq(IRQ_AMIGA_PORTS, &pp_mfc3_ops); | |
353 | } | |
354 | release_mem_region(ZTWO_PADDR(this_port[i]->private_data), sizeof(struct pia)); | |
355 | parport_put_port(this_port[i]); | |
356 | } | |
357 | } | |
358 | ||
359 | ||
360 | MODULE_AUTHOR("Joerg Dorchain <[email protected]>"); | |
42b2aa86 | 361 | MODULE_DESCRIPTION("Parport Driver for Multiface 3 expansion cards Parallel Port"); |
1da177e4 LT |
362 | MODULE_SUPPORTED_DEVICE("Multiface 3 Parallel Port"); |
363 | MODULE_LICENSE("GPL"); | |
364 | ||
365 | module_init(parport_mfc3_init) | |
366 | module_exit(parport_mfc3_exit) |