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8bd135ba MA |
1 | /* |
2 | STB0899 Multistandard Frontend driver | |
3 | Copyright (C) Manu Abraham ([email protected]) | |
4 | ||
5 | Copyright (C) ST Microelectronics | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/init.h> | |
23 | #include <linux/kernel.h> | |
24 | #include <linux/module.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
8bd135ba MA |
26 | #include <linux/string.h> |
27 | ||
28 | #include <linux/dvb/frontend.h> | |
29 | #include "dvb_frontend.h" | |
30 | ||
31 | #include "stb0899_drv.h" | |
32 | #include "stb0899_priv.h" | |
33 | #include "stb0899_reg.h" | |
34 | ||
c615a27a | 35 | static unsigned int verbose = 0;//1; |
8bd135ba MA |
36 | module_param(verbose, int, 0644); |
37 | ||
38 | /* C/N in dB/10, NIRM/NIRL */ | |
39 | static const struct stb0899_tab stb0899_cn_tab[] = { | |
40 | { 200, 2600 }, | |
41 | { 190, 2700 }, | |
42 | { 180, 2860 }, | |
43 | { 170, 3020 }, | |
44 | { 160, 3210 }, | |
45 | { 150, 3440 }, | |
46 | { 140, 3710 }, | |
47 | { 130, 4010 }, | |
48 | { 120, 4360 }, | |
49 | { 110, 4740 }, | |
50 | { 100, 5190 }, | |
51 | { 90, 5670 }, | |
52 | { 80, 6200 }, | |
53 | { 70, 6770 }, | |
54 | { 60, 7360 }, | |
55 | { 50, 7970 }, | |
56 | { 40, 8250 }, | |
57 | { 30, 9000 }, | |
58 | { 20, 9450 }, | |
59 | { 15, 9600 }, | |
60 | }; | |
61 | ||
62 | /* DVB-S AGCIQ_VALUE vs. signal level in dBm/10. | |
63 | * As measured, connected to a modulator. | |
64 | * -8.0 to -50.0 dBm directly connected, | |
65 | * -52.0 to -74.8 with extra attenuation. | |
66 | * Cut-off to AGCIQ_VALUE = 0x80 below -74.8dBm. | |
67 | * Crude linear extrapolation below -84.8dBm and above -8.0dBm. | |
68 | */ | |
69 | static const struct stb0899_tab stb0899_dvbsrf_tab[] = { | |
70 | { -950, -128 }, | |
71 | { -748, -94 }, | |
72 | { -745, -92 }, | |
73 | { -735, -90 }, | |
74 | { -720, -87 }, | |
75 | { -670, -77 }, | |
76 | { -640, -70 }, | |
77 | { -610, -62 }, | |
78 | { -600, -60 }, | |
79 | { -590, -56 }, | |
80 | { -560, -41 }, | |
81 | { -540, -25 }, | |
82 | { -530, -17 }, | |
83 | { -520, -11 }, | |
84 | { -500, 1 }, | |
85 | { -490, 6 }, | |
86 | { -480, 10 }, | |
87 | { -440, 22 }, | |
88 | { -420, 27 }, | |
89 | { -400, 31 }, | |
90 | { -380, 34 }, | |
91 | { -340, 40 }, | |
92 | { -320, 43 }, | |
93 | { -280, 48 }, | |
94 | { -250, 52 }, | |
95 | { -230, 55 }, | |
96 | { -180, 61 }, | |
97 | { -140, 66 }, | |
98 | { -90, 73 }, | |
99 | { -80, 74 }, | |
100 | { 500, 127 } | |
101 | }; | |
102 | ||
103 | /* DVB-S2 IF_AGC_GAIN vs. signal level in dBm/10. | |
104 | * As measured, connected to a modulator. | |
105 | * -8.0 to -50.1 dBm directly connected, | |
106 | * -53.0 to -76.6 with extra attenuation. | |
107 | * Cut-off to IF_AGC_GAIN = 0x3fff below -76.6dBm. | |
108 | * Crude linear extrapolation below -76.6dBm and above -8.0dBm. | |
109 | */ | |
110 | static const struct stb0899_tab stb0899_dvbs2rf_tab[] = { | |
111 | { 700, 0 }, | |
112 | { -80, 3217 }, | |
113 | { -150, 3893 }, | |
114 | { -190, 4217 }, | |
115 | { -240, 4621 }, | |
116 | { -280, 4945 }, | |
117 | { -320, 5273 }, | |
118 | { -350, 5545 }, | |
119 | { -370, 5741 }, | |
120 | { -410, 6147 }, | |
121 | { -450, 6671 }, | |
122 | { -490, 7413 }, | |
123 | { -501, 7665 }, | |
124 | { -530, 8767 }, | |
125 | { -560, 10219 }, | |
126 | { -580, 10939 }, | |
127 | { -590, 11518 }, | |
128 | { -600, 11723 }, | |
129 | { -650, 12659 }, | |
130 | { -690, 13219 }, | |
131 | { -730, 13645 }, | |
132 | { -750, 13909 }, | |
133 | { -766, 14153 }, | |
134 | { -999, 16383 } | |
135 | }; | |
136 | ||
137 | /* DVB-S2 Es/N0 quant in dB/100 vs read value * 100*/ | |
ffbc5f88 | 138 | static struct stb0899_tab stb0899_quant_tab[] = { |
8bd135ba MA |
139 | { 0, 0 }, |
140 | { 0, 100 }, | |
141 | { 600, 200 }, | |
142 | { 950, 299 }, | |
143 | { 1200, 398 }, | |
144 | { 1400, 501 }, | |
145 | { 1560, 603 }, | |
146 | { 1690, 700 }, | |
147 | { 1810, 804 }, | |
148 | { 1910, 902 }, | |
149 | { 2000, 1000 }, | |
150 | { 2080, 1096 }, | |
151 | { 2160, 1202 }, | |
152 | { 2230, 1303 }, | |
153 | { 2350, 1496 }, | |
154 | { 2410, 1603 }, | |
155 | { 2460, 1698 }, | |
156 | { 2510, 1799 }, | |
157 | { 2600, 1995 }, | |
158 | { 2650, 2113 }, | |
159 | { 2690, 2213 }, | |
160 | { 2720, 2291 }, | |
161 | { 2760, 2399 }, | |
162 | { 2800, 2512 }, | |
163 | { 2860, 2692 }, | |
164 | { 2930, 2917 }, | |
165 | { 2960, 3020 }, | |
166 | { 3010, 3199 }, | |
167 | { 3040, 3311 }, | |
168 | { 3060, 3388 }, | |
169 | { 3120, 3631 }, | |
170 | { 3190, 3936 }, | |
171 | { 3400, 5012 }, | |
172 | { 3610, 6383 }, | |
173 | { 3800, 7943 }, | |
174 | { 4210, 12735 }, | |
175 | { 4500, 17783 }, | |
176 | { 4690, 22131 }, | |
177 | { 4810, 25410 } | |
178 | }; | |
179 | ||
180 | /* DVB-S2 Es/N0 estimate in dB/100 vs read value */ | |
ffbc5f88 | 181 | static struct stb0899_tab stb0899_est_tab[] = { |
8bd135ba MA |
182 | { 0, 0 }, |
183 | { 0, 1 }, | |
184 | { 301, 2 }, | |
185 | { 1204, 16 }, | |
186 | { 1806, 64 }, | |
187 | { 2408, 256 }, | |
188 | { 2709, 512 }, | |
189 | { 3010, 1023 }, | |
190 | { 3311, 2046 }, | |
191 | { 3612, 4093 }, | |
192 | { 3823, 6653 }, | |
193 | { 3913, 8185 }, | |
194 | { 4010, 10233 }, | |
195 | { 4107, 12794 }, | |
196 | { 4214, 16368 }, | |
197 | { 4266, 18450 }, | |
198 | { 4311, 20464 }, | |
199 | { 4353, 22542 }, | |
200 | { 4391, 24604 }, | |
201 | { 4425, 26607 }, | |
202 | { 4457, 28642 }, | |
203 | { 4487, 30690 }, | |
204 | { 4515, 32734 }, | |
205 | { 4612, 40926 }, | |
206 | { 4692, 49204 }, | |
207 | { 4816, 65464 }, | |
208 | { 4913, 81846 }, | |
209 | { 4993, 98401 }, | |
210 | { 5060, 114815 }, | |
211 | { 5118, 131220 }, | |
212 | { 5200, 158489 }, | |
213 | { 5300, 199526 }, | |
214 | { 5400, 251189 }, | |
215 | { 5500, 316228 }, | |
216 | { 5600, 398107 }, | |
217 | { 5720, 524807 }, | |
218 | { 5721, 526017 }, | |
219 | }; | |
220 | ||
ffbc5f88 | 221 | static int _stb0899_read_reg(struct stb0899_state *state, unsigned int reg) |
8bd135ba MA |
222 | { |
223 | int ret; | |
224 | ||
225 | u8 b0[] = { reg >> 8, reg & 0xff }; | |
226 | u8 buf; | |
227 | ||
228 | struct i2c_msg msg[] = { | |
229 | { | |
230 | .addr = state->config->demod_address, | |
231 | .flags = 0, | |
232 | .buf = b0, | |
233 | .len = 2 | |
234 | },{ | |
235 | .addr = state->config->demod_address, | |
236 | .flags = I2C_M_RD, | |
237 | .buf = &buf, | |
238 | .len = 1 | |
239 | } | |
240 | }; | |
241 | ||
242 | ret = i2c_transfer(state->i2c, msg, 2); | |
243 | if (ret != 2) { | |
244 | if (ret != -ERESTARTSYS) | |
c615a27a | 245 | dprintk(state->verbose, FE_ERROR, 1, |
8bd135ba MA |
246 | "Read error, Reg=[0x%02x], Status=%d", |
247 | reg, ret); | |
248 | ||
249 | return ret < 0 ? ret : -EREMOTEIO; | |
250 | } | |
c615a27a RN |
251 | if (unlikely(*state->verbose >= FE_DEBUGREG)) |
252 | dprintk(state->verbose, FE_ERROR, 1, "Reg=[0x%02x], data=%02x", | |
8bd135ba MA |
253 | reg, buf); |
254 | ||
8bd135ba MA |
255 | return (unsigned int)buf; |
256 | } | |
257 | ||
258 | int stb0899_read_reg(struct stb0899_state *state, unsigned int reg) | |
259 | { | |
260 | int result; | |
261 | ||
262 | result = _stb0899_read_reg(state, reg); | |
263 | /* | |
264 | * Bug ID 9: | |
265 | * access to 0xf2xx/0xf6xx | |
266 | * must be followed by read from 0xf2ff/0xf6ff. | |
267 | */ | |
268 | if ((reg != 0xf2ff) && (reg != 0xf6ff) && | |
269 | (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600))) | |
270 | _stb0899_read_reg(state, (reg | 0x00ff)); | |
271 | ||
272 | return result; | |
273 | } | |
274 | ||
275 | u32 _stb0899_read_s2reg(struct stb0899_state *state, | |
886134e4 IL |
276 | u32 stb0899_i2cdev, |
277 | u32 stb0899_base_addr, | |
278 | u16 stb0899_reg_offset) | |
8bd135ba MA |
279 | { |
280 | int status; | |
281 | u32 data; | |
282 | u8 buf[7] = { 0 }; | |
283 | u16 tmpaddr; | |
284 | ||
285 | u8 buf_0[] = { | |
286 | GETBYTE(stb0899_i2cdev, BYTE1), /* 0xf3 S2 Base Address (MSB) */ | |
287 | GETBYTE(stb0899_i2cdev, BYTE0), /* 0xfc S2 Base Address (LSB) */ | |
288 | GETBYTE(stb0899_base_addr, BYTE0), /* 0x00 Base Address (LSB) */ | |
289 | GETBYTE(stb0899_base_addr, BYTE1), /* 0x04 Base Address (LSB) */ | |
290 | GETBYTE(stb0899_base_addr, BYTE2), /* 0x00 Base Address (MSB) */ | |
291 | GETBYTE(stb0899_base_addr, BYTE3), /* 0x00 Base Address (MSB) */ | |
292 | }; | |
293 | u8 buf_1[] = { | |
294 | 0x00, /* 0xf3 Reg Offset */ | |
295 | 0x00, /* 0x44 Reg Offset */ | |
296 | }; | |
297 | ||
298 | struct i2c_msg msg_0 = { | |
299 | .addr = state->config->demod_address, | |
300 | .flags = 0, | |
301 | .buf = buf_0, | |
302 | .len = 6 | |
303 | }; | |
304 | ||
305 | struct i2c_msg msg_1 = { | |
306 | .addr = state->config->demod_address, | |
307 | .flags = 0, | |
308 | .buf = buf_1, | |
309 | .len = 2 | |
310 | }; | |
311 | ||
312 | struct i2c_msg msg_r = { | |
313 | .addr = state->config->demod_address, | |
314 | .flags = I2C_M_RD, | |
315 | .buf = buf, | |
316 | .len = 4 | |
317 | }; | |
318 | ||
319 | tmpaddr = stb0899_reg_offset & 0xff00; | |
320 | if (!(stb0899_reg_offset & 0x8)) | |
321 | tmpaddr = stb0899_reg_offset | 0x20; | |
322 | ||
323 | buf_1[0] = GETBYTE(tmpaddr, BYTE1); | |
324 | buf_1[1] = GETBYTE(tmpaddr, BYTE0); | |
325 | ||
326 | status = i2c_transfer(state->i2c, &msg_0, 1); | |
327 | if (status < 1) { | |
328 | if (status != -ERESTARTSYS) | |
329 | printk(KERN_ERR "%s ERR(1), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n", | |
330 | __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status); | |
331 | ||
332 | goto err; | |
333 | } | |
334 | ||
335 | /* Dummy */ | |
336 | status = i2c_transfer(state->i2c, &msg_1, 1); | |
337 | if (status < 1) | |
338 | goto err; | |
339 | ||
340 | status = i2c_transfer(state->i2c, &msg_r, 1); | |
341 | if (status < 1) | |
342 | goto err; | |
343 | ||
344 | buf_1[0] = GETBYTE(stb0899_reg_offset, BYTE1); | |
345 | buf_1[1] = GETBYTE(stb0899_reg_offset, BYTE0); | |
346 | ||
347 | /* Actual */ | |
348 | status = i2c_transfer(state->i2c, &msg_1, 1); | |
349 | if (status < 1) { | |
350 | if (status != -ERESTARTSYS) | |
351 | printk(KERN_ERR "%s ERR(2), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n", | |
352 | __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status); | |
353 | goto err; | |
354 | } | |
355 | ||
356 | status = i2c_transfer(state->i2c, &msg_r, 1); | |
357 | if (status < 1) { | |
358 | if (status != -ERESTARTSYS) | |
359 | printk(KERN_ERR "%s ERR(3), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n", | |
360 | __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status); | |
361 | return status < 0 ? status : -EREMOTEIO; | |
362 | } | |
363 | ||
364 | data = MAKEWORD32(buf[3], buf[2], buf[1], buf[0]); | |
c615a27a | 365 | if (unlikely(*state->verbose >= FE_DEBUGREG)) |
8bd135ba MA |
366 | printk(KERN_DEBUG "%s Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Data=[0x%08x]\n", |
367 | __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, data); | |
368 | ||
369 | return data; | |
370 | ||
371 | err: | |
372 | return status < 0 ? status : -EREMOTEIO; | |
373 | } | |
374 | ||
375 | int stb0899_write_s2reg(struct stb0899_state *state, | |
376 | u32 stb0899_i2cdev, | |
377 | u32 stb0899_base_addr, | |
378 | u16 stb0899_reg_offset, | |
379 | u32 stb0899_data) | |
380 | { | |
381 | int status; | |
382 | ||
383 | /* Base Address Setup */ | |
384 | u8 buf_0[] = { | |
385 | GETBYTE(stb0899_i2cdev, BYTE1), /* 0xf3 S2 Base Address (MSB) */ | |
386 | GETBYTE(stb0899_i2cdev, BYTE0), /* 0xfc S2 Base Address (LSB) */ | |
387 | GETBYTE(stb0899_base_addr, BYTE0), /* 0x00 Base Address (LSB) */ | |
388 | GETBYTE(stb0899_base_addr, BYTE1), /* 0x04 Base Address (LSB) */ | |
389 | GETBYTE(stb0899_base_addr, BYTE2), /* 0x00 Base Address (MSB) */ | |
390 | GETBYTE(stb0899_base_addr, BYTE3), /* 0x00 Base Address (MSB) */ | |
391 | }; | |
392 | u8 buf_1[] = { | |
393 | 0x00, /* 0xf3 Reg Offset */ | |
394 | 0x00, /* 0x44 Reg Offset */ | |
395 | 0x00, /* data */ | |
396 | 0x00, /* data */ | |
397 | 0x00, /* data */ | |
398 | 0x00, /* data */ | |
399 | }; | |
400 | ||
401 | struct i2c_msg msg_0 = { | |
402 | .addr = state->config->demod_address, | |
403 | .flags = 0, | |
404 | .buf = buf_0, | |
405 | .len = 6 | |
406 | }; | |
407 | ||
408 | struct i2c_msg msg_1 = { | |
409 | .addr = state->config->demod_address, | |
410 | .flags = 0, | |
411 | .buf = buf_1, | |
412 | .len = 6 | |
413 | }; | |
414 | ||
415 | buf_1[0] = GETBYTE(stb0899_reg_offset, BYTE1); | |
416 | buf_1[1] = GETBYTE(stb0899_reg_offset, BYTE0); | |
417 | buf_1[2] = GETBYTE(stb0899_data, BYTE0); | |
418 | buf_1[3] = GETBYTE(stb0899_data, BYTE1); | |
419 | buf_1[4] = GETBYTE(stb0899_data, BYTE2); | |
420 | buf_1[5] = GETBYTE(stb0899_data, BYTE3); | |
421 | ||
c615a27a | 422 | if (unlikely(*state->verbose >= FE_DEBUGREG)) |
8bd135ba MA |
423 | printk(KERN_DEBUG "%s Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x]\n", |
424 | __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data); | |
425 | ||
426 | status = i2c_transfer(state->i2c, &msg_0, 1); | |
427 | if (unlikely(status < 1)) { | |
428 | if (status != -ERESTARTSYS) | |
429 | printk(KERN_ERR "%s ERR (1), Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x], status=%d\n", | |
430 | __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data, status); | |
431 | goto err; | |
432 | } | |
433 | status = i2c_transfer(state->i2c, &msg_1, 1); | |
434 | if (unlikely(status < 1)) { | |
435 | if (status != -ERESTARTSYS) | |
436 | printk(KERN_ERR "%s ERR (2), Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x], status=%d\n", | |
437 | __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data, status); | |
438 | ||
439 | return status < 0 ? status : -EREMOTEIO; | |
440 | } | |
441 | ||
442 | return 0; | |
443 | ||
444 | err: | |
445 | return status < 0 ? status : -EREMOTEIO; | |
446 | } | |
447 | ||
3d6a3beb | 448 | int stb0899_read_regs(struct stb0899_state *state, unsigned int reg, u8 *buf, u32 count) |
8bd135ba MA |
449 | { |
450 | int status; | |
451 | ||
452 | u8 b0[] = { reg >> 8, reg & 0xff }; | |
453 | ||
454 | struct i2c_msg msg[] = { | |
455 | { | |
456 | .addr = state->config->demod_address, | |
457 | .flags = 0, | |
458 | .buf = b0, | |
459 | .len = 2 | |
460 | },{ | |
461 | .addr = state->config->demod_address, | |
462 | .flags = I2C_M_RD, | |
463 | .buf = buf, | |
464 | .len = count | |
465 | } | |
466 | }; | |
467 | ||
468 | status = i2c_transfer(state->i2c, msg, 2); | |
469 | if (status != 2) { | |
470 | if (status != -ERESTARTSYS) | |
471 | printk(KERN_ERR "%s Read error, Reg=[0x%04x], Count=%u, Status=%d\n", | |
472 | __func__, reg, count, status); | |
473 | goto err; | |
474 | } | |
475 | /* | |
476 | * Bug ID 9: | |
477 | * access to 0xf2xx/0xf6xx | |
478 | * must be followed by read from 0xf2ff/0xf6ff. | |
479 | */ | |
480 | if ((reg != 0xf2ff) && (reg != 0xf6ff) && | |
481 | (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600))) | |
482 | _stb0899_read_reg(state, (reg | 0x00ff)); | |
483 | ||
c615a27a | 484 | if (unlikely(*state->verbose >= FE_DEBUGREG)) { |
8bd135ba MA |
485 | int i; |
486 | ||
487 | printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg); | |
488 | for (i = 0; i < count; i++) { | |
489 | printk(" %02x", buf[i]); | |
490 | } | |
491 | printk("\n"); | |
492 | } | |
493 | ||
494 | return 0; | |
495 | err: | |
496 | return status < 0 ? status : -EREMOTEIO; | |
497 | } | |
498 | ||
85eabac4 | 499 | int stb0899_write_regs(struct stb0899_state *state, unsigned int reg, u8 *data, u32 count) |
8bd135ba MA |
500 | { |
501 | int ret; | |
502 | u8 buf[2 + count]; | |
503 | struct i2c_msg i2c_msg = { | |
504 | .addr = state->config->demod_address, | |
505 | .flags = 0, | |
506 | .buf = buf, | |
507 | .len = 2 + count | |
508 | }; | |
509 | ||
510 | buf[0] = reg >> 8; | |
511 | buf[1] = reg & 0xff; | |
512 | memcpy(&buf[2], data, count); | |
513 | ||
c615a27a | 514 | if (unlikely(*state->verbose >= FE_DEBUGREG)) { |
8bd135ba MA |
515 | int i; |
516 | ||
517 | printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg); | |
518 | for (i = 0; i < count; i++) | |
519 | printk(" %02x", data[i]); | |
520 | printk("\n"); | |
521 | } | |
522 | ret = i2c_transfer(state->i2c, &i2c_msg, 1); | |
523 | ||
524 | /* | |
525 | * Bug ID 9: | |
526 | * access to 0xf2xx/0xf6xx | |
527 | * must be followed by read from 0xf2ff/0xf6ff. | |
528 | */ | |
529 | if ((((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600))) | |
530 | stb0899_read_reg(state, (reg | 0x00ff)); | |
531 | ||
532 | if (ret != 1) { | |
533 | if (ret != -ERESTARTSYS) | |
c615a27a | 534 | dprintk(state->verbose, FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d", |
8bd135ba MA |
535 | reg, data[0], count, ret); |
536 | return ret < 0 ? ret : -EREMOTEIO; | |
537 | } | |
538 | ||
539 | return 0; | |
540 | } | |
541 | ||
542 | int stb0899_write_reg(struct stb0899_state *state, unsigned int reg, u8 data) | |
543 | { | |
544 | return stb0899_write_regs(state, reg, &data, 1); | |
545 | } | |
546 | ||
547 | /* | |
548 | * stb0899_get_mclk | |
549 | * Get STB0899 master clock frequency | |
550 | * ExtClk: external clock frequency (Hz) | |
551 | */ | |
552 | static u32 stb0899_get_mclk(struct stb0899_state *state) | |
553 | { | |
72f78416 | 554 | u32 mclk = 0, div = 0; |
8bd135ba MA |
555 | |
556 | div = stb0899_read_reg(state, STB0899_NCOARSE); | |
557 | mclk = (div + 1) * state->config->xtal_freq / 6; | |
c615a27a | 558 | dprintk(state->verbose, FE_DEBUG, 1, "div=%d, mclk=%d", div, mclk); |
8bd135ba MA |
559 | |
560 | return mclk; | |
561 | } | |
562 | ||
563 | /* | |
564 | * stb0899_set_mclk | |
565 | * Set STB0899 master Clock frequency | |
566 | * Mclk: demodulator master clock | |
567 | * ExtClk: external clock frequency (Hz) | |
568 | */ | |
569 | static void stb0899_set_mclk(struct stb0899_state *state, u32 Mclk) | |
570 | { | |
571 | struct stb0899_internal *internal = &state->internal; | |
572 | u8 mdiv = 0; | |
573 | ||
c615a27a | 574 | dprintk(state->verbose, FE_DEBUG, 1, "state->config=%p", state->config); |
8bd135ba | 575 | mdiv = ((6 * Mclk) / state->config->xtal_freq) - 1; |
c615a27a | 576 | dprintk(state->verbose, FE_DEBUG, 1, "mdiv=%d", mdiv); |
8bd135ba MA |
577 | |
578 | stb0899_write_reg(state, STB0899_NCOARSE, mdiv); | |
579 | internal->master_clk = stb0899_get_mclk(state); | |
580 | ||
c615a27a | 581 | dprintk(state->verbose, FE_DEBUG, 1, "MasterCLOCK=%d", internal->master_clk); |
8bd135ba MA |
582 | } |
583 | ||
b168e351 MA |
584 | static int stb0899_postproc(struct stb0899_state *state, u8 ctl, int enable) |
585 | { | |
586 | struct stb0899_config *config = state->config; | |
043a68b3 | 587 | const struct stb0899_postproc *postproc = config->postproc; |
b168e351 MA |
588 | |
589 | /* post process event */ | |
590 | if (postproc) { | |
591 | if (enable) { | |
9efdd297 | 592 | if (postproc[ctl].level == STB0899_GPIOPULLUP) |
b168e351 MA |
593 | stb0899_write_reg(state, postproc[ctl].gpio, 0x02); |
594 | else | |
595 | stb0899_write_reg(state, postproc[ctl].gpio, 0x82); | |
596 | } else { | |
9efdd297 | 597 | if (postproc[ctl].level == STB0899_GPIOPULLUP) |
b168e351 MA |
598 | stb0899_write_reg(state, postproc[ctl].gpio, 0x82); |
599 | else | |
600 | stb0899_write_reg(state, postproc[ctl].gpio, 0x02); | |
601 | } | |
602 | } | |
603 | return 0; | |
604 | } | |
605 | ||
8bd135ba MA |
606 | static void stb0899_release(struct dvb_frontend *fe) |
607 | { | |
608 | struct stb0899_state *state = fe->demodulator_priv; | |
609 | ||
c615a27a | 610 | dprintk(state->verbose, FE_DEBUG, 1, "Release Frontend"); |
b168e351 MA |
611 | /* post process event */ |
612 | stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 0); | |
8bd135ba MA |
613 | kfree(state); |
614 | } | |
615 | ||
616 | /* | |
617 | * stb0899_get_alpha | |
618 | * return: rolloff | |
619 | */ | |
620 | static int stb0899_get_alpha(struct stb0899_state *state) | |
621 | { | |
622 | u8 mode_coeff; | |
623 | ||
624 | mode_coeff = stb0899_read_reg(state, STB0899_DEMOD); | |
625 | ||
626 | if (STB0899_GETFIELD(MODECOEFF, mode_coeff) == 1) | |
627 | return 20; | |
628 | else | |
629 | return 35; | |
630 | } | |
631 | ||
632 | /* | |
633 | * stb0899_init_calc | |
634 | */ | |
635 | static void stb0899_init_calc(struct stb0899_state *state) | |
636 | { | |
637 | struct stb0899_internal *internal = &state->internal; | |
638 | int master_clk; | |
7d8f1e57 | 639 | u8 agc[2]; |
8bd135ba MA |
640 | u8 agc1cn; |
641 | u32 reg; | |
642 | ||
643 | /* Read registers (in burst mode) */ | |
644 | agc1cn = stb0899_read_reg(state, STB0899_AGC1CN); | |
645 | stb0899_read_regs(state, STB0899_AGC1REF, agc, 2); /* AGC1R and AGC2O */ | |
646 | ||
647 | /* Initial calculations */ | |
648 | master_clk = stb0899_get_mclk(state); | |
649 | internal->t_agc1 = 0; | |
650 | internal->t_agc2 = 0; | |
651 | internal->master_clk = master_clk; | |
652 | internal->mclk = master_clk / 65536L; | |
653 | internal->rolloff = stb0899_get_alpha(state); | |
654 | ||
655 | /* DVBS2 Initial calculations */ | |
656 | /* Set AGC value to the middle */ | |
657 | internal->agc_gain = 8154; | |
658 | reg = STB0899_READ_S2REG(STB0899_S2DEMOD, IF_AGC_CNTRL); | |
659 | STB0899_SETFIELD_VAL(IF_GAIN_INIT, reg, internal->agc_gain); | |
660 | stb0899_write_s2reg(state, STB0899_S2DEMOD, STB0899_BASE_IF_AGC_CNTRL, STB0899_OFF0_IF_AGC_CNTRL, reg); | |
661 | ||
662 | reg = STB0899_READ_S2REG(STB0899_S2DEMOD, RRC_ALPHA); | |
663 | internal->rrc_alpha = STB0899_GETFIELD(RRC_ALPHA, reg); | |
664 | ||
665 | internal->center_freq = 0; | |
666 | internal->av_frame_coarse = 10; | |
667 | internal->av_frame_fine = 20; | |
668 | internal->step_size = 2; | |
669 | /* | |
670 | if ((pParams->SpectralInv == FE_IQ_NORMAL) || (pParams->SpectralInv == FE_IQ_AUTO)) | |
671 | pParams->IQLocked = 0; | |
672 | else | |
673 | pParams->IQLocked = 1; | |
674 | */ | |
675 | } | |
676 | ||
677 | static int stb0899_wait_diseqc_fifo_empty(struct stb0899_state *state, int timeout) | |
678 | { | |
679 | u8 reg = 0; | |
680 | unsigned long start = jiffies; | |
681 | ||
682 | while (1) { | |
683 | reg = stb0899_read_reg(state, STB0899_DISSTATUS); | |
684 | if (!STB0899_GETFIELD(FIFOFULL, reg)) | |
685 | break; | |
686 | if ((jiffies - start) > timeout) { | |
c615a27a | 687 | dprintk(state->verbose, FE_ERROR, 1, "timed out !!"); |
8bd135ba MA |
688 | return -ETIMEDOUT; |
689 | } | |
690 | } | |
691 | ||
692 | return 0; | |
693 | } | |
694 | ||
695 | static int stb0899_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd) | |
696 | { | |
697 | struct stb0899_state *state = fe->demodulator_priv; | |
698 | u8 reg, i; | |
699 | ||
700 | if (cmd->msg_len > 8) | |
701 | return -EINVAL; | |
702 | ||
703 | /* enable FIFO precharge */ | |
704 | reg = stb0899_read_reg(state, STB0899_DISCNTRL1); | |
705 | STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 1); | |
706 | stb0899_write_reg(state, STB0899_DISCNTRL1, reg); | |
707 | for (i = 0; i < cmd->msg_len; i++) { | |
708 | /* wait for FIFO empty */ | |
709 | if (stb0899_wait_diseqc_fifo_empty(state, 10) < 0) | |
710 | return -ETIMEDOUT; | |
711 | ||
712 | stb0899_write_reg(state, STB0899_DISFIFO, cmd->msg[i]); | |
713 | } | |
714 | reg = stb0899_read_reg(state, STB0899_DISCNTRL1); | |
715 | STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0); | |
716 | stb0899_write_reg(state, STB0899_DISCNTRL1, reg); | |
1697c8df | 717 | msleep(100); |
8bd135ba MA |
718 | return 0; |
719 | } | |
720 | ||
721 | static int stb0899_wait_diseqc_rxidle(struct stb0899_state *state, int timeout) | |
722 | { | |
723 | u8 reg = 0; | |
724 | unsigned long start = jiffies; | |
725 | ||
726 | while (!STB0899_GETFIELD(RXEND, reg)) { | |
727 | reg = stb0899_read_reg(state, STB0899_DISRX_ST0); | |
728 | if (jiffies - start > timeout) { | |
c615a27a | 729 | dprintk(state->verbose, FE_ERROR, 1, "timed out!!"); |
8bd135ba MA |
730 | return -ETIMEDOUT; |
731 | } | |
732 | msleep(10); | |
733 | } | |
734 | ||
735 | return 0; | |
736 | } | |
737 | ||
738 | static int stb0899_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply) | |
739 | { | |
740 | struct stb0899_state *state = fe->demodulator_priv; | |
741 | u8 reg, length = 0, i; | |
742 | int result; | |
743 | ||
744 | if (stb0899_wait_diseqc_rxidle(state, 100) < 0) | |
745 | return -ETIMEDOUT; | |
746 | ||
747 | reg = stb0899_read_reg(state, STB0899_DISRX_ST0); | |
748 | if (STB0899_GETFIELD(RXEND, reg)) { | |
749 | ||
750 | reg = stb0899_read_reg(state, STB0899_DISRX_ST1); | |
751 | length = STB0899_GETFIELD(FIFOBYTENBR, reg); | |
752 | ||
753 | if (length > sizeof (reply->msg)) { | |
754 | result = -EOVERFLOW; | |
755 | goto exit; | |
756 | } | |
757 | reply->msg_len = length; | |
758 | ||
759 | /* extract data */ | |
760 | for (i = 0; i < length; i++) | |
761 | reply->msg[i] = stb0899_read_reg(state, STB0899_DISFIFO); | |
762 | } | |
763 | ||
764 | return 0; | |
765 | exit: | |
766 | ||
767 | return result; | |
768 | } | |
769 | ||
770 | static int stb0899_wait_diseqc_txidle(struct stb0899_state *state, int timeout) | |
771 | { | |
772 | u8 reg = 0; | |
773 | unsigned long start = jiffies; | |
774 | ||
775 | while (!STB0899_GETFIELD(TXIDLE, reg)) { | |
776 | reg = stb0899_read_reg(state, STB0899_DISSTATUS); | |
777 | if (jiffies - start > timeout) { | |
c615a27a | 778 | dprintk(state->verbose, FE_ERROR, 1, "timed out!!"); |
8bd135ba MA |
779 | return -ETIMEDOUT; |
780 | } | |
781 | msleep(10); | |
782 | } | |
783 | return 0; | |
784 | } | |
785 | ||
786 | static int stb0899_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst) | |
787 | { | |
788 | struct stb0899_state *state = fe->demodulator_priv; | |
789 | u8 reg, old_state; | |
790 | ||
791 | /* wait for diseqc idle */ | |
792 | if (stb0899_wait_diseqc_txidle(state, 100) < 0) | |
793 | return -ETIMEDOUT; | |
794 | ||
795 | reg = stb0899_read_reg(state, STB0899_DISCNTRL1); | |
796 | old_state = reg; | |
797 | /* set to burst mode */ | |
d284e4f7 | 798 | STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x03); |
8bd135ba MA |
799 | STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x01); |
800 | stb0899_write_reg(state, STB0899_DISCNTRL1, reg); | |
801 | switch (burst) { | |
802 | case SEC_MINI_A: | |
803 | /* unmodulated */ | |
804 | stb0899_write_reg(state, STB0899_DISFIFO, 0x00); | |
805 | break; | |
806 | case SEC_MINI_B: | |
807 | /* modulated */ | |
808 | stb0899_write_reg(state, STB0899_DISFIFO, 0xff); | |
809 | break; | |
810 | } | |
811 | reg = stb0899_read_reg(state, STB0899_DISCNTRL1); | |
812 | STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x00); | |
813 | stb0899_write_reg(state, STB0899_DISCNTRL1, reg); | |
814 | /* wait for diseqc idle */ | |
815 | if (stb0899_wait_diseqc_txidle(state, 100) < 0) | |
816 | return -ETIMEDOUT; | |
817 | ||
818 | /* restore state */ | |
819 | stb0899_write_reg(state, STB0899_DISCNTRL1, old_state); | |
820 | ||
821 | return 0; | |
822 | } | |
823 | ||
6c1022cb MA |
824 | static int stb0899_diseqc_init(struct stb0899_state *state) |
825 | { | |
826 | struct dvb_diseqc_master_cmd tx_data; | |
3f400925 | 827 | /* |
6c1022cb | 828 | struct dvb_diseqc_slave_reply rx_data; |
3f400925 | 829 | */ |
6c1022cb MA |
830 | u8 f22_tx, f22_rx, reg; |
831 | ||
3f400925 | 832 | u32 mclk, tx_freq = 22000;/* count = 0, i; */ |
6c1022cb MA |
833 | tx_data.msg[0] = 0xe2; |
834 | tx_data.msg_len = 3; | |
835 | reg = stb0899_read_reg(state, STB0899_DISCNTRL2); | |
836 | STB0899_SETFIELD_VAL(ONECHIP_TRX, reg, 0); | |
837 | stb0899_write_reg(state, STB0899_DISCNTRL2, reg); | |
838 | ||
839 | /* disable Tx spy */ | |
840 | reg = stb0899_read_reg(state, STB0899_DISCNTRL1); | |
841 | STB0899_SETFIELD_VAL(DISEQCRESET, reg, 1); | |
842 | stb0899_write_reg(state, STB0899_DISCNTRL1, reg); | |
843 | ||
844 | reg = stb0899_read_reg(state, STB0899_DISCNTRL1); | |
845 | STB0899_SETFIELD_VAL(DISEQCRESET, reg, 0); | |
846 | stb0899_write_reg(state, STB0899_DISCNTRL1, reg); | |
847 | ||
848 | mclk = stb0899_get_mclk(state); | |
849 | f22_tx = mclk / (tx_freq * 32); | |
850 | stb0899_write_reg(state, STB0899_DISF22, f22_tx); /* DiSEqC Tx freq */ | |
851 | state->rx_freq = 20000; | |
852 | f22_rx = mclk / (state->rx_freq * 32); | |
853 | ||
854 | return 0; | |
855 | } | |
8bd135ba MA |
856 | |
857 | static int stb0899_sleep(struct dvb_frontend *fe) | |
858 | { | |
859 | struct stb0899_state *state = fe->demodulator_priv; | |
3f400925 | 860 | /* |
8bd135ba | 861 | u8 reg; |
3f400925 | 862 | */ |
c615a27a | 863 | dprintk(state->verbose, FE_DEBUG, 1, "Going to Sleep .. (Really tired .. :-))"); |
b168e351 MA |
864 | /* post process event */ |
865 | stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 0); | |
866 | ||
8bd135ba MA |
867 | return 0; |
868 | } | |
869 | ||
870 | static int stb0899_wakeup(struct dvb_frontend *fe) | |
871 | { | |
872 | int rc; | |
873 | struct stb0899_state *state = fe->demodulator_priv; | |
874 | ||
de29eb82 MA |
875 | if ((rc = stb0899_write_reg(state, STB0899_SYNTCTRL, STB0899_SELOSCI))) |
876 | return rc; | |
877 | /* Activate all clocks; DVB-S2 registers are inaccessible otherwise. */ | |
878 | if ((rc = stb0899_write_reg(state, STB0899_STOPCLK1, 0x00))) | |
879 | return rc; | |
880 | if ((rc = stb0899_write_reg(state, STB0899_STOPCLK2, 0x00))) | |
881 | return rc; | |
8bd135ba | 882 | |
b168e351 MA |
883 | /* post process event */ |
884 | stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 1); | |
885 | ||
8bd135ba MA |
886 | return 0; |
887 | } | |
888 | ||
889 | static int stb0899_init(struct dvb_frontend *fe) | |
890 | { | |
891 | int i; | |
892 | struct stb0899_state *state = fe->demodulator_priv; | |
893 | struct stb0899_config *config = state->config; | |
894 | ||
c615a27a | 895 | dprintk(state->verbose, FE_DEBUG, 1, "Initializing STB0899 ... "); |
8bd135ba MA |
896 | |
897 | /* init device */ | |
c615a27a | 898 | dprintk(state->verbose, FE_DEBUG, 1, "init device"); |
8bd135ba MA |
899 | for (i = 0; config->init_dev[i].address != 0xffff; i++) |
900 | stb0899_write_reg(state, config->init_dev[i].address, config->init_dev[i].data); | |
901 | ||
c615a27a | 902 | dprintk(state->verbose, FE_DEBUG, 1, "init S2 demod"); |
8bd135ba MA |
903 | /* init S2 demod */ |
904 | for (i = 0; config->init_s2_demod[i].offset != 0xffff; i++) | |
905 | stb0899_write_s2reg(state, STB0899_S2DEMOD, | |
906 | config->init_s2_demod[i].base_address, | |
907 | config->init_s2_demod[i].offset, | |
908 | config->init_s2_demod[i].data); | |
909 | ||
c615a27a | 910 | dprintk(state->verbose, FE_DEBUG, 1, "init S1 demod"); |
8bd135ba MA |
911 | /* init S1 demod */ |
912 | for (i = 0; config->init_s1_demod[i].address != 0xffff; i++) | |
913 | stb0899_write_reg(state, config->init_s1_demod[i].address, config->init_s1_demod[i].data); | |
914 | ||
c615a27a | 915 | dprintk(state->verbose, FE_DEBUG, 1, "init S2 FEC"); |
8bd135ba MA |
916 | /* init S2 fec */ |
917 | for (i = 0; config->init_s2_fec[i].offset != 0xffff; i++) | |
918 | stb0899_write_s2reg(state, STB0899_S2FEC, | |
919 | config->init_s2_fec[i].base_address, | |
920 | config->init_s2_fec[i].offset, | |
921 | config->init_s2_fec[i].data); | |
922 | ||
c615a27a | 923 | dprintk(state->verbose, FE_DEBUG, 1, "init TST"); |
8bd135ba MA |
924 | /* init test */ |
925 | for (i = 0; config->init_tst[i].address != 0xffff; i++) | |
926 | stb0899_write_reg(state, config->init_tst[i].address, config->init_tst[i].data); | |
927 | ||
928 | stb0899_init_calc(state); | |
6c1022cb | 929 | stb0899_diseqc_init(state); |
8bd135ba MA |
930 | |
931 | return 0; | |
932 | } | |
933 | ||
934 | static int stb0899_table_lookup(const struct stb0899_tab *tab, int max, int val) | |
935 | { | |
936 | int res = 0; | |
937 | int min = 0, med; | |
938 | ||
939 | if (val < tab[min].read) | |
940 | res = tab[min].real; | |
941 | else if (val >= tab[max].read) | |
942 | res = tab[max].real; | |
943 | else { | |
944 | while ((max - min) > 1) { | |
945 | med = (max + min) / 2; | |
946 | if (val >= tab[min].read && val < tab[med].read) | |
947 | max = med; | |
948 | else | |
949 | min = med; | |
950 | } | |
951 | res = ((val - tab[min].read) * | |
952 | (tab[max].real - tab[min].real) / | |
953 | (tab[max].read - tab[min].read)) + | |
954 | tab[min].real; | |
955 | } | |
956 | ||
957 | return res; | |
958 | } | |
959 | ||
960 | static int stb0899_read_signal_strength(struct dvb_frontend *fe, u16 *strength) | |
961 | { | |
962 | struct stb0899_state *state = fe->demodulator_priv; | |
963 | struct stb0899_internal *internal = &state->internal; | |
964 | ||
965 | int val; | |
966 | u32 reg; | |
967 | switch (state->delsys) { | |
3f400925 MA |
968 | case SYS_DVBS: |
969 | case SYS_DSS: | |
8bd135ba MA |
970 | if (internal->lock) { |
971 | reg = stb0899_read_reg(state, STB0899_VSTATUS); | |
972 | if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) { | |
973 | ||
974 | reg = stb0899_read_reg(state, STB0899_AGCIQIN); | |
975 | val = (s32)(s8)STB0899_GETFIELD(AGCIQVALUE, reg); | |
976 | ||
977 | *strength = stb0899_table_lookup(stb0899_dvbsrf_tab, ARRAY_SIZE(stb0899_dvbsrf_tab) - 1, val); | |
978 | *strength += 750; | |
c615a27a | 979 | dprintk(state->verbose, FE_DEBUG, 1, "AGCIQVALUE = 0x%02x, C = %d * 0.1 dBm", |
8bd135ba MA |
980 | val & 0xff, *strength); |
981 | } | |
982 | } | |
983 | break; | |
3f400925 | 984 | case SYS_DVBS2: |
8bd135ba MA |
985 | if (internal->lock) { |
986 | reg = STB0899_READ_S2REG(STB0899_DEMOD, IF_AGC_GAIN); | |
987 | val = STB0899_GETFIELD(IF_AGC_GAIN, reg); | |
988 | ||
989 | *strength = stb0899_table_lookup(stb0899_dvbs2rf_tab, ARRAY_SIZE(stb0899_dvbs2rf_tab) - 1, val); | |
990 | *strength += 750; | |
c615a27a | 991 | dprintk(state->verbose, FE_DEBUG, 1, "IF_AGC_GAIN = 0x%04x, C = %d * 0.1 dBm", |
8bd135ba MA |
992 | val & 0x3fff, *strength); |
993 | } | |
994 | break; | |
995 | default: | |
c615a27a | 996 | dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system"); |
417dd69d | 997 | return -EINVAL; |
8bd135ba MA |
998 | } |
999 | ||
1000 | return 0; | |
1001 | } | |
1002 | ||
1003 | static int stb0899_read_snr(struct dvb_frontend *fe, u16 *snr) | |
1004 | { | |
1005 | struct stb0899_state *state = fe->demodulator_priv; | |
1006 | struct stb0899_internal *internal = &state->internal; | |
1007 | ||
1008 | unsigned int val, quant, quantn = -1, est, estn = -1; | |
1009 | u8 buf[2]; | |
1010 | u32 reg; | |
1011 | ||
1012 | reg = stb0899_read_reg(state, STB0899_VSTATUS); | |
1013 | switch (state->delsys) { | |
3f400925 MA |
1014 | case SYS_DVBS: |
1015 | case SYS_DSS: | |
8bd135ba MA |
1016 | if (internal->lock) { |
1017 | if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) { | |
1018 | ||
1019 | stb0899_read_regs(state, STB0899_NIRM, buf, 2); | |
1020 | val = MAKEWORD16(buf[0], buf[1]); | |
1021 | ||
1022 | *snr = stb0899_table_lookup(stb0899_cn_tab, ARRAY_SIZE(stb0899_cn_tab) - 1, val); | |
c615a27a | 1023 | dprintk(state->verbose, FE_DEBUG, 1, "NIR = 0x%02x%02x = %u, C/N = %d * 0.1 dBm\n", |
8bd135ba MA |
1024 | buf[0], buf[1], val, *snr); |
1025 | } | |
1026 | } | |
1027 | break; | |
3f400925 | 1028 | case SYS_DVBS2: |
8bd135ba MA |
1029 | if (internal->lock) { |
1030 | reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_CNTRL1); | |
1031 | quant = STB0899_GETFIELD(UWP_ESN0_QUANT, reg); | |
1032 | reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_STAT2); | |
1033 | est = STB0899_GETFIELD(ESN0_EST, reg); | |
1034 | if (est == 1) | |
1035 | val = 301; /* C/N = 30.1 dB */ | |
1036 | else if (est == 2) | |
1037 | val = 270; /* C/N = 27.0 dB */ | |
1038 | else { | |
1039 | /* quantn = 100 * log(quant^2) */ | |
1040 | quantn = stb0899_table_lookup(stb0899_quant_tab, ARRAY_SIZE(stb0899_quant_tab) - 1, quant * 100); | |
1041 | /* estn = 100 * log(est) */ | |
1042 | estn = stb0899_table_lookup(stb0899_est_tab, ARRAY_SIZE(stb0899_est_tab) - 1, est); | |
1043 | /* snr(dBm/10) = -10*(log(est)-log(quant^2)) => snr(dBm/10) = (100*log(quant^2)-100*log(est))/10 */ | |
1044 | val = (quantn - estn) / 10; | |
1045 | } | |
1046 | *snr = val; | |
c615a27a | 1047 | dprintk(state->verbose, FE_DEBUG, 1, "Es/N0 quant = %d (%d) estimate = %u (%d), C/N = %d * 0.1 dBm", |
8bd135ba MA |
1048 | quant, quantn, est, estn, val); |
1049 | } | |
1050 | break; | |
1051 | default: | |
c615a27a | 1052 | dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system"); |
417dd69d | 1053 | return -EINVAL; |
8bd135ba MA |
1054 | } |
1055 | ||
1056 | return 0; | |
1057 | } | |
1058 | ||
1059 | static int stb0899_read_status(struct dvb_frontend *fe, enum fe_status *status) | |
1060 | { | |
1061 | struct stb0899_state *state = fe->demodulator_priv; | |
1062 | struct stb0899_internal *internal = &state->internal; | |
1063 | u8 reg; | |
1064 | *status = 0; | |
1065 | ||
1066 | switch (state->delsys) { | |
3f400925 MA |
1067 | case SYS_DVBS: |
1068 | case SYS_DSS: | |
8bd135ba MA |
1069 | dprintk(state->verbose, FE_DEBUG, 1, "Delivery system DVB-S/DSS"); |
1070 | if (internal->lock) { | |
1071 | reg = stb0899_read_reg(state, STB0899_VSTATUS); | |
1072 | if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) { | |
1073 | dprintk(state->verbose, FE_DEBUG, 1, "--------> FE_HAS_CARRIER | FE_HAS_LOCK"); | |
1074 | *status |= FE_HAS_CARRIER | FE_HAS_LOCK; | |
1075 | ||
1076 | reg = stb0899_read_reg(state, STB0899_PLPARM); | |
1077 | if (STB0899_GETFIELD(VITCURPUN, reg)) { | |
1078 | dprintk(state->verbose, FE_DEBUG, 1, "--------> FE_HAS_VITERBI | FE_HAS_SYNC"); | |
1079 | *status |= FE_HAS_VITERBI | FE_HAS_SYNC; | |
b168e351 MA |
1080 | /* post process event */ |
1081 | stb0899_postproc(state, STB0899_POSTPROC_GPIO_LOCK, 1); | |
8bd135ba MA |
1082 | } |
1083 | } | |
1084 | } | |
1085 | break; | |
3f400925 | 1086 | case SYS_DVBS2: |
8bd135ba MA |
1087 | dprintk(state->verbose, FE_DEBUG, 1, "Delivery system DVB-S2"); |
1088 | if (internal->lock) { | |
1089 | reg = STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_STAT2); | |
1090 | if (STB0899_GETFIELD(UWP_LOCK, reg) && STB0899_GETFIELD(CSM_LOCK, reg)) { | |
1091 | *status |= FE_HAS_CARRIER; | |
1092 | dprintk(state->verbose, FE_DEBUG, 1, | |
1093 | "UWP & CSM Lock ! ---> DVB-S2 FE_HAS_CARRIER"); | |
1094 | ||
1095 | reg = stb0899_read_reg(state, STB0899_CFGPDELSTATUS1); | |
1096 | if (STB0899_GETFIELD(CFGPDELSTATUS_LOCK, reg)) { | |
1097 | *status |= FE_HAS_LOCK; | |
1098 | dprintk(state->verbose, FE_DEBUG, 1, | |
1099 | "Packet Delineator Locked ! -----> DVB-S2 FE_HAS_LOCK"); | |
1100 | ||
1101 | } | |
1102 | if (STB0899_GETFIELD(CONTINUOUS_STREAM, reg)) { | |
1103 | *status |= FE_HAS_VITERBI; | |
1104 | dprintk(state->verbose, FE_DEBUG, 1, | |
1105 | "Packet Delineator found VITERBI ! -----> DVB-S2 FE_HAS_VITERBI"); | |
1106 | } | |
1107 | if (STB0899_GETFIELD(ACCEPTED_STREAM, reg)) { | |
1108 | *status |= FE_HAS_SYNC; | |
1109 | dprintk(state->verbose, FE_DEBUG, 1, | |
1110 | "Packet Delineator found SYNC ! -----> DVB-S2 FE_HAS_SYNC"); | |
b168e351 MA |
1111 | /* post process event */ |
1112 | stb0899_postproc(state, STB0899_POSTPROC_GPIO_LOCK, 1); | |
8bd135ba MA |
1113 | } |
1114 | } | |
1115 | } | |
1116 | break; | |
1117 | default: | |
c615a27a | 1118 | dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system"); |
417dd69d | 1119 | return -EINVAL; |
8bd135ba MA |
1120 | } |
1121 | return 0; | |
1122 | } | |
1123 | ||
1124 | /* | |
1125 | * stb0899_get_error | |
1126 | * viterbi error for DVB-S/DSS | |
1127 | * packet error for DVB-S2 | |
1128 | * Bit Error Rate or Packet Error Rate * 10 ^ 7 | |
1129 | */ | |
1130 | static int stb0899_read_ber(struct dvb_frontend *fe, u32 *ber) | |
1131 | { | |
1132 | struct stb0899_state *state = fe->demodulator_priv; | |
1133 | struct stb0899_internal *internal = &state->internal; | |
1134 | ||
1135 | u8 lsb, msb; | |
1136 | u32 i; | |
1137 | ||
1138 | *ber = 0; | |
1139 | ||
1140 | switch (state->delsys) { | |
3f400925 MA |
1141 | case SYS_DVBS: |
1142 | case SYS_DSS: | |
8bd135ba MA |
1143 | if (internal->lock) { |
1144 | /* average 5 BER values */ | |
1145 | for (i = 0; i < 5; i++) { | |
1146 | msleep(100); | |
1147 | lsb = stb0899_read_reg(state, STB0899_ECNT1L); | |
1148 | msb = stb0899_read_reg(state, STB0899_ECNT1M); | |
1149 | *ber += MAKEWORD16(msb, lsb); | |
1150 | } | |
1151 | *ber /= 5; | |
1152 | /* Viterbi Check */ | |
1153 | if (STB0899_GETFIELD(VSTATUS_PRFVIT, internal->v_status)) { | |
1154 | /* Error Rate */ | |
1155 | *ber *= 9766; | |
1156 | /* ber = ber * 10 ^ 7 */ | |
1157 | *ber /= (-1 + (1 << (2 * STB0899_GETFIELD(NOE, internal->err_ctrl)))); | |
1158 | *ber /= 8; | |
1159 | } | |
1160 | } | |
1161 | break; | |
3f400925 | 1162 | case SYS_DVBS2: |
8bd135ba MA |
1163 | if (internal->lock) { |
1164 | /* Average 5 PER values */ | |
1165 | for (i = 0; i < 5; i++) { | |
1166 | msleep(100); | |
1167 | lsb = stb0899_read_reg(state, STB0899_ECNT1L); | |
1168 | msb = stb0899_read_reg(state, STB0899_ECNT1M); | |
1169 | *ber += MAKEWORD16(msb, lsb); | |
1170 | } | |
1171 | /* ber = ber * 10 ^ 7 */ | |
1172 | *ber *= 10000000; | |
1173 | *ber /= (-1 + (1 << (4 + 2 * STB0899_GETFIELD(NOE, internal->err_ctrl)))); | |
1174 | } | |
1175 | break; | |
1176 | default: | |
c615a27a | 1177 | dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system"); |
417dd69d | 1178 | return -EINVAL; |
8bd135ba MA |
1179 | } |
1180 | ||
1181 | return 0; | |
1182 | } | |
1183 | ||
1184 | static int stb0899_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
1185 | { | |
1186 | struct stb0899_state *state = fe->demodulator_priv; | |
1187 | ||
1188 | switch (voltage) { | |
1189 | case SEC_VOLTAGE_13: | |
1190 | stb0899_write_reg(state, STB0899_GPIO00CFG, 0x82); | |
1191 | stb0899_write_reg(state, STB0899_GPIO01CFG, 0x02); | |
1192 | stb0899_write_reg(state, STB0899_GPIO02CFG, 0x00); | |
1193 | break; | |
1194 | case SEC_VOLTAGE_18: | |
1195 | stb0899_write_reg(state, STB0899_GPIO00CFG, 0x02); | |
1196 | stb0899_write_reg(state, STB0899_GPIO01CFG, 0x02); | |
1197 | stb0899_write_reg(state, STB0899_GPIO02CFG, 0x82); | |
1198 | break; | |
1199 | case SEC_VOLTAGE_OFF: | |
1200 | stb0899_write_reg(state, STB0899_GPIO00CFG, 0x82); | |
1201 | stb0899_write_reg(state, STB0899_GPIO01CFG, 0x82); | |
1202 | stb0899_write_reg(state, STB0899_GPIO02CFG, 0x82); | |
1203 | break; | |
1204 | default: | |
1205 | return -EINVAL; | |
1206 | } | |
1207 | ||
1208 | return 0; | |
1209 | } | |
1210 | ||
1211 | static int stb0899_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone) | |
1212 | { | |
1213 | struct stb0899_state *state = fe->demodulator_priv; | |
1214 | struct stb0899_internal *internal = &state->internal; | |
1215 | ||
baa40e48 | 1216 | u8 div, reg; |
8bd135ba MA |
1217 | |
1218 | /* wait for diseqc idle */ | |
1219 | if (stb0899_wait_diseqc_txidle(state, 100) < 0) | |
1220 | return -ETIMEDOUT; | |
1221 | ||
1222 | switch (tone) { | |
1223 | case SEC_TONE_ON: | |
1224 | div = (internal->master_clk / 100) / 5632; | |
1225 | div = (div + 5) / 10; | |
1226 | stb0899_write_reg(state, STB0899_DISEQCOCFG, 0x66); | |
baa40e48 MA |
1227 | reg = stb0899_read_reg(state, STB0899_ACRPRESC); |
1228 | STB0899_SETFIELD_VAL(ACRPRESC, reg, 0x03); | |
1229 | stb0899_write_reg(state, STB0899_ACRPRESC, reg); | |
8bd135ba MA |
1230 | stb0899_write_reg(state, STB0899_ACRDIV1, div); |
1231 | break; | |
1232 | case SEC_TONE_OFF: | |
1233 | stb0899_write_reg(state, STB0899_DISEQCOCFG, 0x20); | |
1234 | break; | |
1235 | default: | |
417dd69d | 1236 | return -EINVAL; |
8bd135ba MA |
1237 | } |
1238 | return 0; | |
1239 | } | |
1240 | ||
40e8ce3d | 1241 | int stb0899_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) |
8bd135ba MA |
1242 | { |
1243 | int i2c_stat; | |
1244 | struct stb0899_state *state = fe->demodulator_priv; | |
1245 | ||
1246 | i2c_stat = stb0899_read_reg(state, STB0899_I2CRPT); | |
1247 | if (i2c_stat < 0) | |
1248 | goto err; | |
1249 | ||
1250 | if (enable) { | |
1251 | dprintk(state->verbose, FE_DEBUG, 1, "Enabling I2C Repeater ..."); | |
1252 | i2c_stat |= STB0899_I2CTON; | |
1253 | if (stb0899_write_reg(state, STB0899_I2CRPT, i2c_stat) < 0) | |
1254 | goto err; | |
40e8ce3d MA |
1255 | } else { |
1256 | dprintk(state->verbose, FE_DEBUG, 1, "Disabling I2C Repeater ..."); | |
1257 | i2c_stat &= ~STB0899_I2CTON; | |
1258 | if (stb0899_write_reg(state, STB0899_I2CRPT, i2c_stat) < 0) | |
1259 | goto err; | |
8bd135ba MA |
1260 | } |
1261 | return 0; | |
1262 | err: | |
40e8ce3d | 1263 | dprintk(state->verbose, FE_ERROR, 1, "I2C Repeater control failed"); |
8bd135ba MA |
1264 | return -EREMOTEIO; |
1265 | } | |
1266 | ||
1267 | ||
1268 | static inline void CONVERT32(u32 x, char *str) | |
1269 | { | |
1270 | *str++ = (x >> 24) & 0xff; | |
1271 | *str++ = (x >> 16) & 0xff; | |
1272 | *str++ = (x >> 8) & 0xff; | |
1273 | *str++ = (x >> 0) & 0xff; | |
1274 | *str = '\0'; | |
1275 | } | |
1276 | ||
1277 | int stb0899_get_dev_id(struct stb0899_state *state) | |
1278 | { | |
1279 | u8 chip_id, release; | |
1280 | u16 id; | |
1281 | u32 demod_ver = 0, fec_ver = 0; | |
56137411 RN |
1282 | char demod_str[5] = { 0 }; |
1283 | char fec_str[5] = { 0 }; | |
8bd135ba MA |
1284 | |
1285 | id = stb0899_read_reg(state, STB0899_DEV_ID); | |
1286 | dprintk(state->verbose, FE_DEBUG, 1, "ID reg=[0x%02x]", id); | |
1287 | chip_id = STB0899_GETFIELD(CHIP_ID, id); | |
1288 | release = STB0899_GETFIELD(CHIP_REL, id); | |
1289 | ||
1290 | dprintk(state->verbose, FE_ERROR, 1, "Device ID=[%d], Release=[%d]", | |
1291 | chip_id, release); | |
1292 | ||
1293 | CONVERT32(STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_CORE_ID), (char *)&demod_str); | |
1294 | ||
1295 | demod_ver = STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_VERSION_ID); | |
1296 | dprintk(state->verbose, FE_ERROR, 1, "Demodulator Core ID=[%s], Version=[%d]", (char *) &demod_str, demod_ver); | |
1297 | CONVERT32(STB0899_READ_S2REG(STB0899_S2FEC, FEC_CORE_ID_REG), (char *)&fec_str); | |
1298 | fec_ver = STB0899_READ_S2REG(STB0899_S2FEC, FEC_VER_ID_REG); | |
1299 | if (! (chip_id > 0)) { | |
1300 | dprintk(state->verbose, FE_ERROR, 1, "couldn't find a STB 0899"); | |
1301 | ||
1302 | return -ENODEV; | |
1303 | } | |
1304 | dprintk(state->verbose, FE_ERROR, 1, "FEC Core ID=[%s], Version=[%d]", (char*) &fec_str, fec_ver); | |
1305 | ||
1306 | return 0; | |
1307 | } | |
1308 | ||
e399a789 | 1309 | static void stb0899_set_delivery(struct stb0899_state *state) |
8bd135ba MA |
1310 | { |
1311 | u8 reg; | |
1312 | u8 stop_clk[2]; | |
1313 | ||
1314 | stop_clk[0] = stb0899_read_reg(state, STB0899_STOPCLK1); | |
1315 | stop_clk[1] = stb0899_read_reg(state, STB0899_STOPCLK2); | |
1316 | ||
1317 | switch (state->delsys) { | |
3f400925 | 1318 | case SYS_DVBS: |
c615a27a | 1319 | dprintk(state->verbose, FE_DEBUG, 1, "Delivery System -- DVB-S"); |
8bd135ba MA |
1320 | /* FECM/Viterbi ON */ |
1321 | reg = stb0899_read_reg(state, STB0899_FECM); | |
1322 | STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0); | |
1323 | STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1); | |
1324 | stb0899_write_reg(state, STB0899_FECM, reg); | |
1325 | ||
1326 | stb0899_write_reg(state, STB0899_RSULC, 0xb1); | |
1327 | stb0899_write_reg(state, STB0899_TSULC, 0x40); | |
1328 | stb0899_write_reg(state, STB0899_RSLLC, 0x42); | |
1329 | stb0899_write_reg(state, STB0899_TSLPL, 0x12); | |
1330 | ||
1331 | reg = stb0899_read_reg(state, STB0899_TSTRES); | |
1332 | STB0899_SETFIELD_VAL(FRESLDPC, reg, 1); | |
1333 | stb0899_write_reg(state, STB0899_TSTRES, reg); | |
1334 | ||
1335 | STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1); | |
1336 | STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 1); | |
1337 | STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 1); | |
1338 | ||
1339 | STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 1); | |
1340 | STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 1); | |
1341 | ||
1342 | STB0899_SETFIELD_VAL(STOP_CKINTBUF216, stop_clk[0], 1); | |
18527bee | 1343 | STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0); |
8bd135ba MA |
1344 | |
1345 | STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 1); | |
1346 | break; | |
3f400925 | 1347 | case SYS_DVBS2: |
8bd135ba MA |
1348 | /* FECM/Viterbi OFF */ |
1349 | reg = stb0899_read_reg(state, STB0899_FECM); | |
1350 | STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0); | |
1351 | STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 0); | |
1352 | stb0899_write_reg(state, STB0899_FECM, reg); | |
1353 | ||
1354 | stb0899_write_reg(state, STB0899_RSULC, 0xb1); | |
1355 | stb0899_write_reg(state, STB0899_TSULC, 0x42); | |
1356 | stb0899_write_reg(state, STB0899_RSLLC, 0x40); | |
1357 | stb0899_write_reg(state, STB0899_TSLPL, 0x02); | |
1358 | ||
1359 | reg = stb0899_read_reg(state, STB0899_TSTRES); | |
1360 | STB0899_SETFIELD_VAL(FRESLDPC, reg, 0); | |
1361 | stb0899_write_reg(state, STB0899_TSTRES, reg); | |
1362 | ||
1363 | STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1); | |
1364 | STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 0); | |
1365 | STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 0); | |
1366 | ||
1367 | STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 0); | |
1368 | STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 0); | |
1369 | ||
1370 | STB0899_SETFIELD_VAL(STOP_CKINTBUF216, stop_clk[0], 0); | |
1371 | STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0); | |
1372 | ||
1373 | STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 0); | |
1374 | break; | |
3f400925 | 1375 | case SYS_DSS: |
8bd135ba MA |
1376 | /* FECM/Viterbi ON */ |
1377 | reg = stb0899_read_reg(state, STB0899_FECM); | |
1378 | STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 1); | |
1379 | STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1); | |
1380 | stb0899_write_reg(state, STB0899_FECM, reg); | |
1381 | ||
1382 | stb0899_write_reg(state, STB0899_RSULC, 0xa1); | |
1383 | stb0899_write_reg(state, STB0899_TSULC, 0x61); | |
1384 | stb0899_write_reg(state, STB0899_RSLLC, 0x42); | |
1385 | ||
1386 | reg = stb0899_read_reg(state, STB0899_TSTRES); | |
1387 | STB0899_SETFIELD_VAL(FRESLDPC, reg, 1); | |
1388 | stb0899_write_reg(state, STB0899_TSTRES, reg); | |
1389 | ||
1390 | STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1); | |
1391 | STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 1); | |
1392 | STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 1); | |
1393 | ||
1394 | STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 1); | |
1395 | STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 1); | |
1396 | ||
1397 | STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0); | |
1398 | ||
1399 | STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 1); | |
1400 | break; | |
1401 | default: | |
c615a27a | 1402 | dprintk(state->verbose, FE_ERROR, 1, "Unsupported delivery system"); |
8bd135ba MA |
1403 | break; |
1404 | } | |
1405 | STB0899_SETFIELD_VAL(STOP_CKADCI108, stop_clk[0], 0); | |
1406 | stb0899_write_regs(state, STB0899_STOPCLK1, stop_clk, 2); | |
1407 | } | |
1408 | ||
1409 | /* | |
1410 | * stb0899_set_iterations | |
1411 | * set the LDPC iteration scale function | |
1412 | */ | |
1413 | static void stb0899_set_iterations(struct stb0899_state *state) | |
1414 | { | |
1415 | struct stb0899_internal *internal = &state->internal; | |
1416 | struct stb0899_config *config = state->config; | |
1417 | ||
1418 | s32 iter_scale; | |
1419 | u32 reg; | |
1420 | ||
1421 | iter_scale = 17 * (internal->master_clk / 1000); | |
1422 | iter_scale += 410000; | |
1423 | iter_scale /= (internal->srate / 1000000); | |
1424 | iter_scale /= 1000; | |
1425 | ||
1426 | if (iter_scale > config->ldpc_max_iter) | |
1427 | iter_scale = config->ldpc_max_iter; | |
1428 | ||
699cc196 | 1429 | reg = STB0899_READ_S2REG(STB0899_S2FEC, MAX_ITER); |
8bd135ba | 1430 | STB0899_SETFIELD_VAL(MAX_ITERATIONS, reg, iter_scale); |
699cc196 | 1431 | stb0899_write_s2reg(state, STB0899_S2FEC, STB0899_BASE_MAX_ITER, STB0899_OFF0_MAX_ITER, reg); |
8bd135ba MA |
1432 | } |
1433 | ||
3f400925 | 1434 | static enum dvbfe_search stb0899_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) |
8bd135ba MA |
1435 | { |
1436 | struct stb0899_state *state = fe->demodulator_priv; | |
1437 | struct stb0899_params *i_params = &state->params; | |
1438 | struct stb0899_internal *internal = &state->internal; | |
b91a7cb0 | 1439 | struct stb0899_config *config = state->config; |
3f400925 | 1440 | struct dtv_frontend_properties *props = &fe->dtv_property_cache; |
8bd135ba MA |
1441 | |
1442 | u32 SearchRange, gain; | |
1443 | ||
3f400925 MA |
1444 | i_params->freq = p->frequency; |
1445 | i_params->srate = p->u.qpsk.symbol_rate; | |
1446 | state->delsys = props->delivery_system; | |
c615a27a | 1447 | dprintk(state->verbose, FE_DEBUG, 1, "delivery system=%d", state->delsys); |
8bd135ba | 1448 | |
763fbaf6 | 1449 | SearchRange = 10000000; |
c615a27a | 1450 | dprintk(state->verbose, FE_DEBUG, 1, "Frequency=%d, Srate=%d", i_params->freq, i_params->srate); |
8bd135ba MA |
1451 | /* checking Search Range is meaningless for a fixed 3 Mhz */ |
1452 | if (INRANGE(i_params->srate, 1000000, 45000000)) { | |
c615a27a | 1453 | dprintk(state->verbose, FE_DEBUG, 1, "Parameters IN RANGE"); |
e399a789 | 1454 | stb0899_set_delivery(state); |
8bd135ba MA |
1455 | |
1456 | if (state->config->tuner_set_rfsiggain) { | |
1457 | if (internal->srate > 15000000) | |
3f400925 | 1458 | gain = 8; /* 15Mb < srate < 45Mb, gain = 8dB */ |
8bd135ba | 1459 | else if (internal->srate > 5000000) |
3f400925 | 1460 | gain = 12; /* 5Mb < srate < 15Mb, gain = 12dB */ |
8bd135ba | 1461 | else |
3f400925 | 1462 | gain = 14; /* 1Mb < srate < 5Mb, gain = 14db */ |
8bd135ba MA |
1463 | state->config->tuner_set_rfsiggain(fe, gain); |
1464 | } | |
1465 | ||
1466 | if (i_params->srate <= 5000000) | |
b91a7cb0 | 1467 | stb0899_set_mclk(state, config->lo_clk); |
8bd135ba | 1468 | else |
b91a7cb0 | 1469 | stb0899_set_mclk(state, config->hi_clk); |
8bd135ba MA |
1470 | |
1471 | switch (state->delsys) { | |
3f400925 MA |
1472 | case SYS_DVBS: |
1473 | case SYS_DSS: | |
c615a27a | 1474 | dprintk(state->verbose, FE_DEBUG, 1, "DVB-S delivery system"); |
8bd135ba MA |
1475 | internal->freq = i_params->freq; |
1476 | internal->srate = i_params->srate; | |
1477 | /* | |
1478 | * search = user search range + | |
1479 | * 500Khz + | |
1480 | * 2 * Tuner_step_size + | |
1481 | * 10% of the symbol rate | |
1482 | */ | |
1483 | internal->srch_range = SearchRange + 1500000 + (i_params->srate / 5); | |
1484 | internal->derot_percent = 30; | |
1485 | ||
1486 | /* What to do for tuners having no bandwidth setup ? */ | |
40e8ce3d MA |
1487 | /* enable tuner I/O */ |
1488 | stb0899_i2c_gate_ctrl(&state->frontend, 1); | |
1489 | ||
8bd135ba | 1490 | if (state->config->tuner_set_bandwidth) |
02ec9d8f | 1491 | state->config->tuner_set_bandwidth(fe, (13 * (stb0899_carr_width(state) + SearchRange)) / 10); |
8bd135ba MA |
1492 | if (state->config->tuner_get_bandwidth) |
1493 | state->config->tuner_get_bandwidth(fe, &internal->tuner_bw); | |
40e8ce3d MA |
1494 | |
1495 | /* disable tuner I/O */ | |
1496 | stb0899_i2c_gate_ctrl(&state->frontend, 0); | |
1497 | ||
8bd135ba MA |
1498 | /* Set DVB-S1 AGC */ |
1499 | stb0899_write_reg(state, STB0899_AGCRFCFG, 0x11); | |
1500 | ||
1501 | /* Run the search algorithm */ | |
c615a27a | 1502 | dprintk(state->verbose, FE_DEBUG, 1, "running DVB-S search algo .."); |
8bd135ba MA |
1503 | if (stb0899_dvbs_algo(state) == RANGEOK) { |
1504 | internal->lock = 1; | |
c615a27a | 1505 | dprintk(state->verbose, FE_DEBUG, 1, |
8bd135ba MA |
1506 | "-------------------------------------> DVB-S LOCK !"); |
1507 | ||
1508 | // stb0899_write_reg(state, STB0899_ERRCTRL1, 0x3d); /* Viterbi Errors */ | |
1509 | // internal->v_status = stb0899_read_reg(state, STB0899_VSTATUS); | |
1510 | // internal->err_ctrl = stb0899_read_reg(state, STB0899_ERRCTRL1); | |
c615a27a RN |
1511 | // dprintk(state->verbose, FE_DEBUG, 1, "VSTATUS=0x%02x", internal->v_status); |
1512 | // dprintk(state->verbose, FE_DEBUG, 1, "ERR_CTRL=0x%02x", internal->err_ctrl); | |
8bd135ba MA |
1513 | |
1514 | return DVBFE_ALGO_SEARCH_SUCCESS; | |
1515 | } else { | |
1516 | internal->lock = 0; | |
1517 | ||
1518 | return DVBFE_ALGO_SEARCH_FAILED; | |
1519 | } | |
1520 | break; | |
3f400925 | 1521 | case SYS_DVBS2: |
8bd135ba MA |
1522 | internal->freq = i_params->freq; |
1523 | internal->srate = i_params->srate; | |
1524 | internal->srch_range = SearchRange; | |
1525 | ||
40e8ce3d MA |
1526 | /* enable tuner I/O */ |
1527 | stb0899_i2c_gate_ctrl(&state->frontend, 1); | |
1528 | ||
8bd135ba | 1529 | if (state->config->tuner_set_bandwidth) |
763fbaf6 | 1530 | state->config->tuner_set_bandwidth(fe, (stb0899_carr_width(state) + SearchRange)); |
8bd135ba MA |
1531 | if (state->config->tuner_get_bandwidth) |
1532 | state->config->tuner_get_bandwidth(fe, &internal->tuner_bw); | |
1533 | ||
40e8ce3d MA |
1534 | /* disable tuner I/O */ |
1535 | stb0899_i2c_gate_ctrl(&state->frontend, 0); | |
1536 | ||
8bd135ba MA |
1537 | // pParams->SpectralInv = pSearch->IQ_Inversion; |
1538 | ||
1539 | /* Set DVB-S2 AGC */ | |
1540 | stb0899_write_reg(state, STB0899_AGCRFCFG, 0x1c); | |
1541 | ||
1542 | /* Set IterScale =f(MCLK,SYMB) */ | |
1543 | stb0899_set_iterations(state); | |
1544 | ||
1545 | /* Run the search algorithm */ | |
c615a27a | 1546 | dprintk(state->verbose, FE_DEBUG, 1, "running DVB-S2 search algo .."); |
8bd135ba MA |
1547 | if (stb0899_dvbs2_algo(state) == DVBS2_FEC_LOCK) { |
1548 | internal->lock = 1; | |
c615a27a | 1549 | dprintk(state->verbose, FE_DEBUG, 1, |
8bd135ba MA |
1550 | "-------------------------------------> DVB-S2 LOCK !"); |
1551 | ||
1552 | // stb0899_write_reg(state, STB0899_ERRCTRL1, 0xb6); /* Packet Errors */ | |
1553 | // internal->v_status = stb0899_read_reg(state, STB0899_VSTATUS); | |
1554 | // internal->err_ctrl = stb0899_read_reg(state, STB0899_ERRCTRL1); | |
1555 | ||
1556 | return DVBFE_ALGO_SEARCH_SUCCESS; | |
1557 | } else { | |
1558 | internal->lock = 0; | |
1559 | ||
1560 | return DVBFE_ALGO_SEARCH_FAILED; | |
1561 | } | |
1562 | break; | |
1563 | default: | |
c615a27a | 1564 | dprintk(state->verbose, FE_ERROR, 1, "Unsupported delivery system"); |
8bd135ba MA |
1565 | return DVBFE_ALGO_SEARCH_INVALID; |
1566 | } | |
1567 | } | |
1568 | ||
1569 | return DVBFE_ALGO_SEARCH_ERROR; | |
1570 | } | |
8bd135ba MA |
1571 | /* |
1572 | * stb0899_track | |
1573 | * periodically check the signal level against a specified | |
1574 | * threshold level and perform derotator centering. | |
af901ca1 | 1575 | * called once we have a lock from a successful search |
8bd135ba MA |
1576 | * event. |
1577 | * | |
1578 | * Will be called periodically called to maintain the | |
1579 | * lock. | |
1580 | * | |
1581 | * Will be used to get parameters as well as info from | |
1582 | * the decoded baseband header | |
1583 | * | |
1584 | * Once a new lock has established, the internal state | |
1585 | * frequency (internal->freq) is updated | |
1586 | */ | |
3f400925 | 1587 | static int stb0899_track(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) |
8bd135ba | 1588 | { |
8bd135ba MA |
1589 | return 0; |
1590 | } | |
1591 | ||
3f400925 | 1592 | static int stb0899_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) |
8bd135ba MA |
1593 | { |
1594 | struct stb0899_state *state = fe->demodulator_priv; | |
1595 | struct stb0899_internal *internal = &state->internal; | |
1596 | ||
3f400925 MA |
1597 | dprintk(state->verbose, FE_DEBUG, 1, "Get params"); |
1598 | p->u.qpsk.symbol_rate = internal->srate; | |
8bd135ba MA |
1599 | |
1600 | return 0; | |
1601 | } | |
1602 | ||
1603 | static enum dvbfe_algo stb0899_frontend_algo(struct dvb_frontend *fe) | |
1604 | { | |
1605 | return DVBFE_ALGO_CUSTOM; | |
1606 | } | |
1607 | ||
1608 | static struct dvb_frontend_ops stb0899_ops = { | |
1609 | ||
1610 | .info = { | |
3f400925 MA |
1611 | .name = "STB0899 Multistandard", |
1612 | .type = FE_QPSK, | |
1613 | .frequency_min = 950000, | |
1614 | .frequency_max = 2150000, | |
1615 | .frequency_stepsize = 0, | |
1616 | .frequency_tolerance = 0, | |
1617 | .symbol_rate_min = 5000000, | |
1618 | .symbol_rate_max = 45000000, | |
1619 | ||
1620 | .caps = FE_CAN_INVERSION_AUTO | | |
1621 | FE_CAN_FEC_AUTO | | |
faed4aa5 | 1622 | FE_CAN_2G_MODULATION | |
3f400925 | 1623 | FE_CAN_QPSK |
8bd135ba MA |
1624 | }, |
1625 | ||
1626 | .release = stb0899_release, | |
1627 | .init = stb0899_init, | |
1628 | .sleep = stb0899_sleep, | |
1629 | // .wakeup = stb0899_wakeup, | |
1630 | ||
1631 | .i2c_gate_ctrl = stb0899_i2c_gate_ctrl, | |
8bd135ba MA |
1632 | |
1633 | .get_frontend_algo = stb0899_frontend_algo, | |
1634 | .search = stb0899_search, | |
1635 | .track = stb0899_track, | |
3f400925 MA |
1636 | .get_frontend = stb0899_get_frontend, |
1637 | ||
8bd135ba MA |
1638 | |
1639 | .read_status = stb0899_read_status, | |
1640 | .read_snr = stb0899_read_snr, | |
1641 | .read_signal_strength = stb0899_read_signal_strength, | |
8bd135ba MA |
1642 | .read_ber = stb0899_read_ber, |
1643 | ||
1644 | .set_voltage = stb0899_set_voltage, | |
1645 | .set_tone = stb0899_set_tone, | |
1646 | ||
1647 | .diseqc_send_master_cmd = stb0899_send_diseqc_msg, | |
1648 | .diseqc_recv_slave_reply = stb0899_recv_slave_reply, | |
1649 | .diseqc_send_burst = stb0899_send_diseqc_burst, | |
1650 | }; | |
1651 | ||
1652 | struct dvb_frontend *stb0899_attach(struct stb0899_config *config, struct i2c_adapter *i2c) | |
1653 | { | |
1654 | struct stb0899_state *state = NULL; | |
b48e2de3 | 1655 | enum stb0899_inversion inversion; |
8bd135ba MA |
1656 | |
1657 | state = kzalloc(sizeof (struct stb0899_state), GFP_KERNEL); | |
1658 | if (state == NULL) | |
1659 | goto error; | |
1660 | ||
b48e2de3 | 1661 | inversion = config->inversion; |
c615a27a | 1662 | state->verbose = &verbose; |
8bd135ba MA |
1663 | state->config = config; |
1664 | state->i2c = i2c; | |
1665 | state->frontend.ops = stb0899_ops; | |
1666 | state->frontend.demodulator_priv = state; | |
b48e2de3 | 1667 | state->internal.inversion = inversion; |
8bd135ba MA |
1668 | |
1669 | stb0899_wakeup(&state->frontend); | |
1670 | if (stb0899_get_dev_id(state) == -ENODEV) { | |
1671 | printk("%s: Exiting .. !\n", __func__); | |
1672 | goto error; | |
1673 | } | |
1674 | ||
1675 | printk("%s: Attaching STB0899 \n", __func__); | |
1676 | return &state->frontend; | |
1677 | ||
1678 | error: | |
1679 | kfree(state); | |
1680 | return NULL; | |
1681 | } | |
1682 | EXPORT_SYMBOL(stb0899_attach); | |
1683 | MODULE_PARM_DESC(verbose, "Set Verbosity level"); | |
1684 | MODULE_AUTHOR("Manu Abraham"); | |
1685 | MODULE_DESCRIPTION("STB0899 Multi-Std frontend"); | |
1686 | MODULE_LICENSE("GPL"); |