[linux.git] / drivers / char / agp / ali-agp.c

/*
 * ALi AGPGART routines.
 */

#include <linux/types.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/agp_backend.h>
#include <asm/page.h>		/* PAGE_SIZE */
#include "agp.h"

#define ALI_AGPCTRL	0xb8
#define ALI_ATTBASE	0xbc
#define ALI_TLBCTRL	0xc0
#define ALI_TAGCTRL	0xc4
#define ALI_CACHE_FLUSH_CTRL	0xD0
#define ALI_CACHE_FLUSH_ADDR_MASK	0xFFFFF000
#define ALI_CACHE_FLUSH_EN	0x100

static int ali_fetch_size(void)
{
	int i;
	u32 temp;
	struct aper_size_info_32 *values;

	pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp);
	temp &= ~(0xfffffff0);
	values = A_SIZE_32(agp_bridge->driver->aperture_sizes);

	for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
		if (temp == values[i].size_value) {
			agp_bridge->previous_size =
			    agp_bridge->current_size = (void *) (values + i);
			agp_bridge->aperture_size_idx = i;
			return values[i].size;
		}
	}

	return 0;
}

static void ali_tlbflush(struct agp_memory *mem)
{
	u32 temp;

	pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
	temp &= 0xfffffff0;
	temp |= (1<<0 | 1<<1);
	pci_write_config_dword(agp_bridge->dev, ALI_TAGCTRL, temp);
}

static void ali_cleanup(void)
{
	struct aper_size_info_32 *previous_size;
	u32 temp;

	previous_size = A_SIZE_32(agp_bridge->previous_size);

	pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
// clear tag
	pci_write_config_dword(agp_bridge->dev, ALI_TAGCTRL,
			((temp & 0xffffff00) | 0x00000001|0x00000002));

	pci_read_config_dword(agp_bridge->dev,  ALI_ATTBASE, &temp);
	pci_write_config_dword(agp_bridge->dev, ALI_ATTBASE,
			((temp & 0x00000ff0) | previous_size->size_value));
}

static int ali_configure(void)
{
	u32 temp;
	struct aper_size_info_32 *current_size;

	current_size = A_SIZE_32(agp_bridge->current_size);

	/* aperture size and gatt addr */
	pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp);
	temp = (((temp & 0x00000ff0) | (agp_bridge->gatt_bus_addr & 0xfffff000))
			| (current_size->size_value & 0xf));
	pci_write_config_dword(agp_bridge->dev, ALI_ATTBASE, temp);

	/* tlb control */
	pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
	pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, ((temp & 0xffffff00) | 0x00000010));

	/* address to map to */
	pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
	agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);

#if 0
	if (agp_bridge->type == ALI_M1541) {
		u32 nlvm_addr = 0;

		switch (current_size->size_value) {
			case 0:  break;
			case 1:  nlvm_addr = 0x100000;break;
			case 2:  nlvm_addr = 0x200000;break;
			case 3:  nlvm_addr = 0x400000;break;
			case 4:  nlvm_addr = 0x800000;break;
			case 6:  nlvm_addr = 0x1000000;break;
			case 7:  nlvm_addr = 0x2000000;break;
			case 8:  nlvm_addr = 0x4000000;break;
			case 9:  nlvm_addr = 0x8000000;break;
			case 10: nlvm_addr = 0x10000000;break;
			default: break;
		}
		nlvm_addr--;
		nlvm_addr&=0xfff00000;

		nlvm_addr+= agp_bridge->gart_bus_addr;
		nlvm_addr|=(agp_bridge->gart_bus_addr>>12);
		dev_info(&agp_bridge->dev->dev, "nlvm top &base = %8x\n",
			 nlvm_addr);
	}
#endif

	pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
	temp &= 0xffffff7f;		//enable TLB
	pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, temp);

	return 0;
}


static void m1541_cache_flush(void)
{
	int i, page_count;
	u32 temp;

	global_cache_flush();

	page_count = 1 << A_SIZE_32(agp_bridge->current_size)->page_order;
	for (i = 0; i < PAGE_SIZE * page_count; i += PAGE_SIZE) {
		pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL,
				&temp);
		pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL,
				(((temp & ALI_CACHE_FLUSH_ADDR_MASK) |
				  (agp_bridge->gatt_bus_addr + i)) |
				 ALI_CACHE_FLUSH_EN));
	}
}

static struct page *m1541_alloc_page(struct agp_bridge_data *bridge)
{
	struct page *page = agp_generic_alloc_page(agp_bridge);
	u32 temp;

	if (!page)
		return NULL;

	pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp);
	pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL,
			(((temp & ALI_CACHE_FLUSH_ADDR_MASK) |
			  phys_to_gart(page_to_phys(page))) | ALI_CACHE_FLUSH_EN ));
	return page;
}

static void ali_destroy_page(struct page *page, int flags)
{
	if (page) {
		if (flags & AGP_PAGE_DESTROY_UNMAP) {
			global_cache_flush();	/* is this really needed?  --hch */
			agp_generic_destroy_page(page, flags);
		} else
			agp_generic_destroy_page(page, flags);
	}
}

static void m1541_destroy_page(struct page *page, int flags)
{
	u32 temp;

	if (page == NULL)
		return;

	if (flags & AGP_PAGE_DESTROY_UNMAP) {
		global_cache_flush();

		pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp);
		pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL,
				       (((temp & ALI_CACHE_FLUSH_ADDR_MASK) |
					 phys_to_gart(page_to_phys(page))) | ALI_CACHE_FLUSH_EN));
	}
	agp_generic_destroy_page(page, flags);
}


/* Setup function */

static const struct aper_size_info_32 ali_generic_sizes[7] =
{
	{256, 65536, 6, 10},
	{128, 32768, 5, 9},
	{64, 16384, 4, 8},
	{32, 8192, 3, 7},
	{16, 4096, 2, 6},
	{8, 2048, 1, 4},
	{4, 1024, 0, 3}
};

static const struct agp_bridge_driver ali_generic_bridge = {
	.owner			= THIS_MODULE,
	.aperture_sizes		= ali_generic_sizes,
	.size_type		= U32_APER_SIZE,
	.num_aperture_sizes	= 7,
	.configure		= ali_configure,
	.fetch_size		= ali_fetch_size,
	.cleanup		= ali_cleanup,
	.tlb_flush		= ali_tlbflush,
	.mask_memory		= agp_generic_mask_memory,
	.masks			= NULL,
	.agp_enable		= agp_generic_enable,
	.cache_flush		= global_cache_flush,
	.create_gatt_table	= agp_generic_create_gatt_table,
	.free_gatt_table	= agp_generic_free_gatt_table,
	.insert_memory		= agp_generic_insert_memory,
	.remove_memory		= agp_generic_remove_memory,
	.alloc_by_type		= agp_generic_alloc_by_type,
	.free_by_type		= agp_generic_free_by_type,
	.agp_alloc_page		= agp_generic_alloc_page,
	.agp_destroy_page	= ali_destroy_page,
	.agp_type_to_mask_type  = agp_generic_type_to_mask_type,
};

static const struct agp_bridge_driver ali_m1541_bridge = {
	.owner			= THIS_MODULE,
	.aperture_sizes		= ali_generic_sizes,
	.size_type		= U32_APER_SIZE,
	.num_aperture_sizes	= 7,
	.configure		= ali_configure,
	.fetch_size		= ali_fetch_size,
	.cleanup		= ali_cleanup,
	.tlb_flush		= ali_tlbflush,
	.mask_memory		= agp_generic_mask_memory,
	.masks			= NULL,
	.agp_enable		= agp_generic_enable,
	.cache_flush		= m1541_cache_flush,
	.create_gatt_table	= agp_generic_create_gatt_table,
	.free_gatt_table	= agp_generic_free_gatt_table,
	.insert_memory		= agp_generic_insert_memory,
	.remove_memory		= agp_generic_remove_memory,
	.alloc_by_type		= agp_generic_alloc_by_type,
	.free_by_type		= agp_generic_free_by_type,
	.agp_alloc_page		= m1541_alloc_page,
	.agp_destroy_page	= m1541_destroy_page,
	.agp_type_to_mask_type  = agp_generic_type_to_mask_type,
};


static struct agp_device_ids ali_agp_device_ids[] __devinitdata =
{
	{
		.device_id	= PCI_DEVICE_ID_AL_M1541,
		.chipset_name	= "M1541",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1621,
		.chipset_name	= "M1621",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1631,
		.chipset_name	= "M1631",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1632,
		.chipset_name	= "M1632",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1641,
		.chipset_name	= "M1641",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1644,
		.chipset_name	= "M1644",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1647,
		.chipset_name	= "M1647",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1651,
		.chipset_name	= "M1651",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1671,
		.chipset_name	= "M1671",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1681,
		.chipset_name	= "M1681",
	},
	{
		.device_id	= PCI_DEVICE_ID_AL_M1683,
		.chipset_name	= "M1683",
	},

	{ }, /* dummy final entry, always present */
};

static int __devinit agp_ali_probe(struct pci_dev *pdev,
				const struct pci_device_id *ent)
{
	struct agp_device_ids *devs = ali_agp_device_ids;
	struct agp_bridge_data *bridge;
	u8 hidden_1621_id, cap_ptr;
	int j;

	cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
	if (!cap_ptr)
		return -ENODEV;

	/* probe for known chipsets */
	for (j = 0; devs[j].chipset_name; j++) {
		if (pdev->device == devs[j].device_id)
			goto found;
	}

	dev_err(&pdev->dev, "unsupported ALi chipset [%04x/%04x])\n",
		pdev->vendor, pdev->device);
	return -ENODEV;


found:
	bridge = agp_alloc_bridge();
	if (!bridge)
		return -ENOMEM;

	bridge->dev = pdev;
	bridge->capndx = cap_ptr;

	switch (pdev->device) {
	case PCI_DEVICE_ID_AL_M1541:
		bridge->driver = &ali_m1541_bridge;
		break;
	case PCI_DEVICE_ID_AL_M1621:
		pci_read_config_byte(pdev, 0xFB, &hidden_1621_id);
		switch (hidden_1621_id) {
		case 0x31:
			devs[j].chipset_name = "M1631";
			break;
		case 0x32:
			devs[j].chipset_name = "M1632";
			break;
		case 0x41:
			devs[j].chipset_name = "M1641";
			break;
		case 0x43:
			devs[j].chipset_name = "M1621";
			break;
		case 0x47:
			devs[j].chipset_name = "M1647";
			break;
		case 0x51:
			devs[j].chipset_name = "M1651";
			break;
		default:
			break;
		}
		/*FALLTHROUGH*/
	default:
		bridge->driver = &ali_generic_bridge;
	}

	dev_info(&pdev->dev, "ALi %s chipset\n", devs[j].chipset_name);

	/* Fill in the mode register */
	pci_read_config_dword(pdev,
			bridge->capndx+PCI_AGP_STATUS,
			&bridge->mode);

	pci_set_drvdata(pdev, bridge);
	return agp_add_bridge(bridge);
}

static void __devexit agp_ali_remove(struct pci_dev *pdev)
{
	struct agp_bridge_data *bridge = pci_get_drvdata(pdev);

	agp_remove_bridge(bridge);
	agp_put_bridge(bridge);
}

static struct pci_device_id agp_ali_pci_table[] = {
	{
	.class		= (PCI_CLASS_BRIDGE_HOST << 8),
	.class_mask	= ~0,
	.vendor		= PCI_VENDOR_ID_AL,
	.device		= PCI_ANY_ID,
	.subvendor	= PCI_ANY_ID,
	.subdevice	= PCI_ANY_ID,
	},
	{ }
};

MODULE_DEVICE_TABLE(pci, agp_ali_pci_table);

static struct pci_driver agp_ali_pci_driver = {
	.name		= "agpgart-ali",
	.id_table	= agp_ali_pci_table,
	.probe		= agp_ali_probe,
	.remove		= agp_ali_remove,
};

static int __init agp_ali_init(void)
{
	if (agp_off)
		return -EINVAL;
	return pci_register_driver(&agp_ali_pci_driver);
}

static void __exit agp_ali_cleanup(void)
{
	pci_unregister_driver(&agp_ali_pci_driver);
}

module_init(agp_ali_init);
module_exit(agp_ali_cleanup);

MODULE_AUTHOR("Dave Jones <[email protected]>");
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* ALi AGPGART routines.
	3	*/
	4
	5	#include <linux/types.h>
	6	#include <linux/module.h>
	7	#include <linux/pci.h>
	8	#include <linux/init.h>
	9	#include <linux/agp_backend.h>
4e57b681	10	#include <asm/page.h> /* PAGE_SIZE */
1da177e4 LT	11	#include "agp.h"
	12
	13	#define ALI_AGPCTRL 0xb8
	14	#define ALI_ATTBASE 0xbc
	15	#define ALI_TLBCTRL 0xc0
	16	#define ALI_TAGCTRL 0xc4
	17	#define ALI_CACHE_FLUSH_CTRL 0xD0
	18	#define ALI_CACHE_FLUSH_ADDR_MASK 0xFFFFF000
	19	#define ALI_CACHE_FLUSH_EN 0x100
	20
	21	static int ali_fetch_size(void)
	22	{
	23	int i;
	24	u32 temp;
	25	struct aper_size_info_32 *values;
	26
	27	pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp);
	28	temp &= ~(0xfffffff0);
	29	values = A_SIZE_32(agp_bridge->driver->aperture_sizes);
	30
	31	for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
	32	if (temp == values[i].size_value) {
	33	agp_bridge->previous_size =
	34	agp_bridge->current_size = (void *) (values + i);
	35	agp_bridge->aperture_size_idx = i;
	36	return values[i].size;
	37	}
	38	}
	39
	40	return 0;
	41	}
	42
	43	static void ali_tlbflush(struct agp_memory *mem)
	44	{
	45	u32 temp;
	46
	47	pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
	48	temp &= 0xfffffff0;
	49	temp \|= (1<<0 \| 1<<1);
	50	pci_write_config_dword(agp_bridge->dev, ALI_TAGCTRL, temp);
	51	}
	52
	53	static void ali_cleanup(void)
	54	{
	55	struct aper_size_info_32 *previous_size;
	56	u32 temp;
	57
	58	previous_size = A_SIZE_32(agp_bridge->previous_size);
	59
	60	pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
	61	// clear tag
	62	pci_write_config_dword(agp_bridge->dev, ALI_TAGCTRL,
	63	((temp & 0xffffff00) \| 0x00000001\|0x00000002));
	64
	65	pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp);
	66	pci_write_config_dword(agp_bridge->dev, ALI_ATTBASE,
	67	((temp & 0x00000ff0) \| previous_size->size_value));
	68	}
	69
	70	static int ali_configure(void)
	71	{
	72	u32 temp;
	73	struct aper_size_info_32 *current_size;
	74
75	current_size = A_SIZE_32(agp_bridge->current_size);
76
77	/* aperture size and gatt addr */
78	pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp);
79	temp = (((temp & 0x00000ff0) \| (agp_bridge->gatt_bus_addr & 0xfffff000))
80	\| (current_size->size_value & 0xf));
81	pci_write_config_dword(agp_bridge->dev, ALI_ATTBASE, temp);
82
83	/* tlb control */
84	pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
85	pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, ((temp & 0xffffff00) \| 0x00000010));
86
87	/* address to map to */
88	pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
89	agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
90
91	#if 0
92	if (agp_bridge->type == ALI_M1541) {
93	u32 nlvm_addr = 0;
94
95	switch (current_size->size_value) {
96	case 0: break;
97	case 1: nlvm_addr = 0x100000;break;
98	case 2: nlvm_addr = 0x200000;break;
99	case 3: nlvm_addr = 0x400000;break;
100	case 4: nlvm_addr = 0x800000;break;
101	case 6: nlvm_addr = 0x1000000;break;
102	case 7: nlvm_addr = 0x2000000;break;
103	case 8: nlvm_addr = 0x4000000;break;
104	case 9: nlvm_addr = 0x8000000;break;
105	case 10: nlvm_addr = 0x10000000;break;
106	default: break;
107	}
108	nlvm_addr--;
109	nlvm_addr&=0xfff00000;
110
111	nlvm_addr+= agp_bridge->gart_bus_addr;
112	nlvm_addr\|=(agp_bridge->gart_bus_addr>>12);
e3cf6951 BH	113	dev_info(&agp_bridge->dev->dev, "nlvm top &base = %8x\n",
e3cf6951 BH	114	nlvm_addr);
1da177e4 LT	115	}
	116	#endif
	117
	118	pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
	119	temp &= 0xffffff7f; //enable TLB
	120	pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, temp);
	121
	122	return 0;
	123	}
	124
	125
	126	static void m1541_cache_flush(void)
	127	{
	128	int i, page_count;
	129	u32 temp;
	130
	131	global_cache_flush();
	132
	133	page_count = 1 << A_SIZE_32(agp_bridge->current_size)->page_order;
	134	for (i = 0; i < PAGE_SIZE * page_count; i += PAGE_SIZE) {
	135	pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL,
	136	&temp);
	137	pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL,
	138	(((temp & ALI_CACHE_FLUSH_ADDR_MASK) \|
	139	(agp_bridge->gatt_bus_addr + i)) \|
	140	ALI_CACHE_FLUSH_EN));
	141	}
	142	}
	143
07613ba2	144	static struct page m1541_alloc_page(struct agp_bridge_data bridge)
1da177e4	145	{
07613ba2	146	struct page *page = agp_generic_alloc_page(agp_bridge);
1da177e4 LT	147	u32 temp;
1da177e4 LT	148
07613ba2	149	if (!page)
1da177e4	150	return NULL;
6a92a4e0	151
1da177e4 LT	152	pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp);
	153	pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL,
	154	(((temp & ALI_CACHE_FLUSH_ADDR_MASK) \|
07613ba2 DA	155	phys_to_gart(page_to_phys(page))) \| ALI_CACHE_FLUSH_EN ));
07613ba2 DA	156	return page;
1da177e4 LT	157	}
1da177e4 LT	158
07613ba2	159	static void ali_destroy_page(struct page *page, int flags)
1da177e4	160	{
07613ba2	161	if (page) {
a2721e99 DA	162	if (flags & AGP_PAGE_DESTROY_UNMAP) {
a2721e99 DA	163	global_cache_flush(); /* is this really needed? --hch */
07613ba2	164	agp_generic_destroy_page(page, flags);
a2721e99	165	} else
07613ba2	166	agp_generic_destroy_page(page, flags);
1da177e4 LT	167	}
	168	}
	169
07613ba2	170	static void m1541_destroy_page(struct page *page, int flags)
1da177e4 LT	171	{
	172	u32 temp;
	173
07613ba2	174	if (page == NULL)
1da177e4 LT	175	return;
1da177e4 LT	176
a2721e99 DA	177	if (flags & AGP_PAGE_DESTROY_UNMAP) {
a2721e99 DA	178	global_cache_flush();
1da177e4	179
a2721e99 DA	180	pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp);
	181	pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL,
	182	(((temp & ALI_CACHE_FLUSH_ADDR_MASK) \|
07613ba2	183	phys_to_gart(page_to_phys(page))) \| ALI_CACHE_FLUSH_EN));
a2721e99	184	}
07613ba2	185	agp_generic_destroy_page(page, flags);
1da177e4 LT	186	}
	187
	188
	189	/* Setup function */
	190
e5524f35	191	static const struct aper_size_info_32 ali_generic_sizes[7] =
1da177e4 LT	192	{
	193	{256, 65536, 6, 10},
	194	{128, 32768, 5, 9},
	195	{64, 16384, 4, 8},
	196	{32, 8192, 3, 7},
	197	{16, 4096, 2, 6},
	198	{8, 2048, 1, 4},
	199	{4, 1024, 0, 3}
	200	};
	201
e5524f35	202	static const struct agp_bridge_driver ali_generic_bridge = {
1da177e4 LT	203	.owner = THIS_MODULE,
	204	.aperture_sizes = ali_generic_sizes,
	205	.size_type = U32_APER_SIZE,
	206	.num_aperture_sizes = 7,
	207	.configure = ali_configure,
	208	.fetch_size = ali_fetch_size,
	209	.cleanup = ali_cleanup,
	210	.tlb_flush = ali_tlbflush,
	211	.mask_memory = agp_generic_mask_memory,
	212	.masks = NULL,
	213	.agp_enable = agp_generic_enable,
	214	.cache_flush = global_cache_flush,
	215	.create_gatt_table = agp_generic_create_gatt_table,
	216	.free_gatt_table = agp_generic_free_gatt_table,
	217	.insert_memory = agp_generic_insert_memory,
	218	.remove_memory = agp_generic_remove_memory,
	219	.alloc_by_type = agp_generic_alloc_by_type,
	220	.free_by_type = agp_generic_free_by_type,
	221	.agp_alloc_page = agp_generic_alloc_page,
	222	.agp_destroy_page = ali_destroy_page,
a030ce44	223	.agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4 LT	224	};
1da177e4 LT	225
e5524f35	226	static const struct agp_bridge_driver ali_m1541_bridge = {
1da177e4 LT	227	.owner = THIS_MODULE,
	228	.aperture_sizes = ali_generic_sizes,
	229	.size_type = U32_APER_SIZE,
	230	.num_aperture_sizes = 7,
	231	.configure = ali_configure,
	232	.fetch_size = ali_fetch_size,
	233	.cleanup = ali_cleanup,
	234	.tlb_flush = ali_tlbflush,
	235	.mask_memory = agp_generic_mask_memory,
	236	.masks = NULL,
	237	.agp_enable = agp_generic_enable,
	238	.cache_flush = m1541_cache_flush,
	239	.create_gatt_table = agp_generic_create_gatt_table,
	240	.free_gatt_table = agp_generic_free_gatt_table,
	241	.insert_memory = agp_generic_insert_memory,
	242	.remove_memory = agp_generic_remove_memory,
	243	.alloc_by_type = agp_generic_alloc_by_type,
	244	.free_by_type = agp_generic_free_by_type,
	245	.agp_alloc_page = m1541_alloc_page,
	246	.agp_destroy_page = m1541_destroy_page,
a030ce44	247	.agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4 LT	248	};
	249
	250
	251	static struct agp_device_ids ali_agp_device_ids[] __devinitdata =
	252	{
	253	{
	254	.device_id = PCI_DEVICE_ID_AL_M1541,
	255	.chipset_name = "M1541",
	256	},
	257	{
	258	.device_id = PCI_DEVICE_ID_AL_M1621,
	259	.chipset_name = "M1621",
	260	},
	261	{
	262	.device_id = PCI_DEVICE_ID_AL_M1631,
	263	.chipset_name = "M1631",
	264	},
	265	{
	266	.device_id = PCI_DEVICE_ID_AL_M1632,
	267	.chipset_name = "M1632",
	268	},
	269	{
	270	.device_id = PCI_DEVICE_ID_AL_M1641,
	271	.chipset_name = "M1641",
	272	},
	273	{
	274	.device_id = PCI_DEVICE_ID_AL_M1644,
	275	.chipset_name = "M1644",
	276	},
	277	{
	278	.device_id = PCI_DEVICE_ID_AL_M1647,
	279	.chipset_name = "M1647",
	280	},
	281	{
	282	.device_id = PCI_DEVICE_ID_AL_M1651,
	283	.chipset_name = "M1651",
	284	},
	285	{
	286	.device_id = PCI_DEVICE_ID_AL_M1671,
	287	.chipset_name = "M1671",
	288	},
	289	{
	290	.device_id = PCI_DEVICE_ID_AL_M1681,
	291	.chipset_name = "M1681",
	292	},
	293	{
	294	.device_id = PCI_DEVICE_ID_AL_M1683,
	295	.chipset_name = "M1683",
	296	},
	297
	298	{ }, /* dummy final entry, always present */
	299	};
	300
	301	static int __devinit agp_ali_probe(struct pci_dev *pdev,
	302	const struct pci_device_id *ent)
	303	{
	304	struct agp_device_ids *devs = ali_agp_device_ids;
	305	struct agp_bridge_data *bridge;
	306	u8 hidden_1621_id, cap_ptr;
	307	int j;
	308
	309	cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
	310	if (!cap_ptr)
	311	return -ENODEV;
312
313	/* probe for known chipsets */
314	for (j = 0; devs[j].chipset_name; j++) {
315	if (pdev->device == devs[j].device_id)
316	goto found;
317	}
318
e3cf6951 BH	319	dev_err(&pdev->dev, "unsupported ALi chipset [%04x/%04x])\n",
e3cf6951 BH	320	pdev->vendor, pdev->device);
1da177e4 LT	321	return -ENODEV;
	322
	323
	324	found:
	325	bridge = agp_alloc_bridge();
	326	if (!bridge)
	327	return -ENOMEM;
	328
	329	bridge->dev = pdev;
	330	bridge->capndx = cap_ptr;
	331
	332	switch (pdev->device) {
	333	case PCI_DEVICE_ID_AL_M1541:
	334	bridge->driver = &ali_m1541_bridge;
	335	break;
	336	case PCI_DEVICE_ID_AL_M1621:
	337	pci_read_config_byte(pdev, 0xFB, &hidden_1621_id);
	338	switch (hidden_1621_id) {
	339	case 0x31:
	340	devs[j].chipset_name = "M1631";
	341	break;
	342	case 0x32:
	343	devs[j].chipset_name = "M1632";
	344	break;
	345	case 0x41:
	346	devs[j].chipset_name = "M1641";
	347	break;
	348	case 0x43:
2908826d	349	devs[j].chipset_name = "M1621";
1da177e4 LT	350	break;
	351	case 0x47:
	352	devs[j].chipset_name = "M1647";
	353	break;
	354	case 0x51:
	355	devs[j].chipset_name = "M1651";
	356	break;
	357	default:
	358	break;
	359	}
	360	/FALLTHROUGH/
	361	default:
	362	bridge->driver = &ali_generic_bridge;
	363	}
	364
e3cf6951	365	dev_info(&pdev->dev, "ALi %s chipset\n", devs[j].chipset_name);
1da177e4 LT	366
	367	/* Fill in the mode register */
	368	pci_read_config_dword(pdev,
	369	bridge->capndx+PCI_AGP_STATUS,
	370	&bridge->mode);
	371
	372	pci_set_drvdata(pdev, bridge);
	373	return agp_add_bridge(bridge);
	374	}
	375
	376	static void __devexit agp_ali_remove(struct pci_dev *pdev)
	377	{
	378	struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
	379
	380	agp_remove_bridge(bridge);
	381	agp_put_bridge(bridge);
	382	}
	383
	384	static struct pci_device_id agp_ali_pci_table[] = {
	385	{
	386	.class = (PCI_CLASS_BRIDGE_HOST << 8),
	387	.class_mask = ~0,
	388	.vendor = PCI_VENDOR_ID_AL,
	389	.device = PCI_ANY_ID,
	390	.subvendor = PCI_ANY_ID,
	391	.subdevice = PCI_ANY_ID,
	392	},
	393	{ }
	394	};
	395
	396	MODULE_DEVICE_TABLE(pci, agp_ali_pci_table);
	397
	398	static struct pci_driver agp_ali_pci_driver = {
	399	.name = "agpgart-ali",
	400	.id_table = agp_ali_pci_table,
	401	.probe = agp_ali_probe,
	402	.remove = agp_ali_remove,
	403	};
	404
	405	static int __init agp_ali_init(void)
	406	{
	407	if (agp_off)
	408	return -EINVAL;
	409	return pci_register_driver(&agp_ali_pci_driver);
	410	}
	411
	412	static void __exit agp_ali_cleanup(void)
	413	{
	414	pci_unregister_driver(&agp_ali_pci_driver);
	415	}
	416
	417	module_init(agp_ali_init);
	418	module_exit(agp_ali_cleanup);
	419
f4432c5c	420	MODULE_AUTHOR("Dave Jones <[email protected]>");
1da177e4 LT	421	MODULE_LICENSE("GPL and additional rights");
1da177e4 LT	422