]>
Commit | Line | Data |
---|---|---|
e24c7452 | 1 | /* |
ca632f55 | 2 | * PCI interface driver for DW SPI Core |
e24c7452 | 3 | * |
5dc23c44 | 4 | * Copyright (c) 2009, 2014 Intel Corporation. |
e24c7452 FT |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
e24c7452 FT |
14 | */ |
15 | ||
16 | #include <linux/interrupt.h> | |
17 | #include <linux/pci.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
e24c7452 | 19 | #include <linux/spi/spi.h> |
d7614de4 | 20 | #include <linux/module.h> |
e24c7452 | 21 | |
ca632f55 | 22 | #include "spi-dw.h" |
568a60ed | 23 | |
e24c7452 FT |
24 | #define DRIVER_NAME "dw_spi_pci" |
25 | ||
26 | struct dw_spi_pci { | |
7063c0d9 FT |
27 | struct pci_dev *pdev; |
28 | struct dw_spi dws; | |
e24c7452 FT |
29 | }; |
30 | ||
c95791b6 AS |
31 | struct spi_pci_desc { |
32 | int (*setup)(struct dw_spi *); | |
d58cf5ff AS |
33 | u16 num_cs; |
34 | u16 bus_num; | |
c95791b6 AS |
35 | }; |
36 | ||
d58cf5ff | 37 | static struct spi_pci_desc spi_pci_mid_desc_1 = { |
c95791b6 | 38 | .setup = dw_spi_mid_init, |
307ed83c | 39 | .num_cs = 5, |
d58cf5ff AS |
40 | .bus_num = 0, |
41 | }; | |
42 | ||
43 | static struct spi_pci_desc spi_pci_mid_desc_2 = { | |
44 | .setup = dw_spi_mid_init, | |
307ed83c | 45 | .num_cs = 2, |
d58cf5ff | 46 | .bus_num = 1, |
c95791b6 AS |
47 | }; |
48 | ||
49 | static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
e24c7452 FT |
50 | { |
51 | struct dw_spi_pci *dwpci; | |
52 | struct dw_spi *dws; | |
c95791b6 | 53 | struct spi_pci_desc *desc = (struct spi_pci_desc *)ent->driver_data; |
e24c7452 FT |
54 | int pci_bar = 0; |
55 | int ret; | |
56 | ||
04f421e7 | 57 | ret = pcim_enable_device(pdev); |
e24c7452 FT |
58 | if (ret) |
59 | return ret; | |
60 | ||
fa4934a0 BS |
61 | dwpci = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_pci), |
62 | GFP_KERNEL); | |
04f421e7 BS |
63 | if (!dwpci) |
64 | return -ENOMEM; | |
e24c7452 FT |
65 | |
66 | dwpci->pdev = pdev; | |
67 | dws = &dwpci->dws; | |
68 | ||
69 | /* Get basic io resource and map it */ | |
70 | dws->paddr = pci_resource_start(pdev, pci_bar); | |
e24c7452 | 71 | |
ceb86de9 | 72 | ret = pcim_iomap_regions(pdev, 1 << pci_bar, pci_name(pdev)); |
e24c7452 | 73 | if (ret) |
04f421e7 | 74 | return ret; |
e24c7452 | 75 | |
c9d5d6fe AS |
76 | dws->regs = pcim_iomap_table(pdev)[pci_bar]; |
77 | ||
e24c7452 | 78 | dws->irq = pdev->irq; |
7063c0d9 FT |
79 | |
80 | /* | |
c95791b6 | 81 | * Specific handling for paltforms, like dma setup, |
7063c0d9 FT |
82 | * clock rate, FIFO depth. |
83 | */ | |
d58cf5ff | 84 | if (desc) { |
d9c14743 AS |
85 | dws->num_cs = desc->num_cs; |
86 | dws->bus_num = desc->bus_num; | |
87 | ||
d58cf5ff AS |
88 | if (desc->setup) { |
89 | ret = desc->setup(dws); | |
90 | if (ret) | |
91 | return ret; | |
92 | } | |
d58cf5ff AS |
93 | } else { |
94 | return -ENODEV; | |
7063c0d9 | 95 | } |
e24c7452 | 96 | |
04f421e7 | 97 | ret = dw_spi_add_host(&pdev->dev, dws); |
e24c7452 | 98 | if (ret) |
04f421e7 | 99 | return ret; |
e24c7452 FT |
100 | |
101 | /* PCI hook and SPI hook use the same drv data */ | |
102 | pci_set_drvdata(pdev, dwpci); | |
e24c7452 | 103 | |
fcf0af44 AS |
104 | dev_info(&pdev->dev, "found PCI SPI controller(ID: %04x:%04x)\n", |
105 | pdev->vendor, pdev->device); | |
106 | ||
04f421e7 | 107 | return 0; |
e24c7452 FT |
108 | } |
109 | ||
fd4a319b | 110 | static void spi_pci_remove(struct pci_dev *pdev) |
e24c7452 FT |
111 | { |
112 | struct dw_spi_pci *dwpci = pci_get_drvdata(pdev); | |
113 | ||
51f921c1 | 114 | dw_spi_remove_host(&dwpci->dws); |
e24c7452 FT |
115 | } |
116 | ||
35f2d413 AS |
117 | #ifdef CONFIG_PM_SLEEP |
118 | static int spi_suspend(struct device *dev) | |
e24c7452 | 119 | { |
35f2d413 | 120 | struct pci_dev *pdev = to_pci_dev(dev); |
e24c7452 | 121 | struct dw_spi_pci *dwpci = pci_get_drvdata(pdev); |
e24c7452 | 122 | |
35f2d413 | 123 | return dw_spi_suspend_host(&dwpci->dws); |
e24c7452 FT |
124 | } |
125 | ||
35f2d413 | 126 | static int spi_resume(struct device *dev) |
e24c7452 | 127 | { |
35f2d413 | 128 | struct pci_dev *pdev = to_pci_dev(dev); |
e24c7452 | 129 | struct dw_spi_pci *dwpci = pci_get_drvdata(pdev); |
e24c7452 | 130 | |
e24c7452 FT |
131 | return dw_spi_resume_host(&dwpci->dws); |
132 | } | |
e24c7452 FT |
133 | #endif |
134 | ||
35f2d413 AS |
135 | static SIMPLE_DEV_PM_OPS(dw_spi_pm_ops, spi_suspend, spi_resume); |
136 | ||
9a21e477 | 137 | static const struct pci_device_id pci_ids[] = { |
7063c0d9 | 138 | /* Intel MID platform SPI controller 0 */ |
d58cf5ff AS |
139 | /* |
140 | * The access to the device 8086:0801 is disabled by HW, since it's | |
141 | * exclusively used by SCU to communicate with MSIC. | |
142 | */ | |
143 | /* Intel MID platform SPI controller 1 */ | |
144 | { PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc_1}, | |
145 | /* Intel MID platform SPI controller 2 */ | |
146 | { PCI_VDEVICE(INTEL, 0x0812), (kernel_ulong_t)&spi_pci_mid_desc_2}, | |
e24c7452 FT |
147 | {}, |
148 | }; | |
149 | ||
150 | static struct pci_driver dw_spi_driver = { | |
151 | .name = DRIVER_NAME, | |
152 | .id_table = pci_ids, | |
153 | .probe = spi_pci_probe, | |
fd4a319b | 154 | .remove = spi_pci_remove, |
35f2d413 AS |
155 | .driver = { |
156 | .pm = &dw_spi_pm_ops, | |
157 | }, | |
e24c7452 FT |
158 | }; |
159 | ||
8ebb35fd | 160 | module_pci_driver(dw_spi_driver); |
e24c7452 FT |
161 | |
162 | MODULE_AUTHOR("Feng Tang <[email protected]>"); | |
163 | MODULE_DESCRIPTION("PCI interface driver for DW SPI Core"); | |
164 | MODULE_LICENSE("GPL v2"); |