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Merge tag 'x86-mce-merge' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
[linux.git] / drivers / hwmon / w83793.c
CommitLineData
6800c3d0 1/*
47efe877
GR		 2 * w83793.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2006 Winbond Electronics Corp.
4 * Yuan Mu
5 * Rudolf Marek <[email protected]>
6 * Copyright (C) 2009-2010 Sven Anders <[email protected]>, ANDURAS AG.
7 * Watchdog driver part
8 * (Based partially on fschmd driver,
9 * Copyright 2007-2008 by Hans de Goede)
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation - version 2.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 * 02110-1301 USA.
24 */
6800c3d0
RM		 25
26/*
47efe877
GR		 27 * Supports following chips:
28 *
29 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
30 * w83793 10 12 8 6 0x7b 0x5ca3 yes no
31 */
6800c3d0
RM		 32
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/i2c.h>
37#include <linux/hwmon.h>
38#include <linux/hwmon-vid.h>
39#include <linux/hwmon-sysfs.h>
40#include <linux/err.h>
41#include <linux/mutex.h>
5852f960
SA		 42#include <linux/fs.h>
43#include <linux/watchdog.h>
44#include <linux/miscdevice.h>
45#include <linux/uaccess.h>
46#include <linux/kref.h>
47#include <linux/notifier.h>
48#include <linux/reboot.h>
49
50/* Default values */
51#define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */
6800c3d0
RM		 52
53/* Addresses to scan */
25e9c86d
MH		 54static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
55 I2C_CLIENT_END };
6800c3d0
RM		 56
57/* Insmod parameters */
3aed198c
JD		 58
59static unsigned short force_subclients[4];
60module_param_array(force_subclients, short, NULL, 0);
61MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
6800c3d0
RM		 62 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
63
90ab5ee9 64static bool reset;
6800c3d0
RM		 65module_param(reset, bool, 0);
66MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
67
5852f960
SA		 68static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */
69module_param(timeout, int, 0);
70MODULE_PARM_DESC(timeout,
71 "Watchdog timeout in minutes. 2<= timeout <=255 (default="
72 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
73
86a1e189
WVS		 74static bool nowayout = WATCHDOG_NOWAYOUT;
75module_param(nowayout, bool, 0);
5852f960
SA		 76MODULE_PARM_DESC(nowayout,
77 "Watchdog cannot be stopped once started (default="
78 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
79
6800c3d0 80/*
47efe877
GR		 81 * Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
82 * as ID, Bank Select registers
83 */
6800c3d0
RM		 84#define W83793_REG_BANKSEL 0x00
85#define W83793_REG_VENDORID 0x0d
86#define W83793_REG_CHIPID 0x0e
87#define W83793_REG_DEVICEID 0x0f
88
89#define W83793_REG_CONFIG 0x40
90#define W83793_REG_MFC 0x58
91#define W83793_REG_FANIN_CTRL 0x5c
92#define W83793_REG_FANIN_SEL 0x5d
93#define W83793_REG_I2C_ADDR 0x0b
94#define W83793_REG_I2C_SUBADDR 0x0c
95#define W83793_REG_VID_INA 0x05
96#define W83793_REG_VID_INB 0x06
97#define W83793_REG_VID_LATCHA 0x07
98#define W83793_REG_VID_LATCHB 0x08
99#define W83793_REG_VID_CTRL 0x59
100
5852f960
SA		 101#define W83793_REG_WDT_LOCK 0x01
102#define W83793_REG_WDT_ENABLE 0x02
103#define W83793_REG_WDT_STATUS 0x03
104#define W83793_REG_WDT_TIMEOUT 0x04
105
6800c3d0
RM		 106static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
107
108#define TEMP_READ 0
109#define TEMP_CRIT 1
110#define TEMP_CRIT_HYST 2
111#define TEMP_WARN 3
112#define TEMP_WARN_HYST 4
47efe877
GR		 113/*
114 * only crit and crit_hyst affect real-time alarm status
115 * current crit crit_hyst warn warn_hyst
116 */
6800c3d0
RM		 117static u16 W83793_REG_TEMP[][5] = {
118 {0x1c, 0x78, 0x79, 0x7a, 0x7b},
119 {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
120 {0x1e, 0x80, 0x81, 0x82, 0x83},
121 {0x1f, 0x84, 0x85, 0x86, 0x87},
122 {0x20, 0x88, 0x89, 0x8a, 0x8b},
123 {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
124};
125
126#define W83793_REG_TEMP_LOW_BITS 0x22
127
128#define W83793_REG_BEEP(index) (0x53 + (index))
129#define W83793_REG_ALARM(index) (0x4b + (index))
130
131#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
132#define W83793_REG_IRQ_CTRL 0x50
133#define W83793_REG_OVT_CTRL 0x51
134#define W83793_REG_OVT_BEEP 0x52
135
136#define IN_READ 0
137#define IN_MAX 1
138#define IN_LOW 2
139static const u16 W83793_REG_IN[][3] = {
140 /* Current, High, Low */
141 {0x10, 0x60, 0x61}, /* Vcore A */
142 {0x11, 0x62, 0x63}, /* Vcore B */
143 {0x12, 0x64, 0x65}, /* Vtt */
144 {0x14, 0x6a, 0x6b}, /* VSEN1 */
145 {0x15, 0x6c, 0x6d}, /* VSEN2 */
146 {0x16, 0x6e, 0x6f}, /* +3VSEN */
147 {0x17, 0x70, 0x71}, /* +12VSEN */
148 {0x18, 0x72, 0x73}, /* 5VDD */
149 {0x19, 0x74, 0x75}, /* 5VSB */
150 {0x1a, 0x76, 0x77}, /* VBAT */
151};
152
153/* Low Bits of Vcore A/B Vtt Read/High/Low */
154static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
155static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
ddca933b 156static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
6800c3d0
RM		 157
158#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
159#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
160
161#define W83793_REG_PWM_DEFAULT 0xb2
162#define W83793_REG_PWM_ENABLE 0x207
163#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
164#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
165#define W83793_REG_TEMP_CRITICAL 0xc5
166
167#define PWM_DUTY 0
168#define PWM_START 1
169#define PWM_NONSTOP 2
5aebefb0 170#define PWM_STOP_TIME 3
6800c3d0
RM		 171#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
172 (nr) == 1 ? 0x220 : 0x218) + (index))
173
174/* bit field, fan1 is bit0, fan2 is bit1 ... */
175#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
176#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
177#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
178#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
179#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
180#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
181
182static inline unsigned long FAN_FROM_REG(u16 val)
183{
184 if ((val >= 0xfff) || (val == 0))
185 return 0;
7fe83ad8 186 return 1350000UL / val;
6800c3d0
RM		 187}
188
189static inline u16 FAN_TO_REG(long rpm)
190{
191 if (rpm <= 0)
192 return 0x0fff;
193 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
194}
195
196static inline unsigned long TIME_FROM_REG(u8 reg)
197{
7fe83ad8 198 return reg * 100;
6800c3d0
RM		 199}
200
201static inline u8 TIME_TO_REG(unsigned long val)
202{
203 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
204}
205
206static inline long TEMP_FROM_REG(s8 reg)
207{
7fe83ad8 208 return reg * 1000;
6800c3d0
RM		 209}
210
211static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
212{
213 return SENSORS_LIMIT((val + (val < 0 ? -500 : 500)) / 1000, min, max);
214}
215
216struct w83793_data {
6800c3d0 217 struct i2c_client *lm75[2];
1beeffe4 218 struct device *hwmon_dev;
6800c3d0
RM		 219 struct mutex update_lock;
220 char valid; /* !=0 if following fields are valid */
221 unsigned long last_updated; /* In jiffies */
222 unsigned long last_nonvolatile; /* In jiffies, last time we update the
47efe877
GR		 223 * nonvolatile registers
224 */
6800c3d0
RM		 225
226 u8 bank;
227 u8 vrm;
228 u8 vid[2];
229 u8 in[10][3]; /* Register value, read/high/low */
230 u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
231
232 u16 has_fan; /* Only fan1- fan5 has own pins */
233 u16 fan[12]; /* Register value combine */
234 u16 fan_min[12]; /* Register value combine */
235
236 s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
237 u8 temp_low_bits; /* Additional resolution TD1-TD4 */
238 u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
47efe877
GR		 239 * byte 1: Temp R1,R2 mode, each has 1 bit
240 */
6800c3d0
RM		 241 u8 temp_critical; /* If reached all fan will be at full speed */
242 u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
243
244 u8 has_pwm;
46bed4df 245 u8 has_temp;
c70a8c34 246 u8 has_vid;
6800c3d0
RM		 247 u8 pwm_enable; /* Register value, each Temp has 1 bit */
248 u8 pwm_uptime; /* Register value */
249 u8 pwm_downtime; /* Register value */
250 u8 pwm_default; /* All fan default pwm, next poweron valid */
251 u8 pwm[8][3]; /* Register value */
252 u8 pwm_stop_time[8];
253 u8 temp_cruise[6];
254
255 u8 alarms[5]; /* realtime status registers */
256 u8 beeps[5];
257 u8 beep_enable;
258 u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
259 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
260 u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
5852f960
SA		 261
262 /* watchdog */
263 struct i2c_client *client;
264 struct mutex watchdog_lock;
265 struct list_head list; /* member of the watchdog_data_list */
266 struct kref kref;
267 struct miscdevice watchdog_miscdev;
268 unsigned long watchdog_is_open;
269 char watchdog_expect_close;
270 char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
271 unsigned int watchdog_caused_reboot;
272 int watchdog_timeout; /* watchdog timeout in minutes */
6800c3d0
RM		 273};
274
47efe877
GR		 275/*
276 * Somewhat ugly :( global data pointer list with all devices, so that
277 * we can find our device data as when using misc_register. There is no
278 * other method to get to one's device data from the open file-op and
279 * for usage in the reboot notifier callback.
280 */
5852f960
SA		 281static LIST_HEAD(watchdog_data_list);
282
283/* Note this lock not only protect list access, but also data.kref access */
284static DEFINE_MUTEX(watchdog_data_mutex);
285
47efe877
GR		 286/*
287 * Release our data struct when we're detached from the i2c client *and* all
288 * references to our watchdog device are released
289 */
5852f960
SA		 290static void w83793_release_resources(struct kref *ref)
291{
292 struct w83793_data *data = container_of(ref, struct w83793_data, kref);
293 kfree(data);
294}
295
6800c3d0
RM		 296static u8 w83793_read_value(struct i2c_client *client, u16 reg);
297static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
a7f13a6e
JD		 298static int w83793_probe(struct i2c_client *client,
299 const struct i2c_device_id *id);
310ec792 300static int w83793_detect(struct i2c_client *client,
a7f13a6e
JD		 301 struct i2c_board_info *info);
302static int w83793_remove(struct i2c_client *client);
6800c3d0
RM		 303static void w83793_init_client(struct i2c_client *client);
304static void w83793_update_nonvolatile(struct device *dev);
305static struct w83793_data *w83793_update_device(struct device *dev);
306
a7f13a6e 307static const struct i2c_device_id w83793_id[] = {
1f86df49 308 { "w83793", 0 },
a7f13a6e
JD		 309 { }
310};
311MODULE_DEVICE_TABLE(i2c, w83793_id);
312
6800c3d0 313static struct i2c_driver w83793_driver = {
a7f13a6e 314 .class = I2C_CLASS_HWMON,
6800c3d0
RM		 315 .driver = {
316 .name = "w83793",
317 },
a7f13a6e
JD		 318 .probe = w83793_probe,
319 .remove = w83793_remove,
320 .id_table = w83793_id,
321 .detect = w83793_detect,
c3813d6a 322 .address_list = normal_i2c,
6800c3d0
RM		 323};
324
325static ssize_t
326show_vrm(struct device *dev, struct device_attribute *attr, char *buf)
327{
8f74efe8 328 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 329 return sprintf(buf, "%d\n", data->vrm);
330}
331
332static ssize_t
333show_vid(struct device *dev, struct device_attribute *attr, char *buf)
334{
335 struct w83793_data *data = w83793_update_device(dev);
336 struct sensor_device_attribute_2 *sensor_attr =
337 to_sensor_dev_attr_2(attr);
338 int index = sensor_attr->index;
339
340 return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
341}
342
343static ssize_t
344store_vrm(struct device *dev, struct device_attribute *attr,
345 const char *buf, size_t count)
346{
8f74efe8 347 struct w83793_data *data = dev_get_drvdata(dev);
47efe877
GR		 348 unsigned long val;
349 int err;
350
351 err = kstrtoul(buf, 10, &val);
352 if (err)
353 return err;
354
355 data->vrm = val;
6800c3d0
RM		 356 return count;
357}
358
359#define ALARM_STATUS 0
360#define BEEP_ENABLE 1
361static ssize_t
362show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
363{
364 struct w83793_data *data = w83793_update_device(dev);
365 struct sensor_device_attribute_2 *sensor_attr =
366 to_sensor_dev_attr_2(attr);
367 int nr = sensor_attr->nr;
368 int index = sensor_attr->index >> 3;
369 int bit = sensor_attr->index & 0x07;
370 u8 val;
371
47efe877 372 if (nr == ALARM_STATUS) {
6800c3d0
RM		 373 val = (data->alarms[index] >> (bit)) & 1;
374 } else { /* BEEP_ENABLE */
375 val = (data->beeps[index] >> (bit)) & 1;
376 }
377
378 return sprintf(buf, "%u\n", val);
379}
380
381static ssize_t
382store_beep(struct device *dev, struct device_attribute *attr,
383 const char *buf, size_t count)
384{
385 struct i2c_client *client = to_i2c_client(dev);
386 struct w83793_data *data = i2c_get_clientdata(client);
387 struct sensor_device_attribute_2 *sensor_attr =
388 to_sensor_dev_attr_2(attr);
389 int index = sensor_attr->index >> 3;
390 int shift = sensor_attr->index & 0x07;
391 u8 beep_bit = 1 << shift;
47efe877
GR		 392 unsigned long val;
393 int err;
6800c3d0 394
47efe877
GR		 395 err = kstrtoul(buf, 10, &val);
396 if (err)
397 return err;
398
399 if (val > 1)
6800c3d0
RM		 400 return -EINVAL;
401
402 mutex_lock(&data->update_lock);
403 data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
404 data->beeps[index] &= ~beep_bit;
405 data->beeps[index] |= val << shift;
406 w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
407 mutex_unlock(&data->update_lock);
408
409 return count;
410}
411
412static ssize_t
413show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
414{
415 struct w83793_data *data = w83793_update_device(dev);
416 return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
417}
418
419static ssize_t
420store_beep_enable(struct device *dev, struct device_attribute *attr,
421 const char *buf, size_t count)
422{
423 struct i2c_client *client = to_i2c_client(dev);
424 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 425 unsigned long val;
426 int err;
427
428 err = kstrtoul(buf, 10, &val);
429 if (err)
430 return err;
6800c3d0 431
47efe877 432 if (val > 1)
6800c3d0
RM		 433 return -EINVAL;
434
435 mutex_lock(&data->update_lock);
436 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
437 & 0xfd;
438 data->beep_enable |= val << 1;
439 w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
440 mutex_unlock(&data->update_lock);
441
442 return count;
443}
444
445/* Write any value to clear chassis alarm */
446static ssize_t
a516dc3e
JD		 447store_chassis_clear_legacy(struct device *dev,
448 struct device_attribute *attr, const char *buf,
449 size_t count)
6800c3d0
RM		 450{
451 struct i2c_client *client = to_i2c_client(dev);
452 struct w83793_data *data = i2c_get_clientdata(client);
453 u8 val;
454
a516dc3e
JD		 455 dev_warn(dev, "Attribute chassis is deprecated, "
456 "use intrusion0_alarm instead\n");
457
6800c3d0
RM		 458 mutex_lock(&data->update_lock);
459 val = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
460 val |= 0x80;
461 w83793_write_value(client, W83793_REG_CLR_CHASSIS, val);
462 mutex_unlock(&data->update_lock);
463 return count;
464}
465
a516dc3e
JD		 466/* Write 0 to clear chassis alarm */
467static ssize_t
468store_chassis_clear(struct device *dev,
469 struct device_attribute *attr, const char *buf,
470 size_t count)
471{
472 struct i2c_client *client = to_i2c_client(dev);
473 struct w83793_data *data = i2c_get_clientdata(client);
474 unsigned long val;
475 u8 reg;
47efe877 476 int err;
a516dc3e 477
47efe877
GR		 478 err = kstrtoul(buf, 10, &val);
479 if (err)
480 return err;
481 if (val)
a516dc3e
JD		 482 return -EINVAL;
483
484 mutex_lock(&data->update_lock);
485 reg = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
486 w83793_write_value(client, W83793_REG_CLR_CHASSIS, reg | 0x80);
487 data->valid = 0; /* Force cache refresh */
488 mutex_unlock(&data->update_lock);
489 return count;
490}
491
6800c3d0
RM		 492#define FAN_INPUT 0
493#define FAN_MIN 1
494static ssize_t
495show_fan(struct device *dev, struct device_attribute *attr, char *buf)
496{
497 struct sensor_device_attribute_2 *sensor_attr =
498 to_sensor_dev_attr_2(attr);
499 int nr = sensor_attr->nr;
500 int index = sensor_attr->index;
501 struct w83793_data *data = w83793_update_device(dev);
502 u16 val;
503
47efe877 504 if (nr == FAN_INPUT)
6800c3d0 505 val = data->fan[index] & 0x0fff;
47efe877 506 else
6800c3d0 507 val = data->fan_min[index] & 0x0fff;
6800c3d0
RM		 508
509 return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
510}
511
512static ssize_t
513store_fan_min(struct device *dev, struct device_attribute *attr,
514 const char *buf, size_t count)
515{
516 struct sensor_device_attribute_2 *sensor_attr =
517 to_sensor_dev_attr_2(attr);
518 int index = sensor_attr->index;
519 struct i2c_client *client = to_i2c_client(dev);
520 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 521 unsigned long val;
522 int err;
523
524 err = kstrtoul(buf, 10, &val);
525 if (err)
526 return err;
527 val = FAN_TO_REG(val);
6800c3d0
RM		 528
529 mutex_lock(&data->update_lock);
530 data->fan_min[index] = val;
531 w83793_write_value(client, W83793_REG_FAN_MIN(index),
532 (val >> 8) & 0xff);
533 w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
534 mutex_unlock(&data->update_lock);
535
536 return count;
537}
538
6800c3d0
RM		 539static ssize_t
540show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
541{
542 struct sensor_device_attribute_2 *sensor_attr =
543 to_sensor_dev_attr_2(attr);
544 struct w83793_data *data = w83793_update_device(dev);
545 u16 val;
546 int nr = sensor_attr->nr;
547 int index = sensor_attr->index;
548
47efe877 549 if (nr == PWM_STOP_TIME)
6800c3d0
RM		 550 val = TIME_FROM_REG(data->pwm_stop_time[index]);
551 else
552 val = (data->pwm[index][nr] & 0x3f) << 2;
553
554 return sprintf(buf, "%d\n", val);
555}
556
557static ssize_t
558store_pwm(struct device *dev, struct device_attribute *attr,
559 const char *buf, size_t count)
560{
561 struct i2c_client *client = to_i2c_client(dev);
562 struct w83793_data *data = i2c_get_clientdata(client);
563 struct sensor_device_attribute_2 *sensor_attr =
564 to_sensor_dev_attr_2(attr);
565 int nr = sensor_attr->nr;
566 int index = sensor_attr->index;
47efe877
GR		 567 unsigned long val;
568 int err;
569
570 err = kstrtoul(buf, 10, &val);
571 if (err)
572 return err;
6800c3d0
RM		 573
574 mutex_lock(&data->update_lock);
47efe877
GR		 575 if (nr == PWM_STOP_TIME) {
576 val = TIME_TO_REG(val);
6800c3d0
RM		 577 data->pwm_stop_time[index] = val;
578 w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
579 val);
580 } else {
47efe877 581 val = SENSORS_LIMIT(val, 0, 0xff) >> 2;
6800c3d0
RM		 582 data->pwm[index][nr] =
583 w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
584 data->pwm[index][nr] |= val;
585 w83793_write_value(client, W83793_REG_PWM(index, nr),
586 data->pwm[index][nr]);
587 }
588
589 mutex_unlock(&data->update_lock);
590 return count;
591}
592
593static ssize_t
594show_temp(struct device *dev, struct device_attribute *attr, char *buf)
595{
596 struct sensor_device_attribute_2 *sensor_attr =
597 to_sensor_dev_attr_2(attr);
598 int nr = sensor_attr->nr;
599 int index = sensor_attr->index;
600 struct w83793_data *data = w83793_update_device(dev);
601 long temp = TEMP_FROM_REG(data->temp[index][nr]);
602
47efe877 603 if (nr == TEMP_READ && index < 4) { /* Only TD1-TD4 have low bits */
6800c3d0
RM		 604 int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
605 temp += temp > 0 ? low : -low;
606 }
607 return sprintf(buf, "%ld\n", temp);
608}
609
610static ssize_t
611store_temp(struct device *dev, struct device_attribute *attr,
612 const char *buf, size_t count)
613{
614 struct sensor_device_attribute_2 *sensor_attr =
615 to_sensor_dev_attr_2(attr);
616 int nr = sensor_attr->nr;
617 int index = sensor_attr->index;
618 struct i2c_client *client = to_i2c_client(dev);
619 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 620 long tmp;
621 int err;
622
623 err = kstrtol(buf, 10, &tmp);
624 if (err)
625 return err;
6800c3d0
RM		 626
627 mutex_lock(&data->update_lock);
628 data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
629 w83793_write_value(client, W83793_REG_TEMP[index][nr],
630 data->temp[index][nr]);
631 mutex_unlock(&data->update_lock);
632 return count;
633}
634
635/*
47efe877
GR		 636 * TD1-TD4
637 * each has 4 mode:(2 bits)
638 * 0: Stop monitor
639 * 1: Use internal temp sensor(default)
640 * 2: Reserved
641 * 3: Use sensor in Intel CPU and get result by PECI
642 *
643 * TR1-TR2
644 * each has 2 mode:(1 bit)
645 * 0: Disable temp sensor monitor
646 * 1: To enable temp sensors monitor
647 */
6800c3d0 648
ddca933b
GJ		 649/* 0 disable, 6 PECI */
650static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
6800c3d0
RM		 651
652static ssize_t
653show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
654{
655 struct w83793_data *data = w83793_update_device(dev);
656 struct sensor_device_attribute_2 *sensor_attr =
657 to_sensor_dev_attr_2(attr);
658 int index = sensor_attr->index;
659 u8 mask = (index < 4) ? 0x03 : 0x01;
660 u8 shift = (index < 4) ? (2 * index) : (index - 4);
661 u8 tmp;
662 index = (index < 4) ? 0 : 1;
663
664 tmp = (data->temp_mode[index] >> shift) & mask;
665
666 /* for the internal sensor, found out if diode or thermistor */
47efe877 667 if (tmp == 1)
6800c3d0 668 tmp = index == 0 ? 3 : 4;
47efe877 669 else
6800c3d0 670 tmp = TO_TEMP_MODE[tmp];
6800c3d0
RM		 671
672 return sprintf(buf, "%d\n", tmp);
673}
674
675static ssize_t
676store_temp_mode(struct device *dev, struct device_attribute *attr,
677 const char *buf, size_t count)
678{
679 struct i2c_client *client = to_i2c_client(dev);
680 struct w83793_data *data = i2c_get_clientdata(client);
681 struct sensor_device_attribute_2 *sensor_attr =
682 to_sensor_dev_attr_2(attr);
683 int index = sensor_attr->index;
684 u8 mask = (index < 4) ? 0x03 : 0x01;
685 u8 shift = (index < 4) ? (2 * index) : (index - 4);
47efe877
GR		 686 unsigned long val;
687 int err;
688
689 err = kstrtoul(buf, 10, &val);
690 if (err)
691 return err;
6800c3d0
RM		 692
693 /* transform the sysfs interface values into table above */
ddca933b 694 if ((val == 6) && (index < 4)) {
6800c3d0
RM		 695 val -= 3;
696 } else if ((val == 3 && index < 4)
46bed4df 697 || (val == 4 && index >= 4)) {
6800c3d0
RM		 698 /* transform diode or thermistor into internal enable */
699 val = !!val;
700 } else {
701 return -EINVAL;
702 }
703
704 index = (index < 4) ? 0 : 1;
705 mutex_lock(&data->update_lock);
706 data->temp_mode[index] =
707 w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
708 data->temp_mode[index] &= ~(mask << shift);
709 data->temp_mode[index] |= val << shift;
710 w83793_write_value(client, W83793_REG_TEMP_MODE[index],
711 data->temp_mode[index]);
712 mutex_unlock(&data->update_lock);
713
714 return count;
715}
716
717#define SETUP_PWM_DEFAULT 0
718#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
719#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
720#define SETUP_TEMP_CRITICAL 3
721static ssize_t
722show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
723{
724 struct sensor_device_attribute_2 *sensor_attr =
725 to_sensor_dev_attr_2(attr);
726 int nr = sensor_attr->nr;
727 struct w83793_data *data = w83793_update_device(dev);
728 u32 val = 0;
729
47efe877 730 if (nr == SETUP_PWM_DEFAULT)
6800c3d0 731 val = (data->pwm_default & 0x3f) << 2;
47efe877 732 else if (nr == SETUP_PWM_UPTIME)
6800c3d0 733 val = TIME_FROM_REG(data->pwm_uptime);
47efe877 734 else if (nr == SETUP_PWM_DOWNTIME)
6800c3d0 735 val = TIME_FROM_REG(data->pwm_downtime);
47efe877 736 else if (nr == SETUP_TEMP_CRITICAL)
6800c3d0 737 val = TEMP_FROM_REG(data->temp_critical & 0x7f);
6800c3d0
RM		 738
739 return sprintf(buf, "%d\n", val);
740}
741
742static ssize_t
743store_sf_setup(struct device *dev, struct device_attribute *attr,
744 const char *buf, size_t count)
745{
746 struct sensor_device_attribute_2 *sensor_attr =
747 to_sensor_dev_attr_2(attr);
748 int nr = sensor_attr->nr;
749 struct i2c_client *client = to_i2c_client(dev);
750 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 751 long val;
752 int err;
753
754 err = kstrtol(buf, 10, &val);
755 if (err)
756 return err;
6800c3d0
RM		 757
758 mutex_lock(&data->update_lock);
47efe877 759 if (nr == SETUP_PWM_DEFAULT) {
6800c3d0
RM		 760 data->pwm_default =
761 w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
47efe877 762 data->pwm_default |= SENSORS_LIMIT(val, 0, 0xff) >> 2;
6800c3d0
RM		 763 w83793_write_value(client, W83793_REG_PWM_DEFAULT,
764 data->pwm_default);
47efe877
GR		 765 } else if (nr == SETUP_PWM_UPTIME) {
766 data->pwm_uptime = TIME_TO_REG(val);
6800c3d0
RM		 767 data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
768 w83793_write_value(client, W83793_REG_PWM_UPTIME,
769 data->pwm_uptime);
47efe877
GR		 770 } else if (nr == SETUP_PWM_DOWNTIME) {
771 data->pwm_downtime = TIME_TO_REG(val);
6800c3d0
RM		 772 data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
773 w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
774 data->pwm_downtime);
775 } else { /* SETUP_TEMP_CRITICAL */
776 data->temp_critical =
777 w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
47efe877 778 data->temp_critical |= TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 779 w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
780 data->temp_critical);
781 }
782
783 mutex_unlock(&data->update_lock);
784 return count;
785}
786
787/*
47efe877
GR		 788 * Temp SmartFan control
789 * TEMP_FAN_MAP
790 * Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
791 * It's possible two or more temp channels control the same fan, w83793
792 * always prefers to pick the most critical request and applies it to
793 * the related Fan.
794 * It's possible one fan is not in any mapping of 6 temp channels, this
795 * means the fan is manual mode
796 *
797 * TEMP_PWM_ENABLE
798 * Each temp channel has its own SmartFan mode, and temp channel
799 * control fans that are set by TEMP_FAN_MAP
800 * 0: SmartFanII mode
801 * 1: Thermal Cruise Mode
802 *
803 * TEMP_CRUISE
804 * Target temperature in thermal cruise mode, w83793 will try to turn
805 * fan speed to keep the temperature of target device around this
806 * temperature.
807 *
808 * TEMP_TOLERANCE
809 * If Temp higher or lower than target with this tolerance, w83793
810 * will take actions to speed up or slow down the fan to keep the
811 * temperature within the tolerance range.
812 */
6800c3d0
RM		 813
814#define TEMP_FAN_MAP 0
815#define TEMP_PWM_ENABLE 1
816#define TEMP_CRUISE 2
817#define TEMP_TOLERANCE 3
818static ssize_t
819show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
820{
821 struct sensor_device_attribute_2 *sensor_attr =
822 to_sensor_dev_attr_2(attr);
823 int nr = sensor_attr->nr;
824 int index = sensor_attr->index;
825 struct w83793_data *data = w83793_update_device(dev);
826 u32 val;
827
47efe877 828 if (nr == TEMP_FAN_MAP) {
6800c3d0 829 val = data->temp_fan_map[index];
47efe877 830 } else if (nr == TEMP_PWM_ENABLE) {
6800c3d0
RM		 831 /* +2 to transfrom into 2 and 3 to conform with sysfs intf */
832 val = ((data->pwm_enable >> index) & 0x01) + 2;
47efe877 833 } else if (nr == TEMP_CRUISE) {
6800c3d0
RM		 834 val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
835 } else { /* TEMP_TOLERANCE */
836 val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
837 val = TEMP_FROM_REG(val & 0x0f);
838 }
839 return sprintf(buf, "%d\n", val);
840}
841
842static ssize_t
843store_sf_ctrl(struct device *dev, struct device_attribute *attr,
844 const char *buf, size_t count)
845{
846 struct sensor_device_attribute_2 *sensor_attr =
847 to_sensor_dev_attr_2(attr);
848 int nr = sensor_attr->nr;
849 int index = sensor_attr->index;
850 struct i2c_client *client = to_i2c_client(dev);
851 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 852 long val;
853 int err;
854
855 err = kstrtol(buf, 10, &val);
856 if (err)
857 return err;
6800c3d0
RM		 858
859 mutex_lock(&data->update_lock);
47efe877
GR		 860 if (nr == TEMP_FAN_MAP) {
861 val = SENSORS_LIMIT(val, 0, 255);
6800c3d0
RM		 862 w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
863 data->temp_fan_map[index] = val;
47efe877
GR		 864 } else if (nr == TEMP_PWM_ENABLE) {
865 if (val == 2 || val == 3) {
6800c3d0
RM		 866 data->pwm_enable =
867 w83793_read_value(client, W83793_REG_PWM_ENABLE);
868 if (val - 2)
869 data->pwm_enable |= 1 << index;
870 else
871 data->pwm_enable &= ~(1 << index);
872 w83793_write_value(client, W83793_REG_PWM_ENABLE,
873 data->pwm_enable);
874 } else {
875 mutex_unlock(&data->update_lock);
876 return -EINVAL;
877 }
47efe877 878 } else if (nr == TEMP_CRUISE) {
6800c3d0
RM		 879 data->temp_cruise[index] =
880 w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
6800c3d0 881 data->temp_cruise[index] &= 0x80;
47efe877 882 data->temp_cruise[index] |= TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 883
884 w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
885 data->temp_cruise[index]);
886 } else { /* TEMP_TOLERANCE */
887 int i = index >> 1;
888 u8 shift = (index & 0x01) ? 4 : 0;
889 data->tolerance[i] =
890 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
891
6800c3d0 892 data->tolerance[i] &= ~(0x0f << shift);
47efe877 893 data->tolerance[i] |= TEMP_TO_REG(val, 0, 0x0f) << shift;
6800c3d0
RM		 894 w83793_write_value(client, W83793_REG_TEMP_TOL(i),
895 data->tolerance[i]);
896 }
897
898 mutex_unlock(&data->update_lock);
899 return count;
900}
901
902static ssize_t
903show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
904{
905 struct sensor_device_attribute_2 *sensor_attr =
906 to_sensor_dev_attr_2(attr);
907 int nr = sensor_attr->nr;
908 int index = sensor_attr->index;
909 struct w83793_data *data = w83793_update_device(dev);
910
911 return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
912}
913
914static ssize_t
915store_sf2_pwm(struct device *dev, struct device_attribute *attr,
916 const char *buf, size_t count)
917{
918 struct i2c_client *client = to_i2c_client(dev);
919 struct w83793_data *data = i2c_get_clientdata(client);
920 struct sensor_device_attribute_2 *sensor_attr =
921 to_sensor_dev_attr_2(attr);
922 int nr = sensor_attr->nr;
923 int index = sensor_attr->index;
47efe877
GR		 924 unsigned long val;
925 int err;
926
927 err = kstrtoul(buf, 10, &val);
928 if (err)
929 return err;
930 val = SENSORS_LIMIT(val, 0, 0xff) >> 2;
6800c3d0
RM		 931
932 mutex_lock(&data->update_lock);
933 data->sf2_pwm[index][nr] =
934 w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
935 data->sf2_pwm[index][nr] |= val;
936 w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
937 data->sf2_pwm[index][nr]);
938 mutex_unlock(&data->update_lock);
939 return count;
940}
941
942static ssize_t
943show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
944{
945 struct sensor_device_attribute_2 *sensor_attr =
946 to_sensor_dev_attr_2(attr);
947 int nr = sensor_attr->nr;
948 int index = sensor_attr->index;
949 struct w83793_data *data = w83793_update_device(dev);
950
951 return sprintf(buf, "%ld\n",
952 TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
953}
954
955static ssize_t
956store_sf2_temp(struct device *dev, struct device_attribute *attr,
957 const char *buf, size_t count)
958{
959 struct i2c_client *client = to_i2c_client(dev);
960 struct w83793_data *data = i2c_get_clientdata(client);
961 struct sensor_device_attribute_2 *sensor_attr =
962 to_sensor_dev_attr_2(attr);
963 int nr = sensor_attr->nr;
964 int index = sensor_attr->index;
47efe877
GR		 965 long val;
966 int err;
967
968 err = kstrtol(buf, 10, &val);
969 if (err)
970 return err;
971 val = TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 972
973 mutex_lock(&data->update_lock);
974 data->sf2_temp[index][nr] =
975 w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
976 data->sf2_temp[index][nr] |= val;
977 w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
978 data->sf2_temp[index][nr]);
979 mutex_unlock(&data->update_lock);
980 return count;
981}
982
983/* only Vcore A/B and Vtt have additional 2 bits precision */
984static ssize_t
985show_in(struct device *dev, struct device_attribute *attr, char *buf)
986{
987 struct sensor_device_attribute_2 *sensor_attr =
988 to_sensor_dev_attr_2(attr);
989 int nr = sensor_attr->nr;
990 int index = sensor_attr->index;
991 struct w83793_data *data = w83793_update_device(dev);
992 u16 val = data->in[index][nr];
993
994 if (index < 3) {
995 val <<= 2;
996 val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
997 }
ddca933b
GJ		 998 /* voltage inputs 5VDD and 5VSB needs 150mV offset */
999 val = val * scale_in[index] + scale_in_add[index];
1000 return sprintf(buf, "%d\n", val);
6800c3d0
RM		 1001}
1002
1003static ssize_t
1004store_in(struct device *dev, struct device_attribute *attr,
1005 const char *buf, size_t count)
1006{
1007 struct sensor_device_attribute_2 *sensor_attr =
1008 to_sensor_dev_attr_2(attr);
1009 int nr = sensor_attr->nr;
1010 int index = sensor_attr->index;
1011 struct i2c_client *client = to_i2c_client(dev);
1012 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 1013 unsigned long val;
1014 int err;
1015
1016 err = kstrtoul(buf, 10, &val);
1017 if (err)
1018 return err;
1019 val = (val + scale_in[index] / 2) / scale_in[index];
6800c3d0 1020
6800c3d0
RM		 1021 mutex_lock(&data->update_lock);
1022 if (index > 2) {
ddca933b 1023 /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
47efe877 1024 if (nr == 1 || nr == 2)
ddca933b 1025 val -= scale_in_add[index] / scale_in[index];
6800c3d0
RM		 1026 val = SENSORS_LIMIT(val, 0, 255);
1027 } else {
1028 val = SENSORS_LIMIT(val, 0, 0x3FF);
1029 data->in_low_bits[nr] =
1030 w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
1031 data->in_low_bits[nr] &= ~(0x03 << (2 * index));
1032 data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
1033 w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
1034 data->in_low_bits[nr]);
1035 val >>= 2;
1036 }
1037 data->in[index][nr] = val;
1038 w83793_write_value(client, W83793_REG_IN[index][nr],
1039 data->in[index][nr]);
1040 mutex_unlock(&data->update_lock);
1041 return count;
1042}
1043
1044#define NOT_USED -1
1045
1046#define SENSOR_ATTR_IN(index) \
1047 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1048 IN_READ, index), \
1049 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1050 store_in, IN_MAX, index), \
1051 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1052 store_in, IN_LOW, index), \
1053 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1054 NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
1055 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1056 show_alarm_beep, store_beep, BEEP_ENABLE, \
1057 index + ((index > 2) ? 1 : 0))
1058
1059#define SENSOR_ATTR_FAN(index) \
1060 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1061 NULL, ALARM_STATUS, index + 17), \
1062 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1063 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
1064 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1065 NULL, FAN_INPUT, index - 1), \
1066 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1067 show_fan, store_fan_min, FAN_MIN, index - 1)
1068
1069#define SENSOR_ATTR_PWM(index) \
1070 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1071 store_pwm, PWM_DUTY, index - 1), \
1072 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1073 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1074 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1075 show_pwm, store_pwm, PWM_START, index - 1), \
1076 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1077 show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
1078
1079#define SENSOR_ATTR_TEMP(index) \
1080 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1081 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1082 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1083 NULL, TEMP_READ, index - 1), \
1084 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1085 store_temp, TEMP_CRIT, index - 1), \
1086 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1087 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1088 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1089 store_temp, TEMP_WARN, index - 1), \
1090 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1091 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1092 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1093 show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
1094 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1095 show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
1096 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
1097 S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
1098 TEMP_FAN_MAP, index - 1), \
1099 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1100 show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
1101 index - 1), \
1102 SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
1103 show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
1104 SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
1105 store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
1106 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1107 show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
1108 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1109 show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
1110 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1111 show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
1112 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1113 show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
1114 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1115 show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
1116 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1117 show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
1118 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1119 show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
1120 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1121 show_sf2_temp, store_sf2_temp, 0, index - 1), \
1122 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1123 show_sf2_temp, store_sf2_temp, 1, index - 1), \
1124 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1125 show_sf2_temp, store_sf2_temp, 2, index - 1), \
1126 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1127 show_sf2_temp, store_sf2_temp, 3, index - 1), \
1128 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1129 show_sf2_temp, store_sf2_temp, 4, index - 1), \
1130 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1131 show_sf2_temp, store_sf2_temp, 5, index - 1), \
1132 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1133 show_sf2_temp, store_sf2_temp, 6, index - 1)
1134
1135static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
1136 SENSOR_ATTR_IN(0),
1137 SENSOR_ATTR_IN(1),
1138 SENSOR_ATTR_IN(2),
1139 SENSOR_ATTR_IN(3),
1140 SENSOR_ATTR_IN(4),
1141 SENSOR_ATTR_IN(5),
1142 SENSOR_ATTR_IN(6),
1143 SENSOR_ATTR_IN(7),
1144 SENSOR_ATTR_IN(8),
1145 SENSOR_ATTR_IN(9),
6800c3d0
RM		 1146 SENSOR_ATTR_FAN(1),
1147 SENSOR_ATTR_FAN(2),
1148 SENSOR_ATTR_FAN(3),
1149 SENSOR_ATTR_FAN(4),
1150 SENSOR_ATTR_FAN(5),
1151 SENSOR_ATTR_PWM(1),
1152 SENSOR_ATTR_PWM(2),
1153 SENSOR_ATTR_PWM(3),
1154};
1155
46bed4df
GJ		 1156static struct sensor_device_attribute_2 w83793_temp[] = {
1157 SENSOR_ATTR_TEMP(1),
1158 SENSOR_ATTR_TEMP(2),
1159 SENSOR_ATTR_TEMP(3),
1160 SENSOR_ATTR_TEMP(4),
1161 SENSOR_ATTR_TEMP(5),
1162 SENSOR_ATTR_TEMP(6),
1163};
1164
6800c3d0
RM		 1165/* Fan6-Fan12 */
1166static struct sensor_device_attribute_2 w83793_left_fan[] = {
1167 SENSOR_ATTR_FAN(6),
1168 SENSOR_ATTR_FAN(7),
1169 SENSOR_ATTR_FAN(8),
1170 SENSOR_ATTR_FAN(9),
1171 SENSOR_ATTR_FAN(10),
1172 SENSOR_ATTR_FAN(11),
1173 SENSOR_ATTR_FAN(12),
1174};
1175
1176/* Pwm4-Pwm8 */
1177static struct sensor_device_attribute_2 w83793_left_pwm[] = {
1178 SENSOR_ATTR_PWM(4),
1179 SENSOR_ATTR_PWM(5),
1180 SENSOR_ATTR_PWM(6),
1181 SENSOR_ATTR_PWM(7),
1182 SENSOR_ATTR_PWM(8),
1183};
1184
c70a8c34 1185static struct sensor_device_attribute_2 w83793_vid[] = {
6800c3d0
RM		 1186 SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
1187 SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
c70a8c34 1188};
93c75a4a 1189static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm);
c70a8c34
GJ		 1190
1191static struct sensor_device_attribute_2 sda_single_files[] = {
6800c3d0 1192 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
a516dc3e
JD		 1193 store_chassis_clear_legacy, ALARM_STATUS, 30),
1194 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
6800c3d0
RM		 1195 store_chassis_clear, ALARM_STATUS, 30),
1196 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1197 store_beep_enable, NOT_USED, NOT_USED),
1198 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1199 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1200 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1201 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1202 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1203 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1204 SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
1205 store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
1206};
1207
1208static void w83793_init_client(struct i2c_client *client)
1209{
47efe877 1210 if (reset)
6800c3d0 1211 w83793_write_value(client, W83793_REG_CONFIG, 0x80);
6800c3d0
RM		 1212
1213 /* Start monitoring */
1214 w83793_write_value(client, W83793_REG_CONFIG,
1215 w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
5852f960
SA		 1216}
1217
1218/*
1219 * Watchdog routines
1220 */
1221
1222static int watchdog_set_timeout(struct w83793_data *data, int timeout)
1223{
1224 int ret, mtimeout;
1225
1226 mtimeout = DIV_ROUND_UP(timeout, 60);
1227
1228 if (mtimeout > 255)
1229 return -EINVAL;
1230
1231 mutex_lock(&data->watchdog_lock);
1232 if (!data->client) {
1233 ret = -ENODEV;
1234 goto leave;
1235 }
1236
1237 data->watchdog_timeout = mtimeout;
1238
1239 /* Set Timeout value (in Minutes) */
1240 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1241 data->watchdog_timeout);
1242
1243 ret = mtimeout * 60;
1244
1245leave:
1246 mutex_unlock(&data->watchdog_lock);
1247 return ret;
1248}
1249
1250static int watchdog_get_timeout(struct w83793_data *data)
1251{
1252 int timeout;
1253
1254 mutex_lock(&data->watchdog_lock);
1255 timeout = data->watchdog_timeout * 60;
1256 mutex_unlock(&data->watchdog_lock);
1257
1258 return timeout;
1259}
1260
1261static int watchdog_trigger(struct w83793_data *data)
1262{
1263 int ret = 0;
1264
1265 mutex_lock(&data->watchdog_lock);
1266 if (!data->client) {
1267 ret = -ENODEV;
1268 goto leave;
1269 }
1270
1271 /* Set Timeout value (in Minutes) */
1272 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1273 data->watchdog_timeout);
1274
1275leave:
1276 mutex_unlock(&data->watchdog_lock);
1277 return ret;
1278}
1279
1280static int watchdog_enable(struct w83793_data *data)
1281{
1282 int ret = 0;
1283
1284 mutex_lock(&data->watchdog_lock);
1285 if (!data->client) {
1286 ret = -ENODEV;
1287 goto leave;
1288 }
1289
1290 /* Set initial timeout */
1291 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1292 data->watchdog_timeout);
1293
1294 /* Enable Soft Watchdog */
1295 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55);
1296
1297leave:
1298 mutex_unlock(&data->watchdog_lock);
1299 return ret;
1300}
1301
1302static int watchdog_disable(struct w83793_data *data)
1303{
1304 int ret = 0;
1305
1306 mutex_lock(&data->watchdog_lock);
1307 if (!data->client) {
1308 ret = -ENODEV;
1309 goto leave;
1310 }
1311
1312 /* Disable Soft Watchdog */
1313 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA);
1314
1315leave:
1316 mutex_unlock(&data->watchdog_lock);
1317 return ret;
1318}
1319
1320static int watchdog_open(struct inode *inode, struct file *filp)
1321{
1322 struct w83793_data *pos, *data = NULL;
1323 int watchdog_is_open;
1324
47efe877
GR		 1325 /*
1326 * We get called from drivers/char/misc.c with misc_mtx hold, and we
1327 * call misc_register() from w83793_probe() with watchdog_data_mutex
1328 * hold, as misc_register() takes the misc_mtx lock, this is a possible
1329 * deadlock, so we use mutex_trylock here.
1330 */
5852f960
SA		 1331 if (!mutex_trylock(&watchdog_data_mutex))
1332 return -ERESTARTSYS;
1333 list_for_each_entry(pos, &watchdog_data_list, list) {
1334 if (pos->watchdog_miscdev.minor == iminor(inode)) {
1335 data = pos;
1336 break;
1337 }
1338 }
1339
1340 /* Check, if device is already open */
1341 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
1342
47efe877
GR		 1343 /*
1344 * Increase data reference counter (if not already done).
1345 * Note we can never not have found data, so we don't check for this
1346 */
5852f960
SA		 1347 if (!watchdog_is_open)
1348 kref_get(&data->kref);
1349
1350 mutex_unlock(&watchdog_data_mutex);
1351
1352 /* Check, if device is already open and possibly issue error */
1353 if (watchdog_is_open)
1354 return -EBUSY;
1355
1356 /* Enable Soft Watchdog */
1357 watchdog_enable(data);
1358
1359 /* Store pointer to data into filp's private data */
1360 filp->private_data = data;
1361
1362 return nonseekable_open(inode, filp);
1363}
1364
1365static int watchdog_close(struct inode *inode, struct file *filp)
1366{
1367 struct w83793_data *data = filp->private_data;
6800c3d0 1368
5852f960
SA		 1369 if (data->watchdog_expect_close) {
1370 watchdog_disable(data);
1371 data->watchdog_expect_close = 0;
1372 } else {
1373 watchdog_trigger(data);
1374 dev_crit(&data->client->dev,
1375 "unexpected close, not stopping watchdog!\n");
1376 }
1377
1378 clear_bit(0, &data->watchdog_is_open);
1379
1380 /* Decrease data reference counter */
1381 mutex_lock(&watchdog_data_mutex);
1382 kref_put(&data->kref, w83793_release_resources);
1383 mutex_unlock(&watchdog_data_mutex);
1384
1385 return 0;
1386}
1387
1388static ssize_t watchdog_write(struct file *filp, const char __user *buf,
1389 size_t count, loff_t *offset)
1390{
3f7cd7ea 1391 ssize_t ret;
5852f960
SA		 1392 struct w83793_data *data = filp->private_data;
1393
1394 if (count) {
1395 if (!nowayout) {
1396 size_t i;
1397
1398 /* Clear it in case it was set with a previous write */
1399 data->watchdog_expect_close = 0;
1400
1401 for (i = 0; i != count; i++) {
1402 char c;
1403 if (get_user(c, buf + i))
1404 return -EFAULT;
1405 if (c == 'V')
1406 data->watchdog_expect_close = 1;
1407 }
1408 }
1409 ret = watchdog_trigger(data);
1410 if (ret < 0)
1411 return ret;
1412 }
1413 return count;
1414}
1415
55929332
AB		 1416static long watchdog_ioctl(struct file *filp, unsigned int cmd,
1417 unsigned long arg)
5852f960 1418{
36c7fe13 1419 struct watchdog_info ident = {
5852f960
SA		 1420 .options = WDIOF_KEEPALIVEPING |
1421 WDIOF_SETTIMEOUT |
1422 WDIOF_CARDRESET,
1423 .identity = "w83793 watchdog"
1424 };
1425
1426 int val, ret = 0;
1427 struct w83793_data *data = filp->private_data;
1428
1429 switch (cmd) {
1430 case WDIOC_GETSUPPORT:
1431 if (!nowayout)
1432 ident.options |= WDIOF_MAGICCLOSE;
1433 if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
1434 ret = -EFAULT;
1435 break;
1436
1437 case WDIOC_GETSTATUS:
1438 val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0;
1439 ret = put_user(val, (int __user *)arg);
1440 break;
1441
1442 case WDIOC_GETBOOTSTATUS:
1443 ret = put_user(0, (int __user *)arg);
1444 break;
1445
1446 case WDIOC_KEEPALIVE:
1447 ret = watchdog_trigger(data);
1448 break;
1449
1450 case WDIOC_GETTIMEOUT:
1451 val = watchdog_get_timeout(data);
1452 ret = put_user(val, (int __user *)arg);
1453 break;
1454
1455 case WDIOC_SETTIMEOUT:
1456 if (get_user(val, (int __user *)arg)) {
1457 ret = -EFAULT;
1458 break;
1459 }
1460 ret = watchdog_set_timeout(data, val);
1461 if (ret > 0)
1462 ret = put_user(ret, (int __user *)arg);
1463 break;
1464
1465 case WDIOC_SETOPTIONS:
1466 if (get_user(val, (int __user *)arg)) {
1467 ret = -EFAULT;
1468 break;
1469 }
1470
1471 if (val & WDIOS_DISABLECARD)
1472 ret = watchdog_disable(data);
1473 else if (val & WDIOS_ENABLECARD)
1474 ret = watchdog_enable(data);
1475 else
1476 ret = -EINVAL;
1477
1478 break;
1479 default:
1480 ret = -ENOTTY;
1481 }
5852f960
SA		 1482 return ret;
1483}
1484
1485static const struct file_operations watchdog_fops = {
1486 .owner = THIS_MODULE,
1487 .llseek = no_llseek,
1488 .open = watchdog_open,
1489 .release = watchdog_close,
1490 .write = watchdog_write,
55929332 1491 .unlocked_ioctl = watchdog_ioctl,
5852f960
SA		 1492};
1493
1494/*
1495 * Notifier for system down
1496 */
1497
1498static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
1499 void *unused)
1500{
1501 struct w83793_data *data = NULL;
1502
1503 if (code == SYS_DOWN || code == SYS_HALT) {
1504
1505 /* Disable each registered watchdog */
1506 mutex_lock(&watchdog_data_mutex);
1507 list_for_each_entry(data, &watchdog_data_list, list) {
1508 if (data->watchdog_miscdev.minor)
1509 watchdog_disable(data);
1510 }
1511 mutex_unlock(&watchdog_data_mutex);
1512 }
1513
1514 return NOTIFY_DONE;
6800c3d0
RM		 1515}
1516
5852f960
SA		 1517/*
1518 * The WDT needs to learn about soft shutdowns in order to
1519 * turn the timebomb registers off.
1520 */
1521
1522static struct notifier_block watchdog_notifier = {
1523 .notifier_call = watchdog_notify_sys,
1524};
1525
1526/*
1527 * Init / remove routines
1528 */
1529
a7f13a6e 1530static int w83793_remove(struct i2c_client *client)
6800c3d0
RM		 1531{
1532 struct w83793_data *data = i2c_get_clientdata(client);
1533 struct device *dev = &client->dev;
5852f960
SA		 1534 int i, tmp;
1535
1536 /* Unregister the watchdog (if registered) */
1537 if (data->watchdog_miscdev.minor) {
1538 misc_deregister(&data->watchdog_miscdev);
1539
1540 if (data->watchdog_is_open) {
1541 dev_warn(&client->dev,
1542 "i2c client detached with watchdog open! "
1543 "Stopping watchdog.\n");
1544 watchdog_disable(data);
1545 }
1546
1547 mutex_lock(&watchdog_data_mutex);
1548 list_del(&data->list);
1549 mutex_unlock(&watchdog_data_mutex);
1550
1551 /* Tell the watchdog code the client is gone */
1552 mutex_lock(&data->watchdog_lock);
1553 data->client = NULL;
1554 mutex_unlock(&data->watchdog_lock);
1555 }
1556
1557 /* Reset Configuration Register to Disable Watch Dog Registers */
1558 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1559 w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04);
1560
1561 unregister_reboot_notifier(&watchdog_notifier);
6800c3d0 1562
a7f13a6e 1563 hwmon_device_unregister(data->hwmon_dev);
6800c3d0 1564
a7f13a6e
JD		 1565 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1566 device_remove_file(dev,
1567 &w83793_sensor_attr_2[i].dev_attr);
6800c3d0 1568
a7f13a6e
JD		 1569 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1570 device_remove_file(dev, &sda_single_files[i].dev_attr);
6800c3d0 1571
a7f13a6e
JD		 1572 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1573 device_remove_file(dev, &w83793_vid[i].dev_attr);
1574 device_remove_file(dev, &dev_attr_vrm);
c70a8c34 1575
a7f13a6e
JD		 1576 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1577 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
6800c3d0 1578
a7f13a6e
JD		 1579 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1580 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
46bed4df 1581
a7f13a6e
JD		 1582 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1583 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0 1584
a7f13a6e
JD		 1585 if (data->lm75[0] != NULL)
1586 i2c_unregister_device(data->lm75[0]);
1587 if (data->lm75[1] != NULL)
1588 i2c_unregister_device(data->lm75[1]);
6800c3d0 1589
5852f960
SA		 1590 /* Decrease data reference counter */
1591 mutex_lock(&watchdog_data_mutex);
1592 kref_put(&data->kref, w83793_release_resources);
1593 mutex_unlock(&watchdog_data_mutex);
6800c3d0
RM		 1594
1595 return 0;
1596}
1597
1598static int
a7f13a6e 1599w83793_detect_subclients(struct i2c_client *client)
6800c3d0
RM		 1600{
1601 int i, id, err;
a7f13a6e 1602 int address = client->addr;
6800c3d0 1603 u8 tmp;
a7f13a6e 1604 struct i2c_adapter *adapter = client->adapter;
6800c3d0
RM		 1605 struct w83793_data *data = i2c_get_clientdata(client);
1606
1607 id = i2c_adapter_id(adapter);
1608 if (force_subclients[0] == id && force_subclients[1] == address) {
1609 for (i = 2; i <= 3; i++) {
1610 if (force_subclients[i] < 0x48
1611 || force_subclients[i] > 0x4f) {
1612 dev_err(&client->dev,
1613 "invalid subclient "
1614 "address %d; must be 0x48-0x4f\n",
1615 force_subclients[i]);
1616 err = -EINVAL;
1617 goto ERROR_SC_0;
1618 }
1619 }
1620 w83793_write_value(client, W83793_REG_I2C_SUBADDR,
1621 (force_subclients[2] & 0x07) |
1622 ((force_subclients[3] & 0x07) << 4));
1623 }
1624
1625 tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
47efe877 1626 if (!(tmp & 0x08))
a7f13a6e 1627 data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7));
6800c3d0
RM		 1628 if (!(tmp & 0x80)) {
1629 if ((data->lm75[0] != NULL)
1630 && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
1631 dev_err(&client->dev,
1632 "duplicate addresses 0x%x, "
1633 "use force_subclients\n", data->lm75[0]->addr);
1634 err = -ENODEV;
1635 goto ERROR_SC_1;
1636 }
a7f13a6e
JD		 1637 data->lm75[1] = i2c_new_dummy(adapter,
1638 0x48 + ((tmp >> 4) & 0x7));
6800c3d0
RM		 1639 }
1640
1641 return 0;
1642
1643 /* Undo inits in case of errors */
1644
1645ERROR_SC_1:
a7f13a6e
JD		 1646 if (data->lm75[0] != NULL)
1647 i2c_unregister_device(data->lm75[0]);
6800c3d0
RM		 1648ERROR_SC_0:
1649 return err;
1650}
1651
a7f13a6e 1652/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1653static int w83793_detect(struct i2c_client *client,
a7f13a6e 1654 struct i2c_board_info *info)
6800c3d0 1655{
52df6440 1656 u8 tmp, bank, chip_id;
a7f13a6e
JD		 1657 struct i2c_adapter *adapter = client->adapter;
1658 unsigned short address = client->addr;
6800c3d0 1659
47efe877 1660 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
a7f13a6e 1661 return -ENODEV;
6800c3d0 1662
a7f13a6e 1663 bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1664
52df6440
JD		 1665 tmp = bank & 0x80 ? 0x5c : 0xa3;
1666 /* Check Winbond vendor ID */
1667 if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
1668 pr_debug("w83793: Detection failed at check vendor id\n");
1669 return -ENODEV;
6800c3d0
RM		 1670 }
1671
47efe877
GR		 1672 /*
1673 * If Winbond chip, address of chip and W83793_REG_I2C_ADDR
1674 * should match
1675 */
52df6440
JD		 1676 if ((bank & 0x07) == 0
1677 && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
1678 (address << 1)) {
1679 pr_debug("w83793: Detection failed at check i2c addr\n");
1680 return -ENODEV;
6800c3d0
RM		 1681 }
1682
52df6440
JD		 1683 /* Determine the chip type now */
1684 chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
1685 if (chip_id != 0x7b)
1686 return -ENODEV;
1687
a7f13a6e
JD		 1688 strlcpy(info->type, "w83793", I2C_NAME_SIZE);
1689
1690 return 0;
1691}
6800c3d0 1692
a7f13a6e
JD		 1693static int w83793_probe(struct i2c_client *client,
1694 const struct i2c_device_id *id)
1695{
1696 struct device *dev = &client->dev;
5852f960 1697 const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 };
a7f13a6e
JD		 1698 struct w83793_data *data;
1699 int i, tmp, val, err;
1700 int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
1701 int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
1702 int files_temp = ARRAY_SIZE(w83793_temp) / 6;
1703
1704 data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
1705 if (!data) {
1706 err = -ENOMEM;
1707 goto exit;
1708 }
1709
1710 i2c_set_clientdata(client, data);
1711 data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1712 mutex_init(&data->update_lock);
5852f960
SA		 1713 mutex_init(&data->watchdog_lock);
1714 INIT_LIST_HEAD(&data->list);
1715 kref_init(&data->kref);
1716
47efe877
GR		 1717 /*
1718 * Store client pointer in our data struct for watchdog usage
1719 * (where the client is found through a data ptr instead of the
1720 * otherway around)
1721 */
5852f960 1722 data->client = client;
6800c3d0 1723
a7f13a6e
JD		 1724 err = w83793_detect_subclients(client);
1725 if (err)
6800c3d0
RM		 1726 goto free_mem;
1727
6800c3d0
RM		 1728 /* Initialize the chip */
1729 w83793_init_client(client);
1730
6800c3d0 1731 /*
47efe877
GR		 1732 * Only fan 1-5 has their own input pins,
1733 * Pwm 1-3 has their own pins
6800c3d0
RM		 1734 */
1735 data->has_fan = 0x1f;
1736 data->has_pwm = 0x07;
1737 tmp = w83793_read_value(client, W83793_REG_MFC);
1738 val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
1739
1740 /* check the function of pins 49-56 */
93c75a4a
JD		 1741 if (tmp & 0x80) {
1742 data->has_vid |= 0x2; /* has VIDB */
1743 } else {
6800c3d0
RM		 1744 data->has_pwm |= 0x18; /* pwm 4,5 */
1745 if (val & 0x01) { /* fan 6 */
1746 data->has_fan |= 0x20;
1747 data->has_pwm |= 0x20;
1748 }
1749 if (val & 0x02) { /* fan 7 */
1750 data->has_fan |= 0x40;
1751 data->has_pwm |= 0x40;
1752 }
1753 if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
1754 data->has_fan |= 0x80;
1755 data->has_pwm |= 0x80;
1756 }
1757 }
1758
93c75a4a
JD		 1759 /* check the function of pins 37-40 */
1760 if (!(tmp & 0x29))
1761 data->has_vid |= 0x1; /* has VIDA */
6800c3d0
RM		 1762 if (0x08 == (tmp & 0x0c)) {
1763 if (val & 0x08) /* fan 9 */
1764 data->has_fan |= 0x100;
1765 if (val & 0x10) /* fan 10 */
1766 data->has_fan |= 0x200;
1767 }
6800c3d0
RM		 1768 if (0x20 == (tmp & 0x30)) {
1769 if (val & 0x20) /* fan 11 */
1770 data->has_fan |= 0x400;
1771 if (val & 0x40) /* fan 12 */
1772 data->has_fan |= 0x800;
1773 }
1774
1775 if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
1776 data->has_fan |= 0x80;
1777 data->has_pwm |= 0x80;
1778 }
1779
c9294315
RM		 1780 tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
1781 if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
1782 data->has_fan |= 0x100;
1783 }
1784 if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
1785 data->has_fan |= 0x200;
1786 }
1787 if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
1788 data->has_fan |= 0x400;
1789 }
1790 if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
1791 data->has_fan |= 0x800;
1792 }
1793
46bed4df 1794 /* check the temp1-6 mode, ignore former AMDSI selected inputs */
47efe877 1795 tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[0]);
46bed4df
GJ		 1796 if (tmp & 0x01)
1797 data->has_temp |= 0x01;
1798 if (tmp & 0x04)
1799 data->has_temp |= 0x02;
1800 if (tmp & 0x10)
1801 data->has_temp |= 0x04;
1802 if (tmp & 0x40)
1803 data->has_temp |= 0x08;
1804
47efe877 1805 tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[1]);
46bed4df
GJ		 1806 if (tmp & 0x01)
1807 data->has_temp |= 0x10;
1808 if (tmp & 0x02)
1809 data->has_temp |= 0x20;
1810
6800c3d0
RM		 1811 /* Register sysfs hooks */
1812 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
1813 err = device_create_file(dev,
1814 &w83793_sensor_attr_2[i].dev_attr);
1815 if (err)
1816 goto exit_remove;
1817 }
1818
c70a8c34
GJ		 1819 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
1820 if (!(data->has_vid & (1 << i)))
1821 continue;
1822 err = device_create_file(dev, &w83793_vid[i].dev_attr);
1823 if (err)
1824 goto exit_remove;
1825 }
93c75a4a
JD		 1826 if (data->has_vid) {
1827 data->vrm = vid_which_vrm();
1828 err = device_create_file(dev, &dev_attr_vrm);
1829 if (err)
1830 goto exit_remove;
1831 }
c70a8c34 1832
6800c3d0
RM		 1833 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1834 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1835 if (err)
1836 goto exit_remove;
1837
1838 }
1839
46bed4df
GJ		 1840 for (i = 0; i < 6; i++) {
1841 int j;
1842 if (!(data->has_temp & (1 << i)))
1843 continue;
1844 for (j = 0; j < files_temp; j++) {
1845 err = device_create_file(dev,
1846 &w83793_temp[(i) * files_temp
1847 + j].dev_attr);
1848 if (err)
1849 goto exit_remove;
1850 }
1851 }
1852
6800c3d0
RM		 1853 for (i = 5; i < 12; i++) {
1854 int j;
1855 if (!(data->has_fan & (1 << i)))
1856 continue;
1857 for (j = 0; j < files_fan; j++) {
1858 err = device_create_file(dev,
1859 &w83793_left_fan[(i - 5) * files_fan
1860 + j].dev_attr);
1861 if (err)
1862 goto exit_remove;
1863 }
1864 }
1865
1866 for (i = 3; i < 8; i++) {
1867 int j;
1868 if (!(data->has_pwm & (1 << i)))
1869 continue;
1870 for (j = 0; j < files_pwm; j++) {
1871 err = device_create_file(dev,
1872 &w83793_left_pwm[(i - 3) * files_pwm
1873 + j].dev_attr);
1874 if (err)
1875 goto exit_remove;
1876 }
1877 }
1878
1beeffe4
TJ		 1879 data->hwmon_dev = hwmon_device_register(dev);
1880 if (IS_ERR(data->hwmon_dev)) {
1881 err = PTR_ERR(data->hwmon_dev);
6800c3d0
RM		 1882 goto exit_remove;
1883 }
1884
5852f960
SA		 1885 /* Watchdog initialization */
1886
1887 /* Register boot notifier */
1888 err = register_reboot_notifier(&watchdog_notifier);
1889 if (err != 0) {
1890 dev_err(&client->dev,
1891 "cannot register reboot notifier (err=%d)\n", err);
1892 goto exit_devunreg;
1893 }
1894
47efe877
GR		 1895 /*
1896 * Enable Watchdog registers.
1897 * Set Configuration Register to Enable Watch Dog Registers
1898 * (Bit 2) = XXXX, X1XX.
1899 */
5852f960
SA		 1900 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1901 w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04);
1902
1903 /* Set the default watchdog timeout */
1904 data->watchdog_timeout = timeout;
1905
1906 /* Check, if last reboot was caused by watchdog */
1907 data->watchdog_caused_reboot =
1908 w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01;
1909
1910 /* Disable Soft Watchdog during initialiation */
1911 watchdog_disable(data);
1912
47efe877
GR		 1913 /*
1914 * We take the data_mutex lock early so that watchdog_open() cannot
1915 * run when misc_register() has completed, but we've not yet added
1916 * our data to the watchdog_data_list (and set the default timeout)
1917 */
5852f960
SA		 1918 mutex_lock(&watchdog_data_mutex);
1919 for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
1920 /* Register our watchdog part */
1921 snprintf(data->watchdog_name, sizeof(data->watchdog_name),
1922 "watchdog%c", (i == 0) ? '\0' : ('0' + i));
1923 data->watchdog_miscdev.name = data->watchdog_name;
1924 data->watchdog_miscdev.fops = &watchdog_fops;
1925 data->watchdog_miscdev.minor = watchdog_minors[i];
1926
1927 err = misc_register(&data->watchdog_miscdev);
1928 if (err == -EBUSY)
1929 continue;
1930 if (err) {
1931 data->watchdog_miscdev.minor = 0;
1932 dev_err(&client->dev,
1933 "Registering watchdog chardev: %d\n", err);
1934 break;
1935 }
1936
1937 list_add(&data->list, &watchdog_data_list);
1938
1939 dev_info(&client->dev,
1940 "Registered watchdog chardev major 10, minor: %d\n",
1941 watchdog_minors[i]);
1942 break;
1943 }
1944 if (i == ARRAY_SIZE(watchdog_minors)) {
1945 data->watchdog_miscdev.minor = 0;
1946 dev_warn(&client->dev, "Couldn't register watchdog chardev "
1947 "(due to no free minor)\n");
1948 }
1949
1950 mutex_unlock(&watchdog_data_mutex);
1951
6800c3d0
RM		 1952 return 0;
1953
5852f960
SA		 1954 /* Unregister hwmon device */
1955
1956exit_devunreg:
1957
1958 hwmon_device_unregister(data->hwmon_dev);
1959
6800c3d0
RM		 1960 /* Unregister sysfs hooks */
1961
1962exit_remove:
1963 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1964 device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
1965
1966 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1967 device_remove_file(dev, &sda_single_files[i].dev_attr);
1968
c70a8c34
GJ		 1969 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1970 device_remove_file(dev, &w83793_vid[i].dev_attr);
1971
6800c3d0
RM		 1972 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1973 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
1974
1975 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1976 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
1977
46bed4df
GJ		 1978 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1979 device_remove_file(dev, &w83793_temp[i].dev_attr);
1980
a7f13a6e
JD		 1981 if (data->lm75[0] != NULL)
1982 i2c_unregister_device(data->lm75[0]);
1983 if (data->lm75[1] != NULL)
1984 i2c_unregister_device(data->lm75[1]);
6800c3d0
RM		 1985free_mem:
1986 kfree(data);
1987exit:
1988 return err;
1989}
1990
1991static void w83793_update_nonvolatile(struct device *dev)
1992{
1993 struct i2c_client *client = to_i2c_client(dev);
1994 struct w83793_data *data = i2c_get_clientdata(client);
1995 int i, j;
1996 /*
47efe877
GR		 1997 * They are somewhat "stable" registers, and to update them every time
1998 * takes so much time, it's just not worthy. Update them in a long
1999 * interval to avoid exception.
6800c3d0
RM		 2000 */
2001 if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
2002 || !data->valid))
2003 return;
2004 /* update voltage limits */
2005 for (i = 1; i < 3; i++) {
2006 for (j = 0; j < ARRAY_SIZE(data->in); j++) {
2007 data->in[j][i] =
2008 w83793_read_value(client, W83793_REG_IN[j][i]);
2009 }
2010 data->in_low_bits[i] =
2011 w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
2012 }
2013
2014 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
2015 /* Update the Fan measured value and limits */
47efe877 2016 if (!(data->has_fan & (1 << i)))
6800c3d0 2017 continue;
6800c3d0
RM		 2018 data->fan_min[i] =
2019 w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
2020 data->fan_min[i] |=
2021 w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
2022 }
2023
2024 for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
46bed4df
GJ		 2025 if (!(data->has_temp & (1 << i)))
2026 continue;
6800c3d0
RM		 2027 data->temp_fan_map[i] =
2028 w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
2029 for (j = 1; j < 5; j++) {
2030 data->temp[i][j] =
2031 w83793_read_value(client, W83793_REG_TEMP[i][j]);
2032 }
2033 data->temp_cruise[i] =
2034 w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
2035 for (j = 0; j < 7; j++) {
2036 data->sf2_pwm[i][j] =
2037 w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
2038 data->sf2_temp[i][j] =
2039 w83793_read_value(client,
2040 W83793_REG_SF2_TEMP(i, j));
2041 }
2042 }
2043
2044 for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
2045 data->temp_mode[i] =
2046 w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
2047
2048 for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
2049 data->tolerance[i] =
2050 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
2051 }
2052
2053 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2054 if (!(data->has_pwm & (1 << i)))
2055 continue;
2056 data->pwm[i][PWM_NONSTOP] =
2057 w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
2058 data->pwm[i][PWM_START] =
2059 w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
2060 data->pwm_stop_time[i] =
2061 w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
2062 }
2063
2064 data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
2065 data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
2066 data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
2067 data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
2068 data->temp_critical =
2069 w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
2070 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
2071
47efe877 2072 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
6800c3d0 2073 data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
6800c3d0
RM		 2074
2075 data->last_nonvolatile = jiffies;
2076}
2077
2078static struct w83793_data *w83793_update_device(struct device *dev)
2079{
2080 struct i2c_client *client = to_i2c_client(dev);
2081 struct w83793_data *data = i2c_get_clientdata(client);
2082 int i;
2083
2084 mutex_lock(&data->update_lock);
2085
2086 if (!(time_after(jiffies, data->last_updated + HZ * 2)
2087 || !data->valid))
2088 goto END;
2089
2090 /* Update the voltages measured value and limits */
2091 for (i = 0; i < ARRAY_SIZE(data->in); i++)
2092 data->in[i][IN_READ] =
2093 w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
2094
2095 data->in_low_bits[IN_READ] =
2096 w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
2097
2098 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
47efe877 2099 if (!(data->has_fan & (1 << i)))
6800c3d0 2100 continue;
6800c3d0
RM		 2101 data->fan[i] =
2102 w83793_read_value(client, W83793_REG_FAN(i)) << 8;
2103 data->fan[i] |=
2104 w83793_read_value(client, W83793_REG_FAN(i) + 1);
2105 }
2106
46bed4df
GJ		 2107 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2108 if (!(data->has_temp & (1 << i)))
2109 continue;
6800c3d0
RM		 2110 data->temp[i][TEMP_READ] =
2111 w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
46bed4df 2112 }
6800c3d0
RM		 2113
2114 data->temp_low_bits =
2115 w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
2116
2117 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2118 if (data->has_pwm & (1 << i))
2119 data->pwm[i][PWM_DUTY] =
2120 w83793_read_value(client,
2121 W83793_REG_PWM(i, PWM_DUTY));
2122 }
2123
2124 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
2125 data->alarms[i] =
2126 w83793_read_value(client, W83793_REG_ALARM(i));
c70a8c34
GJ		 2127 if (data->has_vid & 0x01)
2128 data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
2129 if (data->has_vid & 0x02)
2130 data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
6800c3d0
RM		 2131 w83793_update_nonvolatile(dev);
2132 data->last_updated = jiffies;
2133 data->valid = 1;
2134
2135END:
2136 mutex_unlock(&data->update_lock);
2137 return data;
2138}
2139
47efe877
GR		 2140/*
2141 * Ignore the possibility that somebody change bank outside the driver
2142 * Must be called with data->update_lock held, except during initialization
2143 */
6800c3d0
RM		 2144static u8 w83793_read_value(struct i2c_client *client, u16 reg)
2145{
2146 struct w83793_data *data = i2c_get_clientdata(client);
2147 u8 res = 0xff;
2148 u8 new_bank = reg >> 8;
2149
2150 new_bank |= data->bank & 0xfc;
2151 if (data->bank != new_bank) {
2152 if (i2c_smbus_write_byte_data
2153 (client, W83793_REG_BANKSEL, new_bank) >= 0)
2154 data->bank = new_bank;
2155 else {
2156 dev_err(&client->dev,
2157 "set bank to %d failed, fall back "
2158 "to bank %d, read reg 0x%x error\n",
2159 new_bank, data->bank, reg);
2160 res = 0x0; /* read 0x0 from the chip */
2161 goto END;
2162 }
2163 }
2164 res = i2c_smbus_read_byte_data(client, reg & 0xff);
2165END:
2166 return res;
2167}
2168
2169/* Must be called with data->update_lock held, except during initialization */
2170static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
2171{
2172 struct w83793_data *data = i2c_get_clientdata(client);
2173 int res;
2174 u8 new_bank = reg >> 8;
2175
2176 new_bank |= data->bank & 0xfc;
2177 if (data->bank != new_bank) {
47efe877
GR		 2178 res = i2c_smbus_write_byte_data(client, W83793_REG_BANKSEL,
2179 new_bank);
2180 if (res < 0) {
6800c3d0
RM		 2181 dev_err(&client->dev,
2182 "set bank to %d failed, fall back "
2183 "to bank %d, write reg 0x%x error\n",
2184 new_bank, data->bank, reg);
2185 goto END;
2186 }
47efe877 2187 data->bank = new_bank;
6800c3d0
RM		 2188 }
2189
2190 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
2191END:
2192 return res;
2193}
2194
f0967eea 2195module_i2c_driver(w83793_driver);
6800c3d0 2196
5852f960 2197MODULE_AUTHOR("Yuan Mu, Sven Anders");
6800c3d0
RM		 2198MODULE_DESCRIPTION("w83793 driver");
2199MODULE_LICENSE("GPL");
Empty description
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