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81f280e2 RP |
1 | #ifndef ASMARM_ARCH_OHCI_H |
2 | #define ASMARM_ARCH_OHCI_H | |
3 | ||
4 | struct device; | |
5 | ||
6 | struct pxaohci_platform_data { | |
7 | int (*init)(struct device *); | |
8 | void (*exit)(struct device *); | |
9 | ||
097b5334 EM |
10 | unsigned long flags; |
11 | #define ENABLE_PORT1 (1 << 0) | |
12 | #define ENABLE_PORT2 (1 << 1) | |
13 | #define ENABLE_PORT3 (1 << 2) | |
14 | #define ENABLE_PORT_ALL (ENABLE_PORT1 | ENABLE_PORT2 | ENABLE_PORT3) | |
15 | ||
16 | #define POWER_SENSE_LOW (1 << 3) | |
17 | #define POWER_CONTROL_LOW (1 << 4) | |
18 | #define NO_OC_PROTECTION (1 << 5) | |
19 | #define OC_MODE_GLOBAL (0 << 6) | |
20 | #define OC_MODE_PERPORT (1 << 6) | |
21 | ||
22 | int power_on_delay; /* Power On to Power Good time - in ms | |
23 | * HCD must wait for this duration before | |
24 | * accessing a powered on port | |
25 | */ | |
81f280e2 RP |
26 | int port_mode; |
27 | #define PMM_NPS_MODE 1 | |
28 | #define PMM_GLOBAL_MODE 2 | |
29 | #define PMM_PERPORT_MODE 3 | |
0c27c5d5 RP |
30 | |
31 | int power_budget; | |
81f280e2 RP |
32 | }; |
33 | ||
34 | extern void pxa_set_ohci_info(struct pxaohci_platform_data *info); | |
35 | ||
36 | #endif |