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Merge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux.git] / include / uapi / rdma / ib_user_verbs.h
CommitLineData
d50e14ab 1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
8a96b3f9
RD		 2/*
3 * Copyright (c) 2005 Topspin Communications. All rights reserved.
33b9b3ee 4 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
91ecd4ae 5 * Copyright (c) 2005 PathScale, Inc. All rights reserved.
8bdb0e86 6 * Copyright (c) 2006 Mellanox Technologies. All rights reserved.
8a96b3f9
RD		 7 *
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
13 *
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
16 * conditions are met:
17 *
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer.
21 *
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE.
8a96b3f9
RD		 35 */
36
37#ifndef IB_USER_VERBS_H
38#define IB_USER_VERBS_H
39
40#include <linux/types.h>
41
42/*
43 * Increment this value if any changes that break userspace ABI
44 * compatibility are made.
45 */
ea88fd16 46#define IB_USER_VERBS_ABI_VERSION 6
400dbc96 47#define IB_USER_VERBS_CMD_THRESHOLD 50
8a96b3f9
RD		 48
49enum {
8a96b3f9
RD		 50 IB_USER_VERBS_CMD_GET_CONTEXT,
51 IB_USER_VERBS_CMD_QUERY_DEVICE,
52 IB_USER_VERBS_CMD_QUERY_PORT,
8a96b3f9
RD		 53 IB_USER_VERBS_CMD_ALLOC_PD,
54 IB_USER_VERBS_CMD_DEALLOC_PD,
55 IB_USER_VERBS_CMD_CREATE_AH,
56 IB_USER_VERBS_CMD_MODIFY_AH,
57 IB_USER_VERBS_CMD_QUERY_AH,
58 IB_USER_VERBS_CMD_DESTROY_AH,
59 IB_USER_VERBS_CMD_REG_MR,
60 IB_USER_VERBS_CMD_REG_SMR,
61 IB_USER_VERBS_CMD_REREG_MR,
62 IB_USER_VERBS_CMD_QUERY_MR,
63 IB_USER_VERBS_CMD_DEREG_MR,
64 IB_USER_VERBS_CMD_ALLOC_MW,
65 IB_USER_VERBS_CMD_BIND_MW,
66 IB_USER_VERBS_CMD_DEALLOC_MW,
6b73597e 67 IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL,
8a96b3f9
RD		 68 IB_USER_VERBS_CMD_CREATE_CQ,
69 IB_USER_VERBS_CMD_RESIZE_CQ,
70 IB_USER_VERBS_CMD_DESTROY_CQ,
71 IB_USER_VERBS_CMD_POLL_CQ,
72 IB_USER_VERBS_CMD_PEEK_CQ,
73 IB_USER_VERBS_CMD_REQ_NOTIFY_CQ,
74 IB_USER_VERBS_CMD_CREATE_QP,
75 IB_USER_VERBS_CMD_QUERY_QP,
76 IB_USER_VERBS_CMD_MODIFY_QP,
77 IB_USER_VERBS_CMD_DESTROY_QP,
78 IB_USER_VERBS_CMD_POST_SEND,
79 IB_USER_VERBS_CMD_POST_RECV,
80 IB_USER_VERBS_CMD_ATTACH_MCAST,
f520ba5a
RD		 81 IB_USER_VERBS_CMD_DETACH_MCAST,
82 IB_USER_VERBS_CMD_CREATE_SRQ,
83 IB_USER_VERBS_CMD_MODIFY_SRQ,
84 IB_USER_VERBS_CMD_QUERY_SRQ,
85 IB_USER_VERBS_CMD_DESTROY_SRQ,
53d0bd1e
SH		 86 IB_USER_VERBS_CMD_POST_SRQ_RECV,
87 IB_USER_VERBS_CMD_OPEN_XRCD,
8541f8de 88 IB_USER_VERBS_CMD_CLOSE_XRCD,
42849b26 89 IB_USER_VERBS_CMD_CREATE_XSRQ,
436f2ad0 90 IB_USER_VERBS_CMD_OPEN_QP,
f21519b2
YD		 91};
92
f21519b2 93enum {
02d1aa7a 94 IB_USER_VERBS_EX_CMD_QUERY_DEVICE = IB_USER_VERBS_CMD_QUERY_DEVICE,
565197dd 95 IB_USER_VERBS_EX_CMD_CREATE_CQ = IB_USER_VERBS_CMD_CREATE_CQ,
6d8a7497 96 IB_USER_VERBS_EX_CMD_CREATE_QP = IB_USER_VERBS_CMD_CREATE_QP,
189aba99 97 IB_USER_VERBS_EX_CMD_MODIFY_QP = IB_USER_VERBS_CMD_MODIFY_QP,
f21519b2 98 IB_USER_VERBS_EX_CMD_CREATE_FLOW = IB_USER_VERBS_CMD_THRESHOLD,
5a77abf9 99 IB_USER_VERBS_EX_CMD_DESTROY_FLOW,
f213c052
YH		 100 IB_USER_VERBS_EX_CMD_CREATE_WQ,
101 IB_USER_VERBS_EX_CMD_MODIFY_WQ,
102 IB_USER_VERBS_EX_CMD_DESTROY_WQ,
de019a94 103 IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL,
869ddcf8
YC		 104 IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL,
105 IB_USER_VERBS_EX_CMD_MODIFY_CQ
8a96b3f9
RD		 106};
107
108/*
109 * Make sure that all structs defined in this file remain laid out so
110 * that they pack the same way on 32-bit and 64-bit architectures (to
111 * avoid incompatibility between 32-bit userspace and 64-bit kernels).
91ecd4ae
RD		 112 * Specifically:
113 * - Do not use pointer types -- pass pointers in __u64 instead.
114 * - Make sure that any structure larger than 4 bytes is padded to a
115 * multiple of 8 bytes. Otherwise the structure size will be
116 * different between 32-bit and 64-bit architectures.
8a96b3f9
RD		 117 */
118
119struct ib_uverbs_async_event_desc {
26b99066 120 __aligned_u64 element;
8a96b3f9
RD		 121 __u32 event_type; /* enum ib_event_type */
122 __u32 reserved;
123};
124
125struct ib_uverbs_comp_event_desc {
26b99066 126 __aligned_u64 cq_handle;
8a96b3f9
RD		 127};
128
18bd9072
YC		 129struct ib_uverbs_cq_moderation_caps {
130 __u16 max_cq_moderation_count;
131 __u16 max_cq_moderation_period;
132 __u32 reserved;
133};
134
8a96b3f9
RD		 135/*
136 * All commands from userspace should start with a __u32 command field
137 * followed by __u16 in_words and out_words fields (which give the
138 * length of the command block and response buffer if any in 32-bit
139 * words). The kernel driver will read these fields first and read
140 * the rest of the command struct based on these value.
141 */
142
f21519b2 143#define IB_USER_VERBS_CMD_COMMAND_MASK 0xff
372e15c5 144#define IB_USER_VERBS_CMD_FLAG_EXTENDED 0x80000000u
f21519b2 145
8a96b3f9
RD		 146struct ib_uverbs_cmd_hdr {
147 __u32 command;
148 __u16 in_words;
149 __u16 out_words;
150};
151
f21519b2 152struct ib_uverbs_ex_cmd_hdr {
26b99066 153 __aligned_u64 response;
400dbc96
II		 154 __u16 provider_in_words;
155 __u16 provider_out_words;
156 __u32 cmd_hdr_reserved;
157};
158
8a96b3f9 159struct ib_uverbs_get_context {
26b99066
JG		 160 __aligned_u64 response;
161 __aligned_u64 driver_data[0];
8a96b3f9
RD		 162};
163
164struct ib_uverbs_get_context_resp {
165 __u32 async_fd;
6b73597e 166 __u32 num_comp_vectors;
8a96b3f9
RD		 167};
168
169struct ib_uverbs_query_device {
26b99066
JG		 170 __aligned_u64 response;
171 __aligned_u64 driver_data[0];
8a96b3f9
RD		 172};
173
174struct ib_uverbs_query_device_resp {
26b99066 175 __aligned_u64 fw_ver;
97f52eb4
SH		 176 __be64 node_guid;
177 __be64 sys_image_guid;
26b99066
JG		 178 __aligned_u64 max_mr_size;
179 __aligned_u64 page_size_cap;
8a96b3f9
RD		 180 __u32 vendor_id;
181 __u32 vendor_part_id;
182 __u32 hw_ver;
183 __u32 max_qp;
184 __u32 max_qp_wr;
185 __u32 device_cap_flags;
186 __u32 max_sge;
187 __u32 max_sge_rd;
188 __u32 max_cq;
189 __u32 max_cqe;
190 __u32 max_mr;
191 __u32 max_pd;
192 __u32 max_qp_rd_atom;
193 __u32 max_ee_rd_atom;
194 __u32 max_res_rd_atom;
195 __u32 max_qp_init_rd_atom;
196 __u32 max_ee_init_rd_atom;
197 __u32 atomic_cap;
198 __u32 max_ee;
199 __u32 max_rdd;
200 __u32 max_mw;
201 __u32 max_raw_ipv6_qp;
202 __u32 max_raw_ethy_qp;
203 __u32 max_mcast_grp;
204 __u32 max_mcast_qp_attach;
205 __u32 max_total_mcast_qp_attach;
206 __u32 max_ah;
207 __u32 max_fmr;
208 __u32 max_map_per_fmr;
209 __u32 max_srq;
210 __u32 max_srq_wr;
211 __u32 max_srq_sge;
212 __u16 max_pkeys;
213 __u8 local_ca_ack_delay;
214 __u8 phys_port_cnt;
215 __u8 reserved[4];
216};
217
02d1aa7a
EC		 218struct ib_uverbs_ex_query_device {
219 __u32 comp_mask;
220 __u32 reserved;
221};
222
f4056bfd 223struct ib_uverbs_odp_caps {
26b99066 224 __aligned_u64 general_caps;
f4056bfd
HE		 225 struct {
226 __u32 rc_odp_caps;
227 __u32 uc_odp_caps;
228 __u32 ud_odp_caps;
229 } per_transport_caps;
230 __u32 reserved;
231};
232
47adf2f4
YH		 233struct ib_uverbs_rss_caps {
234 /* Corresponding bit will be set if qp type from
235 * 'enum ib_qp_type' is supported, e.g.
236 * supported_qpts |= 1 << IB_QPT_UD
237 */
238 __u32 supported_qpts;
239 __u32 max_rwq_indirection_tables;
240 __u32 max_rwq_indirection_table_size;
241 __u32 reserved;
242};
243
8d50505a
AK		 244struct ib_uverbs_tm_caps {
245 /* Max size of rendezvous request message */
246 __u32 max_rndv_hdr_size;
247 /* Max number of entries in tag matching list */
248 __u32 max_num_tags;
249 /* TM flags */
250 __u32 flags;
251 /* Max number of outstanding list operations */
252 __u32 max_ops;
253 /* Max number of SGE in tag matching entry */
254 __u32 max_sge;
255 __u32 reserved;
256};
257
02d1aa7a
EC		 258struct ib_uverbs_ex_query_device_resp {
259 struct ib_uverbs_query_device_resp base;
260 __u32 comp_mask;
261 __u32 response_length;
f4056bfd 262 struct ib_uverbs_odp_caps odp_caps;
26b99066
JG		 263 __aligned_u64 timestamp_mask;
264 __aligned_u64 hca_core_clock; /* in KHZ */
265 __aligned_u64 device_cap_flags_ex;
47adf2f4
YH		 266 struct ib_uverbs_rss_caps rss_caps;
267 __u32 max_wq_type_rq;
5f23d426 268 __u32 raw_packet_caps;
78b1beb0 269 struct ib_uverbs_tm_caps tm_caps;
18bd9072 270 struct ib_uverbs_cq_moderation_caps cq_moderation_caps;
d41c1208 271 __aligned_u64 max_dm_size;
02d1aa7a
EC		 272};
273
8a96b3f9 274struct ib_uverbs_query_port {
26b99066 275 __aligned_u64 response;
8a96b3f9
RD		 276 __u8 port_num;
277 __u8 reserved[7];
26b99066 278 __aligned_u64 driver_data[0];
8a96b3f9
RD		 279};
280
281struct ib_uverbs_query_port_resp {
2f944c0f 282 __u32 port_cap_flags; /* see ib_uverbs_query_port_cap_flags */
8a96b3f9
RD		 283 __u32 max_msg_sz;
284 __u32 bad_pkey_cntr;
285 __u32 qkey_viol_cntr;
286 __u32 gid_tbl_len;
287 __u16 pkey_tbl_len;
288 __u16 lid;
289 __u16 sm_lid;
290 __u8 state;
291 __u8 max_mtu;
292 __u8 active_mtu;
293 __u8 lmc;
294 __u8 max_vl_num;
295 __u8 sm_sl;
296 __u8 subnet_timeout;
297 __u8 init_type_reply;
298 __u8 active_width;
299 __u8 active_speed;
300 __u8 phys_state;
2420b60b 301 __u8 link_layer;
8942acea
AK		 302 __u8 flags; /* see ib_uverbs_query_port_flags */
303 __u8 reserved;
8a96b3f9
RD		 304};
305
8a96b3f9 306struct ib_uverbs_alloc_pd {
26b99066
JG		 307 __aligned_u64 response;
308 __aligned_u64 driver_data[0];
8a96b3f9
RD		 309};
310
311struct ib_uverbs_alloc_pd_resp {
312 __u32 pd_handle;
313};
314
315struct ib_uverbs_dealloc_pd {
316 __u32 pd_handle;
317};
318
53d0bd1e 319struct ib_uverbs_open_xrcd {
26b99066 320 __aligned_u64 response;
53d0bd1e
SH		 321 __u32 fd;
322 __u32 oflags;
26b99066 323 __aligned_u64 driver_data[0];
53d0bd1e
SH		 324};
325
326struct ib_uverbs_open_xrcd_resp {
327 __u32 xrcd_handle;
328};
329
330struct ib_uverbs_close_xrcd {
331 __u32 xrcd_handle;
332};
333
8a96b3f9 334struct ib_uverbs_reg_mr {
26b99066
JG		 335 __aligned_u64 response;
336 __aligned_u64 start;
337 __aligned_u64 length;
338 __aligned_u64 hca_va;
8a96b3f9
RD		 339 __u32 pd_handle;
340 __u32 access_flags;
26b99066 341 __aligned_u64 driver_data[0];
8a96b3f9
RD		 342};
343
344struct ib_uverbs_reg_mr_resp {
345 __u32 mr_handle;
346 __u32 lkey;
347 __u32 rkey;
348};
349
7e6edb9b 350struct ib_uverbs_rereg_mr {
26b99066 351 __aligned_u64 response;
7e6edb9b
MB		 352 __u32 mr_handle;
353 __u32 flags;
26b99066
JG		 354 __aligned_u64 start;
355 __aligned_u64 length;
356 __aligned_u64 hca_va;
7e6edb9b
MB		 357 __u32 pd_handle;
358 __u32 access_flags;
359};
360
361struct ib_uverbs_rereg_mr_resp {
362 __u32 lkey;
363 __u32 rkey;
364};
365
8a96b3f9
RD		 366struct ib_uverbs_dereg_mr {
367 __u32 mr_handle;
368};
369
6b52a12b 370struct ib_uverbs_alloc_mw {
26b99066 371 __aligned_u64 response;
6b52a12b
SM		 372 __u32 pd_handle;
373 __u8 mw_type;
374 __u8 reserved[3];
375};
376
377struct ib_uverbs_alloc_mw_resp {
378 __u32 mw_handle;
379 __u32 rkey;
380};
381
382struct ib_uverbs_dealloc_mw {
383 __u32 mw_handle;
384};
385
6b73597e 386struct ib_uverbs_create_comp_channel {
26b99066 387 __aligned_u64 response;
6b73597e
RD		 388};
389
390struct ib_uverbs_create_comp_channel_resp {
391 __u32 fd;
392};
393
8a96b3f9 394struct ib_uverbs_create_cq {
26b99066
JG		 395 __aligned_u64 response;
396 __aligned_u64 user_handle;
8a96b3f9 397 __u32 cqe;
6b73597e
RD		 398 __u32 comp_vector;
399 __s32 comp_channel;
400 __u32 reserved;
26b99066 401 __aligned_u64 driver_data[0];
8a96b3f9
RD		 402};
403
beb801ac
JG		 404enum ib_uverbs_ex_create_cq_flags {
405 IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,
406 IB_UVERBS_CQ_FLAGS_IGNORE_OVERRUN = 1 << 1,
407};
408
565197dd 409struct ib_uverbs_ex_create_cq {
26b99066 410 __aligned_u64 user_handle;
565197dd
MB		 411 __u32 cqe;
412 __u32 comp_vector;
413 __s32 comp_channel;
414 __u32 comp_mask;
beb801ac 415 __u32 flags; /* bitmask of ib_uverbs_ex_create_cq_flags */
565197dd
MB		 416 __u32 reserved;
417};
418
8a96b3f9
RD		 419struct ib_uverbs_create_cq_resp {
420 __u32 cq_handle;
421 __u32 cqe;
422};
423
565197dd
MB		 424struct ib_uverbs_ex_create_cq_resp {
425 struct ib_uverbs_create_cq_resp base;
426 __u32 comp_mask;
427 __u32 response_length;
428};
429
33b9b3ee 430struct ib_uverbs_resize_cq {
26b99066 431 __aligned_u64 response;
33b9b3ee
RD		 432 __u32 cq_handle;
433 __u32 cqe;
26b99066 434 __aligned_u64 driver_data[0];
33b9b3ee
RD		 435};
436
437struct ib_uverbs_resize_cq_resp {
438 __u32 cqe;
64f817ba 439 __u32 reserved;
26b99066 440 __aligned_u64 driver_data[0];
33b9b3ee
RD		 441};
442
91ecd4ae 443struct ib_uverbs_poll_cq {
26b99066 444 __aligned_u64 response;
91ecd4ae
RD		 445 __u32 cq_handle;
446 __u32 ne;
447};
448
449struct ib_uverbs_wc {
26b99066 450 __aligned_u64 wr_id;
91ecd4ae
RD		 451 __u32 status;
452 __u32 opcode;
453 __u32 vendor_err;
454 __u32 byte_len;
00f7ec36 455 union {
c966ea12 456 __be32 imm_data;
00f7ec36
SW		 457 __u32 invalidate_rkey;
458 } ex;
91ecd4ae
RD		 459 __u32 qp_num;
460 __u32 src_qp;
461 __u32 wc_flags;
462 __u16 pkey_index;
463 __u16 slid;
464 __u8 sl;
465 __u8 dlid_path_bits;
466 __u8 port_num;
467 __u8 reserved;
468};
469
470struct ib_uverbs_poll_cq_resp {
471 __u32 count;
472 __u32 reserved;
473 struct ib_uverbs_wc wc[0];
474};
475
476struct ib_uverbs_req_notify_cq {
477 __u32 cq_handle;
478 __u32 solicited_only;
479};
480
8a96b3f9 481struct ib_uverbs_destroy_cq {
26b99066 482 __aligned_u64 response;
8a96b3f9 483 __u32 cq_handle;
63aaf647
RD		 484 __u32 reserved;
485};
486
487struct ib_uverbs_destroy_cq_resp {
488 __u32 comp_events_reported;
489 __u32 async_events_reported;
8a96b3f9
RD		 490};
491
6a9af2e1
SH		 492struct ib_uverbs_global_route {
493 __u8 dgid[16];
494 __u32 flow_label;
495 __u8 sgid_index;
496 __u8 hop_limit;
497 __u8 traffic_class;
498 __u8 reserved;
499};
500
501struct ib_uverbs_ah_attr {
502 struct ib_uverbs_global_route grh;
503 __u16 dlid;
504 __u8 sl;
505 __u8 src_path_bits;
506 __u8 static_rate;
507 __u8 is_global;
508 __u8 port_num;
509 __u8 reserved;
510};
511
512struct ib_uverbs_qp_attr {
513 __u32 qp_attr_mask;
514 __u32 qp_state;
515 __u32 cur_qp_state;
516 __u32 path_mtu;
517 __u32 path_mig_state;
518 __u32 qkey;
519 __u32 rq_psn;
520 __u32 sq_psn;
521 __u32 dest_qp_num;
522 __u32 qp_access_flags;
523
524 struct ib_uverbs_ah_attr ah_attr;
525 struct ib_uverbs_ah_attr alt_ah_attr;
526
527 /* ib_qp_cap */
528 __u32 max_send_wr;
529 __u32 max_recv_wr;
530 __u32 max_send_sge;
531 __u32 max_recv_sge;
532 __u32 max_inline_data;
533
534 __u16 pkey_index;
535 __u16 alt_pkey_index;
536 __u8 en_sqd_async_notify;
537 __u8 sq_draining;
538 __u8 max_rd_atomic;
539 __u8 max_dest_rd_atomic;
540 __u8 min_rnr_timer;
541 __u8 port_num;
542 __u8 timeout;
543 __u8 retry_cnt;
544 __u8 rnr_retry;
545 __u8 alt_port_num;
546 __u8 alt_timeout;
547 __u8 reserved[5];
548};
549
8a96b3f9 550struct ib_uverbs_create_qp {
26b99066
JG		 551 __aligned_u64 response;
552 __aligned_u64 user_handle;
8a96b3f9
RD		 553 __u32 pd_handle;
554 __u32 send_cq_handle;
555 __u32 recv_cq_handle;
556 __u32 srq_handle;
557 __u32 max_send_wr;
558 __u32 max_recv_wr;
559 __u32 max_send_sge;
560 __u32 max_recv_sge;
561 __u32 max_inline_data;
562 __u8 sq_sig_all;
563 __u8 qp_type;
564 __u8 is_srq;
565 __u8 reserved;
26b99066 566 __aligned_u64 driver_data[0];
8a96b3f9
RD		 567};
568
c70285f8
YH		 569enum ib_uverbs_create_qp_mask {
570 IB_UVERBS_CREATE_QP_MASK_IND_TABLE = 1UL << 0,
571};
572
573enum {
574 IB_UVERBS_CREATE_QP_SUP_COMP_MASK = IB_UVERBS_CREATE_QP_MASK_IND_TABLE,
575};
576
189aba99 577enum {
646ebd41
LR		 578 /*
579 * This value is equal to IB_QP_DEST_QPN.
580 */
581 IB_USER_LEGACY_LAST_QP_ATTR_MASK = 1ULL << 20,
189aba99
BW		 582};
583
584enum {
646ebd41
LR		 585 /*
586 * This value is equal to IB_QP_RATE_LIMIT.
587 */
588 IB_USER_LAST_QP_ATTR_MASK = 1ULL << 25,
189aba99
BW		 589};
590
6d8a7497 591struct ib_uverbs_ex_create_qp {
26b99066 592 __aligned_u64 user_handle;
6d8a7497
EBE		 593 __u32 pd_handle;
594 __u32 send_cq_handle;
595 __u32 recv_cq_handle;
596 __u32 srq_handle;
597 __u32 max_send_wr;
598 __u32 max_recv_wr;
599 __u32 max_send_sge;
600 __u32 max_recv_sge;
601 __u32 max_inline_data;
602 __u8 sq_sig_all;
603 __u8 qp_type;
604 __u8 is_srq;
605 __u8 reserved;
606 __u32 comp_mask;
607 __u32 create_flags;
c70285f8 608 __u32 rwq_ind_tbl_handle;
2dee0e54 609 __u32 source_qpn;
6d8a7497
EBE		 610};
611
42849b26 612struct ib_uverbs_open_qp {
26b99066
JG		 613 __aligned_u64 response;
614 __aligned_u64 user_handle;
42849b26
SH		 615 __u32 pd_handle;
616 __u32 qpn;
617 __u8 qp_type;
618 __u8 reserved[7];
26b99066 619 __aligned_u64 driver_data[0];
42849b26
SH		 620};
621
622/* also used for open response */
8a96b3f9
RD		 623struct ib_uverbs_create_qp_resp {
624 __u32 qp_handle;
625 __u32 qpn;
77369ed3
JM		 626 __u32 max_send_wr;
627 __u32 max_recv_wr;
628 __u32 max_send_sge;
629 __u32 max_recv_sge;
630 __u32 max_inline_data;
4d9781c5 631 __u32 reserved;
8a96b3f9
RD		 632};
633
6d8a7497
EBE		 634struct ib_uverbs_ex_create_qp_resp {
635 struct ib_uverbs_create_qp_resp base;
636 __u32 comp_mask;
637 __u32 response_length;
638};
639
8a96b3f9
RD		 640/*
641 * This struct needs to remain a multiple of 8 bytes to keep the
642 * alignment of the modify QP parameters.
643 */
644struct ib_uverbs_qp_dest {
645 __u8 dgid[16];
646 __u32 flow_label;
647 __u16 dlid;
648 __u16 reserved;
649 __u8 sgid_index;
650 __u8 hop_limit;
651 __u8 traffic_class;
652 __u8 sl;
653 __u8 src_path_bits;
654 __u8 static_rate;
655 __u8 is_global;
656 __u8 port_num;
657};
658
7ccc9a24 659struct ib_uverbs_query_qp {
26b99066 660 __aligned_u64 response;
7ccc9a24
DB		 661 __u32 qp_handle;
662 __u32 attr_mask;
26b99066 663 __aligned_u64 driver_data[0];
7ccc9a24
DB		 664};
665
666struct ib_uverbs_query_qp_resp {
667 struct ib_uverbs_qp_dest dest;
668 struct ib_uverbs_qp_dest alt_dest;
669 __u32 max_send_wr;
670 __u32 max_recv_wr;
671 __u32 max_send_sge;
672 __u32 max_recv_sge;
673 __u32 max_inline_data;
674 __u32 qkey;
675 __u32 rq_psn;
676 __u32 sq_psn;
677 __u32 dest_qp_num;
678 __u32 qp_access_flags;
679 __u16 pkey_index;
680 __u16 alt_pkey_index;
681 __u8 qp_state;
682 __u8 cur_qp_state;
683 __u8 path_mtu;
684 __u8 path_mig_state;
0b26c88f 685 __u8 sq_draining;
7ccc9a24
DB		 686 __u8 max_rd_atomic;
687 __u8 max_dest_rd_atomic;
688 __u8 min_rnr_timer;
689 __u8 port_num;
690 __u8 timeout;
691 __u8 retry_cnt;
692 __u8 rnr_retry;
693 __u8 alt_port_num;
694 __u8 alt_timeout;
695 __u8 sq_sig_all;
696 __u8 reserved[5];
26b99066 697 __aligned_u64 driver_data[0];
7ccc9a24
DB		 698};
699
8a96b3f9
RD		 700struct ib_uverbs_modify_qp {
701 struct ib_uverbs_qp_dest dest;
702 struct ib_uverbs_qp_dest alt_dest;
703 __u32 qp_handle;
704 __u32 attr_mask;
705 __u32 qkey;
706 __u32 rq_psn;
707 __u32 sq_psn;
708 __u32 dest_qp_num;
709 __u32 qp_access_flags;
710 __u16 pkey_index;
711 __u16 alt_pkey_index;
712 __u8 qp_state;
713 __u8 cur_qp_state;
714 __u8 path_mtu;
715 __u8 path_mig_state;
716 __u8 en_sqd_async_notify;
717 __u8 max_rd_atomic;
718 __u8 max_dest_rd_atomic;
719 __u8 min_rnr_timer;
720 __u8 port_num;
721 __u8 timeout;
722 __u8 retry_cnt;
723 __u8 rnr_retry;
724 __u8 alt_port_num;
725 __u8 alt_timeout;
726 __u8 reserved[2];
26b99066 727 __aligned_u64 driver_data[0];
8a96b3f9
RD		 728};
729
189aba99
BW		 730struct ib_uverbs_ex_modify_qp {
731 struct ib_uverbs_modify_qp base;
732 __u32 rate_limit;
733 __u32 reserved;
734};
735
8a96b3f9
RD		 736struct ib_uverbs_modify_qp_resp {
737};
738
189aba99
BW		 739struct ib_uverbs_ex_modify_qp_resp {
740 __u32 comp_mask;
741 __u32 response_length;
742};
743
8a96b3f9 744struct ib_uverbs_destroy_qp {
26b99066 745 __aligned_u64 response;
8a96b3f9 746 __u32 qp_handle;
63aaf647
RD		 747 __u32 reserved;
748};
749
750struct ib_uverbs_destroy_qp_resp {
751 __u32 events_reported;
8a96b3f9
RD		 752};
753
91ecd4ae
RD		 754/*
755 * The ib_uverbs_sge structure isn't used anywhere, since we assume
756 * the ib_sge structure is packed the same way on 32-bit and 64-bit
757 * architectures in both kernel and user space. It's just here to
758 * document the ABI.
759 */
760struct ib_uverbs_sge {
26b99066 761 __aligned_u64 addr;
91ecd4ae
RD		 762 __u32 length;
763 __u32 lkey;
764};
765
9a59739b
JG		 766enum ib_uverbs_wr_opcode {
767 IB_UVERBS_WR_RDMA_WRITE = 0,
768 IB_UVERBS_WR_RDMA_WRITE_WITH_IMM = 1,
769 IB_UVERBS_WR_SEND = 2,
770 IB_UVERBS_WR_SEND_WITH_IMM = 3,
771 IB_UVERBS_WR_RDMA_READ = 4,
772 IB_UVERBS_WR_ATOMIC_CMP_AND_SWP = 5,
773 IB_UVERBS_WR_ATOMIC_FETCH_AND_ADD = 6,
774 IB_UVERBS_WR_LOCAL_INV = 7,
775 IB_UVERBS_WR_BIND_MW = 8,
776 IB_UVERBS_WR_SEND_WITH_INV = 9,
777 IB_UVERBS_WR_TSO = 10,
778 IB_UVERBS_WR_RDMA_READ_WITH_INV = 11,
779 IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP = 12,
780 IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD = 13,
781 /* Review enum ib_wr_opcode before modifying this */
782};
783
91ecd4ae 784struct ib_uverbs_send_wr {
26b99066 785 __aligned_u64 wr_id;
91ecd4ae 786 __u32 num_sge;
9a59739b 787 __u32 opcode; /* see enum ib_uverbs_wr_opcode */
91ecd4ae 788 __u32 send_flags;
0f39cf3d 789 union {
c966ea12 790 __be32 imm_data;
0f39cf3d
RD		 791 __u32 invalidate_rkey;
792 } ex;
91ecd4ae
RD		 793 union {
794 struct {
26b99066 795 __aligned_u64 remote_addr;
91ecd4ae
RD		 796 __u32 rkey;
797 __u32 reserved;
798 } rdma;
799 struct {
26b99066
JG		 800 __aligned_u64 remote_addr;
801 __aligned_u64 compare_add;
802 __aligned_u64 swap;
91ecd4ae
RD		 803 __u32 rkey;
804 __u32 reserved;
805 } atomic;
806 struct {
807 __u32 ah;
808 __u32 remote_qpn;
809 __u32 remote_qkey;
810 __u32 reserved;
811 } ud;
812 } wr;
813};
814
815struct ib_uverbs_post_send {
26b99066 816 __aligned_u64 response;
91ecd4ae
RD		 817 __u32 qp_handle;
818 __u32 wr_count;
819 __u32 sge_count;
820 __u32 wqe_size;
821 struct ib_uverbs_send_wr send_wr[0];
822};
823
824struct ib_uverbs_post_send_resp {
825 __u32 bad_wr;
826};
827
828struct ib_uverbs_recv_wr {
26b99066 829 __aligned_u64 wr_id;
91ecd4ae
RD		 830 __u32 num_sge;
831 __u32 reserved;
832};
833
834struct ib_uverbs_post_recv {
26b99066 835 __aligned_u64 response;
91ecd4ae
RD		 836 __u32 qp_handle;
837 __u32 wr_count;
838 __u32 sge_count;
839 __u32 wqe_size;
840 struct ib_uverbs_recv_wr recv_wr[0];
841};
842
843struct ib_uverbs_post_recv_resp {
844 __u32 bad_wr;
845};
846
847struct ib_uverbs_post_srq_recv {
26b99066 848 __aligned_u64 response;
91ecd4ae
RD		 849 __u32 srq_handle;
850 __u32 wr_count;
851 __u32 sge_count;
852 __u32 wqe_size;
853 struct ib_uverbs_recv_wr recv[0];
854};
855
856struct ib_uverbs_post_srq_recv_resp {
857 __u32 bad_wr;
858};
859
91ecd4ae 860struct ib_uverbs_create_ah {
26b99066
JG		 861 __aligned_u64 response;
862 __aligned_u64 user_handle;
91ecd4ae
RD		 863 __u32 pd_handle;
864 __u32 reserved;
865 struct ib_uverbs_ah_attr attr;
866};
867
868struct ib_uverbs_create_ah_resp {
869 __u32 ah_handle;
870};
871
872struct ib_uverbs_destroy_ah {
873 __u32 ah_handle;
874};
875
8a96b3f9
RD		 876struct ib_uverbs_attach_mcast {
877 __u8 gid[16];
878 __u32 qp_handle;
879 __u16 mlid;
880 __u16 reserved;
26b99066 881 __aligned_u64 driver_data[0];
8a96b3f9
RD		 882};
883
884struct ib_uverbs_detach_mcast {
885 __u8 gid[16];
886 __u32 qp_handle;
887 __u16 mlid;
888 __u16 reserved;
26b99066 889 __aligned_u64 driver_data[0];
436f2ad0
HHZ		 890};
891
58913efb
YD		 892struct ib_uverbs_flow_spec_hdr {
893 __u32 type;
894 __u16 size;
895 __u16 reserved;
896 /* followed by flow_spec */
26b99066 897 __aligned_u64 flow_spec_data[0];
58913efb
YD		 898};
899
b68c9560 900struct ib_uverbs_flow_eth_filter {
436f2ad0
HHZ		 901 __u8 dst_mac[6];
902 __u8 src_mac[6];
903 __be16 ether_type;
904 __be16 vlan_tag;
905};
906
b68c9560 907struct ib_uverbs_flow_spec_eth {
58913efb
YD		 908 union {
909 struct ib_uverbs_flow_spec_hdr hdr;
910 struct {
911 __u32 type;
912 __u16 size;
913 __u16 reserved;
914 };
915 };
b68c9560
YD		 916 struct ib_uverbs_flow_eth_filter val;
917 struct ib_uverbs_flow_eth_filter mask;
436f2ad0
HHZ		 918};
919
b68c9560 920struct ib_uverbs_flow_ipv4_filter {
436f2ad0
HHZ		 921 __be32 src_ip;
922 __be32 dst_ip;
989a3a8f
MG		 923 __u8 proto;
924 __u8 tos;
925 __u8 ttl;
926 __u8 flags;
436f2ad0
HHZ		 927};
928
b68c9560 929struct ib_uverbs_flow_spec_ipv4 {
58913efb
YD		 930 union {
931 struct ib_uverbs_flow_spec_hdr hdr;
932 struct {
933 __u32 type;
934 __u16 size;
935 __u16 reserved;
936 };
937 };
b68c9560
YD		 938 struct ib_uverbs_flow_ipv4_filter val;
939 struct ib_uverbs_flow_ipv4_filter mask;
436f2ad0
HHZ		 940};
941
b68c9560 942struct ib_uverbs_flow_tcp_udp_filter {
436f2ad0
HHZ		 943 __be16 dst_port;
944 __be16 src_port;
945};
946
b68c9560 947struct ib_uverbs_flow_spec_tcp_udp {
58913efb
YD		 948 union {
949 struct ib_uverbs_flow_spec_hdr hdr;
950 struct {
951 __u32 type;
952 __u16 size;
953 __u16 reserved;
954 };
955 };
b68c9560
YD		 956 struct ib_uverbs_flow_tcp_udp_filter val;
957 struct ib_uverbs_flow_tcp_udp_filter mask;
436f2ad0
HHZ		 958};
959
4c2aae71 960struct ib_uverbs_flow_ipv6_filter {
a72c6a2b
MG		 961 __u8 src_ip[16];
962 __u8 dst_ip[16];
963 __be32 flow_label;
964 __u8 next_hdr;
965 __u8 traffic_class;
966 __u8 hop_limit;
967 __u8 reserved;
4c2aae71
MG		 968};
969
970struct ib_uverbs_flow_spec_ipv6 {
971 union {
972 struct ib_uverbs_flow_spec_hdr hdr;
973 struct {
974 __u32 type;
975 __u16 size;
976 __u16 reserved;
977 };
978 };
979 struct ib_uverbs_flow_ipv6_filter val;
980 struct ib_uverbs_flow_ipv6_filter mask;
981};
982
94e03f11
MR		 983struct ib_uverbs_flow_spec_action_tag {
984 union {
985 struct ib_uverbs_flow_spec_hdr hdr;
986 struct {
987 __u32 type;
988 __u16 size;
989 __u16 reserved;
990 };
991 };
992 __u32 tag_id;
993 __u32 reserved1;
994};
995
483a3966
SS		 996struct ib_uverbs_flow_spec_action_drop {
997 union {
998 struct ib_uverbs_flow_spec_hdr hdr;
999 struct {
1000 __u32 type;
1001 __u16 size;
1002 __u16 reserved;
1003 };
1004 };
1005};
1006
9b828441
MB		 1007struct ib_uverbs_flow_spec_action_handle {
1008 union {
1009 struct ib_uverbs_flow_spec_hdr hdr;
1010 struct {
1011 __u32 type;
1012 __u16 size;
1013 __u16 reserved;
1014 };
1015 };
1016 __u32 handle;
1017 __u32 reserved1;
1018};
1019
b6ba4a9a
RS		 1020struct ib_uverbs_flow_spec_action_count {
1021 union {
1022 struct ib_uverbs_flow_spec_hdr hdr;
1023 struct {
1024 __u32 type;
1025 __u16 size;
1026 __u16 reserved;
1027 };
1028 };
1029 __u32 handle;
1030 __u32 reserved1;
1031};
1032
a0cb4c75
MR		 1033struct ib_uverbs_flow_tunnel_filter {
1034 __be32 tunnel_id;
1035};
1036
1037struct ib_uverbs_flow_spec_tunnel {
1038 union {
1039 struct ib_uverbs_flow_spec_hdr hdr;
1040 struct {
1041 __u32 type;
1042 __u16 size;
1043 __u16 reserved;
1044 };
1045 };
1046 struct ib_uverbs_flow_tunnel_filter val;
1047 struct ib_uverbs_flow_tunnel_filter mask;
1048};
1049
56ab0b38
MB		 1050struct ib_uverbs_flow_spec_esp_filter {
1051 __u32 spi;
1052 __u32 seq;
1053};
1054
1055struct ib_uverbs_flow_spec_esp {
1056 union {
1057 struct ib_uverbs_flow_spec_hdr hdr;
1058 struct {
1059 __u32 type;
1060 __u16 size;
1061 __u16 reserved;
1062 };
1063 };
1064 struct ib_uverbs_flow_spec_esp_filter val;
1065 struct ib_uverbs_flow_spec_esp_filter mask;
1066};
1067
20b6563b
AL		 1068struct ib_uverbs_flow_gre_filter {
1069 /* c_ks_res0_ver field is bits 0-15 in offset 0 of a standard GRE header:
1070 * bit 0 - C - checksum bit.
1071 * bit 1 - reserved. set to 0.
1072 * bit 2 - key bit.
1073 * bit 3 - sequence number bit.
1074 * bits 4:12 - reserved. set to 0.
1075 * bits 13:15 - GRE version.
1076 */
1077 __be16 c_ks_res0_ver;
1078 __be16 protocol;
1079 __be32 key;
1080};
1081
1082struct ib_uverbs_flow_spec_gre {
1083 union {
1084 struct ib_uverbs_flow_spec_hdr hdr;
1085 struct {
1086 __u32 type;
1087 __u16 size;
1088 __u16 reserved;
1089 };
1090 };
1091 struct ib_uverbs_flow_gre_filter val;
1092 struct ib_uverbs_flow_gre_filter mask;
1093};
1094
0d86bbec
AL		 1095struct ib_uverbs_flow_mpls_filter {
1096 /* The field includes the entire MPLS label:
1097 * bits 0:19 - label field.
1098 * bits 20:22 - traffic class field.
1099 * bits 23 - bottom of stack bit.
1100 * bits 24:31 - ttl field.
1101 */
1102 __be32 label;
1103};
1104
1105struct ib_uverbs_flow_spec_mpls {
1106 union {
1107 struct ib_uverbs_flow_spec_hdr hdr;
1108 struct {
1109 __u32 type;
1110 __u16 size;
1111 __u16 reserved;
1112 };
1113 };
1114 struct ib_uverbs_flow_mpls_filter val;
1115 struct ib_uverbs_flow_mpls_filter mask;
1116};
1117
d82693da 1118struct ib_uverbs_flow_attr {
436f2ad0
HHZ		 1119 __u32 type;
1120 __u16 size;
1121 __u16 priority;
1122 __u8 num_of_specs;
1123 __u8 reserved[2];
1124 __u8 port;
1125 __u32 flags;
1126 /* Following are the optional layers according to user request
1127 * struct ib_flow_spec_xxx
1128 * struct ib_flow_spec_yyy
1129 */
58913efb 1130 struct ib_uverbs_flow_spec_hdr flow_specs[0];
436f2ad0
HHZ		 1131};
1132
1133struct ib_uverbs_create_flow {
1134 __u32 comp_mask;
436f2ad0 1135 __u32 qp_handle;
d82693da 1136 struct ib_uverbs_flow_attr flow_attr;
436f2ad0
HHZ		 1137};
1138
1139struct ib_uverbs_create_flow_resp {
1140 __u32 comp_mask;
1141 __u32 flow_handle;
1142};
1143
1144struct ib_uverbs_destroy_flow {
1145 __u32 comp_mask;
1146 __u32 flow_handle;
8a96b3f9
RD		 1147};
1148
f520ba5a 1149struct ib_uverbs_create_srq {
26b99066
JG		 1150 __aligned_u64 response;
1151 __aligned_u64 user_handle;
f520ba5a
RD		 1152 __u32 pd_handle;
1153 __u32 max_wr;
1154 __u32 max_sge;
1155 __u32 srq_limit;
26b99066 1156 __aligned_u64 driver_data[0];
f520ba5a
RD		 1157};
1158
8541f8de 1159struct ib_uverbs_create_xsrq {
26b99066
JG		 1160 __aligned_u64 response;
1161 __aligned_u64 user_handle;
8541f8de
SH		 1162 __u32 srq_type;
1163 __u32 pd_handle;
1164 __u32 max_wr;
1165 __u32 max_sge;
1166 __u32 srq_limit;
9382d4e1 1167 __u32 max_num_tags;
8541f8de
SH		 1168 __u32 xrcd_handle;
1169 __u32 cq_handle;
26b99066 1170 __aligned_u64 driver_data[0];
8541f8de
SH		 1171};
1172
f520ba5a
RD		 1173struct ib_uverbs_create_srq_resp {
1174 __u32 srq_handle;
ea88fd16
DB		 1175 __u32 max_wr;
1176 __u32 max_sge;
8541f8de 1177 __u32 srqn;
f520ba5a
RD		 1178};
1179
1180struct ib_uverbs_modify_srq {
1181 __u32 srq_handle;
1182 __u32 attr_mask;
1183 __u32 max_wr;
f520ba5a 1184 __u32 srq_limit;
26b99066 1185 __aligned_u64 driver_data[0];
f520ba5a
RD		 1186};
1187
8bdb0e86 1188struct ib_uverbs_query_srq {
26b99066 1189 __aligned_u64 response;
8bdb0e86
DB		 1190 __u32 srq_handle;
1191 __u32 reserved;
26b99066 1192 __aligned_u64 driver_data[0];
8bdb0e86
DB		 1193};
1194
1195struct ib_uverbs_query_srq_resp {
1196 __u32 max_wr;
1197 __u32 max_sge;
1198 __u32 srq_limit;
1199 __u32 reserved;
1200};
1201
f520ba5a 1202struct ib_uverbs_destroy_srq {
26b99066 1203 __aligned_u64 response;
f520ba5a 1204 __u32 srq_handle;
63aaf647
RD		 1205 __u32 reserved;
1206};
1207
1208struct ib_uverbs_destroy_srq_resp {
1209 __u32 events_reported;
f520ba5a
RD		 1210};
1211
f213c052
YH		 1212struct ib_uverbs_ex_create_wq {
1213 __u32 comp_mask;
1214 __u32 wq_type;
26b99066 1215 __aligned_u64 user_handle;
f213c052
YH		 1216 __u32 pd_handle;
1217 __u32 cq_handle;
1218 __u32 max_wr;
1219 __u32 max_sge;
af1cb95d
NO		 1220 __u32 create_flags; /* Use enum ib_wq_flags */
1221 __u32 reserved;
f213c052
YH		 1222};
1223
1224struct ib_uverbs_ex_create_wq_resp {
1225 __u32 comp_mask;
1226 __u32 response_length;
1227 __u32 wq_handle;
1228 __u32 max_wr;
1229 __u32 max_sge;
1230 __u32 wqn;
1231};
1232
1233struct ib_uverbs_ex_destroy_wq {
1234 __u32 comp_mask;
1235 __u32 wq_handle;
1236};
1237
1238struct ib_uverbs_ex_destroy_wq_resp {
1239 __u32 comp_mask;
1240 __u32 response_length;
1241 __u32 events_reported;
1242 __u32 reserved;
1243};
1244
1245struct ib_uverbs_ex_modify_wq {
1246 __u32 attr_mask;
1247 __u32 wq_handle;
1248 __u32 wq_state;
1249 __u32 curr_wq_state;
af1cb95d
NO		 1250 __u32 flags; /* Use enum ib_wq_flags */
1251 __u32 flags_mask; /* Use enum ib_wq_flags */
f213c052
YH		 1252};
1253
de019a94
YH		 1254/* Prevent memory allocation rather than max expected size */
1255#define IB_USER_VERBS_MAX_LOG_IND_TBL_SIZE 0x0d
1256struct ib_uverbs_ex_create_rwq_ind_table {
1257 __u32 comp_mask;
1258 __u32 log_ind_tbl_size;
1259 /* Following are the wq handles according to log_ind_tbl_size
1260 * wq_handle1
1261 * wq_handle2
1262 */
1263 __u32 wq_handles[0];
1264};
1265
1266struct ib_uverbs_ex_create_rwq_ind_table_resp {
1267 __u32 comp_mask;
1268 __u32 response_length;
1269 __u32 ind_tbl_handle;
1270 __u32 ind_tbl_num;
1271};
1272
1273struct ib_uverbs_ex_destroy_rwq_ind_table {
1274 __u32 comp_mask;
1275 __u32 ind_tbl_handle;
1276};
1277
869ddcf8
YC		 1278struct ib_uverbs_cq_moderation {
1279 __u16 cq_count;
1280 __u16 cq_period;
1281};
1282
1283struct ib_uverbs_ex_modify_cq {
1284 __u32 cq_handle;
1285 __u32 attr_mask;
1286 struct ib_uverbs_cq_moderation attr;
1287 __u32 reserved;
1288};
1289
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ND		 1290#define IB_DEVICE_NAME_MAX 64
1291
8a96b3f9 1292#endif /* IB_USER_VERBS_H */
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