[linux.git] / arch / arm / mach-sa1100 / clock.c

/*
 *  linux/arch/arm/mach-sa1100/clock.c
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/string.h>
#include <linux/clk.h>
#include <linux/spinlock.h>
#include <linux/mutex.h>

#include <mach/hardware.h>

/*
 * Very simple clock implementation - we only have one clock to deal with.
 */
struct clk {
	unsigned int		enabled;
};

static void clk_gpio27_enable(void)
{
	/*
	 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
	 * (SA-1110 Developer's Manual, section 9.1.2.1)
	 */
	GAFR |= GPIO_32_768kHz;
	GPDR |= GPIO_32_768kHz;
	TUCR = TUCR_3_6864MHz;
}

static void clk_gpio27_disable(void)
{
	TUCR = 0;
	GPDR &= ~GPIO_32_768kHz;
	GAFR &= ~GPIO_32_768kHz;
}

static struct clk clk_gpio27;

static DEFINE_SPINLOCK(clocks_lock);

struct clk *clk_get(struct device *dev, const char *id)
{
	const char *devname = dev_name(dev);

	return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
}
EXPORT_SYMBOL(clk_get);

void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);

int clk_enable(struct clk *clk)
{
	unsigned long flags;

	spin_lock_irqsave(&clocks_lock, flags);
	if (clk->enabled++ == 0)
		clk_gpio27_enable();
	spin_unlock_irqrestore(&clocks_lock, flags);
	return 0;
}
EXPORT_SYMBOL(clk_enable);

void clk_disable(struct clk *clk)
{
	unsigned long flags;

	WARN_ON(clk->enabled == 0);

	spin_lock_irqsave(&clocks_lock, flags);
	if (--clk->enabled == 0)
		clk_gpio27_disable();
	spin_unlock_irqrestore(&clocks_lock, flags);
}
EXPORT_SYMBOL(clk_disable);

unsigned long clk_get_rate(struct clk *clk)
{
	return 3686400;
}
EXPORT_SYMBOL(clk_get_rate);
Commit	Line	Data
97d654f8 RK	1	/*
	2	* linux/arch/arm/mach-sa1100/clock.c
	3	*/
	4	#include <linux/module.h>
	5	#include <linux/kernel.h>
5e1dbdb4	6	#include <linux/device.h>
97d654f8 RK	7	#include <linux/list.h>
	8	#include <linux/errno.h>
	9	#include <linux/err.h>
	10	#include <linux/string.h>
	11	#include <linux/clk.h>
	12	#include <linux/spinlock.h>
d0a9d75b	13	#include <linux/mutex.h>
97d654f8	14
a09e64fb	15	#include <mach/hardware.h>
97d654f8	16
d0a9d75b	17	/*
5e1dbdb4	18	* Very simple clock implementation - we only have one clock to deal with.
d0a9d75b	19	*/
97d654f8	20	struct clk {
97d654f8	21	unsigned int enabled;
97d654f8 RK	22	};
97d654f8 RK	23
5e1dbdb4 RK	24	static void clk_gpio27_enable(void)
	25	{
	26	/*
	27	* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
	28	* (SA-1110 Developer's Manual, section 9.1.2.1)
	29	*/
	30	GAFR \|= GPIO_32_768kHz;
	31	GPDR \|= GPIO_32_768kHz;
	32	TUCR = TUCR_3_6864MHz;
	33	}
	34
	35	static void clk_gpio27_disable(void)
	36	{
	37	TUCR = 0;
	38	GPDR &= ~GPIO_32_768kHz;
	39	GAFR &= ~GPIO_32_768kHz;
	40	}
	41
	42	static struct clk clk_gpio27;
	43
97d654f8 RK	44	static DEFINE_SPINLOCK(clocks_lock);
	45
	46	struct clk clk_get(struct device dev, const char *id)
	47	{
5e1dbdb4	48	const char *devname = dev_name(dev);
97d654f8	49
5e1dbdb4	50	return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
97d654f8 RK	51	}
	52	EXPORT_SYMBOL(clk_get);
	53
	54	void clk_put(struct clk *clk)
	55	{
97d654f8 RK	56	}
	57	EXPORT_SYMBOL(clk_put);
	58
	59	int clk_enable(struct clk *clk)
	60	{
	61	unsigned long flags;
	62
	63	spin_lock_irqsave(&clocks_lock, flags);
	64	if (clk->enabled++ == 0)
5e1dbdb4	65	clk_gpio27_enable();
97d654f8 RK	66	spin_unlock_irqrestore(&clocks_lock, flags);
	67	return 0;
	68	}
	69	EXPORT_SYMBOL(clk_enable);
	70
	71	void clk_disable(struct clk *clk)
	72	{
	73	unsigned long flags;
	74
	75	WARN_ON(clk->enabled == 0);
	76
	77	spin_lock_irqsave(&clocks_lock, flags);
	78	if (--clk->enabled == 0)
5e1dbdb4	79	clk_gpio27_disable();
97d654f8 RK	80	spin_unlock_irqrestore(&clocks_lock, flags);
	81	}
	82	EXPORT_SYMBOL(clk_disable);
	83
	84	unsigned long clk_get_rate(struct clk *clk)
	85	{
5e1dbdb4	86	return 3686400;
97d654f8 RK	87	}
97d654f8 RK	88	EXPORT_SYMBOL(clk_get_rate);