[linux.git] / drivers / char / mmtimer.c

/*
 * Timer device implementation for SGI SN platforms.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (c) 2001-2006 Silicon Graphics, Inc.  All rights reserved.
 *
 * This driver exports an API that should be supportable by any HPET or IA-PC
 * multimedia timer.  The code below is currently specific to the SGI Altix
 * SHub RTC, however.
 *
 * 11/01/01 - jbarnes - initial revision
 * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion
 * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE
 * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt
 *		support via the posix timer interface
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/ioctl.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/devfs_fs_kernel.h>
#include <linux/mmtimer.h>
#include <linux/miscdevice.h>
#include <linux/posix-timers.h>
#include <linux/interrupt.h>

#include <asm/uaccess.h>
#include <asm/sn/addrs.h>
#include <asm/sn/intr.h>
#include <asm/sn/shub_mmr.h>
#include <asm/sn/nodepda.h>
#include <asm/sn/shubio.h>

MODULE_AUTHOR("Jesse Barnes <[email protected]>");
MODULE_DESCRIPTION("SGI Altix RTC Timer");
MODULE_LICENSE("GPL");

/* name of the device, usually in /dev */
#define MMTIMER_NAME "mmtimer"
#define MMTIMER_DESC "SGI Altix RTC Timer"
#define MMTIMER_VERSION "2.1"

#define RTC_BITS 55 /* 55 bits for this implementation */

extern unsigned long sn_rtc_cycles_per_second;

#define RTC_COUNTER_ADDR        ((long *)LOCAL_MMR_ADDR(SH_RTC))

#define rtc_time()              (*RTC_COUNTER_ADDR)

static int mmtimer_ioctl(struct inode *inode, struct file *file,
			 unsigned int cmd, unsigned long arg);
static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma);

/*
 * Period in femtoseconds (10^-15 s)
 */
static unsigned long mmtimer_femtoperiod = 0;

static struct file_operations mmtimer_fops = {
	.owner =	THIS_MODULE,
	.mmap =		mmtimer_mmap,
	.ioctl =	mmtimer_ioctl,
};

/*
 * We only have comparison registers RTC1-4 currently available per
 * node.  RTC0 is used by SAL.
 */
#define NUM_COMPARATORS 3
/* Check for an RTC interrupt pending */
static int inline mmtimer_int_pending(int comparator)
{
	if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) &
			SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator)
		return 1;
	else
		return 0;
}
/* Clear the RTC interrupt pending bit */
static void inline mmtimer_clr_int_pending(int comparator)
{
	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
		SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator);
}

/* Setup timer on comparator RTC1 */
static void inline mmtimer_setup_int_0(u64 expires)
{
	u64 val;

	/* Disable interrupt */
	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL);

	/* Initialize comparator value */
	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L);

	/* Clear pending bit */
	mmtimer_clr_int_pending(0);

	val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) |
		((u64)cpu_physical_id(smp_processor_id()) <<
			SH_RTC1_INT_CONFIG_PID_SHFT);

	/* Set configuration */
	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val);

	/* Enable RTC interrupts */
	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL);

	/* Initialize comparator value */
	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires);


}

/* Setup timer on comparator RTC2 */
static void inline mmtimer_setup_int_1(u64 expires)
{
	u64 val;

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL);

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L);

	mmtimer_clr_int_pending(1);

	val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) |
		((u64)cpu_physical_id(smp_processor_id()) <<
			SH_RTC2_INT_CONFIG_PID_SHFT);

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val);

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL);

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires);
}

/* Setup timer on comparator RTC3 */
static void inline mmtimer_setup_int_2(u64 expires)
{
	u64 val;

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL);

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L);

	mmtimer_clr_int_pending(2);

	val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) |
		((u64)cpu_physical_id(smp_processor_id()) <<
			SH_RTC3_INT_CONFIG_PID_SHFT);

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val);

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL);

	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires);
}

/*
 * This function must be called with interrupts disabled and preemption off
 * in order to insure that the setup succeeds in a deterministic time frame.
 * It will check if the interrupt setup succeeded.
 */
static int inline mmtimer_setup(int comparator, unsigned long expires)
{

	switch (comparator) {
	case 0:
		mmtimer_setup_int_0(expires);
		break;
	case 1:
		mmtimer_setup_int_1(expires);
		break;
	case 2:
		mmtimer_setup_int_2(expires);
		break;
	}
	/* We might've missed our expiration time */
	if (rtc_time() < expires)
		return 1;

	/*
	 * If an interrupt is already pending then its okay
	 * if not then we failed
	 */
	return mmtimer_int_pending(comparator);
}

static int inline mmtimer_disable_int(long nasid, int comparator)
{
	switch (comparator) {
	case 0:
		nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE),
			0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL);
		break;
	case 1:
		nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE),
			0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL);
		break;
	case 2:
		nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE),
			0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL);
		break;
	default:
		return -EFAULT;
	}
	return 0;
}

#define TIMER_OFF 0xbadcabLL

/* There is one of these for each comparator */
typedef struct mmtimer {
	spinlock_t lock ____cacheline_aligned;
	struct k_itimer *timer;
	int i;
	int cpu;
	struct tasklet_struct tasklet;
} mmtimer_t;

static mmtimer_t ** timers;

/**
 * mmtimer_ioctl - ioctl interface for /dev/mmtimer
 * @inode: inode of the device
 * @file: file structure for the device
 * @cmd: command to execute
 * @arg: optional argument to command
 *
 * Executes the command specified by @cmd.  Returns 0 for success, < 0 for
 * failure.
 *
 * Valid commands:
 *
 * %MMTIMER_GETOFFSET - Should return the offset (relative to the start
 * of the page where the registers are mapped) for the counter in question.
 *
 * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15)
 * seconds
 *
 * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address
 * specified by @arg
 *
 * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter
 *
 * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace
 *
 * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it
 * in the address specified by @arg.
 */
static int mmtimer_ioctl(struct inode *inode, struct file *file,
			 unsigned int cmd, unsigned long arg)
{
	int ret = 0;

	switch (cmd) {
	case MMTIMER_GETOFFSET:	/* offset of the counter */
		/*
		 * SN RTC registers are on their own 64k page
		 */
		if(PAGE_SIZE <= (1 << 16))
			ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8;
		else
			ret = -ENOSYS;
		break;

	case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
		if(copy_to_user((unsigned long __user *)arg,
				&mmtimer_femtoperiod, sizeof(unsigned long)))
			return -EFAULT;
		break;

	case MMTIMER_GETFREQ: /* frequency in Hz */
		if(copy_to_user((unsigned long __user *)arg,
				&sn_rtc_cycles_per_second,
				sizeof(unsigned long)))
			return -EFAULT;
		ret = 0;
		break;

	case MMTIMER_GETBITS: /* number of bits in the clock */
		ret = RTC_BITS;
		break;

	case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */
		ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;
		break;

	case MMTIMER_GETCOUNTER:
		if(copy_to_user((unsigned long __user *)arg,
				RTC_COUNTER_ADDR, sizeof(unsigned long)))
			return -EFAULT;
		break;
	default:
		ret = -ENOSYS;
		break;
	}

	return ret;
}

/**
 * mmtimer_mmap - maps the clock's registers into userspace
 * @file: file structure for the device
 * @vma: VMA to map the registers into
 *
 * Calls remap_pfn_range() to map the clock's registers into
 * the calling process' address space.
 */
static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma)
{
	unsigned long mmtimer_addr;

	if (vma->vm_end - vma->vm_start != PAGE_SIZE)
		return -EINVAL;

	if (vma->vm_flags & VM_WRITE)
		return -EPERM;

	if (PAGE_SIZE > (1 << 16))
		return -ENOSYS;

	vma->vm_flags |= (VM_IO | VM_SHM | VM_LOCKED );
	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);

	mmtimer_addr = __pa(RTC_COUNTER_ADDR);
	mmtimer_addr &= ~(PAGE_SIZE - 1);
	mmtimer_addr &= 0xfffffffffffffffUL;

	if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT,
					PAGE_SIZE, vma->vm_page_prot)) {
		printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n");
		return -EAGAIN;
	}

	return 0;
}

static struct miscdevice mmtimer_miscdev = {
	SGI_MMTIMER,
	MMTIMER_NAME,
	&mmtimer_fops
};

static struct timespec sgi_clock_offset;
static int sgi_clock_period;

/*
 * Posix Timer Interface
 */

static struct timespec sgi_clock_offset;
static int sgi_clock_period;

static int sgi_clock_get(clockid_t clockid, struct timespec *tp)
{
	u64 nsec;

	nsec = rtc_time() * sgi_clock_period
			+ sgi_clock_offset.tv_nsec;
	tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec)
			+ sgi_clock_offset.tv_sec;
	return 0;
};

static int sgi_clock_set(clockid_t clockid, struct timespec *tp)
{

	u64 nsec;
	u64 rem;

	nsec = rtc_time() * sgi_clock_period;

	sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem);

	if (rem <= tp->tv_nsec)
		sgi_clock_offset.tv_nsec = tp->tv_sec - rem;
	else {
		sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem;
		sgi_clock_offset.tv_sec--;
	}
	return 0;
}

/*
 * Schedule the next periodic interrupt. This function will attempt
 * to schedule a periodic interrupt later if necessary. If the scheduling
 * of an interrupt fails then the time to skip is lengthened
 * exponentially in order to ensure that the next interrupt
 * can be properly scheduled..
 */
static int inline reschedule_periodic_timer(mmtimer_t *x)
{
	int n;
	struct k_itimer *t = x->timer;

	t->it.mmtimer.clock = x->i;
	t->it_overrun--;

	n = 0;
	do {

		t->it.mmtimer.expires += t->it.mmtimer.incr << n;
		t->it_overrun += 1 << n;
		n++;
		if (n > 20)
			return 1;

	} while (!mmtimer_setup(x->i, t->it.mmtimer.expires));

	return 0;
}

/**
 * mmtimer_interrupt - timer interrupt handler
 * @irq: irq received
 * @dev_id: device the irq came from
 * @regs: register state upon receipt of the interrupt
 *
 * Called when one of the comarators matches the counter, This
 * routine will send signals to processes that have requested
 * them.
 *
 * This interrupt is run in an interrupt context
 * by the SHUB. It is therefore safe to locally access SHub
 * registers.
 */
static irqreturn_t
mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
	int i;
	unsigned long expires = 0;
	int result = IRQ_NONE;
	unsigned indx = cpu_to_node(smp_processor_id());

	/*
	 * Do this once for each comparison register
	 */
	for (i = 0; i < NUM_COMPARATORS; i++) {
		mmtimer_t *base = timers[indx] + i;
		/* Make sure this doesn't get reused before tasklet_sched */
		spin_lock(&base->lock);
		if (base->cpu == smp_processor_id()) {
			if (base->timer)
				expires = base->timer->it.mmtimer.expires;
			/* expires test won't work with shared irqs */
			if ((mmtimer_int_pending(i) > 0) ||
				(expires && (expires < rtc_time()))) {
				mmtimer_clr_int_pending(i);
				tasklet_schedule(&base->tasklet);
				result = IRQ_HANDLED;
			}
		}
		spin_unlock(&base->lock);
		expires = 0;
	}
	return result;
}

void mmtimer_tasklet(unsigned long data) {
	mmtimer_t *x = (mmtimer_t *)data;
	struct k_itimer *t = x->timer;
	unsigned long flags;

	if (t == NULL)
		return;

	/* Send signal and deal with periodic signals */
	spin_lock_irqsave(&t->it_lock, flags);
	spin_lock(&x->lock);
	/* If timer was deleted between interrupt and here, leave */
	if (t != x->timer)
		goto out;
	t->it_overrun = 0;

	if (posix_timer_event(t, 0) != 0) {

		// printk(KERN_WARNING "mmtimer: cannot deliver signal.\n");

		t->it_overrun++;
	}
	if(t->it.mmtimer.incr) {
		/* Periodic timer */
		if (reschedule_periodic_timer(x)) {
			printk(KERN_WARNING "mmtimer: unable to reschedule\n");
			x->timer = NULL;
		}
	} else {
		/* Ensure we don't false trigger in mmtimer_interrupt */
		t->it.mmtimer.expires = 0;
	}
	t->it_overrun_last = t->it_overrun;
out:
	spin_unlock(&x->lock);
	spin_unlock_irqrestore(&t->it_lock, flags);
}

static int sgi_timer_create(struct k_itimer *timer)
{
	/* Insure that a newly created timer is off */
	timer->it.mmtimer.clock = TIMER_OFF;
	return 0;
}

/* This does not really delete a timer. It just insures
 * that the timer is not active
 *
 * Assumption: it_lock is already held with irq's disabled
 */
static int sgi_timer_del(struct k_itimer *timr)
{
	int i = timr->it.mmtimer.clock;
	cnodeid_t nodeid = timr->it.mmtimer.node;
	mmtimer_t *t = timers[nodeid] + i;
	unsigned long irqflags;

	if (i != TIMER_OFF) {
		spin_lock_irqsave(&t->lock, irqflags);
		mmtimer_disable_int(cnodeid_to_nasid(nodeid),i);
		t->timer = NULL;
		timr->it.mmtimer.clock = TIMER_OFF;
		timr->it.mmtimer.expires = 0;
		spin_unlock_irqrestore(&t->lock, irqflags);
	}
	return 0;
}

#define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC)
#define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec)

/* Assumption: it_lock is already held with irq's disabled */
static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting)
{

	if (timr->it.mmtimer.clock == TIMER_OFF) {
		cur_setting->it_interval.tv_nsec = 0;
		cur_setting->it_interval.tv_sec = 0;
		cur_setting->it_value.tv_nsec = 0;
		cur_setting->it_value.tv_sec =0;
		return;
	}

	ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period);
	ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period);
	return;
}


static int sgi_timer_set(struct k_itimer *timr, int flags,
	struct itimerspec * new_setting,
	struct itimerspec * old_setting)
{

	int i;
	unsigned long when, period, irqflags;
	int err = 0;
	cnodeid_t nodeid;
	mmtimer_t *base;

	if (old_setting)
		sgi_timer_get(timr, old_setting);

	sgi_timer_del(timr);
	when = timespec_to_ns(new_setting->it_value);
	period = timespec_to_ns(new_setting->it_interval);

	if (when == 0)
		/* Clear timer */
		return 0;

	if (flags & TIMER_ABSTIME) {
		struct timespec n;
		unsigned long now;

		getnstimeofday(&n);
		now = timespec_to_ns(n);
		if (when > now)
			when -= now;
		else
			/* Fire the timer immediately */
			when = 0;
	}

	/*
	 * Convert to sgi clock period. Need to keep rtc_time() as near as possible
	 * to getnstimeofday() in order to be as faithful as possible to the time
	 * specified.
	 */
	when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time();
	period = (period + sgi_clock_period - 1)  / sgi_clock_period;

	/*
	 * We are allocating a local SHub comparator. If we would be moved to another
	 * cpu then another SHub may be local to us. Prohibit that by switching off
	 * preemption.
	 */
	preempt_disable();

	nodeid =  cpu_to_node(smp_processor_id());
retry:
	/* Don't use an allocated timer, or a deleted one that's pending */
	for(i = 0; i< NUM_COMPARATORS; i++) {
		base = timers[nodeid] + i;
		if (!base->timer && !base->tasklet.state) {
			break;
		}
	}

	if (i == NUM_COMPARATORS) {
		preempt_enable();
		return -EBUSY;
	}

	spin_lock_irqsave(&base->lock, irqflags);

	if (base->timer || base->tasklet.state != 0) {
		spin_unlock_irqrestore(&base->lock, irqflags);
		goto retry;
	}
	base->timer = timr;
	base->cpu = smp_processor_id();

	timr->it.mmtimer.clock = i;
	timr->it.mmtimer.node = nodeid;
	timr->it.mmtimer.incr = period;
	timr->it.mmtimer.expires = when;

	if (period == 0) {
		if (!mmtimer_setup(i, when)) {
			mmtimer_disable_int(-1, i);
			posix_timer_event(timr, 0);
			timr->it.mmtimer.expires = 0;
		}
	} else {
		timr->it.mmtimer.expires -= period;
		if (reschedule_periodic_timer(base))
			err = -EINVAL;
	}

	spin_unlock_irqrestore(&base->lock, irqflags);

	preempt_enable();

	return err;
}

static struct k_clock sgi_clock = {
	.res = 0,
	.clock_set = sgi_clock_set,
	.clock_get = sgi_clock_get,
	.timer_create = sgi_timer_create,
	.nsleep = do_posix_clock_nonanosleep,
	.timer_set = sgi_timer_set,
	.timer_del = sgi_timer_del,
	.timer_get = sgi_timer_get
};

/**
 * mmtimer_init - device initialization routine
 *
 * Does initial setup for the mmtimer device.
 */
static int __init mmtimer_init(void)
{
	unsigned i;
	cnodeid_t node, maxn = -1;

	if (!ia64_platform_is("sn2"))
		return 0;

	/*
	 * Sanity check the cycles/sec variable
	 */
	if (sn_rtc_cycles_per_second < 100000) {
		printk(KERN_ERR "%s: unable to determine clock frequency\n",
		       MMTIMER_NAME);
		return -1;
	}

	mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second /
			       2) / sn_rtc_cycles_per_second;

	if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, SA_PERCPU_IRQ, MMTIMER_NAME, NULL)) {
		printk(KERN_WARNING "%s: unable to allocate interrupt.",
			MMTIMER_NAME);
		return -1;
	}

	strcpy(mmtimer_miscdev.devfs_name, MMTIMER_NAME);
	if (misc_register(&mmtimer_miscdev)) {
		printk(KERN_ERR "%s: failed to register device\n",
		       MMTIMER_NAME);
		return -1;
	}

	/* Get max numbered node, calculate slots needed */
	for_each_online_node(node) {
		maxn = node;
	}
	maxn++;

	/* Allocate list of node ptrs to mmtimer_t's */
	timers = kmalloc(sizeof(mmtimer_t *)*maxn, GFP_KERNEL);
	if (timers == NULL) {
		printk(KERN_ERR "%s: failed to allocate memory for device\n",
				MMTIMER_NAME);
		return -1;
	}

	/* Allocate mmtimer_t's for each online node */
	for_each_online_node(node) {
		timers[node] = kmalloc_node(sizeof(mmtimer_t)*NUM_COMPARATORS, GFP_KERNEL, node);
		if (timers[node] == NULL) {
			printk(KERN_ERR "%s: failed to allocate memory for device\n",
				MMTIMER_NAME);
			return -1;
		}
		for (i=0; i< NUM_COMPARATORS; i++) {
			mmtimer_t * base = timers[node] + i;

			spin_lock_init(&base->lock);
			base->timer = NULL;
			base->cpu = 0;
			base->i = i;
			tasklet_init(&base->tasklet, mmtimer_tasklet,
				(unsigned long) (base));
		}
	}

	sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second;
	register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock);

	printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION,
	       sn_rtc_cycles_per_second/(unsigned long)1E6);

	return 0;
}

module_init(mmtimer_init);
Commit	Line	Data
1da177e4	1	/*
76832c28	2	* Timer device implementation for SGI SN platforms.
1da177e4 LT	3	*
	4	* This file is subject to the terms and conditions of the GNU General Public
	5	* License. See the file "COPYING" in the main directory of this archive
	6	* for more details.
	7	*
76832c28	8	* Copyright (c) 2001-2006 Silicon Graphics, Inc. All rights reserved.
1da177e4 LT	9	*
	10	* This driver exports an API that should be supportable by any HPET or IA-PC
	11	* multimedia timer. The code below is currently specific to the SGI Altix
	12	* SHub RTC, however.
	13	*
	14	* 11/01/01 - jbarnes - initial revision
	15	* 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion
	16	* 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE
	17	* 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt
	18	* support via the posix timer interface
	19	*/
	20
	21	#include <linux/types.h>
	22	#include <linux/kernel.h>
	23	#include <linux/ioctl.h>
	24	#include <linux/module.h>
	25	#include <linux/init.h>
	26	#include <linux/errno.h>
	27	#include <linux/mm.h>
	28	#include <linux/devfs_fs_kernel.h>
	29	#include <linux/mmtimer.h>
	30	#include <linux/miscdevice.h>
	31	#include <linux/posix-timers.h>
	32	#include <linux/interrupt.h>
	33
	34	#include <asm/uaccess.h>
	35	#include <asm/sn/addrs.h>
	36	#include <asm/sn/intr.h>
	37	#include <asm/sn/shub_mmr.h>
	38	#include <asm/sn/nodepda.h>
	39	#include <asm/sn/shubio.h>
	40
	41	MODULE_AUTHOR("Jesse Barnes <[email protected]>");
	42	MODULE_DESCRIPTION("SGI Altix RTC Timer");
	43	MODULE_LICENSE("GPL");
	44
	45	/* name of the device, usually in /dev */
	46	#define MMTIMER_NAME "mmtimer"
	47	#define MMTIMER_DESC "SGI Altix RTC Timer"
76832c28	48	#define MMTIMER_VERSION "2.1"
1da177e4 LT	49
	50	#define RTC_BITS 55 /* 55 bits for this implementation */
	51
	52	extern unsigned long sn_rtc_cycles_per_second;
	53
	54	#define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC))
	55
	56	#define rtc_time() (*RTC_COUNTER_ADDR)
	57
	58	static int mmtimer_ioctl(struct inode inode, struct file file,
	59	unsigned int cmd, unsigned long arg);
	60	static int mmtimer_mmap(struct file file, struct vm_area_struct vma);
	61
	62	/*
	63	* Period in femtoseconds (10^-15 s)
	64	*/
	65	static unsigned long mmtimer_femtoperiod = 0;
	66
	67	static struct file_operations mmtimer_fops = {
	68	.owner = THIS_MODULE,
	69	.mmap = mmtimer_mmap,
	70	.ioctl = mmtimer_ioctl,
	71	};
	72
	73	/*
	74	* We only have comparison registers RTC1-4 currently available per
	75	* node. RTC0 is used by SAL.
	76	*/
	77	#define NUM_COMPARATORS 3
	78	/* Check for an RTC interrupt pending */
	79	static int inline mmtimer_int_pending(int comparator)
	80	{
	81	if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) &
	82	SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator)
	83	return 1;
	84	else
	85	return 0;
	86	}
	87	/* Clear the RTC interrupt pending bit */
	88	static void inline mmtimer_clr_int_pending(int comparator)
	89	{
	90	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
	91	SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator);
	92	}
	93
	94	/* Setup timer on comparator RTC1 */
	95	static void inline mmtimer_setup_int_0(u64 expires)
	96	{
	97	u64 val;
	98
	99	/* Disable interrupt */
	100	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL);
	101
	102	/* Initialize comparator value */
	103	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L);
	104
	105	/* Clear pending bit */
	106	mmtimer_clr_int_pending(0);
	107
	108	val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) \|
	109	((u64)cpu_physical_id(smp_processor_id()) <<
	110	SH_RTC1_INT_CONFIG_PID_SHFT);
	111
	112	/* Set configuration */
113	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val);
114
115	/* Enable RTC interrupts */
116	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL);
117
118	/* Initialize comparator value */
119	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires);
120
121
122	}
123
124	/* Setup timer on comparator RTC2 */
125	static void inline mmtimer_setup_int_1(u64 expires)
126	{
127	u64 val;
128
129	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL);
130
131	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L);
132
133	mmtimer_clr_int_pending(1);
134
135	val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) \|
136	((u64)cpu_physical_id(smp_processor_id()) <<
137	SH_RTC2_INT_CONFIG_PID_SHFT);
138
139	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val);
140
141	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL);
142
143	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires);
144	}
145
146	/* Setup timer on comparator RTC3 */
147	static void inline mmtimer_setup_int_2(u64 expires)
148	{
149	u64 val;
150
151	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL);
152
153	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L);
154
155	mmtimer_clr_int_pending(2);
156
157	val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) \|
158	((u64)cpu_physical_id(smp_processor_id()) <<
159	SH_RTC3_INT_CONFIG_PID_SHFT);
160
161	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val);
162
163	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL);
164
165	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires);
166	}
167
168	/*
169	* This function must be called with interrupts disabled and preemption off
170	* in order to insure that the setup succeeds in a deterministic time frame.
171	* It will check if the interrupt setup succeeded.
172	*/
173	static int inline mmtimer_setup(int comparator, unsigned long expires)
174	{
175
176	switch (comparator) {
177	case 0:
178	mmtimer_setup_int_0(expires);
179	break;
180	case 1:
181	mmtimer_setup_int_1(expires);
182	break;
183	case 2:
184	mmtimer_setup_int_2(expires);
185	break;
186	}
187	/* We might've missed our expiration time */
188	if (rtc_time() < expires)
189	return 1;
190
191	/*
192	* If an interrupt is already pending then its okay
193	* if not then we failed
194	*/
195	return mmtimer_int_pending(comparator);
196	}
197
198	static int inline mmtimer_disable_int(long nasid, int comparator)
199	{
200	switch (comparator) {
201	case 0:
202	nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE),
203	0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL);
204	break;
205	case 1:
206	nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE),
207	0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL);
208	break;
209	case 2:
210	nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE),
211	0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL);
212	break;
213	default:
214	return -EFAULT;
215	}
216	return 0;
217	}
218
219	#define TIMER_OFF 0xbadcabLL
220
221	/* There is one of these for each comparator */
222	typedef struct mmtimer {
223	spinlock_t lock ____cacheline_aligned;
224	struct k_itimer *timer;
225	int i;
226	int cpu;
227	struct tasklet_struct tasklet;
228	} mmtimer_t;
229
76832c28	230	static mmtimer_t ** timers;
1da177e4 LT	231
	232	/**
	233	* mmtimer_ioctl - ioctl interface for /dev/mmtimer
	234	* @inode: inode of the device
	235	* @file: file structure for the device
	236	* @cmd: command to execute
	237	* @arg: optional argument to command
	238	*
	239	* Executes the command specified by @cmd. Returns 0 for success, < 0 for
	240	* failure.
	241	*
	242	* Valid commands:
	243	*
	244	* %MMTIMER_GETOFFSET - Should return the offset (relative to the start
	245	* of the page where the registers are mapped) for the counter in question.
	246	*
	247	* %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15)
	248	* seconds
	249	*
	250	* %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address
	251	* specified by @arg
	252	*
	253	* %MMTIMER_GETBITS - Returns the number of bits in the clock's counter
	254	*
	255	* %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace
	256	*
	257	* %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it
	258	* in the address specified by @arg.
	259	*/
	260	static int mmtimer_ioctl(struct inode inode, struct file file,
	261	unsigned int cmd, unsigned long arg)
	262	{
	263	int ret = 0;
	264
	265	switch (cmd) {
	266	case MMTIMER_GETOFFSET: /* offset of the counter */
	267	/*
	268	* SN RTC registers are on their own 64k page
	269	*/
	270	if(PAGE_SIZE <= (1 << 16))
	271	ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8;
	272	else
	273	ret = -ENOSYS;
	274	break;
	275
	276	case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
	277	if(copy_to_user((unsigned long __user *)arg,
	278	&mmtimer_femtoperiod, sizeof(unsigned long)))
	279	return -EFAULT;
	280	break;
	281
	282	case MMTIMER_GETFREQ: /* frequency in Hz */
	283	if(copy_to_user((unsigned long __user *)arg,
	284	&sn_rtc_cycles_per_second,
	285	sizeof(unsigned long)))
	286	return -EFAULT;
	287	ret = 0;
	288	break;
	289
	290	case MMTIMER_GETBITS: /* number of bits in the clock */
	291	ret = RTC_BITS;
	292	break;
	293
	294	case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */
295	ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;
296	break;
297
298	case MMTIMER_GETCOUNTER:
299	if(copy_to_user((unsigned long __user *)arg,
300	RTC_COUNTER_ADDR, sizeof(unsigned long)))
301	return -EFAULT;
302	break;
303	default:
304	ret = -ENOSYS;
305	break;
306	}
307
308	return ret;
309	}
310
311	/**
312	* mmtimer_mmap - maps the clock's registers into userspace
313	* @file: file structure for the device
314	* @vma: VMA to map the registers into
315	*
316	* Calls remap_pfn_range() to map the clock's registers into
317	* the calling process' address space.
318	*/
319	static int mmtimer_mmap(struct file file, struct vm_area_struct vma)
320	{
321	unsigned long mmtimer_addr;
322
323	if (vma->vm_end - vma->vm_start != PAGE_SIZE)
324	return -EINVAL;
325
326	if (vma->vm_flags & VM_WRITE)
327	return -EPERM;
328
329	if (PAGE_SIZE > (1 << 16))
330	return -ENOSYS;
331
332	vma->vm_flags \|= (VM_IO \| VM_SHM \| VM_LOCKED );
333	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
334
335	mmtimer_addr = __pa(RTC_COUNTER_ADDR);
336	mmtimer_addr &= ~(PAGE_SIZE - 1);
337	mmtimer_addr &= 0xfffffffffffffffUL;
338
339	if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT,
340	PAGE_SIZE, vma->vm_page_prot)) {
341	printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n");
342	return -EAGAIN;
343	}
344
345	return 0;
346	}
347
348	static struct miscdevice mmtimer_miscdev = {
349	SGI_MMTIMER,
350	MMTIMER_NAME,
351	&mmtimer_fops
352	};
353
354	static struct timespec sgi_clock_offset;
355	static int sgi_clock_period;
356
357	/*
358	* Posix Timer Interface
359	*/
360
361	static struct timespec sgi_clock_offset;
362	static int sgi_clock_period;
363
364	static int sgi_clock_get(clockid_t clockid, struct timespec *tp)
365	{
366	u64 nsec;
367
368	nsec = rtc_time() * sgi_clock_period
369	+ sgi_clock_offset.tv_nsec;
370	tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec)
371	+ sgi_clock_offset.tv_sec;
372	return 0;
373	};
374
375	static int sgi_clock_set(clockid_t clockid, struct timespec *tp)
376	{
377
378	u64 nsec;
379	u64 rem;
380
381	nsec = rtc_time() * sgi_clock_period;
382
383	sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem);
384
385	if (rem <= tp->tv_nsec)
386	sgi_clock_offset.tv_nsec = tp->tv_sec - rem;
387	else {
388	sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem;
389	sgi_clock_offset.tv_sec--;
390	}
391	return 0;
392	}
393
394	/*
395	* Schedule the next periodic interrupt. This function will attempt
396	* to schedule a periodic interrupt later if necessary. If the scheduling
397	* of an interrupt fails then the time to skip is lengthened
398	* exponentially in order to ensure that the next interrupt
399	* can be properly scheduled..
400	*/
401	static int inline reschedule_periodic_timer(mmtimer_t *x)
402	{
403	int n;
404	struct k_itimer *t = x->timer;
405
406	t->it.mmtimer.clock = x->i;
407	t->it_overrun--;
408
409	n = 0;
410	do {
411
412	t->it.mmtimer.expires += t->it.mmtimer.incr << n;
413	t->it_overrun += 1 << n;
414	n++;
415	if (n > 20)
416	return 1;
417
418	} while (!mmtimer_setup(x->i, t->it.mmtimer.expires));
419
420	return 0;
421	}
422
423	/**
424	* mmtimer_interrupt - timer interrupt handler
425	* @irq: irq received
426	* @dev_id: device the irq came from
427	* @regs: register state upon receipt of the interrupt
428	*
429	* Called when one of the comarators matches the counter, This
430	* routine will send signals to processes that have requested
431	* them.
432	*
433	* This interrupt is run in an interrupt context
434	* by the SHUB. It is therefore safe to locally access SHub
435	* registers.
436	*/
437	static irqreturn_t
438	mmtimer_interrupt(int irq, void dev_id, struct pt_regs regs)
439	{
440	int i;
1da177e4 LT	441	unsigned long expires = 0;
1da177e4 LT	442	int result = IRQ_NONE;
76832c28	443	unsigned indx = cpu_to_node(smp_processor_id());
1da177e4 LT	444
	445	/*
	446	* Do this once for each comparison register
	447	*/
	448	for (i = 0; i < NUM_COMPARATORS; i++) {
76832c28	449	mmtimer_t *base = timers[indx] + i;
1da177e4	450	/* Make sure this doesn't get reused before tasklet_sched */
76832c28 DS	451	spin_lock(&base->lock);
	452	if (base->cpu == smp_processor_id()) {
	453	if (base->timer)
	454	expires = base->timer->it.mmtimer.expires;
1da177e4 LT	455	/* expires test won't work with shared irqs */
	456	if ((mmtimer_int_pending(i) > 0) \|\|
	457	(expires && (expires < rtc_time()))) {
	458	mmtimer_clr_int_pending(i);
76832c28	459	tasklet_schedule(&base->tasklet);
1da177e4 LT	460	result = IRQ_HANDLED;
	461	}
	462	}
76832c28	463	spin_unlock(&base->lock);
1da177e4 LT	464	expires = 0;
	465	}
	466	return result;
	467	}
	468
	469	void mmtimer_tasklet(unsigned long data) {
	470	mmtimer_t x = (mmtimer_t )data;
	471	struct k_itimer *t = x->timer;
	472	unsigned long flags;
	473
	474	if (t == NULL)
	475	return;
	476
	477	/* Send signal and deal with periodic signals */
	478	spin_lock_irqsave(&t->it_lock, flags);
	479	spin_lock(&x->lock);
	480	/* If timer was deleted between interrupt and here, leave */
	481	if (t != x->timer)
	482	goto out;
	483	t->it_overrun = 0;
	484
8d38eadb	485	if (posix_timer_event(t, 0) != 0) {
1da177e4 LT	486
	487	// printk(KERN_WARNING "mmtimer: cannot deliver signal.\n");
	488
	489	t->it_overrun++;
	490	}
	491	if(t->it.mmtimer.incr) {
	492	/* Periodic timer */
	493	if (reschedule_periodic_timer(x)) {
	494	printk(KERN_WARNING "mmtimer: unable to reschedule\n");
	495	x->timer = NULL;
	496	}
	497	} else {
	498	/* Ensure we don't false trigger in mmtimer_interrupt */
	499	t->it.mmtimer.expires = 0;
	500	}
	501	t->it_overrun_last = t->it_overrun;
	502	out:
	503	spin_unlock(&x->lock);
	504	spin_unlock_irqrestore(&t->it_lock, flags);
	505	}
	506
	507	static int sgi_timer_create(struct k_itimer *timer)
	508	{
	509	/* Insure that a newly created timer is off */
	510	timer->it.mmtimer.clock = TIMER_OFF;
	511	return 0;
	512	}
	513
	514	/* This does not really delete a timer. It just insures
	515	* that the timer is not active
	516	*
	517	* Assumption: it_lock is already held with irq's disabled
	518	*/
	519	static int sgi_timer_del(struct k_itimer *timr)
	520	{
	521	int i = timr->it.mmtimer.clock;
	522	cnodeid_t nodeid = timr->it.mmtimer.node;
76832c28	523	mmtimer_t *t = timers[nodeid] + i;
1da177e4 LT	524	unsigned long irqflags;
	525
	526	if (i != TIMER_OFF) {
	527	spin_lock_irqsave(&t->lock, irqflags);
	528	mmtimer_disable_int(cnodeid_to_nasid(nodeid),i);
	529	t->timer = NULL;
	530	timr->it.mmtimer.clock = TIMER_OFF;
	531	timr->it.mmtimer.expires = 0;
	532	spin_unlock_irqrestore(&t->lock, irqflags);
	533	}
	534	return 0;
	535	}
	536
	537	#define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC)
	538	#define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec)
	539
	540	/* Assumption: it_lock is already held with irq's disabled */
	541	static void sgi_timer_get(struct k_itimer timr, struct itimerspec cur_setting)
	542	{
	543
	544	if (timr->it.mmtimer.clock == TIMER_OFF) {
	545	cur_setting->it_interval.tv_nsec = 0;
	546	cur_setting->it_interval.tv_sec = 0;
	547	cur_setting->it_value.tv_nsec = 0;
	548	cur_setting->it_value.tv_sec =0;
	549	return;
	550	}
	551
	552	ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period);
	553	ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period);
	554	return;
	555	}
	556
	557
	558	static int sgi_timer_set(struct k_itimer *timr, int flags,
	559	struct itimerspec * new_setting,
	560	struct itimerspec * old_setting)
	561	{
	562
	563	int i;
	564	unsigned long when, period, irqflags;
	565	int err = 0;
	566	cnodeid_t nodeid;
	567	mmtimer_t *base;
	568
	569	if (old_setting)
	570	sgi_timer_get(timr, old_setting);
	571
	572	sgi_timer_del(timr);
	573	when = timespec_to_ns(new_setting->it_value);
	574	period = timespec_to_ns(new_setting->it_interval);
	575
	576	if (when == 0)
	577	/* Clear timer */
	578	return 0;
	579
	580	if (flags & TIMER_ABSTIME) {
	581	struct timespec n;
	582	unsigned long now;
	583
	584	getnstimeofday(&n);
	585	now = timespec_to_ns(n);
	586	if (when > now)
	587	when -= now;
588	else
589	/* Fire the timer immediately */
590	when = 0;
591	}
592
593	/*
594	* Convert to sgi clock period. Need to keep rtc_time() as near as possible
595	* to getnstimeofday() in order to be as faithful as possible to the time
596	* specified.
597	*/
598	when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time();
599	period = (period + sgi_clock_period - 1) / sgi_clock_period;
600
601	/*
602	* We are allocating a local SHub comparator. If we would be moved to another
603	* cpu then another SHub may be local to us. Prohibit that by switching off
604	* preemption.
605	*/
606	preempt_disable();
607
55642d36	608	nodeid = cpu_to_node(smp_processor_id());
1da177e4 LT	609	retry:
	610	/* Don't use an allocated timer, or a deleted one that's pending */
	611	for(i = 0; i< NUM_COMPARATORS; i++) {
76832c28 DS	612	base = timers[nodeid] + i;
76832c28 DS	613	if (!base->timer && !base->tasklet.state) {
1da177e4 LT	614	break;
	615	}
	616	}
	617
	618	if (i == NUM_COMPARATORS) {
	619	preempt_enable();
	620	return -EBUSY;
	621	}
	622
76832c28	623	spin_lock_irqsave(&base->lock, irqflags);
1da177e4	624
76832c28 DS	625	if (base->timer \|\| base->tasklet.state != 0) {
76832c28 DS	626	spin_unlock_irqrestore(&base->lock, irqflags);
1da177e4 LT	627	goto retry;
1da177e4 LT	628	}
76832c28 DS	629	base->timer = timr;
76832c28 DS	630	base->cpu = smp_processor_id();
1da177e4 LT	631
	632	timr->it.mmtimer.clock = i;
	633	timr->it.mmtimer.node = nodeid;
	634	timr->it.mmtimer.incr = period;
	635	timr->it.mmtimer.expires = when;
	636
	637	if (period == 0) {
	638	if (!mmtimer_setup(i, when)) {
	639	mmtimer_disable_int(-1, i);
	640	posix_timer_event(timr, 0);
	641	timr->it.mmtimer.expires = 0;
	642	}
	643	} else {
	644	timr->it.mmtimer.expires -= period;
76832c28	645	if (reschedule_periodic_timer(base))
1da177e4 LT	646	err = -EINVAL;
	647	}
	648
76832c28	649	spin_unlock_irqrestore(&base->lock, irqflags);
1da177e4 LT	650
	651	preempt_enable();
	652
	653	return err;
	654	}
	655
	656	static struct k_clock sgi_clock = {
	657	.res = 0,
	658	.clock_set = sgi_clock_set,
	659	.clock_get = sgi_clock_get,
	660	.timer_create = sgi_timer_create,
	661	.nsleep = do_posix_clock_nonanosleep,
	662	.timer_set = sgi_timer_set,
	663	.timer_del = sgi_timer_del,
	664	.timer_get = sgi_timer_get
	665	};
	666
	667	/**
	668	* mmtimer_init - device initialization routine
	669	*
	670	* Does initial setup for the mmtimer device.
	671	*/
	672	static int __init mmtimer_init(void)
	673	{
	674	unsigned i;
76832c28	675	cnodeid_t node, maxn = -1;
1da177e4 LT	676
1da177e4 LT	677	if (!ia64_platform_is("sn2"))
f032f908	678	return 0;
1da177e4 LT	679
	680	/*
	681	* Sanity check the cycles/sec variable
	682	*/
	683	if (sn_rtc_cycles_per_second < 100000) {
	684	printk(KERN_ERR "%s: unable to determine clock frequency\n",
	685	MMTIMER_NAME);
	686	return -1;
	687	}
	688
	689	mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second /
	690	2) / sn_rtc_cycles_per_second;
	691
1da177e4 LT	692	if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, SA_PERCPU_IRQ, MMTIMER_NAME, NULL)) {
	693	printk(KERN_WARNING "%s: unable to allocate interrupt.",
	694	MMTIMER_NAME);
	695	return -1;
	696	}
	697
	698	strcpy(mmtimer_miscdev.devfs_name, MMTIMER_NAME);
	699	if (misc_register(&mmtimer_miscdev)) {
	700	printk(KERN_ERR "%s: failed to register device\n",
	701	MMTIMER_NAME);
	702	return -1;
	703	}
	704
76832c28 DS	705	/* Get max numbered node, calculate slots needed */
	706	for_each_online_node(node) {
	707	maxn = node;
	708	}
	709	maxn++;
	710
	711	/* Allocate list of node ptrs to mmtimer_t's */
	712	timers = kmalloc(sizeof(mmtimer_t )maxn, GFP_KERNEL);
	713	if (timers == NULL) {
	714	printk(KERN_ERR "%s: failed to allocate memory for device\n",
	715	MMTIMER_NAME);
	716	return -1;
	717	}
	718
	719	/* Allocate mmtimer_t's for each online node */
	720	for_each_online_node(node) {
	721	timers[node] = kmalloc_node(sizeof(mmtimer_t)*NUM_COMPARATORS, GFP_KERNEL, node);
	722	if (timers[node] == NULL) {
	723	printk(KERN_ERR "%s: failed to allocate memory for device\n",
	724	MMTIMER_NAME);
	725	return -1;
	726	}
	727	for (i=0; i< NUM_COMPARATORS; i++) {
	728	mmtimer_t * base = timers[node] + i;
	729
	730	spin_lock_init(&base->lock);
	731	base->timer = NULL;
	732	base->cpu = 0;
	733	base->i = i;
	734	tasklet_init(&base->tasklet, mmtimer_tasklet,
	735	(unsigned long) (base));
	736	}
	737	}
	738
1da177e4 LT	739	sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second;
	740	register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock);
	741
	742	printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION,
	743	sn_rtc_cycles_per_second/(unsigned long)1E6);
	744
	745	return 0;
	746	}
	747
	748	module_init(mmtimer_init);
	749