]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/process.c | |
3 | * | |
4 | * Copyright (C) 1996-2000 Russell King - Converted to ARM. | |
5 | * Original Copyright (C) 1995 Linus Torvalds | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #include <stdarg.h> | |
12 | ||
ecea4ab6 | 13 | #include <linux/export.h> |
1da177e4 | 14 | #include <linux/sched.h> |
b17b0153 | 15 | #include <linux/sched/debug.h> |
29930025 | 16 | #include <linux/sched/task.h> |
68db0cf1 | 17 | #include <linux/sched/task_stack.h> |
1da177e4 LT |
18 | #include <linux/kernel.h> |
19 | #include <linux/mm.h> | |
20 | #include <linux/stddef.h> | |
21 | #include <linux/unistd.h> | |
1da177e4 | 22 | #include <linux/user.h> |
1da177e4 LT |
23 | #include <linux/interrupt.h> |
24 | #include <linux/kallsyms.h> | |
25 | #include <linux/init.h> | |
84dff1a7 | 26 | #include <linux/elfcore.h> |
74617fb6 | 27 | #include <linux/pm.h> |
9e4559dd | 28 | #include <linux/tick.h> |
154c772e | 29 | #include <linux/utsname.h> |
33fa9b13 | 30 | #include <linux/uaccess.h> |
990cb8ac | 31 | #include <linux/random.h> |
864232fa | 32 | #include <linux/hw_breakpoint.h> |
fa8bbb13 | 33 | #include <linux/leds.h> |
1da177e4 | 34 | |
1da177e4 | 35 | #include <asm/processor.h> |
d6551e88 | 36 | #include <asm/thread_notify.h> |
2d7c11bf | 37 | #include <asm/stacktrace.h> |
779dd959 | 38 | #include <asm/system_misc.h> |
2ea83398 | 39 | #include <asm/mach/time.h> |
a4780ade | 40 | #include <asm/tls.h> |
045ab94e | 41 | #include <asm/vdso.h> |
1da177e4 | 42 | |
c743f380 NP |
43 | #ifdef CONFIG_CC_STACKPROTECTOR |
44 | #include <linux/stackprotector.h> | |
45 | unsigned long __stack_chk_guard __read_mostly; | |
46 | EXPORT_SYMBOL(__stack_chk_guard); | |
47 | #endif | |
48 | ||
e2e55fde | 49 | static const char *processor_modes[] __maybe_unused = { |
ae0a846e RK |
50 | "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" , |
51 | "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26", | |
f3a04202 SB |
52 | "USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "MON_32" , "ABT_32" , |
53 | "UK8_32" , "UK9_32" , "HYP_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32" | |
ae0a846e RK |
54 | }; |
55 | ||
e2e55fde | 56 | static const char *isa_modes[] __maybe_unused = { |
909d6c6c GD |
57 | "ARM" , "Thumb" , "Jazelle", "ThumbEE" |
58 | }; | |
59 | ||
1da177e4 | 60 | /* |
4fa20439 | 61 | * This is our default idle handler. |
1da177e4 | 62 | */ |
4fa20439 NP |
63 | |
64 | void (*arm_pm_idle)(void); | |
65 | ||
ad68cc7a NP |
66 | /* |
67 | * Called from the core idle loop. | |
68 | */ | |
69 | ||
70 | void arch_cpu_idle(void) | |
1da177e4 | 71 | { |
4fa20439 NP |
72 | if (arm_pm_idle) |
73 | arm_pm_idle(); | |
74 | else | |
ae940913 | 75 | cpu_do_idle(); |
9ccdac36 | 76 | local_irq_enable(); |
1da177e4 LT |
77 | } |
78 | ||
f7b861b7 | 79 | void arch_cpu_idle_prepare(void) |
1da177e4 LT |
80 | { |
81 | local_fiq_enable(); | |
f7b861b7 | 82 | } |
1da177e4 | 83 | |
f7b861b7 TG |
84 | void arch_cpu_idle_enter(void) |
85 | { | |
86 | ledtrig_cpu(CPU_LED_IDLE_START); | |
87 | #ifdef CONFIG_PL310_ERRATA_769419 | |
88 | wmb(); | |
a054a811 | 89 | #endif |
f7b861b7 | 90 | } |
a054a811 | 91 | |
f7b861b7 TG |
92 | void arch_cpu_idle_exit(void) |
93 | { | |
94 | ledtrig_cpu(CPU_LED_IDLE_END); | |
95 | } | |
96 | ||
652a12ef | 97 | void __show_regs(struct pt_regs *regs) |
1da177e4 | 98 | { |
154c772e RK |
99 | unsigned long flags; |
100 | char buf[64]; | |
77f1b959 | 101 | #ifndef CONFIG_CPU_V7M |
e6978e4b | 102 | unsigned int domain, fs; |
77f1b959 RK |
103 | #ifdef CONFIG_CPU_SW_DOMAIN_PAN |
104 | /* | |
105 | * Get the domain register for the parent context. In user | |
106 | * mode, we don't save the DACR, so lets use what it should | |
107 | * be. For other modes, we place it after the pt_regs struct. | |
108 | */ | |
e6978e4b | 109 | if (user_mode(regs)) { |
77f1b959 | 110 | domain = DACR_UACCESS_ENABLE; |
e6978e4b RK |
111 | fs = get_fs(); |
112 | } else { | |
5fa9da50 | 113 | domain = to_svc_pt_regs(regs)->dacr; |
e6978e4b RK |
114 | fs = to_svc_pt_regs(regs)->addr_limit; |
115 | } | |
77f1b959 RK |
116 | #else |
117 | domain = get_domain(); | |
e6978e4b | 118 | fs = get_fs(); |
77f1b959 RK |
119 | #endif |
120 | #endif | |
1da177e4 | 121 | |
a43cb95d TH |
122 | show_regs_print_info(KERN_DEFAULT); |
123 | ||
1da177e4 LT |
124 | print_symbol("PC is at %s\n", instruction_pointer(regs)); |
125 | print_symbol("LR is at %s\n", regs->ARM_lr); | |
154c772e | 126 | printk("pc : [<%08lx>] lr : [<%08lx>] psr: %08lx\n" |
1da177e4 | 127 | "sp : %08lx ip : %08lx fp : %08lx\n", |
154c772e RK |
128 | regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr, |
129 | regs->ARM_sp, regs->ARM_ip, regs->ARM_fp); | |
1da177e4 LT |
130 | printk("r10: %08lx r9 : %08lx r8 : %08lx\n", |
131 | regs->ARM_r10, regs->ARM_r9, | |
132 | regs->ARM_r8); | |
133 | printk("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", | |
134 | regs->ARM_r7, regs->ARM_r6, | |
135 | regs->ARM_r5, regs->ARM_r4); | |
136 | printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", | |
137 | regs->ARM_r3, regs->ARM_r2, | |
138 | regs->ARM_r1, regs->ARM_r0); | |
154c772e RK |
139 | |
140 | flags = regs->ARM_cpsr; | |
141 | buf[0] = flags & PSR_N_BIT ? 'N' : 'n'; | |
142 | buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z'; | |
143 | buf[2] = flags & PSR_C_BIT ? 'C' : 'c'; | |
144 | buf[3] = flags & PSR_V_BIT ? 'V' : 'v'; | |
145 | buf[4] = '\0'; | |
146 | ||
e2e55fde | 147 | #ifndef CONFIG_CPU_V7M |
a5e090ac | 148 | { |
a5e090ac RK |
149 | const char *segment; |
150 | ||
a5e090ac RK |
151 | if ((domain & domain_mask(DOMAIN_USER)) == |
152 | domain_val(DOMAIN_USER, DOMAIN_NOACCESS)) | |
153 | segment = "none"; | |
e6978e4b | 154 | else if (fs == get_ds()) |
a5e090ac RK |
155 | segment = "kernel"; |
156 | else | |
157 | segment = "user"; | |
158 | ||
159 | printk("Flags: %s IRQs o%s FIQs o%s Mode %s ISA %s Segment %s\n", | |
160 | buf, interrupts_enabled(regs) ? "n" : "ff", | |
161 | fast_interrupts_enabled(regs) ? "n" : "ff", | |
162 | processor_modes[processor_mode(regs)], | |
163 | isa_modes[isa_mode(regs)], segment); | |
164 | } | |
e2e55fde UKK |
165 | #else |
166 | printk("xPSR: %08lx\n", regs->ARM_cpsr); | |
167 | #endif | |
168 | ||
154c772e | 169 | #ifdef CONFIG_CPU_CP15 |
1da177e4 | 170 | { |
f12d0d7c | 171 | unsigned int ctrl; |
154c772e RK |
172 | |
173 | buf[0] = '\0'; | |
f12d0d7c | 174 | #ifdef CONFIG_CPU_CP15_MMU |
154c772e | 175 | { |
77f1b959 | 176 | unsigned int transbase; |
154c772e | 177 | asm("mrc p15, 0, %0, c2, c0\n\t" |
1eef5d2f | 178 | : "=r" (transbase)); |
154c772e | 179 | snprintf(buf, sizeof(buf), " Table: %08x DAC: %08x", |
77f1b959 | 180 | transbase, domain); |
154c772e | 181 | } |
f12d0d7c | 182 | #endif |
154c772e RK |
183 | asm("mrc p15, 0, %0, c1, c0\n" : "=r" (ctrl)); |
184 | ||
185 | printk("Control: %08x%s\n", ctrl, buf); | |
186 | } | |
f12d0d7c | 187 | #endif |
1da177e4 LT |
188 | } |
189 | ||
652a12ef RK |
190 | void show_regs(struct pt_regs * regs) |
191 | { | |
652a12ef | 192 | __show_regs(regs); |
b380ab4f | 193 | dump_stack(); |
652a12ef RK |
194 | } |
195 | ||
797245f5 RK |
196 | ATOMIC_NOTIFIER_HEAD(thread_notify_head); |
197 | ||
198 | EXPORT_SYMBOL_GPL(thread_notify_head); | |
199 | ||
1da177e4 LT |
200 | /* |
201 | * Free current thread data structures etc.. | |
202 | */ | |
e6464694 | 203 | void exit_thread(struct task_struct *tsk) |
1da177e4 | 204 | { |
e6464694 | 205 | thread_notify(THREAD_NOTIFY_EXIT, task_thread_info(tsk)); |
1da177e4 LT |
206 | } |
207 | ||
1da177e4 LT |
208 | void flush_thread(void) |
209 | { | |
210 | struct thread_info *thread = current_thread_info(); | |
211 | struct task_struct *tsk = current; | |
212 | ||
864232fa WD |
213 | flush_ptrace_hw_breakpoint(tsk); |
214 | ||
1da177e4 LT |
215 | memset(thread->used_cp, 0, sizeof(thread->used_cp)); |
216 | memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); | |
d6551e88 RK |
217 | memset(&thread->fpstate, 0, sizeof(union fp_state)); |
218 | ||
fbfb872f NL |
219 | flush_tls(); |
220 | ||
d6551e88 | 221 | thread_notify(THREAD_NOTIFY_FLUSH, thread); |
1da177e4 LT |
222 | } |
223 | ||
224 | void release_thread(struct task_struct *dead_task) | |
225 | { | |
1da177e4 LT |
226 | } |
227 | ||
228 | asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); | |
229 | ||
230 | int | |
6f2c55b8 | 231 | copy_thread(unsigned long clone_flags, unsigned long stack_start, |
afa86fc4 | 232 | unsigned long stk_sz, struct task_struct *p) |
1da177e4 | 233 | { |
815d5ec8 AV |
234 | struct thread_info *thread = task_thread_info(p); |
235 | struct pt_regs *childregs = task_pt_regs(p); | |
1da177e4 | 236 | |
1da177e4 | 237 | memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save)); |
9e14f828 | 238 | |
af4cb25d | 239 | #ifdef CONFIG_CPU_USE_DOMAINS |
1eef5d2f RK |
240 | /* |
241 | * Copy the initial value of the domain access control register | |
242 | * from the current thread: thread->addr_limit will have been | |
243 | * copied from the current thread via setup_thread_stack() in | |
244 | * kernel/fork.c | |
245 | */ | |
246 | thread->cpu_domain = get_domain(); | |
af4cb25d | 247 | #endif |
1eef5d2f | 248 | |
38a61b6b AV |
249 | if (likely(!(p->flags & PF_KTHREAD))) { |
250 | *childregs = *current_pt_regs(); | |
9e14f828 | 251 | childregs->ARM_r0 = 0; |
38a61b6b AV |
252 | if (stack_start) |
253 | childregs->ARM_sp = stack_start; | |
9e14f828 | 254 | } else { |
9fff2fa0 | 255 | memset(childregs, 0, sizeof(struct pt_regs)); |
9e14f828 AV |
256 | thread->cpu_context.r4 = stk_sz; |
257 | thread->cpu_context.r5 = stack_start; | |
9e14f828 AV |
258 | childregs->ARM_cpsr = SVC_MODE; |
259 | } | |
9fff2fa0 | 260 | thread->cpu_context.pc = (unsigned long)ret_from_fork; |
1da177e4 | 261 | thread->cpu_context.sp = (unsigned long)childregs; |
1da177e4 | 262 | |
864232fa WD |
263 | clear_ptrace_hw_breakpoint(p); |
264 | ||
1da177e4 | 265 | if (clone_flags & CLONE_SETTLS) |
a4780ade AH |
266 | thread->tp_value[0] = childregs->ARM_r3; |
267 | thread->tp_value[1] = get_tpuser(); | |
1da177e4 | 268 | |
2e82669a CM |
269 | thread_notify(THREAD_NOTIFY_COPY, thread); |
270 | ||
1da177e4 LT |
271 | return 0; |
272 | } | |
273 | ||
cde3f860 AB |
274 | /* |
275 | * Fill in the task's elfregs structure for a core dump. | |
276 | */ | |
277 | int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs) | |
278 | { | |
279 | elf_core_copy_regs(elfregs, task_pt_regs(t)); | |
280 | return 1; | |
281 | } | |
282 | ||
1da177e4 LT |
283 | /* |
284 | * fill in the fpe structure for a core dump... | |
285 | */ | |
286 | int dump_fpu (struct pt_regs *regs, struct user_fp *fp) | |
287 | { | |
288 | struct thread_info *thread = current_thread_info(); | |
289 | int used_math = thread->used_cp[1] | thread->used_cp[2]; | |
290 | ||
291 | if (used_math) | |
292 | memcpy(fp, &thread->fpstate.soft, sizeof (*fp)); | |
293 | ||
294 | return used_math != 0; | |
295 | } | |
296 | EXPORT_SYMBOL(dump_fpu); | |
297 | ||
1da177e4 LT |
298 | unsigned long get_wchan(struct task_struct *p) |
299 | { | |
2d7c11bf | 300 | struct stackframe frame; |
1b15ec7a | 301 | unsigned long stack_page; |
1da177e4 LT |
302 | int count = 0; |
303 | if (!p || p == current || p->state == TASK_RUNNING) | |
304 | return 0; | |
305 | ||
2d7c11bf CM |
306 | frame.fp = thread_saved_fp(p); |
307 | frame.sp = thread_saved_sp(p); | |
308 | frame.lr = 0; /* recovered from the stack */ | |
309 | frame.pc = thread_saved_pc(p); | |
1b15ec7a | 310 | stack_page = (unsigned long)task_stack_page(p); |
1da177e4 | 311 | do { |
1b15ec7a KK |
312 | if (frame.sp < stack_page || |
313 | frame.sp >= stack_page + THREAD_SIZE || | |
314 | unwind_frame(&frame) < 0) | |
1da177e4 | 315 | return 0; |
2d7c11bf CM |
316 | if (!in_sched_functions(frame.pc)) |
317 | return frame.pc; | |
1da177e4 LT |
318 | } while (count ++ < 16); |
319 | return 0; | |
320 | } | |
990cb8ac NP |
321 | |
322 | unsigned long arch_randomize_brk(struct mm_struct *mm) | |
323 | { | |
c984cbf2 | 324 | return randomize_page(mm->brk, 0x02000000); |
990cb8ac | 325 | } |
ec706dab | 326 | |
6cde6d42 | 327 | #ifdef CONFIG_MMU |
a5463cd3 | 328 | #ifdef CONFIG_KUSER_HELPERS |
ec706dab NP |
329 | /* |
330 | * The vectors page is always readable from user space for the | |
48be69a0 RK |
331 | * atomic helpers. Insert it into the gate_vma so that it is visible |
332 | * through ptrace and /proc/<pid>/mem. | |
ec706dab | 333 | */ |
f6604efe RK |
334 | static struct vm_area_struct gate_vma = { |
335 | .vm_start = 0xffff0000, | |
336 | .vm_end = 0xffff0000 + PAGE_SIZE, | |
337 | .vm_flags = VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYEXEC, | |
f6604efe | 338 | }; |
ec706dab | 339 | |
f9d4861f | 340 | static int __init gate_vma_init(void) |
ec706dab | 341 | { |
f6604efe | 342 | gate_vma.vm_page_prot = PAGE_READONLY_EXEC; |
f9d4861f WD |
343 | return 0; |
344 | } | |
345 | arch_initcall(gate_vma_init); | |
346 | ||
347 | struct vm_area_struct *get_gate_vma(struct mm_struct *mm) | |
348 | { | |
349 | return &gate_vma; | |
350 | } | |
351 | ||
352 | int in_gate_area(struct mm_struct *mm, unsigned long addr) | |
353 | { | |
354 | return (addr >= gate_vma.vm_start) && (addr < gate_vma.vm_end); | |
355 | } | |
356 | ||
357 | int in_gate_area_no_mm(unsigned long addr) | |
358 | { | |
359 | return in_gate_area(NULL, addr); | |
ec706dab | 360 | } |
1d0bbf42 | 361 | #define is_gate_vma(vma) ((vma) == &gate_vma) |
a5463cd3 RK |
362 | #else |
363 | #define is_gate_vma(vma) 0 | |
364 | #endif | |
ec706dab NP |
365 | |
366 | const char *arch_vma_name(struct vm_area_struct *vma) | |
367 | { | |
02e0409a | 368 | return is_gate_vma(vma) ? "[vectors]" : NULL; |
48be69a0 RK |
369 | } |
370 | ||
389522b0 | 371 | /* If possible, provide a placement hint at a random offset from the |
ecf99a43 | 372 | * stack for the sigpage and vdso pages. |
389522b0 NL |
373 | */ |
374 | static unsigned long sigpage_addr(const struct mm_struct *mm, | |
375 | unsigned int npages) | |
376 | { | |
377 | unsigned long offset; | |
378 | unsigned long first; | |
379 | unsigned long last; | |
380 | unsigned long addr; | |
381 | unsigned int slots; | |
382 | ||
383 | first = PAGE_ALIGN(mm->start_stack); | |
384 | ||
385 | last = TASK_SIZE - (npages << PAGE_SHIFT); | |
386 | ||
387 | /* No room after stack? */ | |
388 | if (first > last) | |
389 | return 0; | |
390 | ||
391 | /* Just enough room? */ | |
392 | if (first == last) | |
393 | return first; | |
394 | ||
395 | slots = ((last - first) >> PAGE_SHIFT) + 1; | |
396 | ||
397 | offset = get_random_int() % slots; | |
398 | ||
399 | addr = first + (offset << PAGE_SHIFT); | |
400 | ||
401 | return addr; | |
48be69a0 RK |
402 | } |
403 | ||
e0d40756 | 404 | static struct page *signal_page; |
48be69a0 RK |
405 | extern struct page *get_signal_page(void); |
406 | ||
02e0409a NL |
407 | static const struct vm_special_mapping sigpage_mapping = { |
408 | .name = "[sigpage]", | |
409 | .pages = &signal_page, | |
410 | }; | |
411 | ||
48be69a0 RK |
412 | int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) |
413 | { | |
414 | struct mm_struct *mm = current->mm; | |
02e0409a | 415 | struct vm_area_struct *vma; |
ecf99a43 | 416 | unsigned long npages; |
48be69a0 | 417 | unsigned long addr; |
389522b0 | 418 | unsigned long hint; |
02e0409a | 419 | int ret = 0; |
48be69a0 | 420 | |
e0d40756 RK |
421 | if (!signal_page) |
422 | signal_page = get_signal_page(); | |
423 | if (!signal_page) | |
48be69a0 RK |
424 | return -ENOMEM; |
425 | ||
ecf99a43 NL |
426 | npages = 1; /* for sigpage */ |
427 | npages += vdso_total_pages; | |
428 | ||
69048176 MH |
429 | if (down_write_killable(&mm->mmap_sem)) |
430 | return -EINTR; | |
ecf99a43 NL |
431 | hint = sigpage_addr(mm, npages); |
432 | addr = get_unmapped_area(NULL, hint, npages << PAGE_SHIFT, 0, 0); | |
48be69a0 RK |
433 | if (IS_ERR_VALUE(addr)) { |
434 | ret = addr; | |
435 | goto up_fail; | |
436 | } | |
437 | ||
02e0409a | 438 | vma = _install_special_mapping(mm, addr, PAGE_SIZE, |
48be69a0 | 439 | VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC, |
02e0409a NL |
440 | &sigpage_mapping); |
441 | ||
442 | if (IS_ERR(vma)) { | |
443 | ret = PTR_ERR(vma); | |
444 | goto up_fail; | |
445 | } | |
48be69a0 | 446 | |
02e0409a | 447 | mm->context.sigpage = addr; |
48be69a0 | 448 | |
ecf99a43 NL |
449 | /* Unlike the sigpage, failure to install the vdso is unlikely |
450 | * to be fatal to the process, so no error check needed | |
451 | * here. | |
452 | */ | |
453 | arm_install_vdso(mm, addr + PAGE_SIZE); | |
454 | ||
48be69a0 RK |
455 | up_fail: |
456 | up_write(&mm->mmap_sem); | |
457 | return ret; | |
ec706dab | 458 | } |
6cde6d42 | 459 | #endif |