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1da177e4
LT		 1/*
2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
4 *
5 * Copyright 1998-2002 by Jes Sorensen, <[email protected]>.
6 *
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
9 *
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to [email protected] to
13 * see how to subscribe.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * Additional credits:
21 * Pete Wyckoff <[email protected]>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <[email protected]>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <[email protected]>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <[email protected]>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <[email protected]>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <[email protected]>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <[email protected]>: Fixed ace_set_mac_addr for little
44 * endian systems.
45 * Val Henson <[email protected]>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <[email protected]>: Memory leak fixes in the
49 * driver init path.
50 * Grant Grundler <[email protected]>: PCI write posting fixes.
51 */
52
53#include <linux/config.h>
54#include <linux/module.h>
55#include <linux/moduleparam.h>
56#include <linux/version.h>
57#include <linux/types.h>
58#include <linux/errno.h>
59#include <linux/ioport.h>
60#include <linux/pci.h>
1e7f0bd8 61#include <linux/dma-mapping.h>
1da177e4
LT		 62#include <linux/kernel.h>
63#include <linux/netdevice.h>
64#include <linux/etherdevice.h>
65#include <linux/skbuff.h>
66#include <linux/init.h>
67#include <linux/delay.h>
68#include <linux/mm.h>
69#include <linux/highmem.h>
70#include <linux/sockios.h>
71
72#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
73#include <linux/if_vlan.h>
74#endif
75
76#ifdef SIOCETHTOOL
77#include <linux/ethtool.h>
78#endif
79
80#include <net/sock.h>
81#include <net/ip.h>
82
83#include <asm/system.h>
84#include <asm/io.h>
85#include <asm/irq.h>
86#include <asm/byteorder.h>
87#include <asm/uaccess.h>
88
89
90#define DRV_NAME "acenic"
91
92#undef INDEX_DEBUG
93
94#ifdef CONFIG_ACENIC_OMIT_TIGON_I
95#define ACE_IS_TIGON_I(ap) 0
96#define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
97#else
98#define ACE_IS_TIGON_I(ap) (ap->version == 1)
99#define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
100#endif
101
102#ifndef PCI_VENDOR_ID_ALTEON
103#define PCI_VENDOR_ID_ALTEON 0x12ae
104#endif
105#ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
106#define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
107#define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
108#endif
109#ifndef PCI_DEVICE_ID_3COM_3C985
110#define PCI_DEVICE_ID_3COM_3C985 0x0001
111#endif
112#ifndef PCI_VENDOR_ID_NETGEAR
113#define PCI_VENDOR_ID_NETGEAR 0x1385
114#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
115#endif
116#ifndef PCI_DEVICE_ID_NETGEAR_GA620T
117#define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
118#endif
119
120
121/*
122 * Farallon used the DEC vendor ID by mistake and they seem not
123 * to care - stinky!
124 */
125#ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
126#define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
127#endif
128#ifndef PCI_DEVICE_ID_FARALLON_PN9100T
129#define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
130#endif
131#ifndef PCI_VENDOR_ID_SGI
132#define PCI_VENDOR_ID_SGI 0x10a9
133#endif
134#ifndef PCI_DEVICE_ID_SGI_ACENIC
135#define PCI_DEVICE_ID_SGI_ACENIC 0x0009
136#endif
137
138static struct pci_device_id acenic_pci_tbl[] = {
139 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
140 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
141 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
142 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
143 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
144 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
145 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
146 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
147 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
148 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
149 /*
150 * Farallon used the DEC vendor ID on their cards incorrectly,
151 * then later Alteon's ID.
152 */
153 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
154 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
155 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
156 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
157 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
158 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
159 { }
160};
161MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
162
163#ifndef SET_NETDEV_DEV
164#define SET_NETDEV_DEV(net, pdev) do{} while(0)
165#endif
166
167#if LINUX_VERSION_CODE >= 0x2051c
168#define ace_sync_irq(irq) synchronize_irq(irq)
169#else
170#define ace_sync_irq(irq) synchronize_irq()
171#endif
172
173#ifndef offset_in_page
174#define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
175#endif
176
177#define ACE_MAX_MOD_PARMS 8
178#define BOARD_IDX_STATIC 0
179#define BOARD_IDX_OVERFLOW -1
180
181#if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
182 defined(NETIF_F_HW_VLAN_RX)
183#define ACENIC_DO_VLAN 1
184#define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
185#else
186#define ACENIC_DO_VLAN 0
187#define ACE_RCB_VLAN_FLAG 0
188#endif
189
190#include "acenic.h"
191
192/*
193 * These must be defined before the firmware is included.
194 */
195#define MAX_TEXT_LEN 96*1024
196#define MAX_RODATA_LEN 8*1024
197#define MAX_DATA_LEN 2*1024
198
199#include "acenic_firmware.h"
200
201#ifndef tigon2FwReleaseLocal
202#define tigon2FwReleaseLocal 0
203#endif
204
205/*
206 * This driver currently supports Tigon I and Tigon II based cards
207 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
208 * GA620. The driver should also work on the SGI, DEC and Farallon
209 * versions of the card, however I have not been able to test that
210 * myself.
211 *
212 * This card is really neat, it supports receive hardware checksumming
213 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
214 * firmware. Also the programming interface is quite neat, except for
215 * the parts dealing with the i2c eeprom on the card ;-)
216 *
217 * Using jumbo frames:
218 *
219 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
220 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
221 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
222 * interface number and <MTU> being the MTU value.
223 *
224 * Module parameters:
225 *
226 * When compiled as a loadable module, the driver allows for a number
227 * of module parameters to be specified. The driver supports the
228 * following module parameters:
229 *
230 * trace=<val> - Firmware trace level. This requires special traced
231 * firmware to replace the firmware supplied with
232 * the driver - for debugging purposes only.
233 *
234 * link=<val> - Link state. Normally you want to use the default link
235 * parameters set by the driver. This can be used to
236 * override these in case your switch doesn't negotiate
237 * the link properly. Valid values are:
238 * 0x0001 - Force half duplex link.
239 * 0x0002 - Do not negotiate line speed with the other end.
240 * 0x0010 - 10Mbit/sec link.
241 * 0x0020 - 100Mbit/sec link.
242 * 0x0040 - 1000Mbit/sec link.
243 * 0x0100 - Do not negotiate flow control.
244 * 0x0200 - Enable RX flow control Y
245 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
246 * Default value is 0x0270, ie. enable link+flow
247 * control negotiation. Negotiating the highest
248 * possible link speed with RX flow control enabled.
249 *
250 * When disabling link speed negotiation, only one link
251 * speed is allowed to be specified!
252 *
253 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
254 * to wait for more packets to arive before
255 * interrupting the host, from the time the first
256 * packet arrives.
257 *
258 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
259 * to wait for more packets to arive in the transmit ring,
260 * before interrupting the host, after transmitting the
261 * first packet in the ring.
262 *
263 * max_tx_desc=<val> - maximum number of transmit descriptors
264 * (packets) transmitted before interrupting the host.
265 *
266 * max_rx_desc=<val> - maximum number of receive descriptors
267 * (packets) received before interrupting the host.
268 *
269 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
270 * increments of the NIC's on board memory to be used for
271 * transmit and receive buffers. For the 1MB NIC app. 800KB
272 * is available, on the 1/2MB NIC app. 300KB is available.
273 * 68KB will always be available as a minimum for both
274 * directions. The default value is a 50/50 split.
275 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
276 * operations, default (1) is to always disable this as
277 * that is what Alteon does on NT. I have not been able
278 * to measure any real performance differences with
279 * this on my systems. Set <val>=0 if you want to
280 * enable these operations.
281 *
282 * If you use more than one NIC, specify the parameters for the
283 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
284 * run tracing on NIC #2 but not on NIC #1 and #3.
285 *
286 * TODO:
287 *
288 * - Proper multicast support.
289 * - NIC dump support.
290 * - More tuning parameters.
291 *
292 * The mini ring is not used under Linux and I am not sure it makes sense
293 * to actually use it.
294 *
295 * New interrupt handler strategy:
296 *
297 * The old interrupt handler worked using the traditional method of
298 * replacing an skbuff with a new one when a packet arrives. However
299 * the rx rings do not need to contain a static number of buffer
300 * descriptors, thus it makes sense to move the memory allocation out
301 * of the main interrupt handler and do it in a bottom half handler
302 * and only allocate new buffers when the number of buffers in the
303 * ring is below a certain threshold. In order to avoid starving the
304 * NIC under heavy load it is however necessary to force allocation
305 * when hitting a minimum threshold. The strategy for alloction is as
306 * follows:
307 *
308 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
309 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
310 * the buffers in the interrupt handler
311 * RX_RING_THRES - maximum number of buffers in the rx ring
312 * RX_MINI_THRES - maximum number of buffers in the mini ring
313 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
314 *
315 * One advantagous side effect of this allocation approach is that the
316 * entire rx processing can be done without holding any spin lock
317 * since the rx rings and registers are totally independent of the tx
318 * ring and its registers. This of course includes the kmalloc's of
319 * new skb's. Thus start_xmit can run in parallel with rx processing
320 * and the memory allocation on SMP systems.
321 *
322 * Note that running the skb reallocation in a bottom half opens up
323 * another can of races which needs to be handled properly. In
324 * particular it can happen that the interrupt handler tries to run
325 * the reallocation while the bottom half is either running on another
326 * CPU or was interrupted on the same CPU. To get around this the
327 * driver uses bitops to prevent the reallocation routines from being
328 * reentered.
329 *
330 * TX handling can also be done without holding any spin lock, wheee
331 * this is fun! since tx_ret_csm is only written to by the interrupt
332 * handler. The case to be aware of is when shutting down the device
333 * and cleaning up where it is necessary to make sure that
334 * start_xmit() is not running while this is happening. Well DaveM
335 * informs me that this case is already protected against ... bye bye
336 * Mr. Spin Lock, it was nice to know you.
337 *
338 * TX interrupts are now partly disabled so the NIC will only generate
339 * TX interrupts for the number of coal ticks, not for the number of
340 * TX packets in the queue. This should reduce the number of TX only,
341 * ie. when no RX processing is done, interrupts seen.
342 */
343
344/*
345 * Threshold values for RX buffer allocation - the low water marks for
346 * when to start refilling the rings are set to 75% of the ring
347 * sizes. It seems to make sense to refill the rings entirely from the
348 * intrrupt handler once it gets below the panic threshold, that way
349 * we don't risk that the refilling is moved to another CPU when the
350 * one running the interrupt handler just got the slab code hot in its
351 * cache.
352 */
353#define RX_RING_SIZE 72
354#define RX_MINI_SIZE 64
355#define RX_JUMBO_SIZE 48
356
357#define RX_PANIC_STD_THRES 16
358#define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
359#define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
360#define RX_PANIC_MINI_THRES 12
361#define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
362#define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
363#define RX_PANIC_JUMBO_THRES 6
364#define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
365#define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
366
367
368/*
369 * Size of the mini ring entries, basically these just should be big
370 * enough to take TCP ACKs
371 */
372#define ACE_MINI_SIZE 100
373
374#define ACE_MINI_BUFSIZE ACE_MINI_SIZE
375#define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
376#define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
377
378/*
379 * There seems to be a magic difference in the effect between 995 and 996
380 * but little difference between 900 and 995 ... no idea why.
381 *
382 * There is now a default set of tuning parameters which is set, depending
383 * on whether or not the user enables Jumbo frames. It's assumed that if
384 * Jumbo frames are enabled, the user wants optimal tuning for that case.
385 */
386#define DEF_TX_COAL 400 /* 996 */
387#define DEF_TX_MAX_DESC 60 /* was 40 */
388#define DEF_RX_COAL 120 /* 1000 */
389#define DEF_RX_MAX_DESC 25
390#define DEF_TX_RATIO 21 /* 24 */
391
392#define DEF_JUMBO_TX_COAL 20
393#define DEF_JUMBO_TX_MAX_DESC 60
394#define DEF_JUMBO_RX_COAL 30
395#define DEF_JUMBO_RX_MAX_DESC 6
396#define DEF_JUMBO_TX_RATIO 21
397
398#if tigon2FwReleaseLocal < 20001118
399/*
400 * Standard firmware and early modifications duplicate
401 * IRQ load without this flag (coal timer is never reset).
402 * Note that with this flag tx_coal should be less than
403 * time to xmit full tx ring.
404 * 400usec is not so bad for tx ring size of 128.
405 */
406#define TX_COAL_INTS_ONLY 1 /* worth it */
407#else
408/*
409 * With modified firmware, this is not necessary, but still useful.
410 */
411#define TX_COAL_INTS_ONLY 1
412#endif
413
414#define DEF_TRACE 0
415#define DEF_STAT (2 * TICKS_PER_SEC)
416
417
418static int link[ACE_MAX_MOD_PARMS];
419static int trace[ACE_MAX_MOD_PARMS];
420static int tx_coal_tick[ACE_MAX_MOD_PARMS];
421static int rx_coal_tick[ACE_MAX_MOD_PARMS];
422static int max_tx_desc[ACE_MAX_MOD_PARMS];
423static int max_rx_desc[ACE_MAX_MOD_PARMS];
424static int tx_ratio[ACE_MAX_MOD_PARMS];
425static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
426
427MODULE_AUTHOR("Jes Sorensen <[email protected]>");
428MODULE_LICENSE("GPL");
429MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
430
431module_param_array(link, int, NULL, 0);
432module_param_array(trace, int, NULL, 0);
433module_param_array(tx_coal_tick, int, NULL, 0);
434module_param_array(max_tx_desc, int, NULL, 0);
435module_param_array(rx_coal_tick, int, NULL, 0);
436module_param_array(max_rx_desc, int, NULL, 0);
437module_param_array(tx_ratio, int, NULL, 0);
438MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
439MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
440MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
441MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
442MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
443MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
444MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
445
446
447static char version[] __devinitdata =
448 "acenic.c: v0.92 08/05/2002 Jes Sorensen, [email protected]\n"
449 " http://home.cern.ch/~jes/gige/acenic.html\n";
450
451static int ace_get_settings(struct net_device *, struct ethtool_cmd *);
452static int ace_set_settings(struct net_device *, struct ethtool_cmd *);
453static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
454
455static struct ethtool_ops ace_ethtool_ops = {
456 .get_settings = ace_get_settings,
457 .set_settings = ace_set_settings,
458 .get_drvinfo = ace_get_drvinfo,
459};
460
461static void ace_watchdog(struct net_device *dev);
462
463static int __devinit acenic_probe_one(struct pci_dev *pdev,
464 const struct pci_device_id *id)
465{
466 struct net_device *dev;
467 struct ace_private *ap;
468 static int boards_found;
469
470 dev = alloc_etherdev(sizeof(struct ace_private));
471 if (dev == NULL) {
472 printk(KERN_ERR "acenic: Unable to allocate "
473 "net_device structure!\n");
474 return -ENOMEM;
475 }
476
477 SET_MODULE_OWNER(dev);
478 SET_NETDEV_DEV(dev, &pdev->dev);
479
480 ap = dev->priv;
481 ap->pdev = pdev;
482 ap->name = pci_name(pdev);
483
484 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
485#if ACENIC_DO_VLAN
486 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
487 dev->vlan_rx_register = ace_vlan_rx_register;
488 dev->vlan_rx_kill_vid = ace_vlan_rx_kill_vid;
489#endif
490 if (1) {
491 dev->tx_timeout = &ace_watchdog;
492 dev->watchdog_timeo = 5*HZ;
493 }
494
495 dev->open = &ace_open;
496 dev->stop = &ace_close;
497 dev->hard_start_xmit = &ace_start_xmit;
498 dev->get_stats = &ace_get_stats;
499 dev->set_multicast_list = &ace_set_multicast_list;
500 SET_ETHTOOL_OPS(dev, &ace_ethtool_ops);
501 dev->set_mac_address = &ace_set_mac_addr;
502 dev->change_mtu = &ace_change_mtu;
503
504 /* we only display this string ONCE */
505 if (!boards_found)
506 printk(version);
507
508 if (pci_enable_device(pdev))
509 goto fail_free_netdev;
510
511 /*
512 * Enable master mode before we start playing with the
513 * pci_command word since pci_set_master() will modify
514 * it.
515 */
516 pci_set_master(pdev);
517
518 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
519
520 /* OpenFirmware on Mac's does not set this - DOH.. */
521 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
522 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
523 "access - was not enabled by BIOS/Firmware\n",
524 ap->name);
525 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
526 pci_write_config_word(ap->pdev, PCI_COMMAND,
527 ap->pci_command);
528 wmb();
529 }
530
531 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
532 if (ap->pci_latency <= 0x40) {
533 ap->pci_latency = 0x40;
534 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
535 }
536
537 /*
538 * Remap the regs into kernel space - this is abuse of
539 * dev->base_addr since it was means for I/O port
540 * addresses but who gives a damn.
541 */
542 dev->base_addr = pci_resource_start(pdev, 0);
543 ap->regs = ioremap(dev->base_addr, 0x4000);
544 if (!ap->regs) {
545 printk(KERN_ERR "%s: Unable to map I/O register, "
546 "AceNIC %i will be disabled.\n",
547 ap->name, boards_found);
548 goto fail_free_netdev;
549 }
550
551 switch(pdev->vendor) {
552 case PCI_VENDOR_ID_ALTEON:
553 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
554 printk(KERN_INFO "%s: Farallon PN9100-T ",
555 ap->name);
556 } else {
557 printk(KERN_INFO "%s: Alteon AceNIC ",
558 ap->name);
559 }
560 break;
561 case PCI_VENDOR_ID_3COM:
562 printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
563 break;
564 case PCI_VENDOR_ID_NETGEAR:
565 printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
566 break;
567 case PCI_VENDOR_ID_DEC:
568 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
569 printk(KERN_INFO "%s: Farallon PN9000-SX ",
570 ap->name);
571 break;
572 }
573 case PCI_VENDOR_ID_SGI:
574 printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
575 break;
576 default:
577 printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
578 break;
579 }
580
581 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
582#ifdef __sparc__
583 printk("irq %s\n", __irq_itoa(pdev->irq));
584#else
585 printk("irq %i\n", pdev->irq);
586#endif
587
588#ifdef CONFIG_ACENIC_OMIT_TIGON_I
589 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
590 printk(KERN_ERR "%s: Driver compiled without Tigon I"
591 " support - NIC disabled\n", dev->name);
592 goto fail_uninit;
593 }
594#endif
595
596 if (ace_allocate_descriptors(dev))
597 goto fail_free_netdev;
598
599#ifdef MODULE
600 if (boards_found >= ACE_MAX_MOD_PARMS)
601 ap->board_idx = BOARD_IDX_OVERFLOW;
602 else
603 ap->board_idx = boards_found;
604#else
605 ap->board_idx = BOARD_IDX_STATIC;
606#endif
607
608 if (ace_init(dev))
609 goto fail_free_netdev;
610
611 if (register_netdev(dev)) {
612 printk(KERN_ERR "acenic: device registration failed\n");
613 goto fail_uninit;
614 }
615 ap->name = dev->name;
616
617 if (ap->pci_using_dac)
618 dev->features |= NETIF_F_HIGHDMA;
619
620 pci_set_drvdata(pdev, dev);
621
622 boards_found++;
623 return 0;
624
625 fail_uninit:
626 ace_init_cleanup(dev);
627 fail_free_netdev:
628 free_netdev(dev);
629 return -ENODEV;
630}
631
632static void __devexit acenic_remove_one(struct pci_dev *pdev)
633{
634 struct net_device *dev = pci_get_drvdata(pdev);
635 struct ace_private *ap = netdev_priv(dev);
636 struct ace_regs __iomem *regs = ap->regs;
637 short i;
638
639 unregister_netdev(dev);
640
641 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
642 if (ap->version >= 2)
643 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
644
645 /*
646 * This clears any pending interrupts
647 */
648 writel(1, &regs->Mb0Lo);
649 readl(&regs->CpuCtrl); /* flush */
650
651 /*
652 * Make sure no other CPUs are processing interrupts
653 * on the card before the buffers are being released.
654 * Otherwise one might experience some `interesting'
655 * effects.
656 *
657 * Then release the RX buffers - jumbo buffers were
658 * already released in ace_close().
659 */
660 ace_sync_irq(dev->irq);
661
662 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
663 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
664
665 if (skb) {
666 struct ring_info *ringp;
667 dma_addr_t mapping;
668
669 ringp = &ap->skb->rx_std_skbuff[i];
670 mapping = pci_unmap_addr(ringp, mapping);
671 pci_unmap_page(ap->pdev, mapping,
672 ACE_STD_BUFSIZE,
673 PCI_DMA_FROMDEVICE);
674
675 ap->rx_std_ring[i].size = 0;
676 ap->skb->rx_std_skbuff[i].skb = NULL;
677 dev_kfree_skb(skb);
678 }
679 }
680
681 if (ap->version >= 2) {
682 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
683 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
684
685 if (skb) {
686 struct ring_info *ringp;
687 dma_addr_t mapping;
688
689 ringp = &ap->skb->rx_mini_skbuff[i];
690 mapping = pci_unmap_addr(ringp,mapping);
691 pci_unmap_page(ap->pdev, mapping,
692 ACE_MINI_BUFSIZE,
693 PCI_DMA_FROMDEVICE);
694
695 ap->rx_mini_ring[i].size = 0;
696 ap->skb->rx_mini_skbuff[i].skb = NULL;
697 dev_kfree_skb(skb);
698 }
699 }
700 }
701
702 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
703 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
704 if (skb) {
705 struct ring_info *ringp;
706 dma_addr_t mapping;
707
708 ringp = &ap->skb->rx_jumbo_skbuff[i];
709 mapping = pci_unmap_addr(ringp, mapping);
710 pci_unmap_page(ap->pdev, mapping,
711 ACE_JUMBO_BUFSIZE,
712 PCI_DMA_FROMDEVICE);
713
714 ap->rx_jumbo_ring[i].size = 0;
715 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
716 dev_kfree_skb(skb);
717 }
718 }
719
720 ace_init_cleanup(dev);
721 free_netdev(dev);
722}
723
724static struct pci_driver acenic_pci_driver = {
725 .name = "acenic",
726 .id_table = acenic_pci_tbl,
727 .probe = acenic_probe_one,
728 .remove = __devexit_p(acenic_remove_one),
729};
730
731static int __init acenic_init(void)
732{
733 return pci_module_init(&acenic_pci_driver);
734}
735
736static void __exit acenic_exit(void)
737{
738 pci_unregister_driver(&acenic_pci_driver);
739}
740
741module_init(acenic_init);
742module_exit(acenic_exit);
743
744static void ace_free_descriptors(struct net_device *dev)
745{
746 struct ace_private *ap = netdev_priv(dev);
747 int size;
748
749 if (ap->rx_std_ring != NULL) {
750 size = (sizeof(struct rx_desc) *
751 (RX_STD_RING_ENTRIES +
752 RX_JUMBO_RING_ENTRIES +
753 RX_MINI_RING_ENTRIES +
754 RX_RETURN_RING_ENTRIES));
755 pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
756 ap->rx_ring_base_dma);
757 ap->rx_std_ring = NULL;
758 ap->rx_jumbo_ring = NULL;
759 ap->rx_mini_ring = NULL;
760 ap->rx_return_ring = NULL;
761 }
762 if (ap->evt_ring != NULL) {
763 size = (sizeof(struct event) * EVT_RING_ENTRIES);
764 pci_free_consistent(ap->pdev, size, ap->evt_ring,
765 ap->evt_ring_dma);
766 ap->evt_ring = NULL;
767 }
768 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
769 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
770 pci_free_consistent(ap->pdev, size, ap->tx_ring,
771 ap->tx_ring_dma);
772 }
773 ap->tx_ring = NULL;
774
775 if (ap->evt_prd != NULL) {
776 pci_free_consistent(ap->pdev, sizeof(u32),
777 (void *)ap->evt_prd, ap->evt_prd_dma);
778 ap->evt_prd = NULL;
779 }
780 if (ap->rx_ret_prd != NULL) {
781 pci_free_consistent(ap->pdev, sizeof(u32),
782 (void *)ap->rx_ret_prd,
783 ap->rx_ret_prd_dma);
784 ap->rx_ret_prd = NULL;
785 }
786 if (ap->tx_csm != NULL) {
787 pci_free_consistent(ap->pdev, sizeof(u32),
788 (void *)ap->tx_csm, ap->tx_csm_dma);
789 ap->tx_csm = NULL;
790 }
791}
792
793
794static int ace_allocate_descriptors(struct net_device *dev)
795{
796 struct ace_private *ap = netdev_priv(dev);
797 int size;
798
799 size = (sizeof(struct rx_desc) *
800 (RX_STD_RING_ENTRIES +
801 RX_JUMBO_RING_ENTRIES +
802 RX_MINI_RING_ENTRIES +
803 RX_RETURN_RING_ENTRIES));
804
805 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
806 &ap->rx_ring_base_dma);
807 if (ap->rx_std_ring == NULL)
808 goto fail;
809
810 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
811 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
812 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
813
814 size = (sizeof(struct event) * EVT_RING_ENTRIES);
815
816 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
817
818 if (ap->evt_ring == NULL)
819 goto fail;
820
821 /*
822 * Only allocate a host TX ring for the Tigon II, the Tigon I
823 * has to use PCI registers for this ;-(
824 */
825 if (!ACE_IS_TIGON_I(ap)) {
826 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
827
828 ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
829 &ap->tx_ring_dma);
830
831 if (ap->tx_ring == NULL)
832 goto fail;
833 }
834
835 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
836 &ap->evt_prd_dma);
837 if (ap->evt_prd == NULL)
838 goto fail;
839
840 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
841 &ap->rx_ret_prd_dma);
842 if (ap->rx_ret_prd == NULL)
843 goto fail;
844
845 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
846 &ap->tx_csm_dma);
847 if (ap->tx_csm == NULL)
848 goto fail;
849
850 return 0;
851
852fail:
853 /* Clean up. */
854 ace_init_cleanup(dev);
855 return 1;
856}
857
858
859/*
860 * Generic cleanup handling data allocated during init. Used when the
861 * module is unloaded or if an error occurs during initialization
862 */
863static void ace_init_cleanup(struct net_device *dev)
864{
865 struct ace_private *ap;
866
867 ap = netdev_priv(dev);
868
869 ace_free_descriptors(dev);
870
871 if (ap->info)
872 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
873 ap->info, ap->info_dma);
b4558ea9
JJ		 874 kfree(ap->skb);
875 kfree(ap->trace_buf);
1da177e4
LT		 876
877 if (dev->irq)
878 free_irq(dev->irq, dev);
879
880 iounmap(ap->regs);
881}
882
883
884/*
885 * Commands are considered to be slow.
886 */
887static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
888{
889 u32 idx;
890
891 idx = readl(&regs->CmdPrd);
892
893 writel(*(u32 *)(cmd), &regs->CmdRng[idx]);
894 idx = (idx + 1) % CMD_RING_ENTRIES;
895
896 writel(idx, &regs->CmdPrd);
897}
898
899
900static int __devinit ace_init(struct net_device *dev)
901{
902 struct ace_private *ap;
903 struct ace_regs __iomem *regs;
904 struct ace_info *info = NULL;
905 struct pci_dev *pdev;
906 unsigned long myjif;
907 u64 tmp_ptr;
908 u32 tig_ver, mac1, mac2, tmp, pci_state;
909 int board_idx, ecode = 0;
910 short i;
911 unsigned char cache_size;
912
913 ap = netdev_priv(dev);
914 regs = ap->regs;
915
916 board_idx = ap->board_idx;
917
918 /*
919 * [email protected] - its useful to do a NIC reset here to
920 * address the `Firmware not running' problem subsequent
921 * to any crashes involving the NIC
922 */
923 writel(HW_RESET | (HW_RESET << 24), &regs->HostCtrl);
924 readl(&regs->HostCtrl); /* PCI write posting */
925 udelay(5);
926
927 /*
928 * Don't access any other registers before this point!
929 */
930#ifdef __BIG_ENDIAN
931 /*
932 * This will most likely need BYTE_SWAP once we switch
933 * to using __raw_writel()
934 */
935 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
936 &regs->HostCtrl);
937#else
938 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
939 &regs->HostCtrl);
940#endif
941 readl(&regs->HostCtrl); /* PCI write posting */
942
943 /*
944 * Stop the NIC CPU and clear pending interrupts
945 */
946 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
947 readl(&regs->CpuCtrl); /* PCI write posting */
948 writel(0, &regs->Mb0Lo);
949
950 tig_ver = readl(&regs->HostCtrl) >> 28;
951
952 switch(tig_ver){
953#ifndef CONFIG_ACENIC_OMIT_TIGON_I
954 case 4:
955 case 5:
956 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
957 tig_ver, tigonFwReleaseMajor, tigonFwReleaseMinor,
958 tigonFwReleaseFix);
959 writel(0, &regs->LocalCtrl);
960 ap->version = 1;
961 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
962 break;
963#endif
964 case 6:
965 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
966 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
967 tigon2FwReleaseFix);
968 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
969 readl(&regs->CpuBCtrl); /* PCI write posting */
970 /*
971 * The SRAM bank size does _not_ indicate the amount
972 * of memory on the card, it controls the _bank_ size!
973 * Ie. a 1MB AceNIC will have two banks of 512KB.
974 */
975 writel(SRAM_BANK_512K, &regs->LocalCtrl);
976 writel(SYNC_SRAM_TIMING, &regs->MiscCfg);
977 ap->version = 2;
978 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
979 break;
980 default:
981 printk(KERN_WARNING " Unsupported Tigon version detected "
982 "(%i)\n", tig_ver);
983 ecode = -ENODEV;
984 goto init_error;
985 }
986
987 /*
988 * ModeStat _must_ be set after the SRAM settings as this change
989 * seems to corrupt the ModeStat and possible other registers.
990 * The SRAM settings survive resets and setting it to the same
991 * value a second time works as well. This is what caused the
992 * `Firmware not running' problem on the Tigon II.
993 */
994#ifdef __BIG_ENDIAN
995 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
996 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
997#else
998 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
999 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
1000#endif
1001 readl(&regs->ModeStat); /* PCI write posting */
1002
1003 mac1 = 0;
1004 for(i = 0; i < 4; i++) {
1005 mac1 = mac1 << 8;
1006 tmp = read_eeprom_byte(dev, 0x8c+i);
1007 if (tmp < 0) {
1008 ecode = -EIO;
1009 goto init_error;
1010 } else
1011 mac1 |= (tmp & 0xff);
1012 }
1013 mac2 = 0;
1014 for(i = 4; i < 8; i++) {
1015 mac2 = mac2 << 8;
1016 tmp = read_eeprom_byte(dev, 0x8c+i);
1017 if (tmp < 0) {
1018 ecode = -EIO;
1019 goto init_error;
1020 } else
1021 mac2 |= (tmp & 0xff);
1022 }
1023
1024 writel(mac1, &regs->MacAddrHi);
1025 writel(mac2, &regs->MacAddrLo);
1026
1027 printk("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
1028 (mac1 >> 8) & 0xff, mac1 & 0xff, (mac2 >> 24) &0xff,
1029 (mac2 >> 16) & 0xff, (mac2 >> 8) & 0xff, mac2 & 0xff);
1030
1031 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1032 dev->dev_addr[1] = mac1 & 0xff;
1033 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1034 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1035 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1036 dev->dev_addr[5] = mac2 & 0xff;
1037
1038 /*
1039 * Looks like this is necessary to deal with on all architectures,
1040 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1041 * Ie. having two NICs in the machine, one will have the cache
1042 * line set at boot time, the other will not.
1043 */
1044 pdev = ap->pdev;
1045 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1046 cache_size <<= 2;
1047 if (cache_size != SMP_CACHE_BYTES) {
1048 printk(KERN_INFO " PCI cache line size set incorrectly "
1049 "(%i bytes) by BIOS/FW, ", cache_size);
1050 if (cache_size > SMP_CACHE_BYTES)
1051 printk("expecting %i\n", SMP_CACHE_BYTES);
1052 else {
1053 printk("correcting to %i\n", SMP_CACHE_BYTES);
1054 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1055 SMP_CACHE_BYTES >> 2);
1056 }
1057 }
1058
1059 pci_state = readl(&regs->PciState);
1060 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1061 "latency: %i clks\n",
1062 (pci_state & PCI_32BIT) ? 32 : 64,
1063 (pci_state & PCI_66MHZ) ? 66 : 33,
1064 ap->pci_latency);
1065
1066 /*
1067 * Set the max DMA transfer size. Seems that for most systems
1068 * the performance is better when no MAX parameter is
1069 * set. However for systems enabling PCI write and invalidate,
1070 * DMA writes must be set to the L1 cache line size to get
1071 * optimal performance.
1072 *
1073 * The default is now to turn the PCI write and invalidate off
1074 * - that is what Alteon does for NT.
1075 */
1076 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1077 if (ap->version >= 2) {
1078 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1079 /*
1080 * Tuning parameters only supported for 8 cards
1081 */
1082 if (board_idx == BOARD_IDX_OVERFLOW ||
1083 dis_pci_mem_inval[board_idx]) {
1084 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1085 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1086 pci_write_config_word(pdev, PCI_COMMAND,
1087 ap->pci_command);
1088 printk(KERN_INFO " Disabling PCI memory "
1089 "write and invalidate\n");
1090 }
1091 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1092 printk(KERN_INFO " PCI memory write & invalidate "
1093 "enabled by BIOS, enabling counter measures\n");
1094
1095 switch(SMP_CACHE_BYTES) {
1096 case 16:
1097 tmp |= DMA_WRITE_MAX_16;
1098 break;
1099 case 32:
1100 tmp |= DMA_WRITE_MAX_32;
1101 break;
1102 case 64:
1103 tmp |= DMA_WRITE_MAX_64;
1104 break;
1105 case 128:
1106 tmp |= DMA_WRITE_MAX_128;
1107 break;
1108 default:
1109 printk(KERN_INFO " Cache line size %i not "
1110 "supported, PCI write and invalidate "
1111 "disabled\n", SMP_CACHE_BYTES);
1112 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1113 pci_write_config_word(pdev, PCI_COMMAND,
1114 ap->pci_command);
1115 }
1116 }
1117 }
1118
1119#ifdef __sparc__
1120 /*
1121 * On this platform, we know what the best dma settings
1122 * are. We use 64-byte maximum bursts, because if we
1123 * burst larger than the cache line size (or even cross
1124 * a 64byte boundary in a single burst) the UltraSparc
1125 * PCI controller will disconnect at 64-byte multiples.
1126 *
1127 * Read-multiple will be properly enabled above, and when
1128 * set will give the PCI controller proper hints about
1129 * prefetching.
1130 */
1131 tmp &= ~DMA_READ_WRITE_MASK;
1132 tmp |= DMA_READ_MAX_64;
1133 tmp |= DMA_WRITE_MAX_64;
1134#endif
1135#ifdef __alpha__
1136 tmp &= ~DMA_READ_WRITE_MASK;
1137 tmp |= DMA_READ_MAX_128;
1138 /*
1139 * All the docs say MUST NOT. Well, I did.
1140 * Nothing terrible happens, if we load wrong size.
1141 * Bit w&i still works better!
1142 */
1143 tmp |= DMA_WRITE_MAX_128;
1144#endif
1145 writel(tmp, &regs->PciState);
1146
1147#if 0
1148 /*
1149 * The Host PCI bus controller driver has to set FBB.
1150 * If all devices on that PCI bus support FBB, then the controller
1151 * can enable FBB support in the Host PCI Bus controller (or on
1152 * the PCI-PCI bridge if that applies).
1153 * -ggg
1154 */
1155 /*
1156 * I have received reports from people having problems when this
1157 * bit is enabled.
1158 */
1159 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1160 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1161 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1162 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1163 }
1164#endif
1165
1166 /*
1167 * Configure DMA attributes.
1168 */
1e7f0bd8 1169 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1da177e4 1170 ap->pci_using_dac = 1;
1e7f0bd8 1171 } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1da177e4
LT		 1172 ap->pci_using_dac = 0;
1173 } else {
1174 ecode = -ENODEV;
1175 goto init_error;
1176 }
1177
1178 /*
1179 * Initialize the generic info block and the command+event rings
1180 * and the control blocks for the transmit and receive rings
1181 * as they need to be setup once and for all.
1182 */
1183 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1184 &ap->info_dma))) {
1185 ecode = -EAGAIN;
1186 goto init_error;
1187 }
1188 ap->info = info;
1189
1190 /*
1191 * Get the memory for the skb rings.
1192 */
1193 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1194 ecode = -EAGAIN;
1195 goto init_error;
1196 }
1197
1198 ecode = request_irq(pdev->irq, ace_interrupt, SA_SHIRQ,
1199 DRV_NAME, dev);
1200 if (ecode) {
1201 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1202 DRV_NAME, pdev->irq);
1203 goto init_error;
1204 } else
1205 dev->irq = pdev->irq;
1206
1207#ifdef INDEX_DEBUG
1208 spin_lock_init(&ap->debug_lock);
1209 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1210 ap->last_std_rx = 0;
1211 ap->last_mini_rx = 0;
1212#endif
1213
1214 memset(ap->info, 0, sizeof(struct ace_info));
1215 memset(ap->skb, 0, sizeof(struct ace_skb));
1216
1217 ace_load_firmware(dev);
1218 ap->fw_running = 0;
1219
1220 tmp_ptr = ap->info_dma;
1221 writel(tmp_ptr >> 32, &regs->InfoPtrHi);
1222 writel(tmp_ptr & 0xffffffff, &regs->InfoPtrLo);
1223
1224 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1225
1226 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1227 info->evt_ctrl.flags = 0;
1228
1229 *(ap->evt_prd) = 0;
1230 wmb();
1231 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1232 writel(0, &regs->EvtCsm);
1233
1234 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1235 info->cmd_ctrl.flags = 0;
1236 info->cmd_ctrl.max_len = 0;
1237
1238 for (i = 0; i < CMD_RING_ENTRIES; i++)
1239 writel(0, &regs->CmdRng[i]);
1240
1241 writel(0, &regs->CmdPrd);
1242 writel(0, &regs->CmdCsm);
1243
1244 tmp_ptr = ap->info_dma;
1245 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1246 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1247
1248 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1249 info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1250 info->rx_std_ctrl.flags =
1251 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1252
1253 memset(ap->rx_std_ring, 0,
1254 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1255
1256 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1257 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1258
1259 ap->rx_std_skbprd = 0;
1260 atomic_set(&ap->cur_rx_bufs, 0);
1261
1262 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1263 (ap->rx_ring_base_dma +
1264 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1265 info->rx_jumbo_ctrl.max_len = 0;
1266 info->rx_jumbo_ctrl.flags =
1267 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1268
1269 memset(ap->rx_jumbo_ring, 0,
1270 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1271
1272 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1273 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1274
1275 ap->rx_jumbo_skbprd = 0;
1276 atomic_set(&ap->cur_jumbo_bufs, 0);
1277
1278 memset(ap->rx_mini_ring, 0,
1279 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1280
1281 if (ap->version >= 2) {
1282 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1283 (ap->rx_ring_base_dma +
1284 (sizeof(struct rx_desc) *
1285 (RX_STD_RING_ENTRIES +
1286 RX_JUMBO_RING_ENTRIES))));
1287 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1288 info->rx_mini_ctrl.flags =
1289 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|ACE_RCB_VLAN_FLAG;
1290
1291 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1292 ap->rx_mini_ring[i].flags =
1293 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1294 } else {
1295 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1296 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1297 info->rx_mini_ctrl.max_len = 0;
1298 }
1299
1300 ap->rx_mini_skbprd = 0;
1301 atomic_set(&ap->cur_mini_bufs, 0);
1302
1303 set_aceaddr(&info->rx_return_ctrl.rngptr,
1304 (ap->rx_ring_base_dma +
1305 (sizeof(struct rx_desc) *
1306 (RX_STD_RING_ENTRIES +
1307 RX_JUMBO_RING_ENTRIES +
1308 RX_MINI_RING_ENTRIES))));
1309 info->rx_return_ctrl.flags = 0;
1310 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1311
1312 memset(ap->rx_return_ring, 0,
1313 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1314
1315 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1316 *(ap->rx_ret_prd) = 0;
1317
1318 writel(TX_RING_BASE, &regs->WinBase);
1319
1320 if (ACE_IS_TIGON_I(ap)) {
1321 ap->tx_ring = (struct tx_desc *) regs->Window;
1322 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
1323 * sizeof(struct tx_desc)) / sizeof(u32); i++)
1324 writel(0, (void __iomem *)ap->tx_ring + i * 4);
1325
1326 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1327 } else {
1328 memset(ap->tx_ring, 0,
1329 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1330
1331 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1332 }
1333
1334 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1335 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1336
1337 /*
1338 * The Tigon I does not like having the TX ring in host memory ;-(
1339 */
1340 if (!ACE_IS_TIGON_I(ap))
1341 tmp |= RCB_FLG_TX_HOST_RING;
1342#if TX_COAL_INTS_ONLY
1343 tmp |= RCB_FLG_COAL_INT_ONLY;
1344#endif
1345 info->tx_ctrl.flags = tmp;
1346
1347 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1348
1349 /*
1350 * Potential item for tuning parameter
1351 */
1352#if 0 /* NO */
1353 writel(DMA_THRESH_16W, &regs->DmaReadCfg);
1354 writel(DMA_THRESH_16W, &regs->DmaWriteCfg);
1355#else
1356 writel(DMA_THRESH_8W, &regs->DmaReadCfg);
1357 writel(DMA_THRESH_8W, &regs->DmaWriteCfg);
1358#endif
1359
1360 writel(0, &regs->MaskInt);
1361 writel(1, &regs->IfIdx);
1362#if 0
1363 /*
1364 * McKinley boxes do not like us fiddling with AssistState
1365 * this early
1366 */
1367 writel(1, &regs->AssistState);
1368#endif
1369
1370 writel(DEF_STAT, &regs->TuneStatTicks);
1371 writel(DEF_TRACE, &regs->TuneTrace);
1372
1373 ace_set_rxtx_parms(dev, 0);
1374
1375 if (board_idx == BOARD_IDX_OVERFLOW) {
1376 printk(KERN_WARNING "%s: more than %i NICs detected, "
1377 "ignoring module parameters!\n",
1378 ap->name, ACE_MAX_MOD_PARMS);
1379 } else if (board_idx >= 0) {
1380 if (tx_coal_tick[board_idx])
1381 writel(tx_coal_tick[board_idx],
1382 &regs->TuneTxCoalTicks);
1383 if (max_tx_desc[board_idx])
1384 writel(max_tx_desc[board_idx], &regs->TuneMaxTxDesc);
1385
1386 if (rx_coal_tick[board_idx])
1387 writel(rx_coal_tick[board_idx],
1388 &regs->TuneRxCoalTicks);
1389 if (max_rx_desc[board_idx])
1390 writel(max_rx_desc[board_idx], &regs->TuneMaxRxDesc);
1391
1392 if (trace[board_idx])
1393 writel(trace[board_idx], &regs->TuneTrace);
1394
1395 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1396 writel(tx_ratio[board_idx], &regs->TxBufRat);
1397 }
1398
1399 /*
1400 * Default link parameters
1401 */
1402 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1403 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1404 if(ap->version >= 2)
1405 tmp |= LNK_TX_FLOW_CTL_Y;
1406
1407 /*
1408 * Override link default parameters
1409 */
1410 if ((board_idx >= 0) && link[board_idx]) {
1411 int option = link[board_idx];
1412
1413 tmp = LNK_ENABLE;
1414
1415 if (option & 0x01) {
1416 printk(KERN_INFO "%s: Setting half duplex link\n",
1417 ap->name);
1418 tmp &= ~LNK_FULL_DUPLEX;
1419 }
1420 if (option & 0x02)
1421 tmp &= ~LNK_NEGOTIATE;
1422 if (option & 0x10)
1423 tmp |= LNK_10MB;
1424 if (option & 0x20)
1425 tmp |= LNK_100MB;
1426 if (option & 0x40)
1427 tmp |= LNK_1000MB;
1428 if ((option & 0x70) == 0) {
1429 printk(KERN_WARNING "%s: No media speed specified, "
1430 "forcing auto negotiation\n", ap->name);
1431 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1432 LNK_100MB | LNK_10MB;
1433 }
1434 if ((option & 0x100) == 0)
1435 tmp |= LNK_NEG_FCTL;
1436 else
1437 printk(KERN_INFO "%s: Disabling flow control "
1438 "negotiation\n", ap->name);
1439 if (option & 0x200)
1440 tmp |= LNK_RX_FLOW_CTL_Y;
1441 if ((option & 0x400) && (ap->version >= 2)) {
1442 printk(KERN_INFO "%s: Enabling TX flow control\n",
1443 ap->name);
1444 tmp |= LNK_TX_FLOW_CTL_Y;
1445 }
1446 }
1447
1448 ap->link = tmp;
1449 writel(tmp, &regs->TuneLink);
1450 if (ap->version >= 2)
1451 writel(tmp, &regs->TuneFastLink);
1452
1453 if (ACE_IS_TIGON_I(ap))
1454 writel(tigonFwStartAddr, &regs->Pc);
1455 if (ap->version == 2)
1456 writel(tigon2FwStartAddr, &regs->Pc);
1457
1458 writel(0, &regs->Mb0Lo);
1459
1460 /*
1461 * Set tx_csm before we start receiving interrupts, otherwise
1462 * the interrupt handler might think it is supposed to process
1463 * tx ints before we are up and running, which may cause a null
1464 * pointer access in the int handler.
1465 */
1466 ap->cur_rx = 0;
1467 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1468
1469 wmb();
1470 ace_set_txprd(regs, ap, 0);
1471 writel(0, &regs->RxRetCsm);
1472
1473 /*
1474 * Zero the stats before starting the interface
1475 */
1476 memset(&ap->stats, 0, sizeof(ap->stats));
1477
1478 /*
1479 * Enable DMA engine now.
1480 * If we do this sooner, Mckinley box pukes.
1481 * I assume it's because Tigon II DMA engine wants to check
1482 * *something* even before the CPU is started.
1483 */
1484 writel(1, &regs->AssistState); /* enable DMA */
1485
1486 /*
1487 * Start the NIC CPU
1488 */
1489 writel(readl(&regs->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), &regs->CpuCtrl);
1490 readl(&regs->CpuCtrl);
1491
1492 /*
1493 * Wait for the firmware to spin up - max 3 seconds.
1494 */
1495 myjif = jiffies + 3 * HZ;
1496 while (time_before(jiffies, myjif) && !ap->fw_running)
1497 cpu_relax();
1498
1499 if (!ap->fw_running) {
1500 printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1501
1502 ace_dump_trace(ap);
1503 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
1504 readl(&regs->CpuCtrl);
1505
1506 /* [email protected] - account for badly behaving firmware/NIC:
1507 * - have observed that the NIC may continue to generate
1508 * interrupts for some reason; attempt to stop it - halt
1509 * second CPU for Tigon II cards, and also clear Mb0
1510 * - if we're a module, we'll fail to load if this was
1511 * the only GbE card in the system => if the kernel does
1512 * see an interrupt from the NIC, code to handle it is
1513 * gone and OOps! - so free_irq also
1514 */
1515 if (ap->version >= 2)
1516 writel(readl(&regs->CpuBCtrl) | CPU_HALT,
1517 &regs->CpuBCtrl);
1518 writel(0, &regs->Mb0Lo);
1519 readl(&regs->Mb0Lo);
1520
1521 ecode = -EBUSY;
1522 goto init_error;
1523 }
1524
1525 /*
1526 * We load the ring here as there seem to be no way to tell the
1527 * firmware to wipe the ring without re-initializing it.
1528 */
1529 if (!test_and_set_bit(0, &ap->std_refill_busy))
1530 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1531 else
1532 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1533 ap->name);
1534 if (ap->version >= 2) {
1535 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1536 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1537 else
1538 printk(KERN_ERR "%s: Someone is busy refilling "
1539 "the RX mini ring\n", ap->name);
1540 }
1541 return 0;
1542
1543 init_error:
1544 ace_init_cleanup(dev);
1545 return ecode;
1546}
1547
1548
1549static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1550{
1551 struct ace_private *ap = netdev_priv(dev);
1552 struct ace_regs __iomem *regs = ap->regs;
1553 int board_idx = ap->board_idx;
1554
1555 if (board_idx >= 0) {
1556 if (!jumbo) {
1557 if (!tx_coal_tick[board_idx])
1558 writel(DEF_TX_COAL, &regs->TuneTxCoalTicks);
1559 if (!max_tx_desc[board_idx])
1560 writel(DEF_TX_MAX_DESC, &regs->TuneMaxTxDesc);
1561 if (!rx_coal_tick[board_idx])
1562 writel(DEF_RX_COAL, &regs->TuneRxCoalTicks);
1563 if (!max_rx_desc[board_idx])
1564 writel(DEF_RX_MAX_DESC, &regs->TuneMaxRxDesc);
1565 if (!tx_ratio[board_idx])
1566 writel(DEF_TX_RATIO, &regs->TxBufRat);
1567 } else {
1568 if (!tx_coal_tick[board_idx])
1569 writel(DEF_JUMBO_TX_COAL,
1570 &regs->TuneTxCoalTicks);
1571 if (!max_tx_desc[board_idx])
1572 writel(DEF_JUMBO_TX_MAX_DESC,
1573 &regs->TuneMaxTxDesc);
1574 if (!rx_coal_tick[board_idx])
1575 writel(DEF_JUMBO_RX_COAL,
1576 &regs->TuneRxCoalTicks);
1577 if (!max_rx_desc[board_idx])
1578 writel(DEF_JUMBO_RX_MAX_DESC,
1579 &regs->TuneMaxRxDesc);
1580 if (!tx_ratio[board_idx])
1581 writel(DEF_JUMBO_TX_RATIO, &regs->TxBufRat);
1582 }
1583 }
1584}
1585
1586
1587static void ace_watchdog(struct net_device *data)
1588{
1589 struct net_device *dev = data;
1590 struct ace_private *ap = netdev_priv(dev);
1591 struct ace_regs __iomem *regs = ap->regs;
1592
1593 /*
1594 * We haven't received a stats update event for more than 2.5
1595 * seconds and there is data in the transmit queue, thus we
1596 * asume the card is stuck.
1597 */
1598 if (*ap->tx_csm != ap->tx_ret_csm) {
1599 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1600 dev->name, (unsigned int)readl(&regs->HostCtrl));
1601 /* This can happen due to ieee flow control. */
1602 } else {
1603 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1604 dev->name);
1605#if 0
1606 netif_wake_queue(dev);
1607#endif
1608 }
1609}
1610
1611
1612static void ace_tasklet(unsigned long dev)
1613{
1614 struct ace_private *ap = netdev_priv((struct net_device *)dev);
1615 int cur_size;
1616
1617 cur_size = atomic_read(&ap->cur_rx_bufs);
1618 if ((cur_size < RX_LOW_STD_THRES) &&
1619 !test_and_set_bit(0, &ap->std_refill_busy)) {
1620#ifdef DEBUG
1621 printk("refilling buffers (current %i)\n", cur_size);
1622#endif
1623 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1624 }
1625
1626 if (ap->version >= 2) {
1627 cur_size = atomic_read(&ap->cur_mini_bufs);
1628 if ((cur_size < RX_LOW_MINI_THRES) &&
1629 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1630#ifdef DEBUG
1631 printk("refilling mini buffers (current %i)\n",
1632 cur_size);
1633#endif
1634 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1635 }
1636 }
1637
1638 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1639 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1640 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1641#ifdef DEBUG
1642 printk("refilling jumbo buffers (current %i)\n", cur_size);
1643#endif
1644 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1645 }
1646 ap->tasklet_pending = 0;
1647}
1648
1649
1650/*
1651 * Copy the contents of the NIC's trace buffer to kernel memory.
1652 */
1653static void ace_dump_trace(struct ace_private *ap)
1654{
1655#if 0
1656 if (!ap->trace_buf)
1657 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1658 return;
1659#endif
1660}
1661
1662
1663/*
1664 * Load the standard rx ring.
1665 *
1666 * Loading rings is safe without holding the spin lock since this is
1667 * done only before the device is enabled, thus no interrupts are
1668 * generated and by the interrupt handler/tasklet handler.
1669 */
1670static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1671{
1672 struct ace_regs __iomem *regs = ap->regs;
1673 short i, idx;
1674
1675
1676 prefetchw(&ap->cur_rx_bufs);
1677
1678 idx = ap->rx_std_skbprd;
1679
1680 for (i = 0; i < nr_bufs; i++) {
1681 struct sk_buff *skb;
1682 struct rx_desc *rd;
1683 dma_addr_t mapping;
1684
1685 skb = alloc_skb(ACE_STD_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1686 if (!skb)
1687 break;
1688
1689 skb_reserve(skb, NET_IP_ALIGN);
1690 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1691 offset_in_page(skb->data),
1692 ACE_STD_BUFSIZE,
1693 PCI_DMA_FROMDEVICE);
1694 ap->skb->rx_std_skbuff[idx].skb = skb;
1695 pci_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1696 mapping, mapping);
1697
1698 rd = &ap->rx_std_ring[idx];
1699 set_aceaddr(&rd->addr, mapping);
1700 rd->size = ACE_STD_BUFSIZE;
1701 rd->idx = idx;
1702 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1703 }
1704
1705 if (!i)
1706 goto error_out;
1707
1708 atomic_add(i, &ap->cur_rx_bufs);
1709 ap->rx_std_skbprd = idx;
1710
1711 if (ACE_IS_TIGON_I(ap)) {
1712 struct cmd cmd;
1713 cmd.evt = C_SET_RX_PRD_IDX;
1714 cmd.code = 0;
1715 cmd.idx = ap->rx_std_skbprd;
1716 ace_issue_cmd(regs, &cmd);
1717 } else {
1718 writel(idx, &regs->RxStdPrd);
1719 wmb();
1720 }
1721
1722 out:
1723 clear_bit(0, &ap->std_refill_busy);
1724 return;
1725
1726 error_out:
1727 printk(KERN_INFO "Out of memory when allocating "
1728 "standard receive buffers\n");
1729 goto out;
1730}
1731
1732
1733static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1734{
1735 struct ace_regs __iomem *regs = ap->regs;
1736 short i, idx;
1737
1738 prefetchw(&ap->cur_mini_bufs);
1739
1740 idx = ap->rx_mini_skbprd;
1741 for (i = 0; i < nr_bufs; i++) {
1742 struct sk_buff *skb;
1743 struct rx_desc *rd;
1744 dma_addr_t mapping;
1745
1746 skb = alloc_skb(ACE_MINI_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1747 if (!skb)
1748 break;
1749
1750 skb_reserve(skb, NET_IP_ALIGN);
1751 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1752 offset_in_page(skb->data),
1753 ACE_MINI_BUFSIZE,
1754 PCI_DMA_FROMDEVICE);
1755 ap->skb->rx_mini_skbuff[idx].skb = skb;
1756 pci_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1757 mapping, mapping);
1758
1759 rd = &ap->rx_mini_ring[idx];
1760 set_aceaddr(&rd->addr, mapping);
1761 rd->size = ACE_MINI_BUFSIZE;
1762 rd->idx = idx;
1763 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1764 }
1765
1766 if (!i)
1767 goto error_out;
1768
1769 atomic_add(i, &ap->cur_mini_bufs);
1770
1771 ap->rx_mini_skbprd = idx;
1772
1773 writel(idx, &regs->RxMiniPrd);
1774 wmb();
1775
1776 out:
1777 clear_bit(0, &ap->mini_refill_busy);
1778 return;
1779 error_out:
1780 printk(KERN_INFO "Out of memory when allocating "
1781 "mini receive buffers\n");
1782 goto out;
1783}
1784
1785
1786/*
1787 * Load the jumbo rx ring, this may happen at any time if the MTU
1788 * is changed to a value > 1500.
1789 */
1790static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1791{
1792 struct ace_regs __iomem *regs = ap->regs;
1793 short i, idx;
1794
1795 idx = ap->rx_jumbo_skbprd;
1796
1797 for (i = 0; i < nr_bufs; i++) {
1798 struct sk_buff *skb;
1799 struct rx_desc *rd;
1800 dma_addr_t mapping;
1801
1802 skb = alloc_skb(ACE_JUMBO_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1803 if (!skb)
1804 break;
1805
1806 skb_reserve(skb, NET_IP_ALIGN);
1807 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1808 offset_in_page(skb->data),
1809 ACE_JUMBO_BUFSIZE,
1810 PCI_DMA_FROMDEVICE);
1811 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1812 pci_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1813 mapping, mapping);
1814
1815 rd = &ap->rx_jumbo_ring[idx];
1816 set_aceaddr(&rd->addr, mapping);
1817 rd->size = ACE_JUMBO_BUFSIZE;
1818 rd->idx = idx;
1819 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1820 }
1821
1822 if (!i)
1823 goto error_out;
1824
1825 atomic_add(i, &ap->cur_jumbo_bufs);
1826 ap->rx_jumbo_skbprd = idx;
1827
1828 if (ACE_IS_TIGON_I(ap)) {
1829 struct cmd cmd;
1830 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1831 cmd.code = 0;
1832 cmd.idx = ap->rx_jumbo_skbprd;
1833 ace_issue_cmd(regs, &cmd);
1834 } else {
1835 writel(idx, &regs->RxJumboPrd);
1836 wmb();
1837 }
1838
1839 out:
1840 clear_bit(0, &ap->jumbo_refill_busy);
1841 return;
1842 error_out:
1843 if (net_ratelimit())
1844 printk(KERN_INFO "Out of memory when allocating "
1845 "jumbo receive buffers\n");
1846 goto out;
1847}
1848
1849
1850/*
1851 * All events are considered to be slow (RX/TX ints do not generate
1852 * events) and are handled here, outside the main interrupt handler,
1853 * to reduce the size of the handler.
1854 */
1855static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1856{
1857 struct ace_private *ap;
1858
1859 ap = netdev_priv(dev);
1860
1861 while (evtcsm != evtprd) {
1862 switch (ap->evt_ring[evtcsm].evt) {
1863 case E_FW_RUNNING:
1864 printk(KERN_INFO "%s: Firmware up and running\n",
1865 ap->name);
1866 ap->fw_running = 1;
1867 wmb();
1868 break;
1869 case E_STATS_UPDATED:
1870 break;
1871 case E_LNK_STATE:
1872 {
1873 u16 code = ap->evt_ring[evtcsm].code;
1874 switch (code) {
1875 case E_C_LINK_UP:
1876 {
1877 u32 state = readl(&ap->regs->GigLnkState);
1878 printk(KERN_WARNING "%s: Optical link UP "
1879 "(%s Duplex, Flow Control: %s%s)\n",
1880 ap->name,
1881 state & LNK_FULL_DUPLEX ? "Full":"Half",
1882 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1883 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1884 break;
1885 }
1886 case E_C_LINK_DOWN:
1887 printk(KERN_WARNING "%s: Optical link DOWN\n",
1888 ap->name);
1889 break;
1890 case E_C_LINK_10_100:
1891 printk(KERN_WARNING "%s: 10/100BaseT link "
1892 "UP\n", ap->name);
1893 break;
1894 default:
1895 printk(KERN_ERR "%s: Unknown optical link "
1896 "state %02x\n", ap->name, code);
1897 }
1898 break;
1899 }
1900 case E_ERROR:
1901 switch(ap->evt_ring[evtcsm].code) {
1902 case E_C_ERR_INVAL_CMD:
1903 printk(KERN_ERR "%s: invalid command error\n",
1904 ap->name);
1905 break;
1906 case E_C_ERR_UNIMP_CMD:
1907 printk(KERN_ERR "%s: unimplemented command "
1908 "error\n", ap->name);
1909 break;
1910 case E_C_ERR_BAD_CFG:
1911 printk(KERN_ERR "%s: bad config error\n",
1912 ap->name);
1913 break;
1914 default:
1915 printk(KERN_ERR "%s: unknown error %02x\n",
1916 ap->name, ap->evt_ring[evtcsm].code);
1917 }
1918 break;
1919 case E_RESET_JUMBO_RNG:
1920 {
1921 int i;
1922 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1923 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1924 ap->rx_jumbo_ring[i].size = 0;
1925 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1926 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1927 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1928 }
1929 }
1930
1931 if (ACE_IS_TIGON_I(ap)) {
1932 struct cmd cmd;
1933 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1934 cmd.code = 0;
1935 cmd.idx = 0;
1936 ace_issue_cmd(ap->regs, &cmd);
1937 } else {
1938 writel(0, &((ap->regs)->RxJumboPrd));
1939 wmb();
1940 }
1941
1942 ap->jumbo = 0;
1943 ap->rx_jumbo_skbprd = 0;
1944 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1945 ap->name);
1946 clear_bit(0, &ap->jumbo_refill_busy);
1947 break;
1948 }
1949 default:
1950 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1951 ap->name, ap->evt_ring[evtcsm].evt);
1952 }
1953 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1954 }
1955
1956 return evtcsm;
1957}
1958
1959
1960static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1961{
1962 struct ace_private *ap = netdev_priv(dev);
1963 u32 idx;
1964 int mini_count = 0, std_count = 0;
1965
1966 idx = rxretcsm;
1967
1968 prefetchw(&ap->cur_rx_bufs);
1969 prefetchw(&ap->cur_mini_bufs);
1970
1971 while (idx != rxretprd) {
1972 struct ring_info *rip;
1973 struct sk_buff *skb;
1974 struct rx_desc *rxdesc, *retdesc;
1975 u32 skbidx;
1976 int bd_flags, desc_type, mapsize;
1977 u16 csum;
1978
1979
1980 /* make sure the rx descriptor isn't read before rxretprd */
1981 if (idx == rxretcsm)
1982 rmb();
1983
1984 retdesc = &ap->rx_return_ring[idx];
1985 skbidx = retdesc->idx;
1986 bd_flags = retdesc->flags;
1987 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1988
1989 switch(desc_type) {
1990 /*
1991 * Normal frames do not have any flags set
1992 *
1993 * Mini and normal frames arrive frequently,
1994 * so use a local counter to avoid doing
1995 * atomic operations for each packet arriving.
1996 */
1997 case 0:
1998 rip = &ap->skb->rx_std_skbuff[skbidx];
1999 mapsize = ACE_STD_BUFSIZE;
2000 rxdesc = &ap->rx_std_ring[skbidx];
2001 std_count++;
2002 break;
2003 case BD_FLG_JUMBO:
2004 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
2005 mapsize = ACE_JUMBO_BUFSIZE;
2006 rxdesc = &ap->rx_jumbo_ring[skbidx];
2007 atomic_dec(&ap->cur_jumbo_bufs);
2008 break;
2009 case BD_FLG_MINI:
2010 rip = &ap->skb->rx_mini_skbuff[skbidx];
2011 mapsize = ACE_MINI_BUFSIZE;
2012 rxdesc = &ap->rx_mini_ring[skbidx];
2013 mini_count++;
2014 break;
2015 default:
2016 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2017 "returned by NIC\n", dev->name,
2018 retdesc->flags);
2019 goto error;
2020 }
2021
2022 skb = rip->skb;
2023 rip->skb = NULL;
2024 pci_unmap_page(ap->pdev,
2025 pci_unmap_addr(rip, mapping),
2026 mapsize,
2027 PCI_DMA_FROMDEVICE);
2028 skb_put(skb, retdesc->size);
2029
2030 /*
2031 * Fly baby, fly!
2032 */
2033 csum = retdesc->tcp_udp_csum;
2034
2035 skb->dev = dev;
2036 skb->protocol = eth_type_trans(skb, dev);
2037
2038 /*
2039 * Instead of forcing the poor tigon mips cpu to calculate
2040 * pseudo hdr checksum, we do this ourselves.
2041 */
2042 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2043 skb->csum = htons(csum);
2044 skb->ip_summed = CHECKSUM_HW;
2045 } else {
2046 skb->ip_summed = CHECKSUM_NONE;
2047 }
2048
2049 /* send it up */
2050#if ACENIC_DO_VLAN
2051 if (ap->vlgrp && (bd_flags & BD_FLG_VLAN_TAG)) {
2052 vlan_hwaccel_rx(skb, ap->vlgrp, retdesc->vlan);
2053 } else
2054#endif
2055 netif_rx(skb);
2056
2057 dev->last_rx = jiffies;
2058 ap->stats.rx_packets++;
2059 ap->stats.rx_bytes += retdesc->size;
2060
2061 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2062 }
2063
2064 atomic_sub(std_count, &ap->cur_rx_bufs);
2065 if (!ACE_IS_TIGON_I(ap))
2066 atomic_sub(mini_count, &ap->cur_mini_bufs);
2067
2068 out:
2069 /*
2070 * According to the documentation RxRetCsm is obsolete with
2071 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2072 */
2073 if (ACE_IS_TIGON_I(ap)) {
2074 writel(idx, &ap->regs->RxRetCsm);
2075 }
2076 ap->cur_rx = idx;
2077
2078 return;
2079 error:
2080 idx = rxretprd;
2081 goto out;
2082}
2083
2084
2085static inline void ace_tx_int(struct net_device *dev,
2086 u32 txcsm, u32 idx)
2087{
2088 struct ace_private *ap = netdev_priv(dev);
2089
2090 do {
2091 struct sk_buff *skb;
2092 dma_addr_t mapping;
2093 struct tx_ring_info *info;
2094
2095 info = ap->skb->tx_skbuff + idx;
2096 skb = info->skb;
2097 mapping = pci_unmap_addr(info, mapping);
2098
2099 if (mapping) {
2100 pci_unmap_page(ap->pdev, mapping,
2101 pci_unmap_len(info, maplen),
2102 PCI_DMA_TODEVICE);
2103 pci_unmap_addr_set(info, mapping, 0);
2104 }
2105
2106 if (skb) {
2107 ap->stats.tx_packets++;
2108 ap->stats.tx_bytes += skb->len;
2109 dev_kfree_skb_irq(skb);
2110 info->skb = NULL;
2111 }
2112
2113 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2114 } while (idx != txcsm);
2115
2116 if (netif_queue_stopped(dev))
2117 netif_wake_queue(dev);
2118
2119 wmb();
2120 ap->tx_ret_csm = txcsm;
2121
2122 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2123 *
2124 * We could try to make it before. In this case we would get
2125 * the following race condition: hard_start_xmit on other cpu
2126 * enters after we advanced tx_ret_csm and fills space,
2127 * which we have just freed, so that we make illegal device wakeup.
2128 * There is no good way to workaround this (at entry
2129 * to ace_start_xmit detects this condition and prevents
2130 * ring corruption, but it is not a good workaround.)
2131 *
2132 * When tx_ret_csm is advanced after, we wake up device _only_
2133 * if we really have some space in ring (though the core doing
2134 * hard_start_xmit can see full ring for some period and has to
2135 * synchronize.) Superb.
2136 * BUT! We get another subtle race condition. hard_start_xmit
2137 * may think that ring is full between wakeup and advancing
2138 * tx_ret_csm and will stop device instantly! It is not so bad.
2139 * We are guaranteed that there is something in ring, so that
2140 * the next irq will resume transmission. To speedup this we could
2141 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2142 * (see ace_start_xmit).
2143 *
2144 * Well, this dilemma exists in all lock-free devices.
2145 * We, following scheme used in drivers by Donald Becker,
2146 * select the least dangerous.
2147 * --ANK
2148 */
2149}
2150
2151
2152static irqreturn_t ace_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
2153{
2154 struct net_device *dev = (struct net_device *)dev_id;
2155 struct ace_private *ap = netdev_priv(dev);
2156 struct ace_regs __iomem *regs = ap->regs;
2157 u32 idx;
2158 u32 txcsm, rxretcsm, rxretprd;
2159 u32 evtcsm, evtprd;
2160
2161 /*
2162 * In case of PCI shared interrupts or spurious interrupts,
2163 * we want to make sure it is actually our interrupt before
2164 * spending any time in here.
2165 */
2166 if (!(readl(&regs->HostCtrl) & IN_INT))
2167 return IRQ_NONE;
2168
2169 /*
2170 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2171 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2172 * writel(0, &regs->Mb0Lo).
2173 *
2174 * "IRQ avoidance" recommended in docs applies to IRQs served
2175 * threads and it is wrong even for that case.
2176 */
2177 writel(0, &regs->Mb0Lo);
2178 readl(&regs->Mb0Lo);
2179
2180 /*
2181 * There is no conflict between transmit handling in
2182 * start_xmit and receive processing, thus there is no reason
2183 * to take a spin lock for RX handling. Wait until we start
2184 * working on the other stuff - hey we don't need a spin lock
2185 * anymore.
2186 */
2187 rxretprd = *ap->rx_ret_prd;
2188 rxretcsm = ap->cur_rx;
2189
2190 if (rxretprd != rxretcsm)
2191 ace_rx_int(dev, rxretprd, rxretcsm);
2192
2193 txcsm = *ap->tx_csm;
2194 idx = ap->tx_ret_csm;
2195
2196 if (txcsm != idx) {
2197 /*
2198 * If each skb takes only one descriptor this check degenerates
2199 * to identity, because new space has just been opened.
2200 * But if skbs are fragmented we must check that this index
2201 * update releases enough of space, otherwise we just
2202 * wait for device to make more work.
2203 */
2204 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2205 ace_tx_int(dev, txcsm, idx);
2206 }
2207
2208 evtcsm = readl(&regs->EvtCsm);
2209 evtprd = *ap->evt_prd;
2210
2211 if (evtcsm != evtprd) {
2212 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2213 writel(evtcsm, &regs->EvtCsm);
2214 }
2215
2216 /*
2217 * This has to go last in the interrupt handler and run with
2218 * the spin lock released ... what lock?
2219 */
2220 if (netif_running(dev)) {
2221 int cur_size;
2222 int run_tasklet = 0;
2223
2224 cur_size = atomic_read(&ap->cur_rx_bufs);
2225 if (cur_size < RX_LOW_STD_THRES) {
2226 if ((cur_size < RX_PANIC_STD_THRES) &&
2227 !test_and_set_bit(0, &ap->std_refill_busy)) {
2228#ifdef DEBUG
2229 printk("low on std buffers %i\n", cur_size);
2230#endif
2231 ace_load_std_rx_ring(ap,
2232 RX_RING_SIZE - cur_size);
2233 } else
2234 run_tasklet = 1;
2235 }
2236
2237 if (!ACE_IS_TIGON_I(ap)) {
2238 cur_size = atomic_read(&ap->cur_mini_bufs);
2239 if (cur_size < RX_LOW_MINI_THRES) {
2240 if ((cur_size < RX_PANIC_MINI_THRES) &&
2241 !test_and_set_bit(0,
2242 &ap->mini_refill_busy)) {
2243#ifdef DEBUG
2244 printk("low on mini buffers %i\n",
2245 cur_size);
2246#endif
2247 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2248 } else
2249 run_tasklet = 1;
2250 }
2251 }
2252
2253 if (ap->jumbo) {
2254 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2255 if (cur_size < RX_LOW_JUMBO_THRES) {
2256 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2257 !test_and_set_bit(0,
2258 &ap->jumbo_refill_busy)){
2259#ifdef DEBUG
2260 printk("low on jumbo buffers %i\n",
2261 cur_size);
2262#endif
2263 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2264 } else
2265 run_tasklet = 1;
2266 }
2267 }
2268 if (run_tasklet && !ap->tasklet_pending) {
2269 ap->tasklet_pending = 1;
2270 tasklet_schedule(&ap->ace_tasklet);
2271 }
2272 }
2273
2274 return IRQ_HANDLED;
2275}
2276
2277
2278#if ACENIC_DO_VLAN
2279static void ace_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2280{
2281 struct ace_private *ap = netdev_priv(dev);
2282 unsigned long flags;
2283
2284 local_irq_save(flags);
2285 ace_mask_irq(dev);
2286
2287 ap->vlgrp = grp;
2288
2289 ace_unmask_irq(dev);
2290 local_irq_restore(flags);
2291}
2292
2293
2294static void ace_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
2295{
2296 struct ace_private *ap = netdev_priv(dev);
2297 unsigned long flags;
2298
2299 local_irq_save(flags);
2300 ace_mask_irq(dev);
2301
2302 if (ap->vlgrp)
2303 ap->vlgrp->vlan_devices[vid] = NULL;
2304
2305 ace_unmask_irq(dev);
2306 local_irq_restore(flags);
2307}
2308#endif /* ACENIC_DO_VLAN */
2309
2310
2311static int ace_open(struct net_device *dev)
2312{
2313 struct ace_private *ap = netdev_priv(dev);
2314 struct ace_regs __iomem *regs = ap->regs;
2315 struct cmd cmd;
2316
2317 if (!(ap->fw_running)) {
2318 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2319 return -EBUSY;
2320 }
2321
2322 writel(dev->mtu + ETH_HLEN + 4, &regs->IfMtu);
2323
2324 cmd.evt = C_CLEAR_STATS;
2325 cmd.code = 0;
2326 cmd.idx = 0;
2327 ace_issue_cmd(regs, &cmd);
2328
2329 cmd.evt = C_HOST_STATE;
2330 cmd.code = C_C_STACK_UP;
2331 cmd.idx = 0;
2332 ace_issue_cmd(regs, &cmd);
2333
2334 if (ap->jumbo &&
2335 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2336 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2337
2338 if (dev->flags & IFF_PROMISC) {
2339 cmd.evt = C_SET_PROMISC_MODE;
2340 cmd.code = C_C_PROMISC_ENABLE;
2341 cmd.idx = 0;
2342 ace_issue_cmd(regs, &cmd);
2343
2344 ap->promisc = 1;
2345 }else
2346 ap->promisc = 0;
2347 ap->mcast_all = 0;
2348
2349#if 0
2350 cmd.evt = C_LNK_NEGOTIATION;
2351 cmd.code = 0;
2352 cmd.idx = 0;
2353 ace_issue_cmd(regs, &cmd);
2354#endif
2355
2356 netif_start_queue(dev);
2357
2358 /*
2359 * Setup the bottom half rx ring refill handler
2360 */
2361 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2362 return 0;
2363}
2364
2365
2366static int ace_close(struct net_device *dev)
2367{
2368 struct ace_private *ap = netdev_priv(dev);
2369 struct ace_regs __iomem *regs = ap->regs;
2370 struct cmd cmd;
2371 unsigned long flags;
2372 short i;
2373
2374 /*
2375 * Without (or before) releasing irq and stopping hardware, this
2376 * is an absolute non-sense, by the way. It will be reset instantly
2377 * by the first irq.
2378 */
2379 netif_stop_queue(dev);
2380
2381
2382 if (ap->promisc) {
2383 cmd.evt = C_SET_PROMISC_MODE;
2384 cmd.code = C_C_PROMISC_DISABLE;
2385 cmd.idx = 0;
2386 ace_issue_cmd(regs, &cmd);
2387 ap->promisc = 0;
2388 }
2389
2390 cmd.evt = C_HOST_STATE;
2391 cmd.code = C_C_STACK_DOWN;
2392 cmd.idx = 0;
2393 ace_issue_cmd(regs, &cmd);
2394
2395 tasklet_kill(&ap->ace_tasklet);
2396
2397 /*
2398 * Make sure one CPU is not processing packets while
2399 * buffers are being released by another.
2400 */
2401
2402 local_irq_save(flags);
2403 ace_mask_irq(dev);
2404
2405 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2406 struct sk_buff *skb;
2407 dma_addr_t mapping;
2408 struct tx_ring_info *info;
2409
2410 info = ap->skb->tx_skbuff + i;
2411 skb = info->skb;
2412 mapping = pci_unmap_addr(info, mapping);
2413
2414 if (mapping) {
2415 if (ACE_IS_TIGON_I(ap)) {
2416 struct tx_desc __iomem *tx
2417 = (struct tx_desc __iomem *) &ap->tx_ring[i];
2418 writel(0, &tx->addr.addrhi);
2419 writel(0, &tx->addr.addrlo);
2420 writel(0, &tx->flagsize);
2421 } else
2422 memset(ap->tx_ring + i, 0,
2423 sizeof(struct tx_desc));
2424 pci_unmap_page(ap->pdev, mapping,
2425 pci_unmap_len(info, maplen),
2426 PCI_DMA_TODEVICE);
2427 pci_unmap_addr_set(info, mapping, 0);
2428 }
2429 if (skb) {
2430 dev_kfree_skb(skb);
2431 info->skb = NULL;
2432 }
2433 }
2434
2435 if (ap->jumbo) {
2436 cmd.evt = C_RESET_JUMBO_RNG;
2437 cmd.code = 0;
2438 cmd.idx = 0;
2439 ace_issue_cmd(regs, &cmd);
2440 }
2441
2442 ace_unmask_irq(dev);
2443 local_irq_restore(flags);
2444
2445 return 0;
2446}
2447
2448
2449static inline dma_addr_t
2450ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2451 struct sk_buff *tail, u32 idx)
2452{
2453 dma_addr_t mapping;
2454 struct tx_ring_info *info;
2455
2456 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2457 offset_in_page(skb->data),
2458 skb->len, PCI_DMA_TODEVICE);
2459
2460 info = ap->skb->tx_skbuff + idx;
2461 info->skb = tail;
2462 pci_unmap_addr_set(info, mapping, mapping);
2463 pci_unmap_len_set(info, maplen, skb->len);
2464 return mapping;
2465}
2466
2467
2468static inline void
2469ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2470 u32 flagsize, u32 vlan_tag)
2471{
2472#if !USE_TX_COAL_NOW
2473 flagsize &= ~BD_FLG_COAL_NOW;
2474#endif
2475
2476 if (ACE_IS_TIGON_I(ap)) {
2477 struct tx_desc __iomem *io = (struct tx_desc __iomem *) desc;
2478 writel(addr >> 32, &io->addr.addrhi);
2479 writel(addr & 0xffffffff, &io->addr.addrlo);
2480 writel(flagsize, &io->flagsize);
2481#if ACENIC_DO_VLAN
2482 writel(vlan_tag, &io->vlanres);
2483#endif
2484 } else {
2485 desc->addr.addrhi = addr >> 32;
2486 desc->addr.addrlo = addr;
2487 desc->flagsize = flagsize;
2488#if ACENIC_DO_VLAN
2489 desc->vlanres = vlan_tag;
2490#endif
2491 }
2492}
2493
2494
2495static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2496{
2497 struct ace_private *ap = netdev_priv(dev);
2498 struct ace_regs __iomem *regs = ap->regs;
2499 struct tx_desc *desc;
2500 u32 idx, flagsize;
2501 unsigned long maxjiff = jiffies + 3*HZ;
2502
2503restart:
2504 idx = ap->tx_prd;
2505
2506 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2507 goto overflow;
2508
2509 if (!skb_shinfo(skb)->nr_frags) {
2510 dma_addr_t mapping;
2511 u32 vlan_tag = 0;
2512
2513 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2514 flagsize = (skb->len << 16) | (BD_FLG_END);
2515 if (skb->ip_summed == CHECKSUM_HW)
2516 flagsize |= BD_FLG_TCP_UDP_SUM;
2517#if ACENIC_DO_VLAN
2518 if (vlan_tx_tag_present(skb)) {
2519 flagsize |= BD_FLG_VLAN_TAG;
2520 vlan_tag = vlan_tx_tag_get(skb);
2521 }
2522#endif
2523 desc = ap->tx_ring + idx;
2524 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2525
2526 /* Look at ace_tx_int for explanations. */
2527 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2528 flagsize |= BD_FLG_COAL_NOW;
2529
2530 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2531 } else {
2532 dma_addr_t mapping;
2533 u32 vlan_tag = 0;
2534 int i, len = 0;
2535
2536 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2537 flagsize = (skb_headlen(skb) << 16);
2538 if (skb->ip_summed == CHECKSUM_HW)
2539 flagsize |= BD_FLG_TCP_UDP_SUM;
2540#if ACENIC_DO_VLAN
2541 if (vlan_tx_tag_present(skb)) {
2542 flagsize |= BD_FLG_VLAN_TAG;
2543 vlan_tag = vlan_tx_tag_get(skb);
2544 }
2545#endif
2546
2547 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2548
2549 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2550
2551 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2552 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2553 struct tx_ring_info *info;
2554
2555 len += frag->size;
2556 info = ap->skb->tx_skbuff + idx;
2557 desc = ap->tx_ring + idx;
2558
2559 mapping = pci_map_page(ap->pdev, frag->page,
2560 frag->page_offset, frag->size,
2561 PCI_DMA_TODEVICE);
2562
2563 flagsize = (frag->size << 16);
2564 if (skb->ip_summed == CHECKSUM_HW)
2565 flagsize |= BD_FLG_TCP_UDP_SUM;
2566 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2567
2568 if (i == skb_shinfo(skb)->nr_frags - 1) {
2569 flagsize |= BD_FLG_END;
2570 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2571 flagsize |= BD_FLG_COAL_NOW;
2572
2573 /*
2574 * Only the last fragment frees
2575 * the skb!
2576 */
2577 info->skb = skb;
2578 } else {
2579 info->skb = NULL;
2580 }
2581 pci_unmap_addr_set(info, mapping, mapping);
2582 pci_unmap_len_set(info, maplen, frag->size);
2583 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2584 }
2585 }
2586
2587 wmb();
2588 ap->tx_prd = idx;
2589 ace_set_txprd(regs, ap, idx);
2590
2591 if (flagsize & BD_FLG_COAL_NOW) {
2592 netif_stop_queue(dev);
2593
2594 /*
2595 * A TX-descriptor producer (an IRQ) might have gotten
2596 * inbetween, making the ring free again. Since xmit is
2597 * serialized, this is the only situation we have to
2598 * re-test.
2599 */
2600 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2601 netif_wake_queue(dev);
2602 }
2603
2604 dev->trans_start = jiffies;
2605 return NETDEV_TX_OK;
2606
2607overflow:
2608 /*
2609 * This race condition is unavoidable with lock-free drivers.
2610 * We wake up the queue _before_ tx_prd is advanced, so that we can
2611 * enter hard_start_xmit too early, while tx ring still looks closed.
2612 * This happens ~1-4 times per 100000 packets, so that we can allow
2613 * to loop syncing to other CPU. Probably, we need an additional
2614 * wmb() in ace_tx_intr as well.
2615 *
2616 * Note that this race is relieved by reserving one more entry
2617 * in tx ring than it is necessary (see original non-SG driver).
2618 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2619 * is already overkill.
2620 *
2621 * Alternative is to return with 1 not throttling queue. In this
2622 * case loop becomes longer, no more useful effects.
2623 */
2624 if (time_before(jiffies, maxjiff)) {
2625 barrier();
2626 cpu_relax();
2627 goto restart;
2628 }
2629
2630 /* The ring is stuck full. */
2631 printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2632 return NETDEV_TX_BUSY;
2633}
2634
2635
2636static int ace_change_mtu(struct net_device *dev, int new_mtu)
2637{
2638 struct ace_private *ap = netdev_priv(dev);
2639 struct ace_regs __iomem *regs = ap->regs;
2640
2641 if (new_mtu > ACE_JUMBO_MTU)
2642 return -EINVAL;
2643
2644 writel(new_mtu + ETH_HLEN + 4, &regs->IfMtu);
2645 dev->mtu = new_mtu;
2646
2647 if (new_mtu > ACE_STD_MTU) {
2648 if (!(ap->jumbo)) {
2649 printk(KERN_INFO "%s: Enabling Jumbo frame "
2650 "support\n", dev->name);
2651 ap->jumbo = 1;
2652 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2653 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2654 ace_set_rxtx_parms(dev, 1);
2655 }
2656 } else {
2657 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2658 ace_sync_irq(dev->irq);
2659 ace_set_rxtx_parms(dev, 0);
2660 if (ap->jumbo) {
2661 struct cmd cmd;
2662
2663 cmd.evt = C_RESET_JUMBO_RNG;
2664 cmd.code = 0;
2665 cmd.idx = 0;
2666 ace_issue_cmd(regs, &cmd);
2667 }
2668 }
2669
2670 return 0;
2671}
2672
2673static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2674{
2675 struct ace_private *ap = netdev_priv(dev);
2676 struct ace_regs __iomem *regs = ap->regs;
2677 u32 link;
2678
2679 memset(ecmd, 0, sizeof(struct ethtool_cmd));
2680 ecmd->supported =
2681 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2682 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2683 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2684 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2685
2686 ecmd->port = PORT_FIBRE;
2687 ecmd->transceiver = XCVR_INTERNAL;
2688
2689 link = readl(&regs->GigLnkState);
2690 if (link & LNK_1000MB)
2691 ecmd->speed = SPEED_1000;
2692 else {
2693 link = readl(&regs->FastLnkState);
2694 if (link & LNK_100MB)
2695 ecmd->speed = SPEED_100;
2696 else if (link & LNK_10MB)
2697 ecmd->speed = SPEED_10;
2698 else
2699 ecmd->speed = 0;
2700 }
2701 if (link & LNK_FULL_DUPLEX)
2702 ecmd->duplex = DUPLEX_FULL;
2703 else
2704 ecmd->duplex = DUPLEX_HALF;
2705
2706 if (link & LNK_NEGOTIATE)
2707 ecmd->autoneg = AUTONEG_ENABLE;
2708 else
2709 ecmd->autoneg = AUTONEG_DISABLE;
2710
2711#if 0
2712 /*
2713 * Current struct ethtool_cmd is insufficient
2714 */
2715 ecmd->trace = readl(&regs->TuneTrace);
2716
2717 ecmd->txcoal = readl(&regs->TuneTxCoalTicks);
2718 ecmd->rxcoal = readl(&regs->TuneRxCoalTicks);
2719#endif
2720 ecmd->maxtxpkt = readl(&regs->TuneMaxTxDesc);
2721 ecmd->maxrxpkt = readl(&regs->TuneMaxRxDesc);
2722
2723 return 0;
2724}
2725
2726static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2727{
2728 struct ace_private *ap = netdev_priv(dev);
2729 struct ace_regs __iomem *regs = ap->regs;
2730 u32 link, speed;
2731
2732 link = readl(&regs->GigLnkState);
2733 if (link & LNK_1000MB)
2734 speed = SPEED_1000;
2735 else {
2736 link = readl(&regs->FastLnkState);
2737 if (link & LNK_100MB)
2738 speed = SPEED_100;
2739 else if (link & LNK_10MB)
2740 speed = SPEED_10;
2741 else
2742 speed = SPEED_100;
2743 }
2744
2745 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2746 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2747 if (!ACE_IS_TIGON_I(ap))
2748 link |= LNK_TX_FLOW_CTL_Y;
2749 if (ecmd->autoneg == AUTONEG_ENABLE)
2750 link |= LNK_NEGOTIATE;
2751 if (ecmd->speed != speed) {
2752 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2753 switch (speed) {
2754 case SPEED_1000:
2755 link |= LNK_1000MB;
2756 break;
2757 case SPEED_100:
2758 link |= LNK_100MB;
2759 break;
2760 case SPEED_10:
2761 link |= LNK_10MB;
2762 break;
2763 }
2764 }
2765
2766 if (ecmd->duplex == DUPLEX_FULL)
2767 link |= LNK_FULL_DUPLEX;
2768
2769 if (link != ap->link) {
2770 struct cmd cmd;
2771 printk(KERN_INFO "%s: Renegotiating link state\n",
2772 dev->name);
2773
2774 ap->link = link;
2775 writel(link, &regs->TuneLink);
2776 if (!ACE_IS_TIGON_I(ap))
2777 writel(link, &regs->TuneFastLink);
2778 wmb();
2779
2780 cmd.evt = C_LNK_NEGOTIATION;
2781 cmd.code = 0;
2782 cmd.idx = 0;
2783 ace_issue_cmd(regs, &cmd);
2784 }
2785 return 0;
2786}
2787
2788static void ace_get_drvinfo(struct net_device *dev,
2789 struct ethtool_drvinfo *info)
2790{
2791 struct ace_private *ap = netdev_priv(dev);
2792
2793 strlcpy(info->driver, "acenic", sizeof(info->driver));
2794 snprintf(info->version, sizeof(info->version), "%i.%i.%i",
2795 tigonFwReleaseMajor, tigonFwReleaseMinor,
2796 tigonFwReleaseFix);
2797
2798 if (ap->pdev)
2799 strlcpy(info->bus_info, pci_name(ap->pdev),
2800 sizeof(info->bus_info));
2801
2802}
2803
2804/*
2805 * Set the hardware MAC address.
2806 */
2807static int ace_set_mac_addr(struct net_device *dev, void *p)
2808{
2809 struct ace_private *ap = netdev_priv(dev);
2810 struct ace_regs __iomem *regs = ap->regs;
2811 struct sockaddr *addr=p;
2812 u8 *da;
2813 struct cmd cmd;
2814
2815 if(netif_running(dev))
2816 return -EBUSY;
2817
2818 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2819
2820 da = (u8 *)dev->dev_addr;
2821
2822 writel(da[0] << 8 | da[1], &regs->MacAddrHi);
2823 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2824 &regs->MacAddrLo);
2825
2826 cmd.evt = C_SET_MAC_ADDR;
2827 cmd.code = 0;
2828 cmd.idx = 0;
2829 ace_issue_cmd(regs, &cmd);
2830
2831 return 0;
2832}
2833
2834
2835static void ace_set_multicast_list(struct net_device *dev)
2836{
2837 struct ace_private *ap = netdev_priv(dev);
2838 struct ace_regs __iomem *regs = ap->regs;
2839 struct cmd cmd;
2840
2841 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2842 cmd.evt = C_SET_MULTICAST_MODE;
2843 cmd.code = C_C_MCAST_ENABLE;
2844 cmd.idx = 0;
2845 ace_issue_cmd(regs, &cmd);
2846 ap->mcast_all = 1;
2847 } else if (ap->mcast_all) {
2848 cmd.evt = C_SET_MULTICAST_MODE;
2849 cmd.code = C_C_MCAST_DISABLE;
2850 cmd.idx = 0;
2851 ace_issue_cmd(regs, &cmd);
2852 ap->mcast_all = 0;
2853 }
2854
2855 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2856 cmd.evt = C_SET_PROMISC_MODE;
2857 cmd.code = C_C_PROMISC_ENABLE;
2858 cmd.idx = 0;
2859 ace_issue_cmd(regs, &cmd);
2860 ap->promisc = 1;
2861 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2862 cmd.evt = C_SET_PROMISC_MODE;
2863 cmd.code = C_C_PROMISC_DISABLE;
2864 cmd.idx = 0;
2865 ace_issue_cmd(regs, &cmd);
2866 ap->promisc = 0;
2867 }
2868
2869 /*
2870 * For the time being multicast relies on the upper layers
2871 * filtering it properly. The Firmware does not allow one to
2872 * set the entire multicast list at a time and keeping track of
2873 * it here is going to be messy.
2874 */
2875 if ((dev->mc_count) && !(ap->mcast_all)) {
2876 cmd.evt = C_SET_MULTICAST_MODE;
2877 cmd.code = C_C_MCAST_ENABLE;
2878 cmd.idx = 0;
2879 ace_issue_cmd(regs, &cmd);
2880 }else if (!ap->mcast_all) {
2881 cmd.evt = C_SET_MULTICAST_MODE;
2882 cmd.code = C_C_MCAST_DISABLE;
2883 cmd.idx = 0;
2884 ace_issue_cmd(regs, &cmd);
2885 }
2886}
2887
2888
2889static struct net_device_stats *ace_get_stats(struct net_device *dev)
2890{
2891 struct ace_private *ap = netdev_priv(dev);
2892 struct ace_mac_stats __iomem *mac_stats =
2893 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2894
2895 ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2896 ap->stats.multicast = readl(&mac_stats->kept_mc);
2897 ap->stats.collisions = readl(&mac_stats->coll);
2898
2899 return &ap->stats;
2900}
2901
2902
2903static void __devinit ace_copy(struct ace_regs __iomem *regs, void *src,
2904 u32 dest, int size)
2905{
2906 void __iomem *tdest;
2907 u32 *wsrc;
2908 short tsize, i;
2909
2910 if (size <= 0)
2911 return;
2912
2913 while (size > 0) {
2914 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2915 min_t(u32, size, ACE_WINDOW_SIZE));
2916 tdest = (void __iomem *) &regs->Window +
2917 (dest & (ACE_WINDOW_SIZE - 1));
2918 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
2919 /*
2920 * This requires byte swapping on big endian, however
2921 * writel does that for us
2922 */
2923 wsrc = src;
2924 for (i = 0; i < (tsize / 4); i++) {
2925 writel(wsrc[i], tdest + i*4);
2926 }
2927 dest += tsize;
2928 src += tsize;
2929 size -= tsize;
2930 }
2931
2932 return;
2933}
2934
2935
2936static void __devinit ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2937{
2938 void __iomem *tdest;
2939 short tsize = 0, i;
2940
2941 if (size <= 0)
2942 return;
2943
2944 while (size > 0) {
2945 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2946 min_t(u32, size, ACE_WINDOW_SIZE));
2947 tdest = (void __iomem *) &regs->Window +
2948 (dest & (ACE_WINDOW_SIZE - 1));
2949 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
2950
2951 for (i = 0; i < (tsize / 4); i++) {
2952 writel(0, tdest + i*4);
2953 }
2954
2955 dest += tsize;
2956 size -= tsize;
2957 }
2958
2959 return;
2960}
2961
2962
2963/*
2964 * Download the firmware into the SRAM on the NIC
2965 *
2966 * This operation requires the NIC to be halted and is performed with
2967 * interrupts disabled and with the spinlock hold.
2968 */
2969int __devinit ace_load_firmware(struct net_device *dev)
2970{
2971 struct ace_private *ap = netdev_priv(dev);
2972 struct ace_regs __iomem *regs = ap->regs;
2973
2974 if (!(readl(&regs->CpuCtrl) & CPU_HALTED)) {
2975 printk(KERN_ERR "%s: trying to download firmware while the "
2976 "CPU is running!\n", ap->name);
2977 return -EFAULT;
2978 }
2979
2980 /*
2981 * Do not try to clear more than 512KB or we end up seeing
2982 * funny things on NICs with only 512KB SRAM
2983 */
2984 ace_clear(regs, 0x2000, 0x80000-0x2000);
2985 if (ACE_IS_TIGON_I(ap)) {
2986 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
2987 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
2988 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
2989 tigonFwRodataLen);
2990 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
2991 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
2992 }else if (ap->version == 2) {
2993 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
2994 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
2995 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
2996 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
2997 tigon2FwRodataLen);
2998 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
2999 }
3000
3001 return 0;
3002}
3003
3004
3005/*
3006 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
3007 *
3008 * Accessing the EEPROM is `interesting' to say the least - don't read
3009 * this code right after dinner.
3010 *
3011 * This is all about black magic and bit-banging the device .... I
3012 * wonder in what hospital they have put the guy who designed the i2c
3013 * specs.
3014 *
3015 * Oh yes, this is only the beginning!
3016 *
3017 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
3018 * code i2c readout code by beta testing all my hacks.
3019 */
3020static void __devinit eeprom_start(struct ace_regs __iomem *regs)
3021{
3022 u32 local;
3023
3024 readl(&regs->LocalCtrl);
3025 udelay(ACE_SHORT_DELAY);
3026 local = readl(&regs->LocalCtrl);
3027 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
3028 writel(local, &regs->LocalCtrl);
3029 readl(&regs->LocalCtrl);
3030 mb();
3031 udelay(ACE_SHORT_DELAY);
3032 local |= EEPROM_CLK_OUT;
3033 writel(local, &regs->LocalCtrl);
3034 readl(&regs->LocalCtrl);
3035 mb();
3036 udelay(ACE_SHORT_DELAY);
3037 local &= ~EEPROM_DATA_OUT;
3038 writel(local, &regs->LocalCtrl);
3039 readl(&regs->LocalCtrl);
3040 mb();
3041 udelay(ACE_SHORT_DELAY);
3042 local &= ~EEPROM_CLK_OUT;
3043 writel(local, &regs->LocalCtrl);
3044 readl(&regs->LocalCtrl);
3045 mb();
3046}
3047
3048
3049static void __devinit eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
3050{
3051 short i;
3052 u32 local;
3053
3054 udelay(ACE_SHORT_DELAY);
3055 local = readl(&regs->LocalCtrl);
3056 local &= ~EEPROM_DATA_OUT;
3057 local |= EEPROM_WRITE_ENABLE;
3058 writel(local, &regs->LocalCtrl);
3059 readl(&regs->LocalCtrl);
3060 mb();
3061
3062 for (i = 0; i < 8; i++, magic <<= 1) {
3063 udelay(ACE_SHORT_DELAY);
3064 if (magic & 0x80)
3065 local |= EEPROM_DATA_OUT;
3066 else
3067 local &= ~EEPROM_DATA_OUT;
3068 writel(local, &regs->LocalCtrl);
3069 readl(&regs->LocalCtrl);
3070 mb();
3071
3072 udelay(ACE_SHORT_DELAY);
3073 local |= EEPROM_CLK_OUT;
3074 writel(local, &regs->LocalCtrl);
3075 readl(&regs->LocalCtrl);
3076 mb();
3077 udelay(ACE_SHORT_DELAY);
3078 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3079 writel(local, &regs->LocalCtrl);
3080 readl(&regs->LocalCtrl);
3081 mb();
3082 }
3083}
3084
3085
3086static int __devinit eeprom_check_ack(struct ace_regs __iomem *regs)
3087{
3088 int state;
3089 u32 local;
3090
3091 local = readl(&regs->LocalCtrl);
3092 local &= ~EEPROM_WRITE_ENABLE;
3093 writel(local, &regs->LocalCtrl);
3094 readl(&regs->LocalCtrl);
3095 mb();
3096 udelay(ACE_LONG_DELAY);
3097 local |= EEPROM_CLK_OUT;
3098 writel(local, &regs->LocalCtrl);
3099 readl(&regs->LocalCtrl);
3100 mb();
3101 udelay(ACE_SHORT_DELAY);
3102 /* sample data in middle of high clk */
3103 state = (readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0;
3104 udelay(ACE_SHORT_DELAY);
3105 mb();
3106 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3107 readl(&regs->LocalCtrl);
3108 mb();
3109
3110 return state;
3111}
3112
3113
3114static void __devinit eeprom_stop(struct ace_regs __iomem *regs)
3115{
3116 u32 local;
3117
3118 udelay(ACE_SHORT_DELAY);
3119 local = readl(&regs->LocalCtrl);
3120 local |= EEPROM_WRITE_ENABLE;
3121 writel(local, &regs->LocalCtrl);
3122 readl(&regs->LocalCtrl);
3123 mb();
3124 udelay(ACE_SHORT_DELAY);
3125 local &= ~EEPROM_DATA_OUT;
3126 writel(local, &regs->LocalCtrl);
3127 readl(&regs->LocalCtrl);
3128 mb();
3129 udelay(ACE_SHORT_DELAY);
3130 local |= EEPROM_CLK_OUT;
3131 writel(local, &regs->LocalCtrl);
3132 readl(&regs->LocalCtrl);
3133 mb();
3134 udelay(ACE_SHORT_DELAY);
3135 local |= EEPROM_DATA_OUT;
3136 writel(local, &regs->LocalCtrl);
3137 readl(&regs->LocalCtrl);
3138 mb();
3139 udelay(ACE_LONG_DELAY);
3140 local &= ~EEPROM_CLK_OUT;
3141 writel(local, &regs->LocalCtrl);
3142 mb();
3143}
3144
3145
3146/*
3147 * Read a whole byte from the EEPROM.
3148 */
3149static int __devinit read_eeprom_byte(struct net_device *dev,
3150 unsigned long offset)
3151{
3152 struct ace_private *ap = netdev_priv(dev);
3153 struct ace_regs __iomem *regs = ap->regs;
3154 unsigned long flags;
3155 u32 local;
3156 int result = 0;
3157 short i;
3158
3159 if (!dev) {
3160 printk(KERN_ERR "No device!\n");
3161 result = -ENODEV;
3162 goto out;
3163 }
3164
3165 /*
3166 * Don't take interrupts on this CPU will bit banging
3167 * the %#%#@$ I2C device
3168 */
3169 local_irq_save(flags);
3170
3171 eeprom_start(regs);
3172
3173 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3174 if (eeprom_check_ack(regs)) {
3175 local_irq_restore(flags);
3176 printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3177 result = -EIO;
3178 goto eeprom_read_error;
3179 }
3180
3181 eeprom_prep(regs, (offset >> 8) & 0xff);
3182 if (eeprom_check_ack(regs)) {
3183 local_irq_restore(flags);
3184 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3185 ap->name);
3186 result = -EIO;
3187 goto eeprom_read_error;
3188 }
3189
3190 eeprom_prep(regs, offset & 0xff);
3191 if (eeprom_check_ack(regs)) {
3192 local_irq_restore(flags);
3193 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3194 ap->name);
3195 result = -EIO;
3196 goto eeprom_read_error;
3197 }
3198
3199 eeprom_start(regs);
3200 eeprom_prep(regs, EEPROM_READ_SELECT);
3201 if (eeprom_check_ack(regs)) {
3202 local_irq_restore(flags);
3203 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3204 ap->name);
3205 result = -EIO;
3206 goto eeprom_read_error;
3207 }
3208
3209 for (i = 0; i < 8; i++) {
3210 local = readl(&regs->LocalCtrl);
3211 local &= ~EEPROM_WRITE_ENABLE;
3212 writel(local, &regs->LocalCtrl);
3213 readl(&regs->LocalCtrl);
3214 udelay(ACE_LONG_DELAY);
3215 mb();
3216 local |= EEPROM_CLK_OUT;
3217 writel(local, &regs->LocalCtrl);
3218 readl(&regs->LocalCtrl);
3219 mb();
3220 udelay(ACE_SHORT_DELAY);
3221 /* sample data mid high clk */
3222 result = (result << 1) |
3223 ((readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0);
3224 udelay(ACE_SHORT_DELAY);
3225 mb();
3226 local = readl(&regs->LocalCtrl);
3227 local &= ~EEPROM_CLK_OUT;
3228 writel(local, &regs->LocalCtrl);
3229 readl(&regs->LocalCtrl);
3230 udelay(ACE_SHORT_DELAY);
3231 mb();
3232 if (i == 7) {
3233 local |= EEPROM_WRITE_ENABLE;
3234 writel(local, &regs->LocalCtrl);
3235 readl(&regs->LocalCtrl);
3236 mb();
3237 udelay(ACE_SHORT_DELAY);
3238 }
3239 }
3240
3241 local |= EEPROM_DATA_OUT;
3242 writel(local, &regs->LocalCtrl);
3243 readl(&regs->LocalCtrl);
3244 mb();
3245 udelay(ACE_SHORT_DELAY);
3246 writel(readl(&regs->LocalCtrl) | EEPROM_CLK_OUT, &regs->LocalCtrl);
3247 readl(&regs->LocalCtrl);
3248 udelay(ACE_LONG_DELAY);
3249 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3250 readl(&regs->LocalCtrl);
3251 mb();
3252 udelay(ACE_SHORT_DELAY);
3253 eeprom_stop(regs);
3254
3255 local_irq_restore(flags);
3256 out:
3257 return result;
3258
3259 eeprom_read_error:
3260 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3261 ap->name, offset);
3262 goto out;
3263}
3264
3265
3266/*
3267 * Local variables:
3268 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"
3269 * End:
3270 */
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