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Commit | Line | Data |
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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | config SUPERH |
ea0e1a9a | 3 | def_bool y |
3010a5ea | 4 | select ARCH_HAS_PTE_SPECIAL |
45624ac3 | 5 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
09d8dd93 | 6 | select ARCH_MIGHT_HAVE_PC_PARPORT |
07c75d7a | 7 | select ARCH_NO_COHERENT_DMA_MMAP if !MMU |
560b8c0e | 8 | select HAVE_PATA_PLATFORM |
6d803ba7 | 9 | select CLKDEV_LOOKUP |
ff4c25f2 | 10 | select DMA_DECLARE_COHERENT |
ce816fa8 | 11 | select HAVE_IDE if HAS_IOPORT_MAP |
534cfbee | 12 | select HAVE_MEMBLOCK_NODE_MAP |
adaf7fd2 | 13 | select ARCH_DISCARD_MEMBLOCK |
42d4b839 | 14 | select HAVE_OPROFILE |
d7b01f78 | 15 | select HAVE_ARCH_TRACEHOOK |
cdd6c482 | 16 | select HAVE_PERF_EVENTS |
9b2a60c4 | 17 | select HAVE_DEBUG_BUGVERBOSE |
7563bbf8 | 18 | select ARCH_HAVE_CUSTOM_GPIO_H |
df013ffb | 19 | select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) |
957e3fac | 20 | select ARCH_HAS_GCOV_PROFILE_ALL |
72f0c137 | 21 | select PERF_USE_VMALLOC |
b69ec42b | 22 | select HAVE_DEBUG_KMEMLEAK |
df8ce259 | 23 | select HAVE_KERNEL_GZIP |
fff7fb0b | 24 | select CPU_NO_EFFICIENT_FFS |
07e88e1b PM |
25 | select HAVE_KERNEL_BZIP2 |
26 | select HAVE_KERNEL_LZMA | |
50cfa79d | 27 | select HAVE_KERNEL_XZ |
c7b16efb | 28 | select HAVE_KERNEL_LZO |
af1839eb | 29 | select HAVE_UID16 |
c1d7e01d | 30 | select ARCH_WANT_IPC_PARSE_VERSION |
a74f7e04 | 31 | select HAVE_SYSCALL_TRACEPOINTS |
eaaaeef3 | 32 | select HAVE_REGS_AND_STACK_ACCESS_API |
2ed86b16 | 33 | select MAY_HAVE_SPARSE_IRQ |
ed170924 | 34 | select IRQ_FORCED_THREADING |
6eac1af0 | 35 | select RTC_LIB |
f01789c6 | 36 | select GENERIC_ATOMIC64 |
3d44ae40 | 37 | select GENERIC_IRQ_SHOW |
ea0588cb | 38 | select GENERIC_SMP_IDLE_THREAD |
dc775dd8 | 39 | select GENERIC_IDLE_POLL_SETUP |
8cf200d8 AMG |
40 | select GENERIC_CLOCKEVENTS |
41 | select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST | |
eb01d42a | 42 | select GENERIC_PCI_IOMAP if PCI |
b46ed370 | 43 | select GENERIC_SCHED_CLOCK |
0e100e11 | 44 | select GENERIC_STRNCPY_FROM_USER |
cba8df4b | 45 | select GENERIC_STRNLEN_USER |
786d35d4 DH |
46 | select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER |
47 | select MODULES_USE_ELF_RELA | |
eb01d42a | 48 | select NO_GENERIC_PCI_IOPORT_MAP if PCI |
881e252d | 49 | select OLD_SIGSUSPEND |
0679a858 | 50 | select OLD_SIGACTION |
eb01d42a | 51 | select PCI_DOMAINS if PCI |
7a017721 | 52 | select HAVE_ARCH_AUDITSYSCALL |
72cc564f | 53 | select HAVE_FUTEX_CMPXCHG if FUTEX |
42a0bb3f | 54 | select HAVE_NMI |
86596f0a CH |
55 | select NEED_SG_DMA_LENGTH |
56 | ||
1da177e4 LT |
57 | help |
58 | The SuperH is a RISC processor targeted for use in embedded systems | |
59 | and consumer electronics; it was also used in the Sega Dreamcast | |
60 | gaming console. The SuperH port has a home page at | |
61 | <http://www.linux-sh.org/>. | |
62 | ||
39d28a2d | 63 | config SUPERH32 |
104daea1 | 64 | def_bool "$(ARCH)" = "sh" |
942fa985 | 65 | select ARCH_32BIT_OFF_T |
d39f5450 CS |
66 | select HAVE_KPROBES |
67 | select HAVE_KRETPROBES | |
6d63e73d | 68 | select HAVE_IOREMAP_PROT if MMU && !X2TLB |
694f94f2 | 69 | select HAVE_FUNCTION_TRACER |
fad57feb MF |
70 | select HAVE_FTRACE_MCOUNT_RECORD |
71 | select HAVE_DYNAMIC_FTRACE | |
e4b053d9 | 72 | select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE |
c1d7e01d | 73 | select ARCH_WANT_IPC_PARSE_VERSION |
327933f5 | 74 | select HAVE_FUNCTION_GRAPH_TRACER |
ab6e570b | 75 | select HAVE_ARCH_KGDB |
6fbfe8d7 | 76 | select HAVE_HW_BREAKPOINT |
0102752e | 77 | select HAVE_MIXED_BREAKPOINTS_REGS |
e583d6b3 | 78 | select PERF_EVENTS |
8dafc346 | 79 | select ARCH_HIBERNATION_POSSIBLE if MMU |
57b81330 | 80 | select SPARSE_IRQ |
d148eac0 | 81 | select HAVE_STACKPROTECTOR |
ea0e1a9a PM |
82 | |
83 | config SUPERH64 | |
104daea1 | 84 | def_bool "$(ARCH)" = "sh64" |
5f56a5df | 85 | select HAVE_EXIT_THREAD |
3a898c0f | 86 | select KALLSYMS |
39d28a2d | 87 | |
f42b7e3d PM |
88 | config ARCH_DEFCONFIG |
89 | string | |
90 | default "arch/sh/configs/shx3_defconfig" if SUPERH32 | |
91 | default "arch/sh/configs/cayman_defconfig" if SUPERH64 | |
92 | ||
1da177e4 | 93 | config RWSEM_GENERIC_SPINLOCK |
d7ef4fb3 | 94 | def_bool y |
1da177e4 LT |
95 | |
96 | config RWSEM_XCHGADD_ALGORITHM | |
97 | bool | |
98 | ||
fa691511 PM |
99 | config GENERIC_BUG |
100 | def_bool y | |
a82d53ec | 101 | depends on BUG && SUPERH32 |
fa691511 | 102 | |
3767f3f1 PM |
103 | config GENERIC_CSUM |
104 | def_bool y | |
105 | depends on SUPERH64 | |
106 | ||
e2268c71 | 107 | config GENERIC_HWEIGHT |
d7ef4fb3 | 108 | def_bool y |
e2268c71 | 109 | |
1da177e4 | 110 | config GENERIC_CALIBRATE_DELAY |
cf204fa7 | 111 | bool |
1da177e4 | 112 | |
bdcab87b PM |
113 | config GENERIC_LOCKBREAK |
114 | def_bool y | |
115 | depends on SMP && PREEMPT | |
116 | ||
af998a9a MD |
117 | config ARCH_SUSPEND_POSSIBLE |
118 | def_bool n | |
119 | ||
120 | config ARCH_HIBERNATION_POSSIBLE | |
121 | def_bool n | |
357d5946 | 122 | |
0a9b0db1 PM |
123 | config SYS_SUPPORTS_APM_EMULATION |
124 | bool | |
af998a9a | 125 | select ARCH_SUSPEND_POSSIBLE |
357d5946 | 126 | |
ffb4a73d PM |
127 | config SYS_SUPPORTS_HUGETLBFS |
128 | bool | |
129 | ||
357d5946 PM |
130 | config SYS_SUPPORTS_SMP |
131 | bool | |
132 | ||
133 | config SYS_SUPPORTS_NUMA | |
134 | bool | |
135 | ||
afbfb52e | 136 | config STACKTRACE_SUPPORT |
d7ef4fb3 | 137 | def_bool y |
afbfb52e PM |
138 | |
139 | config LOCKDEP_SUPPORT | |
d7ef4fb3 | 140 | def_bool y |
afbfb52e | 141 | |
f0d1b0b3 | 142 | config ARCH_HAS_ILOG2_U32 |
d7ef4fb3 | 143 | def_bool n |
f0d1b0b3 DH |
144 | |
145 | config ARCH_HAS_ILOG2_U64 | |
d7ef4fb3 | 146 | def_bool n |
f0d1b0b3 | 147 | |
ce816fa8 | 148 | config NO_IOPORT_MAP |
37b7a978 | 149 | def_bool !PCI |
c30b9c43 PM |
150 | depends on !SH_CAYMAN && !SH_SH4202_MICRODEV && !SH_SHMIN && \ |
151 | !SH_HP6XX && !SH_SOLUTION_ENGINE | |
86e4dd5a | 152 | |
e7cc9a73 MD |
153 | config IO_TRAPPED |
154 | bool | |
155 | ||
b7e68d68 PM |
156 | config SWAP_IO_SPACE |
157 | bool | |
158 | ||
01be5d63 PM |
159 | config DMA_COHERENT |
160 | bool | |
161 | ||
162 | config DMA_NONCOHERENT | |
163 | def_bool !DMA_COHERENT | |
6fa1d28e | 164 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
01be5d63 | 165 | |
69543d63 KS |
166 | config PGTABLE_LEVELS |
167 | default 3 if X2TLB | |
168 | default 2 | |
169 | ||
1da177e4 LT |
170 | menu "System type" |
171 | ||
b5f42db0 PM |
172 | # |
173 | # Processor families | |
174 | # | |
175 | config CPU_SH2 | |
176 | bool | |
049d2804 | 177 | select SH_INTC |
b5f42db0 PM |
178 | |
179 | config CPU_SH2A | |
180 | bool | |
181 | select CPU_SH2 | |
e2fcf74f | 182 | select UNCACHED_MAPPING |
b5f42db0 | 183 | |
5a846aba RF |
184 | config CPU_J2 |
185 | bool | |
186 | select CPU_SH2 | |
187 | select OF | |
188 | select OF_EARLY_FLATTREE | |
189 | ||
b5f42db0 PM |
190 | config CPU_SH3 |
191 | bool | |
192 | select CPU_HAS_INTEVT | |
193 | select CPU_HAS_SR_RB | |
049d2804 | 194 | select SH_INTC |
fbfa8934 | 195 | select SYS_SUPPORTS_SH_TMU |
b5f42db0 PM |
196 | |
197 | config CPU_SH4 | |
198 | bool | |
199 | select CPU_HAS_INTEVT | |
200 | select CPU_HAS_SR_RB | |
b5f42db0 | 201 | select CPU_HAS_FPU if !CPU_SH4AL_DSP |
049d2804 | 202 | select SH_INTC |
fbfa8934 | 203 | select SYS_SUPPORTS_SH_TMU |
ffb4a73d | 204 | select SYS_SUPPORTS_HUGETLBFS if MMU |
b5f42db0 PM |
205 | |
206 | config CPU_SH4A | |
207 | bool | |
208 | select CPU_SH4 | |
209 | ||
210 | config CPU_SH4AL_DSP | |
211 | bool | |
212 | select CPU_SH4A | |
213 | select CPU_HAS_DSP | |
214 | ||
ea0e1a9a PM |
215 | config CPU_SH5 |
216 | bool | |
217 | select CPU_HAS_FPU | |
fbfa8934 | 218 | select SYS_SUPPORTS_SH_TMU |
ffb4a73d | 219 | select SYS_SUPPORTS_HUGETLBFS if MMU |
ea0e1a9a | 220 | |
b5f42db0 PM |
221 | config CPU_SHX2 |
222 | bool | |
223 | ||
224 | config CPU_SHX3 | |
225 | bool | |
01be5d63 | 226 | select DMA_COHERENT |
4b478ee2 PM |
227 | select SYS_SUPPORTS_SMP |
228 | select SYS_SUPPORTS_NUMA | |
b5f42db0 | 229 | |
dc65a977 PM |
230 | config ARCH_SHMOBILE |
231 | bool | |
77594912 | 232 | select ARCH_SUSPEND_POSSIBLE |
464ed18e | 233 | select PM |
dc65a977 | 234 | |
86c8c047 MF |
235 | config CPU_HAS_PMU |
236 | depends on CPU_SH4 || CPU_SH4A | |
237 | default y | |
238 | bool | |
239 | ||
3cc000b5 PM |
240 | if SUPERH32 |
241 | ||
b5f42db0 PM |
242 | choice |
243 | prompt "Processor sub-type selection" | |
244 | ||
245 | # | |
246 | # Processor subtypes | |
247 | # | |
248 | ||
249 | # SH-2 Processor Support | |
250 | ||
251 | config CPU_SUBTYPE_SH7619 | |
252 | bool "Support SH7619 processor" | |
253 | select CPU_SH2 | |
fbfa8934 | 254 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 | 255 | |
5a846aba RF |
256 | config CPU_SUBTYPE_J2 |
257 | bool "Support J2 processor" | |
258 | select CPU_J2 | |
b4214e41 RF |
259 | select SYS_SUPPORTS_SMP |
260 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP | |
5a846aba | 261 | |
b5f42db0 PM |
262 | # SH-2A Processor Support |
263 | ||
2825999e PG |
264 | config CPU_SUBTYPE_SH7201 |
265 | bool "Support SH7201 processor" | |
266 | select CPU_SH2A | |
267 | select CPU_HAS_FPU | |
fbfa8934 | 268 | select SYS_SUPPORTS_SH_MTU2 |
2825999e | 269 | |
6d01f510 PM |
270 | config CPU_SUBTYPE_SH7203 |
271 | bool "Support SH7203 processor" | |
272 | select CPU_SH2A | |
74d99a5e | 273 | select CPU_HAS_FPU |
fbfa8934 MD |
274 | select SYS_SUPPORTS_SH_CMT |
275 | select SYS_SUPPORTS_SH_MTU2 | |
b768ecbc | 276 | select PINCTRL |
6d01f510 | 277 | |
b5f42db0 PM |
278 | config CPU_SUBTYPE_SH7206 |
279 | bool "Support SH7206 processor" | |
280 | select CPU_SH2A | |
fbfa8934 MD |
281 | select SYS_SUPPORTS_SH_CMT |
282 | select SYS_SUPPORTS_SH_MTU2 | |
b5f42db0 | 283 | |
a8f67f4b PM |
284 | config CPU_SUBTYPE_SH7263 |
285 | bool "Support SH7263 processor" | |
286 | select CPU_SH2A | |
74d99a5e | 287 | select CPU_HAS_FPU |
fbfa8934 MD |
288 | select SYS_SUPPORTS_SH_CMT |
289 | select SYS_SUPPORTS_SH_MTU2 | |
a8f67f4b | 290 | |
51ce3068 PE |
291 | config CPU_SUBTYPE_SH7264 |
292 | bool "Support SH7264 processor" | |
293 | select CPU_SH2A | |
294 | select CPU_HAS_FPU | |
fbfa8934 MD |
295 | select SYS_SUPPORTS_SH_CMT |
296 | select SYS_SUPPORTS_SH_MTU2 | |
5946e7bb | 297 | select PINCTRL |
51ce3068 | 298 | |
0b25b7c8 PE |
299 | config CPU_SUBTYPE_SH7269 |
300 | bool "Support SH7269 processor" | |
301 | select CPU_SH2A | |
302 | select CPU_HAS_FPU | |
fbfa8934 MD |
303 | select SYS_SUPPORTS_SH_CMT |
304 | select SYS_SUPPORTS_SH_MTU2 | |
fb872fcc | 305 | select PINCTRL |
0b25b7c8 | 306 | |
2ad69908 PM |
307 | config CPU_SUBTYPE_MXG |
308 | bool "Support MX-G processor" | |
309 | select CPU_SH2A | |
fbfa8934 | 310 | select SYS_SUPPORTS_SH_MTU2 |
2ad69908 PM |
311 | help |
312 | Select MX-G if running on an R8A03022BG part. | |
313 | ||
b5f42db0 PM |
314 | # SH-3 Processor Support |
315 | ||
316 | config CPU_SUBTYPE_SH7705 | |
317 | bool "Support SH7705 processor" | |
318 | select CPU_SH3 | |
319 | ||
320 | config CPU_SUBTYPE_SH7706 | |
321 | bool "Support SH7706 processor" | |
322 | select CPU_SH3 | |
323 | help | |
324 | Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. | |
325 | ||
326 | config CPU_SUBTYPE_SH7707 | |
327 | bool "Support SH7707 processor" | |
328 | select CPU_SH3 | |
329 | help | |
330 | Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. | |
331 | ||
332 | config CPU_SUBTYPE_SH7708 | |
333 | bool "Support SH7708 processor" | |
334 | select CPU_SH3 | |
335 | help | |
336 | Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or | |
337 | if you have a 100 Mhz SH-3 HD6417708R CPU. | |
338 | ||
339 | config CPU_SUBTYPE_SH7709 | |
340 | bool "Support SH7709 processor" | |
341 | select CPU_SH3 | |
342 | help | |
343 | Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. | |
344 | ||
345 | config CPU_SUBTYPE_SH7710 | |
346 | bool "Support SH7710 processor" | |
347 | select CPU_SH3 | |
348 | select CPU_HAS_DSP | |
349 | help | |
350 | Select SH7710 if you have a SH3-DSP SH7710 CPU. | |
351 | ||
352 | config CPU_SUBTYPE_SH7712 | |
353 | bool "Support SH7712 processor" | |
354 | select CPU_SH3 | |
355 | select CPU_HAS_DSP | |
356 | help | |
357 | Select SH7712 if you have a SH3-DSP SH7712 CPU. | |
358 | ||
359 | config CPU_SUBTYPE_SH7720 | |
360 | bool "Support SH7720 processor" | |
361 | select CPU_SH3 | |
362 | select CPU_HAS_DSP | |
fbfa8934 | 363 | select SYS_SUPPORTS_SH_CMT |
7b61ca5d | 364 | select USB_OHCI_SH if USB_OHCI_HCD |
85db6bff | 365 | select PINCTRL |
b5f42db0 PM |
366 | help |
367 | Select SH7720 if you have a SH3-DSP SH7720 CPU. | |
368 | ||
31a49c4b YS |
369 | config CPU_SUBTYPE_SH7721 |
370 | bool "Support SH7721 processor" | |
371 | select CPU_SH3 | |
372 | select CPU_HAS_DSP | |
fbfa8934 | 373 | select SYS_SUPPORTS_SH_CMT |
7b61ca5d | 374 | select USB_OHCI_SH if USB_OHCI_HCD |
31a49c4b YS |
375 | help |
376 | Select SH7721 if you have a SH3-DSP SH7721 CPU. | |
377 | ||
b5f42db0 PM |
378 | # SH-4 Processor Support |
379 | ||
380 | config CPU_SUBTYPE_SH7750 | |
381 | bool "Support SH7750 processor" | |
382 | select CPU_SH4 | |
383 | help | |
384 | Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. | |
385 | ||
386 | config CPU_SUBTYPE_SH7091 | |
387 | bool "Support SH7091 processor" | |
388 | select CPU_SH4 | |
389 | help | |
390 | Select SH7091 if you have an SH-4 based Sega device (such as | |
391 | the Dreamcast, Naomi, and Naomi 2). | |
392 | ||
393 | config CPU_SUBTYPE_SH7750R | |
394 | bool "Support SH7750R processor" | |
395 | select CPU_SH4 | |
396 | ||
397 | config CPU_SUBTYPE_SH7750S | |
398 | bool "Support SH7750S processor" | |
399 | select CPU_SH4 | |
400 | ||
401 | config CPU_SUBTYPE_SH7751 | |
402 | bool "Support SH7751 processor" | |
403 | select CPU_SH4 | |
404 | help | |
405 | Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, | |
406 | or if you have a HD6417751R CPU. | |
407 | ||
408 | config CPU_SUBTYPE_SH7751R | |
409 | bool "Support SH7751R processor" | |
410 | select CPU_SH4 | |
411 | ||
412 | config CPU_SUBTYPE_SH7760 | |
413 | bool "Support SH7760 processor" | |
414 | select CPU_SH4 | |
415 | ||
416 | config CPU_SUBTYPE_SH4_202 | |
417 | bool "Support SH4-202 processor" | |
418 | select CPU_SH4 | |
419 | ||
420 | # SH-4A Processor Support | |
421 | ||
178dd0cd PM |
422 | config CPU_SUBTYPE_SH7723 |
423 | bool "Support SH7723 processor" | |
424 | select CPU_SH4A | |
425 | select CPU_SHX2 | |
dc65a977 | 426 | select ARCH_SHMOBILE |
178dd0cd | 427 | select ARCH_SPARSEMEM_ENABLE |
fbfa8934 | 428 | select SYS_SUPPORTS_SH_CMT |
16941a89 | 429 | select PINCTRL |
178dd0cd PM |
430 | help |
431 | Select SH7723 if you have an SH-MobileR2 CPU. | |
432 | ||
0207a2ef KM |
433 | config CPU_SUBTYPE_SH7724 |
434 | bool "Support SH7724 processor" | |
435 | select CPU_SH4A | |
436 | select CPU_SHX2 | |
59fe700d | 437 | select ARCH_SHMOBILE |
0207a2ef | 438 | select ARCH_SPARSEMEM_ENABLE |
fbfa8934 | 439 | select SYS_SUPPORTS_SH_CMT |
18ebd228 | 440 | select PINCTRL |
0207a2ef KM |
441 | help |
442 | Select SH7724 if you have an SH-MobileR2R CPU. | |
443 | ||
fea88a0c NI |
444 | config CPU_SUBTYPE_SH7734 |
445 | bool "Support SH7734 processor" | |
446 | select CPU_SH4A | |
447 | select CPU_SHX2 | |
2c172182 | 448 | select PINCTRL |
fea88a0c NI |
449 | help |
450 | Select SH7734 if you have a SH4A SH7734 CPU. | |
451 | ||
c01f0f1a YS |
452 | config CPU_SUBTYPE_SH7757 |
453 | bool "Support SH7757 processor" | |
454 | select CPU_SH4A | |
455 | select CPU_SHX2 | |
eb61b772 | 456 | select PINCTRL |
c01f0f1a YS |
457 | help |
458 | Select SH7757 if you have a SH4A SH7757 CPU. | |
459 | ||
7d740a06 YS |
460 | config CPU_SUBTYPE_SH7763 |
461 | bool "Support SH7763 processor" | |
462 | select CPU_SH4A | |
7b61ca5d | 463 | select USB_OHCI_SH if USB_OHCI_HCD |
7d740a06 YS |
464 | help |
465 | Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. | |
466 | ||
b5f42db0 PM |
467 | config CPU_SUBTYPE_SH7770 |
468 | bool "Support SH7770 processor" | |
469 | select CPU_SH4A | |
470 | ||
471 | config CPU_SUBTYPE_SH7780 | |
472 | bool "Support SH7780 processor" | |
473 | select CPU_SH4A | |
474 | ||
475 | config CPU_SUBTYPE_SH7785 | |
476 | bool "Support SH7785 processor" | |
477 | select CPU_SH4A | |
478 | select CPU_SHX2 | |
55ba99eb KM |
479 | select ARCH_SPARSEMEM_ENABLE |
480 | select SYS_SUPPORTS_NUMA | |
77bd27b2 | 481 | select PINCTRL |
55ba99eb KM |
482 | |
483 | config CPU_SUBTYPE_SH7786 | |
484 | bool "Support SH7786 processor" | |
485 | select CPU_SH4A | |
37042fbd | 486 | select CPU_SHX3 |
8263a67e | 487 | select CPU_HAS_PTEAEX |
2eb2a436 | 488 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
7b61ca5d | 489 | select USB_OHCI_SH if USB_OHCI_HCD |
7b61ca5d | 490 | select USB_EHCI_SH if USB_EHCI_HCD |
c0fdbff9 | 491 | select PINCTRL |
b5f42db0 PM |
492 | |
493 | config CPU_SUBTYPE_SHX3 | |
494 | bool "Support SH-X3 processor" | |
495 | select CPU_SH4A | |
496 | select CPU_SHX3 | |
5840263e | 497 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
fdcfdfa1 | 498 | select GPIOLIB |
3e347f08 | 499 | select PINCTRL |
b5f42db0 PM |
500 | |
501 | # SH4AL-DSP Processor Support | |
502 | ||
503 | config CPU_SUBTYPE_SH7343 | |
504 | bool "Support SH7343 processor" | |
505 | select CPU_SH4AL_DSP | |
dc65a977 | 506 | select ARCH_SHMOBILE |
fbfa8934 | 507 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 PM |
508 | |
509 | config CPU_SUBTYPE_SH7722 | |
510 | bool "Support SH7722 processor" | |
511 | select CPU_SH4AL_DSP | |
512 | select CPU_SHX2 | |
dc65a977 | 513 | select ARCH_SHMOBILE |
b5f42db0 PM |
514 | select ARCH_SPARSEMEM_ENABLE |
515 | select SYS_SUPPORTS_NUMA | |
fbfa8934 | 516 | select SYS_SUPPORTS_SH_CMT |
ef97c3c1 | 517 | select PINCTRL |
9109a30e MD |
518 | |
519 | config CPU_SUBTYPE_SH7366 | |
520 | bool "Support SH7366 processor" | |
521 | select CPU_SH4AL_DSP | |
522 | select CPU_SHX2 | |
dc65a977 | 523 | select ARCH_SHMOBILE |
9109a30e MD |
524 | select ARCH_SPARSEMEM_ENABLE |
525 | select SYS_SUPPORTS_NUMA | |
fbfa8934 | 526 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 | 527 | |
3cc000b5 PM |
528 | endchoice |
529 | ||
530 | endif | |
531 | ||
532 | if SUPERH64 | |
533 | ||
534 | choice | |
535 | prompt "Processor sub-type selection" | |
536 | ||
ea0e1a9a PM |
537 | # SH-5 Processor Support |
538 | ||
539 | config CPU_SUBTYPE_SH5_101 | |
540 | bool "Support SH5-101 processor" | |
541 | select CPU_SH5 | |
542 | ||
543 | config CPU_SUBTYPE_SH5_103 | |
544 | bool "Support SH5-103 processor" | |
8ef97dd7 | 545 | select CPU_SH5 |
ea0e1a9a | 546 | |
b5f42db0 PM |
547 | endchoice |
548 | ||
3cc000b5 PM |
549 | endif |
550 | ||
f3d22298 | 551 | source "arch/sh/mm/Kconfig" |
939a24a6 | 552 | |
4690bdc7 | 553 | source "arch/sh/Kconfig.cpu" |
f3d22298 | 554 | |
939a24a6 | 555 | source "arch/sh/boards/Kconfig" |
32351a28 | 556 | |
32351a28 PM |
557 | menu "Timer and clock configuration" |
558 | ||
cad82448 PM |
559 | config SH_PCLK_FREQ |
560 | int "Peripheral clock frequency (in Hz)" | |
8152a74b | 561 | depends on SH_CLK_CPG_LEGACY |
9d4436a6 | 562 | default "31250000" if CPU_SUBTYPE_SH7619 |
8152a74b PM |
563 | default "33333333" if CPU_SUBTYPE_SH7770 || \ |
564 | CPU_SUBTYPE_SH7760 || \ | |
565 | CPU_SUBTYPE_SH7705 || \ | |
566 | CPU_SUBTYPE_SH7203 || \ | |
567 | CPU_SUBTYPE_SH7206 || \ | |
568 | CPU_SUBTYPE_SH7263 || \ | |
43a1839c | 569 | CPU_SUBTYPE_MXG |
05627486 | 570 | default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R |
cad82448 | 571 | default "66000000" if CPU_SUBTYPE_SH4_202 |
05627486 | 572 | default "50000000" |
1da177e4 | 573 | help |
cad82448 PM |
574 | This option is used to specify the peripheral clock frequency. |
575 | This is necessary for determining the reference clock value on | |
576 | platforms lacking an RTC. | |
1da177e4 | 577 | |
36aa1e32 PM |
578 | config SH_CLK_CPG |
579 | def_bool y | |
580 | ||
253b0887 | 581 | config SH_CLK_CPG_LEGACY |
36aa1e32 | 582 | depends on SH_CLK_CPG |
43a1839c | 583 | def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ |
51ce3068 | 584 | !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ |
bcb86e0a PM |
585 | !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ |
586 | !CPU_SUBTYPE_SH7269 | |
253b0887 | 587 | |
32351a28 PM |
588 | endmenu |
589 | ||
cad82448 | 590 | menu "CPU Frequency scaling" |
cad82448 | 591 | source "drivers/cpufreq/Kconfig" |
cad82448 PM |
592 | endmenu |
593 | ||
9f5e8eee PM |
594 | source "arch/sh/drivers/Kconfig" |
595 | ||
cad82448 | 596 | endmenu |
1da177e4 | 597 | |
cad82448 PM |
598 | menu "Kernel features" |
599 | ||
8636a1f9 | 600 | source "kernel/Kconfig.hz" |
91b91d01 | 601 | |
cad82448 PM |
602 | config KEXEC |
603 | bool "kexec system call (EXPERIMENTAL)" | |
0d57af1e | 604 | depends on SUPERH32 && MMU |
2965faa5 | 605 | select KEXEC_CORE |
1da177e4 | 606 | help |
cad82448 PM |
607 | kexec is a system call that implements the ability to shutdown your |
608 | current kernel, and to start another kernel. It is like a reboot | |
1f1332f7 | 609 | but it is independent of the system firmware. And like a reboot |
cad82448 PM |
610 | you can start any kernel with it, not just Linux. |
611 | ||
1f1332f7 | 612 | The name comes from the similarity to the exec system call. |
cad82448 PM |
613 | |
614 | It is an ongoing process to be certain the hardware in a machine | |
615 | is properly shutdown, so do not be surprised if this code does not | |
bf220695 GU |
616 | initially work for you. As of this writing the exact hardware |
617 | interface is strongly in flux, so no good recommendation can be | |
618 | made. | |
cad82448 | 619 | |
4d5ade5b PM |
620 | config CRASH_DUMP |
621 | bool "kernel crash dumps (EXPERIMENTAL)" | |
0d57af1e | 622 | depends on SUPERH32 && BROKEN_ON_SMP |
4d5ade5b PM |
623 | help |
624 | Generate crash dump after being started by kexec. | |
625 | This should be normally only set in special crash dump kernels | |
626 | which are loaded in the main kernel with kexec-tools into | |
627 | a specially reserved region and then later executed after | |
628 | a crash by kdump/kexec. The crash dump kernel must be compiled | |
629 | to a memory address not used by the main kernel using | |
e66ac3f2 | 630 | PHYSICAL_START. |
4d5ade5b PM |
631 | |
632 | For more details see Documentation/kdump/kdump.txt | |
633 | ||
b7cf6ddc MD |
634 | config KEXEC_JUMP |
635 | bool "kexec jump (EXPERIMENTAL)" | |
0d57af1e | 636 | depends on SUPERH32 && KEXEC && HIBERNATION |
b7cf6ddc MD |
637 | help |
638 | Jump between original kernel and kexeced kernel and invoke | |
639 | code via KEXEC | |
640 | ||
e66ac3f2 SH |
641 | config PHYSICAL_START |
642 | hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) | |
643 | default MEMORY_START | |
644 | ---help--- | |
645 | This gives the physical address where the kernel is loaded | |
646 | and is ordinarily the same as MEMORY_START. | |
647 | ||
648 | Different values are primarily used in the case of kexec on panic | |
649 | where the fail safe kernel needs to run at a different address | |
650 | than the panic-ed kernel. | |
651 | ||
c4637d47 PM |
652 | config SECCOMP |
653 | bool "Enable seccomp to safely compute untrusted bytecode" | |
654 | depends on PROC_FS | |
c4637d47 PM |
655 | help |
656 | This kernel feature is useful for number crunching applications | |
657 | that may need to compute untrusted bytecode during their | |
658 | execution. By using pipes or other transports made available to | |
659 | the process as file descriptors supporting the read/write | |
660 | syscalls, it's possible to isolate those applications in | |
661 | their own address space using seccomp. Once seccomp is | |
662 | enabled via prctl, it cannot be disabled and the task is only | |
663 | allowed to execute a few safe syscalls defined by each seccomp | |
664 | mode. | |
665 | ||
666 | If unsure, say N. | |
667 | ||
1da177e4 LT |
668 | config SMP |
669 | bool "Symmetric multi-processing support" | |
357d5946 | 670 | depends on SYS_SUPPORTS_SMP |
1da177e4 LT |
671 | ---help--- |
672 | This enables support for systems with more than one CPU. If you have | |
4a474157 RG |
673 | a system with only one CPU, say N. If you have a system with more |
674 | than one CPU, say Y. | |
1da177e4 | 675 | |
4a474157 | 676 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
677 | machines, but will use only one CPU of a multiprocessor machine. If |
678 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 679 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
680 | will run faster if you say N here. |
681 | ||
682 | People using multiprocessor machines who say Y here should also say | |
683 | Y to "Enhanced Real Time Clock Support", below. | |
684 | ||
ecf38679 | 685 | See also <file:Documentation/lockup-watchdogs.txt> and the SMP-HOWTO |
03502faa | 686 | available at <http://www.tldp.org/docs.html#howto>. |
1da177e4 LT |
687 | |
688 | If you don't know what to do here, say N. | |
689 | ||
690 | config NR_CPUS | |
691 | int "Maximum number of CPUs (2-32)" | |
692 | range 2 32 | |
693 | depends on SMP | |
2eb2a436 | 694 | default "4" if CPU_SUBTYPE_SHX3 |
1da177e4 LT |
695 | default "2" |
696 | help | |
697 | This allows you to specify the maximum number of CPUs which this | |
698 | kernel will support. The maximum supported value is 32 and the | |
699 | minimum value which makes sense is 2. | |
700 | ||
701 | This is purely to save memory - each supported CPU adds | |
702 | approximately eight kilobytes to the kernel image. | |
703 | ||
763142d1 PM |
704 | config HOTPLUG_CPU |
705 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
40b31360 | 706 | depends on SMP |
763142d1 PM |
707 | help |
708 | Say Y here to experiment with turning CPUs off and on. CPUs | |
709 | can be controlled through /sys/devices/system/cpu. | |
710 | ||
83662461 PM |
711 | config GUSA |
712 | def_bool y | |
1efe4ce3 | 713 | depends on !SMP && SUPERH32 |
83662461 PM |
714 | help |
715 | This enables support for gUSA (general UserSpace Atomicity). | |
716 | This is the default implementation for both UP and non-ll/sc | |
717 | CPUs, and is used by the libc, amongst others. | |
718 | ||
719 | For additional information, design information can be found | |
720 | in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. | |
721 | ||
722 | This should only be disabled for special cases where alternate | |
723 | atomicity implementations exist. | |
724 | ||
1efe4ce3 SM |
725 | config GUSA_RB |
726 | bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" | |
727 | depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) | |
728 | help | |
729 | Enabling this option will allow the kernel to implement some | |
692105b8 | 730 | atomic operations using a software implementation of load-locked/ |
1efe4ce3 SM |
731 | store-conditional (LLSC). On machines which do not have hardware |
732 | LLSC, this should be more efficient than the other alternative of | |
692105b8 | 733 | disabling interrupts around the atomic sequence. |
1efe4ce3 | 734 | |
86c8c047 MF |
735 | config HW_PERF_EVENTS |
736 | bool "Enable hardware performance counter support for perf events" | |
737 | depends on PERF_EVENTS && CPU_HAS_PMU | |
738 | default y | |
739 | help | |
740 | Enable hardware performance counter support for perf events. If | |
741 | disabled, perf events will use software events only. | |
742 | ||
43b8774d PM |
743 | source "drivers/sh/Kconfig" |
744 | ||
cad82448 | 745 | endmenu |
1da177e4 | 746 | |
cad82448 | 747 | menu "Boot options" |
1da177e4 | 748 | |
190fe191 RF |
749 | config USE_BUILTIN_DTB |
750 | bool "Use builtin DTB" | |
751 | default n | |
752 | depends on SH_DEVICE_TREE | |
753 | help | |
754 | Link a device tree blob for particular hardware into the kernel, | |
755 | suppressing use of the DTB pointer provided by the bootloader. | |
756 | This option should only be used with legacy bootloaders that are | |
757 | not capable of providing a DTB to the kernel, or for experimental | |
758 | hardware without stable device tree bindings. | |
759 | ||
760 | config BUILTIN_DTB_SOURCE | |
761 | string "Source file for builtin DTB" | |
762 | default "" | |
763 | depends on USE_BUILTIN_DTB | |
764 | help | |
765 | Base name (without suffix, relative to arch/sh/boot/dts) for the | |
766 | a DTS file that will be used to produce the DTB linked into the | |
767 | kernel. | |
768 | ||
cad82448 | 769 | config ZERO_PAGE_OFFSET |
b412a49a PM |
770 | hex |
771 | default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ | |
772 | SH_7751_SOLUTION_ENGINE | |
773 | default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 | |
7a847f81 | 774 | default "0x00002000" if PAGE_SIZE_8KB |
cad82448 | 775 | default "0x00001000" |
1da177e4 | 776 | help |
cad82448 | 777 | This sets the default offset of zero page. |
1da177e4 | 778 | |
cad82448 | 779 | config BOOT_LINK_OFFSET |
b412a49a PM |
780 | hex |
781 | default "0x00210000" if SH_SHMIN | |
a2e76c80 | 782 | default "0x00400000" if SH_CAYMAN |
b412a49a PM |
783 | default "0x00810000" if SH_7780_SOLUTION_ENGINE |
784 | default "0x009e0000" if SH_TITAN | |
785 | default "0x01800000" if SH_SDK7780 | |
786 | default "0x02000000" if SH_EDOSK7760 | |
cad82448 PM |
787 | default "0x00800000" |
788 | help | |
789 | This option allows you to set the link address offset of the zImage. | |
790 | This can be useful if you are on a board which has a small amount of | |
791 | memory. | |
1da177e4 | 792 | |
b412a49a PM |
793 | config ENTRY_OFFSET |
794 | hex | |
795 | default "0x00001000" if PAGE_SIZE_4KB | |
796 | default "0x00002000" if PAGE_SIZE_8KB | |
797 | default "0x00004000" if PAGE_SIZE_16KB | |
798 | default "0x00010000" if PAGE_SIZE_64KB | |
799 | default "0x00000000" | |
800 | ||
4705b2e8 MD |
801 | config ROMIMAGE_MMCIF |
802 | bool "Include MMCIF loader in romImage (EXPERIMENTAL)" | |
0d57af1e | 803 | depends on CPU_SUBTYPE_SH7724 |
4705b2e8 MD |
804 | help |
805 | Say Y here to include experimental MMCIF loading code in | |
806 | romImage. With this enabled it is possible to write the romImage | |
807 | kernel image to an MMC card and boot the kernel straight from | |
808 | the reset vector. At reset the processor Mask ROM will load the | |
809 | first part of the romImage which in turn loads the rest the kernel | |
810 | image to RAM using the MMCIF hardware block. | |
811 | ||
d724a9c9 PM |
812 | choice |
813 | prompt "Kernel command line" | |
814 | optional | |
815 | default CMDLINE_OVERWRITE | |
816 | help | |
817 | Setting this option allows the kernel command line arguments | |
818 | to be set. | |
819 | ||
820 | config CMDLINE_OVERWRITE | |
821 | bool "Overwrite bootloader kernel arguments" | |
822 | help | |
823 | Given string will overwrite any arguments passed in by | |
824 | a bootloader. | |
825 | ||
826 | config CMDLINE_EXTEND | |
827 | bool "Extend bootloader kernel arguments" | |
828 | help | |
829 | Given string will be concatenated with arguments passed in | |
830 | by a bootloader. | |
831 | ||
832 | endchoice | |
1da177e4 | 833 | |
cad82448 | 834 | config CMDLINE |
d724a9c9 PM |
835 | string "Kernel command line arguments string" |
836 | depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND | |
cad82448 | 837 | default "console=ttySC1,115200" |
1da177e4 LT |
838 | |
839 | endmenu | |
840 | ||
cad82448 | 841 | menu "Bus options" |
1da177e4 | 842 | |
cad82448 PM |
843 | config SUPERHYWAY |
844 | tristate "SuperHyway Bus support" | |
845 | depends on CPU_SUBTYPE_SH4_202 | |
1da177e4 | 846 | |
17be2d2b | 847 | config MAPLE |
e16038ab PM |
848 | bool "Maple Bus support" |
849 | depends on SH_DREAMCAST | |
850 | help | |
851 | The Maple Bus is SEGA's serial communication bus for peripherals | |
852 | on the Dreamcast. Without this bus support you won't be able to | |
853 | get your Dreamcast keyboard etc to work, so most users | |
854 | probably want to say 'Y' here, unless you are only using the | |
855 | Dreamcast with a serial line terminal or a remote network | |
856 | connection. | |
17be2d2b | 857 | |
1da177e4 LT |
858 | endmenu |
859 | ||
3aa770e7 | 860 | menu "Power management options (EXPERIMENTAL)" |
f4cb5700 | 861 | |
c6f17cb2 MD |
862 | source "kernel/power/Kconfig" |
863 | ||
864 | source "drivers/cpuidle/Kconfig" | |
3aa770e7 | 865 | |
3aa770e7 | 866 | endmenu |