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50acfb2b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
76d2a049 PD |
2 | /* |
3 | * Copyright (C) 2012 Regents of the University of California | |
671f9a3e | 4 | * Copyright (C) 2019 Western Digital Corporation or its affiliates. |
e53d2818 NK |
5 | * Copyright (C) 2020 FORTH-ICS/CARV |
6 | * Nick Kossifidis <[email protected]> | |
76d2a049 PD |
7 | */ |
8 | ||
9 | #include <linux/init.h> | |
10 | #include <linux/mm.h> | |
76d2a049 | 11 | #include <linux/memblock.h> |
57c8a661 | 12 | #include <linux/initrd.h> |
76d2a049 | 13 | #include <linux/swap.h> |
ce3aca04 | 14 | #include <linux/swiotlb.h> |
5ec9c4ff | 15 | #include <linux/sizes.h> |
0651c263 | 16 | #include <linux/of_fdt.h> |
56409750 | 17 | #include <linux/of_reserved_mem.h> |
922b0375 | 18 | #include <linux/libfdt.h> |
d27c3c90 | 19 | #include <linux/set_memory.h> |
da815582 | 20 | #include <linux/dma-map-ops.h> |
e53d2818 | 21 | #include <linux/crash_dump.h> |
8ba1a8b7 | 22 | #include <linux/hugetlb.h> |
39b33072 AG |
23 | #ifdef CONFIG_RELOCATABLE |
24 | #include <linux/elf.h> | |
25 | #endif | |
25abe0db | 26 | #include <linux/kfence.h> |
76d2a049 | 27 | |
f2c17aab | 28 | #include <asm/fixmap.h> |
76d2a049 | 29 | #include <asm/io.h> |
4f0e8eef | 30 | #include <asm/numa.h> |
d2402048 ND |
31 | #include <asm/pgtable.h> |
32 | #include <asm/ptdump.h> | |
33 | #include <asm/sections.h> | |
34 | #include <asm/soc.h> | |
35 | #include <asm/tlbflush.h> | |
76d2a049 | 36 | |
ffaee272 PW |
37 | #include "../kernel/head.h" |
38 | ||
658e2c51 AG |
39 | struct kernel_mapping kernel_map __ro_after_init; |
40 | EXPORT_SYMBOL(kernel_map); | |
41 | #ifdef CONFIG_XIP_KERNEL | |
42 | #define kernel_map (*(struct kernel_mapping *)XIP_FIXUP(&kernel_map)) | |
43 | #endif | |
44 | ||
e8a62cc2 | 45 | #ifdef CONFIG_64BIT |
9195c294 | 46 | u64 satp_mode __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_57 : SATP_MODE_39; |
e8a62cc2 | 47 | #else |
67ff2f26 | 48 | u64 satp_mode __ro_after_init = SATP_MODE_32; |
e8a62cc2 AG |
49 | #endif |
50 | EXPORT_SYMBOL(satp_mode); | |
51 | ||
10128f8b | 52 | #ifdef CONFIG_64BIT |
20aa4954 | 53 | bool pgtable_l4_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL); |
011f09d1 | 54 | bool pgtable_l5_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL); |
e8a62cc2 | 55 | EXPORT_SYMBOL(pgtable_l4_enabled); |
d10efa21 | 56 | EXPORT_SYMBOL(pgtable_l5_enabled); |
10128f8b | 57 | #endif |
e8a62cc2 | 58 | |
6d7f91d9 AG |
59 | phys_addr_t phys_ram_base __ro_after_init; |
60 | EXPORT_SYMBOL(phys_ram_base); | |
61 | ||
387181dc AP |
62 | unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
63 | __page_aligned_bss; | |
64 | EXPORT_SYMBOL(empty_zero_page); | |
65 | ||
d90d45d7 | 66 | extern char _start[]; |
44c92257 VW |
67 | void *_dtb_early_va __initdata; |
68 | uintptr_t _dtb_early_pa __initdata; | |
d90d45d7 | 69 | |
39365395 | 70 | phys_addr_t dma32_phys_limit __initdata; |
da815582 | 71 | |
76d2a049 PD |
72 | static void __init zone_sizes_init(void) |
73 | { | |
5ec9c4ff | 74 | unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, }; |
76d2a049 | 75 | |
d5fad48c | 76 | #ifdef CONFIG_ZONE_DMA32 |
da815582 | 77 | max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit); |
d5fad48c | 78 | #endif |
5ec9c4ff CH |
79 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; |
80 | ||
9691a071 | 81 | free_area_init(max_zone_pfns); |
76d2a049 PD |
82 | } |
83 | ||
8fa3cdff | 84 | #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM) |
26b8f69e AG |
85 | |
86 | #define LOG2_SZ_1K ilog2(SZ_1K) | |
87 | #define LOG2_SZ_1M ilog2(SZ_1M) | |
88 | #define LOG2_SZ_1G ilog2(SZ_1G) | |
89 | #define LOG2_SZ_1T ilog2(SZ_1T) | |
90 | ||
2cc6c4a0 YS |
91 | static inline void print_mlk(char *name, unsigned long b, unsigned long t) |
92 | { | |
93 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t, | |
26b8f69e | 94 | (((t) - (b)) >> LOG2_SZ_1K)); |
2cc6c4a0 YS |
95 | } |
96 | ||
97 | static inline void print_mlm(char *name, unsigned long b, unsigned long t) | |
98 | { | |
99 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t, | |
26b8f69e AG |
100 | (((t) - (b)) >> LOG2_SZ_1M)); |
101 | } | |
102 | ||
103 | static inline void print_mlg(char *name, unsigned long b, unsigned long t) | |
104 | { | |
105 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld GB)\n", name, b, t, | |
106 | (((t) - (b)) >> LOG2_SZ_1G)); | |
107 | } | |
108 | ||
109 | #ifdef CONFIG_64BIT | |
110 | static inline void print_mlt(char *name, unsigned long b, unsigned long t) | |
111 | { | |
112 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld TB)\n", name, b, t, | |
113 | (((t) - (b)) >> LOG2_SZ_1T)); | |
114 | } | |
115 | #else | |
116 | #define print_mlt(n, b, t) do {} while (0) | |
117 | #endif | |
118 | ||
119 | static inline void print_ml(char *name, unsigned long b, unsigned long t) | |
120 | { | |
121 | unsigned long diff = t - b; | |
122 | ||
123 | if (IS_ENABLED(CONFIG_64BIT) && (diff >> LOG2_SZ_1T) >= 10) | |
124 | print_mlt(name, b, t); | |
125 | else if ((diff >> LOG2_SZ_1G) >= 10) | |
126 | print_mlg(name, b, t); | |
127 | else if ((diff >> LOG2_SZ_1M) >= 10) | |
128 | print_mlm(name, b, t); | |
129 | else | |
130 | print_mlk(name, b, t); | |
2cc6c4a0 YS |
131 | } |
132 | ||
1987501b | 133 | static void __init print_vm_layout(void) |
2cc6c4a0 YS |
134 | { |
135 | pr_notice("Virtual kernel memory layout:\n"); | |
26b8f69e AG |
136 | print_ml("fixmap", (unsigned long)FIXADDR_START, |
137 | (unsigned long)FIXADDR_TOP); | |
138 | print_ml("pci io", (unsigned long)PCI_IO_START, | |
139 | (unsigned long)PCI_IO_END); | |
140 | print_ml("vmemmap", (unsigned long)VMEMMAP_START, | |
141 | (unsigned long)VMEMMAP_END); | |
142 | print_ml("vmalloc", (unsigned long)VMALLOC_START, | |
143 | (unsigned long)VMALLOC_END); | |
f9293ad4 XT |
144 | #ifdef CONFIG_64BIT |
145 | print_ml("modules", (unsigned long)MODULES_VADDR, | |
146 | (unsigned long)MODULES_END); | |
147 | #endif | |
26b8f69e AG |
148 | print_ml("lowmem", (unsigned long)PAGE_OFFSET, |
149 | (unsigned long)high_memory); | |
0c34e79e | 150 | if (IS_ENABLED(CONFIG_64BIT)) { |
f7ae0233 | 151 | #ifdef CONFIG_KASAN |
26b8f69e | 152 | print_ml("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END); |
2bfc6cd8 | 153 | #endif |
0c34e79e | 154 | |
39b33072 | 155 | print_ml("kernel", (unsigned long)kernel_map.virt_addr, |
26b8f69e | 156 | (unsigned long)ADDRESS_SPACE_END); |
0c34e79e | 157 | } |
2cc6c4a0 YS |
158 | } |
159 | #else | |
160 | static void print_vm_layout(void) { } | |
161 | #endif /* CONFIG_DEBUG_VM */ | |
162 | ||
76d2a049 PD |
163 | void __init mem_init(void) |
164 | { | |
165 | #ifdef CONFIG_FLATMEM | |
166 | BUG_ON(!mem_map); | |
167 | #endif /* CONFIG_FLATMEM */ | |
168 | ||
c6af2aa9 | 169 | swiotlb_init(max_pfn > PFN_DOWN(dma32_phys_limit), SWIOTLB_VERBOSE); |
c6ffc5ca | 170 | memblock_free_all(); |
76d2a049 | 171 | |
2cc6c4a0 | 172 | print_vm_layout(); |
76d2a049 PD |
173 | } |
174 | ||
f7ae0233 AG |
175 | /* Limit the memory size via mem. */ |
176 | static phys_addr_t memory_limit; | |
66f1e680 FH |
177 | #ifdef CONFIG_XIP_KERNEL |
178 | #define memory_limit (*(phys_addr_t *)XIP_FIXUP(&memory_limit)) | |
179 | #endif /* CONFIG_XIP_KERNEL */ | |
c9811e37 KW |
180 | |
181 | static int __init early_mem(char *p) | |
182 | { | |
183 | u64 size; | |
184 | ||
185 | if (!p) | |
186 | return 1; | |
187 | ||
188 | size = memparse(p, &p) & PAGE_MASK; | |
189 | memory_limit = min_t(u64, size, memory_limit); | |
190 | ||
191 | pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20); | |
192 | ||
193 | return 0; | |
194 | } | |
195 | early_param("mem", early_mem); | |
196 | ||
f842f5ff | 197 | static void __init setup_bootmem(void) |
0651c263 | 198 | { |
ac51e005 | 199 | phys_addr_t vmlinux_end = __pa_symbol(&_end); |
07aabe8f | 200 | phys_addr_t max_mapped_addr; |
fe036db7 | 201 | phys_addr_t phys_ram_end, vmlinux_start; |
0651c263 | 202 | |
fe036db7 JZ |
203 | if (IS_ENABLED(CONFIG_XIP_KERNEL)) |
204 | vmlinux_start = __pa_symbol(&_sdata); | |
205 | else | |
206 | vmlinux_start = __pa_symbol(&_start); | |
44c92257 | 207 | |
c9811e37 | 208 | memblock_enforce_memory_limit(memory_limit); |
0651c263 | 209 | |
8db6f937 GU |
210 | /* |
211 | * Make sure we align the reservation on PMD_SIZE since we will | |
2bfc6cd8 AG |
212 | * map the kernel in the linear mapping as read-only: we do not want |
213 | * any allocation to happen between _end and the next pmd aligned page. | |
214 | */ | |
07aabe8f JZ |
215 | if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_STRICT_KERNEL_RWX)) |
216 | vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK; | |
217 | /* | |
218 | * Reserve from the start of the kernel to the end of the kernel | |
219 | */ | |
8db6f937 | 220 | memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start); |
d90d45d7 | 221 | |
6d7f91d9 | 222 | phys_ram_end = memblock_end_of_DRAM(); |
c3bcc65d AG |
223 | |
224 | /* | |
225 | * Make sure we align the start of the memory on a PMD boundary so that | |
226 | * at worst, we map the linear mapping with PMD mappings. | |
227 | */ | |
fe036db7 | 228 | if (!IS_ENABLED(CONFIG_XIP_KERNEL)) |
c3bcc65d | 229 | phys_ram_base = memblock_start_of_DRAM() & PMD_MASK; |
3335068f AG |
230 | |
231 | /* | |
232 | * In 64-bit, any use of __va/__pa before this point is wrong as we | |
233 | * did not know the start of DRAM before. | |
234 | */ | |
235 | if (IS_ENABLED(CONFIG_64BIT)) | |
236 | kernel_map.va_pa_offset = PAGE_OFFSET - phys_ram_base; | |
237 | ||
abb8e86b AP |
238 | /* |
239 | * memblock allocator is not aware of the fact that last 4K bytes of | |
240 | * the addressable memory can not be mapped because of IS_ERR_VALUE | |
241 | * macro. Make sure that last 4k bytes are not usable by memblock | |
db6b84a3 AG |
242 | * if end of dram is equal to maximum addressable memory. For 64-bit |
243 | * kernel, this problem can't happen here as the end of the virtual | |
244 | * address space is occupied by the kernel mapping then this check must | |
fdf3a7a1 | 245 | * be done as soon as the kernel mapping base address is determined. |
abb8e86b | 246 | */ |
07aabe8f JZ |
247 | if (!IS_ENABLED(CONFIG_64BIT)) { |
248 | max_mapped_addr = __pa(~(ulong)0); | |
249 | if (max_mapped_addr == (phys_ram_end - 1)) | |
250 | memblock_set_current_limit(max_mapped_addr - 4096); | |
251 | } | |
abb8e86b | 252 | |
6d7f91d9 AG |
253 | min_low_pfn = PFN_UP(phys_ram_base); |
254 | max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end); | |
625e24a5 | 255 | high_memory = (void *)(__va(PFN_PHYS(max_low_pfn))); |
f6e5aedf | 256 | |
da815582 | 257 | dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn)); |
336e8eb2 | 258 | set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET); |
0651c263 | 259 | |
aec33b54 | 260 | reserve_initrd_mem(); |
ef69d255 AG |
261 | |
262 | /* | |
263 | * No allocation should be done before reserving the memory as defined | |
264 | * in the device tree, otherwise the allocation could end up in a | |
265 | * reserved region. | |
266 | */ | |
267 | early_init_fdt_scan_reserved_mem(); | |
268 | ||
922b0375 | 269 | /* |
f105aa94 VW |
270 | * If DTB is built in, no need to reserve its memblock. |
271 | * Otherwise, do reserve it but avoid using | |
272 | * early_init_fdt_reserve_self() since __pa() does | |
922b0375 AO |
273 | * not work for DTB pointers that are fixmap addresses |
274 | */ | |
1b50f956 AG |
275 | if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) |
276 | memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va)); | |
922b0375 | 277 | |
da815582 | 278 | dma_contiguous_reserve(dma32_phys_limit); |
8ba1a8b7 KW |
279 | if (IS_ENABLED(CONFIG_64BIT)) |
280 | hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT); | |
0651c263 | 281 | } |
6f1e9e94 | 282 | |
6bd33e1e | 283 | #ifdef CONFIG_MMU |
0c34e79e | 284 | struct pt_alloc_ops pt_ops __initdata; |
44c92257 | 285 | |
6f1e9e94 | 286 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
671f9a3e | 287 | pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
01062356 | 288 | static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss; |
6f1e9e94 | 289 | |
671f9a3e | 290 | pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); |
f2c17aab | 291 | |
44c92257 | 292 | #ifdef CONFIG_XIP_KERNEL |
805a3ebe | 293 | #define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops)) |
44c92257 VW |
294 | #define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir)) |
295 | #define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte)) | |
296 | #define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir)) | |
297 | #endif /* CONFIG_XIP_KERNEL */ | |
298 | ||
4147b5e2 AK |
299 | static const pgprot_t protection_map[16] = { |
300 | [VM_NONE] = PAGE_NONE, | |
301 | [VM_READ] = PAGE_READ, | |
302 | [VM_WRITE] = PAGE_COPY, | |
303 | [VM_WRITE | VM_READ] = PAGE_COPY, | |
304 | [VM_EXEC] = PAGE_EXEC, | |
305 | [VM_EXEC | VM_READ] = PAGE_READ_EXEC, | |
306 | [VM_EXEC | VM_WRITE] = PAGE_COPY_EXEC, | |
6569fc12 | 307 | [VM_EXEC | VM_WRITE | VM_READ] = PAGE_COPY_EXEC, |
4147b5e2 AK |
308 | [VM_SHARED] = PAGE_NONE, |
309 | [VM_SHARED | VM_READ] = PAGE_READ, | |
310 | [VM_SHARED | VM_WRITE] = PAGE_SHARED, | |
311 | [VM_SHARED | VM_WRITE | VM_READ] = PAGE_SHARED, | |
312 | [VM_SHARED | VM_EXEC] = PAGE_EXEC, | |
313 | [VM_SHARED | VM_EXEC | VM_READ] = PAGE_READ_EXEC, | |
314 | [VM_SHARED | VM_EXEC | VM_WRITE] = PAGE_SHARED_EXEC, | |
315 | [VM_SHARED | VM_EXEC | VM_WRITE | VM_READ] = PAGE_SHARED_EXEC | |
316 | }; | |
317 | DECLARE_VM_GET_PAGE_PROT | |
318 | ||
f2c17aab AP |
319 | void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot) |
320 | { | |
321 | unsigned long addr = __fix_to_virt(idx); | |
322 | pte_t *ptep; | |
323 | ||
324 | BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); | |
325 | ||
326 | ptep = &fixmap_pte[pte_index(addr)]; | |
327 | ||
21190b74 | 328 | if (pgprot_val(prot)) |
f2c17aab | 329 | set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot)); |
21190b74 | 330 | else |
f2c17aab | 331 | pte_clear(&init_mm, addr, ptep); |
21190b74 | 332 | local_flush_tlb_page(addr); |
f2c17aab AP |
333 | } |
334 | ||
e8dcb61f | 335 | static inline pte_t *__init get_pte_virt_early(phys_addr_t pa) |
671f9a3e | 336 | { |
e8dcb61f | 337 | return (pte_t *)((uintptr_t)pa); |
671f9a3e AP |
338 | } |
339 | ||
e8dcb61f AP |
340 | static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa) |
341 | { | |
342 | clear_fixmap(FIX_PTE); | |
343 | return (pte_t *)set_fixmap_offset(FIX_PTE, pa); | |
344 | } | |
345 | ||
01062356 | 346 | static inline pte_t *__init get_pte_virt_late(phys_addr_t pa) |
e8dcb61f AP |
347 | { |
348 | return (pte_t *) __va(pa); | |
349 | } | |
350 | ||
351 | static inline phys_addr_t __init alloc_pte_early(uintptr_t va) | |
671f9a3e AP |
352 | { |
353 | /* | |
354 | * We only create PMD or PGD early mappings so we | |
355 | * should never reach here with MMU disabled. | |
356 | */ | |
e8dcb61f AP |
357 | BUG(); |
358 | } | |
671f9a3e | 359 | |
e8dcb61f AP |
360 | static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va) |
361 | { | |
671f9a3e AP |
362 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
363 | } | |
364 | ||
01062356 | 365 | static phys_addr_t __init alloc_pte_late(uintptr_t va) |
e8dcb61f | 366 | { |
380f2c1a | 367 | struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL & ~__GFP_HIGHMEM, 0); |
e8dcb61f | 368 | |
380f2c1a VMO |
369 | BUG_ON(!ptdesc || !pagetable_pte_ctor(ptdesc)); |
370 | return __pa((pte_t *)ptdesc_address(ptdesc)); | |
e8dcb61f AP |
371 | } |
372 | ||
671f9a3e AP |
373 | static void __init create_pte_mapping(pte_t *ptep, |
374 | uintptr_t va, phys_addr_t pa, | |
375 | phys_addr_t sz, pgprot_t prot) | |
376 | { | |
974b9b2c | 377 | uintptr_t pte_idx = pte_index(va); |
671f9a3e AP |
378 | |
379 | BUG_ON(sz != PAGE_SIZE); | |
380 | ||
974b9b2c MR |
381 | if (pte_none(ptep[pte_idx])) |
382 | ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot); | |
671f9a3e AP |
383 | } |
384 | ||
385 | #ifndef __PAGETABLE_PMD_FOLDED | |
386 | ||
01062356 JZ |
387 | static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss; |
388 | static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss; | |
389 | static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); | |
671f9a3e | 390 | |
44c92257 VW |
391 | #ifdef CONFIG_XIP_KERNEL |
392 | #define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd)) | |
393 | #define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd)) | |
394 | #define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd)) | |
395 | #endif /* CONFIG_XIP_KERNEL */ | |
396 | ||
677b9eb8 QP |
397 | static p4d_t trampoline_p4d[PTRS_PER_P4D] __page_aligned_bss; |
398 | static p4d_t fixmap_p4d[PTRS_PER_P4D] __page_aligned_bss; | |
399 | static p4d_t early_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE); | |
400 | ||
401 | #ifdef CONFIG_XIP_KERNEL | |
402 | #define trampoline_p4d ((p4d_t *)XIP_FIXUP(trampoline_p4d)) | |
403 | #define fixmap_p4d ((p4d_t *)XIP_FIXUP(fixmap_p4d)) | |
404 | #define early_p4d ((p4d_t *)XIP_FIXUP(early_p4d)) | |
405 | #endif /* CONFIG_XIP_KERNEL */ | |
406 | ||
e8a62cc2 AG |
407 | static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss; |
408 | static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss; | |
409 | static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE); | |
410 | ||
411 | #ifdef CONFIG_XIP_KERNEL | |
412 | #define trampoline_pud ((pud_t *)XIP_FIXUP(trampoline_pud)) | |
413 | #define fixmap_pud ((pud_t *)XIP_FIXUP(fixmap_pud)) | |
414 | #define early_pud ((pud_t *)XIP_FIXUP(early_pud)) | |
415 | #endif /* CONFIG_XIP_KERNEL */ | |
416 | ||
e8dcb61f | 417 | static pmd_t *__init get_pmd_virt_early(phys_addr_t pa) |
671f9a3e | 418 | { |
e8dcb61f AP |
419 | /* Before MMU is enabled */ |
420 | return (pmd_t *)((uintptr_t)pa); | |
671f9a3e AP |
421 | } |
422 | ||
e8dcb61f | 423 | static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa) |
671f9a3e | 424 | { |
e8dcb61f AP |
425 | clear_fixmap(FIX_PMD); |
426 | return (pmd_t *)set_fixmap_offset(FIX_PMD, pa); | |
427 | } | |
671f9a3e | 428 | |
01062356 | 429 | static pmd_t *__init get_pmd_virt_late(phys_addr_t pa) |
e8dcb61f AP |
430 | { |
431 | return (pmd_t *) __va(pa); | |
432 | } | |
671f9a3e | 433 | |
e8dcb61f AP |
434 | static phys_addr_t __init alloc_pmd_early(uintptr_t va) |
435 | { | |
e8a62cc2 | 436 | BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT); |
671f9a3e | 437 | |
0f02de44 | 438 | return (uintptr_t)early_pmd; |
671f9a3e AP |
439 | } |
440 | ||
e8dcb61f AP |
441 | static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va) |
442 | { | |
443 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); | |
444 | } | |
445 | ||
01062356 | 446 | static phys_addr_t __init alloc_pmd_late(uintptr_t va) |
e8dcb61f | 447 | { |
380f2c1a | 448 | struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL & ~__GFP_HIGHMEM, 0); |
5a7ac592 | 449 | |
380f2c1a VMO |
450 | BUG_ON(!ptdesc || !pagetable_pmd_ctor(ptdesc)); |
451 | return __pa((pmd_t *)ptdesc_address(ptdesc)); | |
e8dcb61f AP |
452 | } |
453 | ||
671f9a3e AP |
454 | static void __init create_pmd_mapping(pmd_t *pmdp, |
455 | uintptr_t va, phys_addr_t pa, | |
456 | phys_addr_t sz, pgprot_t prot) | |
457 | { | |
458 | pte_t *ptep; | |
459 | phys_addr_t pte_phys; | |
974b9b2c | 460 | uintptr_t pmd_idx = pmd_index(va); |
671f9a3e AP |
461 | |
462 | if (sz == PMD_SIZE) { | |
974b9b2c MR |
463 | if (pmd_none(pmdp[pmd_idx])) |
464 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot); | |
671f9a3e AP |
465 | return; |
466 | } | |
467 | ||
974b9b2c | 468 | if (pmd_none(pmdp[pmd_idx])) { |
e8dcb61f | 469 | pte_phys = pt_ops.alloc_pte(va); |
974b9b2c | 470 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE); |
e8dcb61f | 471 | ptep = pt_ops.get_pte_virt(pte_phys); |
671f9a3e AP |
472 | memset(ptep, 0, PAGE_SIZE); |
473 | } else { | |
974b9b2c | 474 | pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx])); |
e8dcb61f | 475 | ptep = pt_ops.get_pte_virt(pte_phys); |
671f9a3e AP |
476 | } |
477 | ||
478 | create_pte_mapping(ptep, va, pa, sz, prot); | |
479 | } | |
480 | ||
e8a62cc2 AG |
481 | static pud_t *__init get_pud_virt_early(phys_addr_t pa) |
482 | { | |
483 | return (pud_t *)((uintptr_t)pa); | |
484 | } | |
485 | ||
486 | static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa) | |
487 | { | |
488 | clear_fixmap(FIX_PUD); | |
489 | return (pud_t *)set_fixmap_offset(FIX_PUD, pa); | |
490 | } | |
491 | ||
492 | static pud_t *__init get_pud_virt_late(phys_addr_t pa) | |
493 | { | |
494 | return (pud_t *)__va(pa); | |
495 | } | |
496 | ||
497 | static phys_addr_t __init alloc_pud_early(uintptr_t va) | |
498 | { | |
499 | /* Only one PUD is available for early mapping */ | |
500 | BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT); | |
501 | ||
502 | return (uintptr_t)early_pud; | |
503 | } | |
504 | ||
505 | static phys_addr_t __init alloc_pud_fixmap(uintptr_t va) | |
506 | { | |
507 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); | |
508 | } | |
509 | ||
510 | static phys_addr_t alloc_pud_late(uintptr_t va) | |
511 | { | |
512 | unsigned long vaddr; | |
513 | ||
514 | vaddr = __get_free_page(GFP_KERNEL); | |
515 | BUG_ON(!vaddr); | |
516 | return __pa(vaddr); | |
517 | } | |
518 | ||
677b9eb8 QP |
519 | static p4d_t *__init get_p4d_virt_early(phys_addr_t pa) |
520 | { | |
521 | return (p4d_t *)((uintptr_t)pa); | |
522 | } | |
523 | ||
524 | static p4d_t *__init get_p4d_virt_fixmap(phys_addr_t pa) | |
525 | { | |
526 | clear_fixmap(FIX_P4D); | |
527 | return (p4d_t *)set_fixmap_offset(FIX_P4D, pa); | |
528 | } | |
529 | ||
530 | static p4d_t *__init get_p4d_virt_late(phys_addr_t pa) | |
531 | { | |
532 | return (p4d_t *)__va(pa); | |
533 | } | |
534 | ||
535 | static phys_addr_t __init alloc_p4d_early(uintptr_t va) | |
536 | { | |
537 | /* Only one P4D is available for early mapping */ | |
538 | BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT); | |
539 | ||
540 | return (uintptr_t)early_p4d; | |
541 | } | |
542 | ||
543 | static phys_addr_t __init alloc_p4d_fixmap(uintptr_t va) | |
544 | { | |
545 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); | |
546 | } | |
547 | ||
548 | static phys_addr_t alloc_p4d_late(uintptr_t va) | |
549 | { | |
550 | unsigned long vaddr; | |
551 | ||
552 | vaddr = __get_free_page(GFP_KERNEL); | |
553 | BUG_ON(!vaddr); | |
554 | return __pa(vaddr); | |
555 | } | |
556 | ||
e8a62cc2 AG |
557 | static void __init create_pud_mapping(pud_t *pudp, |
558 | uintptr_t va, phys_addr_t pa, | |
559 | phys_addr_t sz, pgprot_t prot) | |
560 | { | |
561 | pmd_t *nextp; | |
562 | phys_addr_t next_phys; | |
563 | uintptr_t pud_index = pud_index(va); | |
564 | ||
565 | if (sz == PUD_SIZE) { | |
566 | if (pud_val(pudp[pud_index]) == 0) | |
567 | pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot); | |
568 | return; | |
569 | } | |
570 | ||
571 | if (pud_val(pudp[pud_index]) == 0) { | |
572 | next_phys = pt_ops.alloc_pmd(va); | |
573 | pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE); | |
574 | nextp = pt_ops.get_pmd_virt(next_phys); | |
575 | memset(nextp, 0, PAGE_SIZE); | |
576 | } else { | |
577 | next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index])); | |
578 | nextp = pt_ops.get_pmd_virt(next_phys); | |
579 | } | |
580 | ||
581 | create_pmd_mapping(nextp, va, pa, sz, prot); | |
582 | } | |
583 | ||
677b9eb8 QP |
584 | static void __init create_p4d_mapping(p4d_t *p4dp, |
585 | uintptr_t va, phys_addr_t pa, | |
586 | phys_addr_t sz, pgprot_t prot) | |
587 | { | |
588 | pud_t *nextp; | |
589 | phys_addr_t next_phys; | |
590 | uintptr_t p4d_index = p4d_index(va); | |
591 | ||
592 | if (sz == P4D_SIZE) { | |
593 | if (p4d_val(p4dp[p4d_index]) == 0) | |
594 | p4dp[p4d_index] = pfn_p4d(PFN_DOWN(pa), prot); | |
595 | return; | |
596 | } | |
597 | ||
598 | if (p4d_val(p4dp[p4d_index]) == 0) { | |
599 | next_phys = pt_ops.alloc_pud(va); | |
600 | p4dp[p4d_index] = pfn_p4d(PFN_DOWN(next_phys), PAGE_TABLE); | |
601 | nextp = pt_ops.get_pud_virt(next_phys); | |
602 | memset(nextp, 0, PAGE_SIZE); | |
603 | } else { | |
604 | next_phys = PFN_PHYS(_p4d_pfn(p4dp[p4d_index])); | |
605 | nextp = pt_ops.get_pud_virt(next_phys); | |
606 | } | |
607 | ||
608 | create_pud_mapping(nextp, va, pa, sz, prot); | |
609 | } | |
610 | ||
611 | #define pgd_next_t p4d_t | |
612 | #define alloc_pgd_next(__va) (pgtable_l5_enabled ? \ | |
613 | pt_ops.alloc_p4d(__va) : (pgtable_l4_enabled ? \ | |
614 | pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va))) | |
615 | #define get_pgd_next_virt(__pa) (pgtable_l5_enabled ? \ | |
616 | pt_ops.get_p4d_virt(__pa) : (pgd_next_t *)(pgtable_l4_enabled ? \ | |
617 | pt_ops.get_pud_virt(__pa) : (pud_t *)pt_ops.get_pmd_virt(__pa))) | |
671f9a3e | 618 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
677b9eb8 QP |
619 | (pgtable_l5_enabled ? \ |
620 | create_p4d_mapping(__nextp, __va, __pa, __sz, __prot) : \ | |
e8a62cc2 | 621 | (pgtable_l4_enabled ? \ |
677b9eb8 QP |
622 | create_pud_mapping((pud_t *)__nextp, __va, __pa, __sz, __prot) : \ |
623 | create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot))) | |
624 | #define fixmap_pgd_next (pgtable_l5_enabled ? \ | |
625 | (uintptr_t)fixmap_p4d : (pgtable_l4_enabled ? \ | |
626 | (uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd)) | |
627 | #define trampoline_pgd_next (pgtable_l5_enabled ? \ | |
628 | (uintptr_t)trampoline_p4d : (pgtable_l4_enabled ? \ | |
629 | (uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd)) | |
671f9a3e AP |
630 | #else |
631 | #define pgd_next_t pte_t | |
e8dcb61f AP |
632 | #define alloc_pgd_next(__va) pt_ops.alloc_pte(__va) |
633 | #define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa) | |
671f9a3e AP |
634 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
635 | create_pte_mapping(__nextp, __va, __pa, __sz, __prot) | |
e8a62cc2 | 636 | #define fixmap_pgd_next ((uintptr_t)fixmap_pte) |
f83050a8 PD |
637 | #define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0) |
638 | #define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0) | |
639 | #define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0) | |
e8a62cc2 | 640 | #endif /* __PAGETABLE_PMD_FOLDED */ |
671f9a3e | 641 | |
b91540d5 | 642 | void __init create_pgd_mapping(pgd_t *pgdp, |
671f9a3e AP |
643 | uintptr_t va, phys_addr_t pa, |
644 | phys_addr_t sz, pgprot_t prot) | |
645 | { | |
646 | pgd_next_t *nextp; | |
647 | phys_addr_t next_phys; | |
974b9b2c | 648 | uintptr_t pgd_idx = pgd_index(va); |
671f9a3e AP |
649 | |
650 | if (sz == PGDIR_SIZE) { | |
974b9b2c MR |
651 | if (pgd_val(pgdp[pgd_idx]) == 0) |
652 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot); | |
671f9a3e AP |
653 | return; |
654 | } | |
655 | ||
974b9b2c | 656 | if (pgd_val(pgdp[pgd_idx]) == 0) { |
671f9a3e | 657 | next_phys = alloc_pgd_next(va); |
974b9b2c | 658 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE); |
671f9a3e AP |
659 | nextp = get_pgd_next_virt(next_phys); |
660 | memset(nextp, 0, PAGE_SIZE); | |
661 | } else { | |
974b9b2c | 662 | next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx])); |
671f9a3e AP |
663 | nextp = get_pgd_next_virt(next_phys); |
664 | } | |
665 | ||
666 | create_pgd_next_mapping(nextp, va, pa, sz, prot); | |
667 | } | |
668 | ||
49a0a373 AG |
669 | static uintptr_t __init best_map_size(phys_addr_t pa, uintptr_t va, |
670 | phys_addr_t size) | |
671f9a3e | 671 | { |
629db01c AG |
672 | if (pgtable_l5_enabled && |
673 | !(pa & (P4D_SIZE - 1)) && !(va & (P4D_SIZE - 1)) && size >= P4D_SIZE) | |
3335068f AG |
674 | return P4D_SIZE; |
675 | ||
629db01c AG |
676 | if (pgtable_l4_enabled && |
677 | !(pa & (PUD_SIZE - 1)) && !(va & (PUD_SIZE - 1)) && size >= PUD_SIZE) | |
3335068f AG |
678 | return PUD_SIZE; |
679 | ||
629db01c AG |
680 | if (IS_ENABLED(CONFIG_64BIT) && |
681 | !(pa & (PMD_SIZE - 1)) && !(va & (PMD_SIZE - 1)) && size >= PMD_SIZE) | |
6ff8ca3f | 682 | return PMD_SIZE; |
671f9a3e | 683 | |
6ff8ca3f | 684 | return PAGE_SIZE; |
671f9a3e AP |
685 | } |
686 | ||
44c92257 | 687 | #ifdef CONFIG_XIP_KERNEL |
4b1c70aa | 688 | #define phys_ram_base (*(phys_addr_t *)XIP_FIXUP(&phys_ram_base)) |
805a3ebe JZ |
689 | extern char _xiprom[], _exiprom[], __data_loc; |
690 | ||
44c92257 VW |
691 | /* called from head.S with MMU off */ |
692 | asmlinkage void __init __copy_data(void) | |
693 | { | |
f9ace4ed | 694 | void *from = (void *)(&__data_loc); |
44c92257 | 695 | void *to = (void *)CONFIG_PHYS_RAM_BASE; |
f9ace4ed | 696 | size_t sz = (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata)); |
44c92257 VW |
697 | |
698 | memcpy(to, from, sz); | |
699 | } | |
700 | #endif | |
701 | ||
e5c35fa0 AG |
702 | #ifdef CONFIG_STRICT_KERNEL_RWX |
703 | static __init pgprot_t pgprot_from_va(uintptr_t va) | |
704 | { | |
705 | if (is_va_kernel_text(va)) | |
706 | return PAGE_KERNEL_READ_EXEC; | |
707 | ||
708 | /* | |
709 | * In 64-bit kernel, the kernel mapping is outside the linear mapping so | |
710 | * we must protect its linear mapping alias from being executed and | |
711 | * written. | |
712 | * And rodata section is marked readonly in mark_rodata_ro. | |
713 | */ | |
714 | if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va)) | |
715 | return PAGE_KERNEL_READ; | |
716 | ||
717 | return PAGE_KERNEL; | |
718 | } | |
719 | ||
720 | void mark_rodata_ro(void) | |
721 | { | |
722 | set_kernel_memory(__start_rodata, _data, set_memory_ro); | |
723 | if (IS_ENABLED(CONFIG_64BIT)) | |
724 | set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data), | |
725 | set_memory_ro); | |
726 | ||
727 | debug_checkwx(); | |
728 | } | |
729 | #else | |
730 | static __init pgprot_t pgprot_from_va(uintptr_t va) | |
731 | { | |
732 | if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va)) | |
733 | return PAGE_KERNEL; | |
734 | ||
735 | return PAGE_KERNEL_EXEC; | |
736 | } | |
737 | #endif /* CONFIG_STRICT_KERNEL_RWX */ | |
738 | ||
d9e418d0 | 739 | #if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL) |
26e7aacb AG |
740 | u64 __pi_set_satp_mode_from_cmdline(uintptr_t dtb_pa); |
741 | ||
011f09d1 QP |
742 | static void __init disable_pgtable_l5(void) |
743 | { | |
744 | pgtable_l5_enabled = false; | |
745 | kernel_map.page_offset = PAGE_OFFSET_L4; | |
746 | satp_mode = SATP_MODE_48; | |
747 | } | |
748 | ||
e8a62cc2 AG |
749 | static void __init disable_pgtable_l4(void) |
750 | { | |
751 | pgtable_l4_enabled = false; | |
752 | kernel_map.page_offset = PAGE_OFFSET_L3; | |
753 | satp_mode = SATP_MODE_39; | |
754 | } | |
755 | ||
26e7aacb AG |
756 | static int __init print_no4lvl(char *p) |
757 | { | |
758 | pr_info("Disabled 4-level and 5-level paging"); | |
759 | return 0; | |
760 | } | |
761 | early_param("no4lvl", print_no4lvl); | |
762 | ||
763 | static int __init print_no5lvl(char *p) | |
764 | { | |
765 | pr_info("Disabled 5-level paging"); | |
766 | return 0; | |
767 | } | |
768 | early_param("no5lvl", print_no5lvl); | |
769 | ||
e8a62cc2 AG |
770 | /* |
771 | * There is a simple way to determine if 4-level is supported by the | |
772 | * underlying hardware: establish 1:1 mapping in 4-level page table mode | |
773 | * then read SATP to see if the configuration was taken into account | |
774 | * meaning sv48 is supported. | |
775 | */ | |
26e7aacb | 776 | static __init void set_satp_mode(uintptr_t dtb_pa) |
e8a62cc2 AG |
777 | { |
778 | u64 identity_satp, hw_satp; | |
011f09d1 | 779 | uintptr_t set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK; |
26e7aacb AG |
780 | u64 satp_mode_cmdline = __pi_set_satp_mode_from_cmdline(dtb_pa); |
781 | ||
782 | if (satp_mode_cmdline == SATP_MODE_57) { | |
783 | disable_pgtable_l5(); | |
784 | } else if (satp_mode_cmdline == SATP_MODE_48) { | |
785 | disable_pgtable_l5(); | |
786 | disable_pgtable_l4(); | |
787 | return; | |
788 | } | |
e8a62cc2 | 789 | |
011f09d1 QP |
790 | create_p4d_mapping(early_p4d, |
791 | set_satp_mode_pmd, (uintptr_t)early_pud, | |
792 | P4D_SIZE, PAGE_TABLE); | |
e8a62cc2 AG |
793 | create_pud_mapping(early_pud, |
794 | set_satp_mode_pmd, (uintptr_t)early_pmd, | |
795 | PUD_SIZE, PAGE_TABLE); | |
796 | /* Handle the case where set_satp_mode straddles 2 PMDs */ | |
797 | create_pmd_mapping(early_pmd, | |
798 | set_satp_mode_pmd, set_satp_mode_pmd, | |
799 | PMD_SIZE, PAGE_KERNEL_EXEC); | |
800 | create_pmd_mapping(early_pmd, | |
801 | set_satp_mode_pmd + PMD_SIZE, | |
802 | set_satp_mode_pmd + PMD_SIZE, | |
803 | PMD_SIZE, PAGE_KERNEL_EXEC); | |
011f09d1 QP |
804 | retry: |
805 | create_pgd_mapping(early_pg_dir, | |
806 | set_satp_mode_pmd, | |
26e7aacb AG |
807 | pgtable_l5_enabled ? |
808 | (uintptr_t)early_p4d : (uintptr_t)early_pud, | |
011f09d1 | 809 | PGDIR_SIZE, PAGE_TABLE); |
e8a62cc2 AG |
810 | |
811 | identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode; | |
812 | ||
813 | local_flush_tlb_all(); | |
814 | csr_write(CSR_SATP, identity_satp); | |
815 | hw_satp = csr_swap(CSR_SATP, 0ULL); | |
816 | local_flush_tlb_all(); | |
817 | ||
011f09d1 | 818 | if (hw_satp != identity_satp) { |
26e7aacb | 819 | if (pgtable_l5_enabled) { |
011f09d1 | 820 | disable_pgtable_l5(); |
d5fdade9 | 821 | memset(early_pg_dir, 0, PAGE_SIZE); |
011f09d1 QP |
822 | goto retry; |
823 | } | |
e8a62cc2 | 824 | disable_pgtable_l4(); |
011f09d1 | 825 | } |
e8a62cc2 AG |
826 | |
827 | memset(early_pg_dir, 0, PAGE_SIZE); | |
011f09d1 | 828 | memset(early_p4d, 0, PAGE_SIZE); |
e8a62cc2 AG |
829 | memset(early_pud, 0, PAGE_SIZE); |
830 | memset(early_pmd, 0, PAGE_SIZE); | |
831 | } | |
832 | #endif | |
833 | ||
387181dc AP |
834 | /* |
835 | * setup_vm() is called from head.S with MMU-off. | |
836 | * | |
837 | * Following requirements should be honoured for setup_vm() to work | |
838 | * correctly: | |
839 | * 1) It should use PC-relative addressing for accessing kernel symbols. | |
840 | * To achieve this we always use GCC cmodel=medany. | |
841 | * 2) The compiler instrumentation for FTRACE will not work for setup_vm() | |
842 | * so disable compiler instrumentation when FTRACE is enabled. | |
843 | * | |
844 | * Currently, the above requirements are honoured by using custom CFLAGS | |
845 | * for init.o in mm/Makefile. | |
846 | */ | |
847 | ||
848 | #ifndef __riscv_cmodel_medany | |
6a527b67 | 849 | #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing." |
387181dc AP |
850 | #endif |
851 | ||
39b33072 AG |
852 | #ifdef CONFIG_RELOCATABLE |
853 | extern unsigned long __rela_dyn_start, __rela_dyn_end; | |
854 | ||
855 | static void __init relocate_kernel(void) | |
856 | { | |
857 | Elf64_Rela *rela = (Elf64_Rela *)&__rela_dyn_start; | |
858 | /* | |
859 | * This holds the offset between the linked virtual address and the | |
860 | * relocated virtual address. | |
861 | */ | |
862 | uintptr_t reloc_offset = kernel_map.virt_addr - KERNEL_LINK_ADDR; | |
863 | /* | |
864 | * This holds the offset between kernel linked virtual address and | |
865 | * physical address. | |
866 | */ | |
867 | uintptr_t va_kernel_link_pa_offset = KERNEL_LINK_ADDR - kernel_map.phys_addr; | |
868 | ||
869 | for ( ; rela < (Elf64_Rela *)&__rela_dyn_end; rela++) { | |
870 | Elf64_Addr addr = (rela->r_offset - va_kernel_link_pa_offset); | |
871 | Elf64_Addr relocated_addr = rela->r_addend; | |
872 | ||
873 | if (rela->r_info != R_RISCV_RELATIVE) | |
874 | continue; | |
875 | ||
876 | /* | |
877 | * Make sure to not relocate vdso symbols like rt_sigreturn | |
878 | * which are linked from the address 0 in vmlinux since | |
879 | * vdso symbol addresses are actually used as an offset from | |
880 | * mm->context.vdso in VDSO_OFFSET macro. | |
881 | */ | |
882 | if (relocated_addr >= KERNEL_LINK_ADDR) | |
883 | relocated_addr += reloc_offset; | |
884 | ||
885 | *(Elf64_Addr *)addr = relocated_addr; | |
886 | } | |
887 | } | |
888 | #endif /* CONFIG_RELOCATABLE */ | |
889 | ||
44c92257 | 890 | #ifdef CONFIG_XIP_KERNEL |
526f83df | 891 | static void __init create_kernel_page_table(pgd_t *pgdir, |
e5c35fa0 | 892 | __always_unused bool early) |
44c92257 VW |
893 | { |
894 | uintptr_t va, end_va; | |
895 | ||
896 | /* Map the flash resident part */ | |
658e2c51 | 897 | end_va = kernel_map.virt_addr + kernel_map.xiprom_sz; |
526f83df | 898 | for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE) |
44c92257 | 899 | create_pgd_mapping(pgdir, va, |
658e2c51 | 900 | kernel_map.xiprom + (va - kernel_map.virt_addr), |
526f83df | 901 | PMD_SIZE, PAGE_KERNEL_EXEC); |
44c92257 VW |
902 | |
903 | /* Map the data in RAM */ | |
658e2c51 | 904 | end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size; |
526f83df | 905 | for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE) |
44c92257 | 906 | create_pgd_mapping(pgdir, va, |
658e2c51 | 907 | kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)), |
526f83df | 908 | PMD_SIZE, PAGE_KERNEL); |
44c92257 VW |
909 | } |
910 | #else | |
526f83df | 911 | static void __init create_kernel_page_table(pgd_t *pgdir, bool early) |
2bfc6cd8 AG |
912 | { |
913 | uintptr_t va, end_va; | |
914 | ||
658e2c51 | 915 | end_va = kernel_map.virt_addr + kernel_map.size; |
526f83df | 916 | for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE) |
2bfc6cd8 | 917 | create_pgd_mapping(pgdir, va, |
658e2c51 | 918 | kernel_map.phys_addr + (va - kernel_map.virt_addr), |
526f83df | 919 | PMD_SIZE, |
e5c35fa0 AG |
920 | early ? |
921 | PAGE_KERNEL_EXEC : pgprot_from_va(va)); | |
2bfc6cd8 | 922 | } |
44c92257 | 923 | #endif |
2bfc6cd8 | 924 | |
fe45ffa4 AG |
925 | /* |
926 | * Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel, | |
927 | * this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR | |
928 | * entry. | |
929 | */ | |
e4ef93ed | 930 | static void __init create_fdt_early_page_table(uintptr_t fix_fdt_va, |
ef69d255 | 931 | uintptr_t dtb_pa) |
6f1e9e94 | 932 | { |
33d418da | 933 | #ifndef CONFIG_BUILTIN_DTB |
fe45ffa4 AG |
934 | uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1); |
935 | ||
ef69d255 AG |
936 | /* Make sure the fdt fixmap address is always aligned on PMD size */ |
937 | BUILD_BUG_ON(FIX_FDT % (PMD_SIZE / PAGE_SIZE)); | |
e8a62cc2 | 938 | |
ef69d255 AG |
939 | /* In 32-bit only, the fdt lies in its own PGD */ |
940 | if (!IS_ENABLED(CONFIG_64BIT)) { | |
941 | create_pgd_mapping(early_pg_dir, fix_fdt_va, | |
942 | pa, MAX_FDT_SIZE, PAGE_KERNEL); | |
943 | } else { | |
944 | create_pmd_mapping(fixmap_pmd, fix_fdt_va, | |
fe45ffa4 | 945 | pa, PMD_SIZE, PAGE_KERNEL); |
ef69d255 | 946 | create_pmd_mapping(fixmap_pmd, fix_fdt_va + PMD_SIZE, |
fe45ffa4 AG |
947 | pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL); |
948 | } | |
949 | ||
ef69d255 | 950 | dtb_early_va = (void *)fix_fdt_va + (dtb_pa & (PMD_SIZE - 1)); |
fe45ffa4 AG |
951 | #else |
952 | /* | |
953 | * For 64-bit kernel, __va can't be used since it would return a linear | |
954 | * mapping address whereas dtb_early_va will be used before | |
955 | * setup_vm_final installs the linear mapping. For 32-bit kernel, as the | |
956 | * kernel is mapped in the linear mapping, that makes no difference. | |
957 | */ | |
66f1e680 | 958 | dtb_early_va = kernel_mapping_pa_to_va(dtb_pa); |
6262f661 | 959 | #endif |
671f9a3e | 960 | |
fe45ffa4 AG |
961 | dtb_early_pa = dtb_pa; |
962 | } | |
963 | ||
840125a9 AG |
964 | /* |
965 | * MMU is not enabled, the page tables are allocated directly using | |
966 | * early_pmd/pud/p4d and the address returned is the physical one. | |
967 | */ | |
9c375cfc | 968 | static void __init pt_ops_set_early(void) |
840125a9 AG |
969 | { |
970 | pt_ops.alloc_pte = alloc_pte_early; | |
971 | pt_ops.get_pte_virt = get_pte_virt_early; | |
972 | #ifndef __PAGETABLE_PMD_FOLDED | |
973 | pt_ops.alloc_pmd = alloc_pmd_early; | |
974 | pt_ops.get_pmd_virt = get_pmd_virt_early; | |
e8a62cc2 AG |
975 | pt_ops.alloc_pud = alloc_pud_early; |
976 | pt_ops.get_pud_virt = get_pud_virt_early; | |
677b9eb8 QP |
977 | pt_ops.alloc_p4d = alloc_p4d_early; |
978 | pt_ops.get_p4d_virt = get_p4d_virt_early; | |
840125a9 AG |
979 | #endif |
980 | } | |
981 | ||
982 | /* | |
983 | * MMU is enabled but page table setup is not complete yet. | |
984 | * fixmap page table alloc functions must be used as a means to temporarily | |
985 | * map the allocated physical pages since the linear mapping does not exist yet. | |
986 | * | |
987 | * Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va, | |
988 | * but it will be used as described above. | |
989 | */ | |
9c375cfc | 990 | static void __init pt_ops_set_fixmap(void) |
840125a9 | 991 | { |
583286e2 SH |
992 | pt_ops.alloc_pte = kernel_mapping_pa_to_va(alloc_pte_fixmap); |
993 | pt_ops.get_pte_virt = kernel_mapping_pa_to_va(get_pte_virt_fixmap); | |
840125a9 | 994 | #ifndef __PAGETABLE_PMD_FOLDED |
583286e2 SH |
995 | pt_ops.alloc_pmd = kernel_mapping_pa_to_va(alloc_pmd_fixmap); |
996 | pt_ops.get_pmd_virt = kernel_mapping_pa_to_va(get_pmd_virt_fixmap); | |
997 | pt_ops.alloc_pud = kernel_mapping_pa_to_va(alloc_pud_fixmap); | |
998 | pt_ops.get_pud_virt = kernel_mapping_pa_to_va(get_pud_virt_fixmap); | |
999 | pt_ops.alloc_p4d = kernel_mapping_pa_to_va(alloc_p4d_fixmap); | |
1000 | pt_ops.get_p4d_virt = kernel_mapping_pa_to_va(get_p4d_virt_fixmap); | |
840125a9 AG |
1001 | #endif |
1002 | } | |
1003 | ||
1004 | /* | |
1005 | * MMU is enabled and page table setup is complete, so from now, we can use | |
1006 | * generic page allocation functions to setup page table. | |
1007 | */ | |
9c375cfc | 1008 | static void __init pt_ops_set_late(void) |
840125a9 AG |
1009 | { |
1010 | pt_ops.alloc_pte = alloc_pte_late; | |
1011 | pt_ops.get_pte_virt = get_pte_virt_late; | |
1012 | #ifndef __PAGETABLE_PMD_FOLDED | |
1013 | pt_ops.alloc_pmd = alloc_pmd_late; | |
1014 | pt_ops.get_pmd_virt = get_pmd_virt_late; | |
e8a62cc2 AG |
1015 | pt_ops.alloc_pud = alloc_pud_late; |
1016 | pt_ops.get_pud_virt = get_pud_virt_late; | |
677b9eb8 QP |
1017 | pt_ops.alloc_p4d = alloc_p4d_late; |
1018 | pt_ops.get_p4d_virt = get_p4d_virt_late; | |
840125a9 AG |
1019 | #endif |
1020 | } | |
1021 | ||
84fe419d AG |
1022 | #ifdef CONFIG_RANDOMIZE_BASE |
1023 | extern bool __init __pi_set_nokaslr_from_cmdline(uintptr_t dtb_pa); | |
1024 | extern u64 __init __pi_get_kaslr_seed(uintptr_t dtb_pa); | |
1025 | ||
1026 | static int __init print_nokaslr(char *p) | |
1027 | { | |
1028 | pr_info("Disabled KASLR"); | |
1029 | return 0; | |
1030 | } | |
1031 | early_param("nokaslr", print_nokaslr); | |
1032 | ||
1033 | unsigned long kaslr_offset(void) | |
1034 | { | |
1035 | return kernel_map.virt_offset; | |
1036 | } | |
1037 | #endif | |
1038 | ||
671f9a3e | 1039 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) |
6f1e9e94 | 1040 | { |
6f3e5fd2 | 1041 | pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd; |
671f9a3e | 1042 | |
84fe419d AG |
1043 | #ifdef CONFIG_RANDOMIZE_BASE |
1044 | if (!__pi_set_nokaslr_from_cmdline(dtb_pa)) { | |
1045 | u64 kaslr_seed = __pi_get_kaslr_seed(dtb_pa); | |
1046 | u32 kernel_size = (uintptr_t)(&_end) - (uintptr_t)(&_start); | |
1047 | u32 nr_pos; | |
1048 | ||
1049 | /* | |
1050 | * Compute the number of positions available: we are limited | |
1051 | * by the early page table that only has one PUD and we must | |
1052 | * be aligned on PMD_SIZE. | |
1053 | */ | |
1054 | nr_pos = (PUD_SIZE - kernel_size) / PMD_SIZE; | |
1055 | ||
1056 | kernel_map.virt_offset = (kaslr_seed % nr_pos) * PMD_SIZE; | |
1057 | } | |
1058 | #endif | |
1059 | ||
1060 | kernel_map.virt_addr = KERNEL_LINK_ADDR + kernel_map.virt_offset; | |
658e2c51 | 1061 | |
44c92257 | 1062 | #ifdef CONFIG_XIP_KERNEL |
66f1e680 | 1063 | kernel_map.page_offset = PAGE_OFFSET_L3; |
658e2c51 AG |
1064 | kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR; |
1065 | kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom); | |
44c92257 | 1066 | |
6d7f91d9 | 1067 | phys_ram_base = CONFIG_PHYS_RAM_BASE; |
658e2c51 AG |
1068 | kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE; |
1069 | kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata); | |
44c92257 | 1070 | |
658e2c51 | 1071 | kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom; |
44c92257 | 1072 | #else |
66f1e680 | 1073 | kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL); |
658e2c51 AG |
1074 | kernel_map.phys_addr = (uintptr_t)(&_start); |
1075 | kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr; | |
44c92257 | 1076 | #endif |
e8a62cc2 AG |
1077 | |
1078 | #if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL) | |
26e7aacb | 1079 | set_satp_mode(dtb_pa); |
e8a62cc2 AG |
1080 | #endif |
1081 | ||
3335068f AG |
1082 | /* |
1083 | * In 64-bit, we defer the setup of va_pa_offset to setup_bootmem, | |
1084 | * where we have the system memory layout: this allows us to align | |
1085 | * the physical and virtual mappings and then make use of PUD/P4D/PGD | |
1086 | * for the linear mapping. This is only possible because the kernel | |
1087 | * mapping lies outside the linear mapping. | |
1088 | * In 32-bit however, as the kernel resides in the linear mapping, | |
1089 | * setup_vm_final can not change the mapping established here, | |
1090 | * otherwise the same kernel addresses would get mapped to different | |
1091 | * physical addresses (if the start of dram is different from the | |
1092 | * kernel physical address start). | |
1093 | */ | |
1094 | kernel_map.va_pa_offset = IS_ENABLED(CONFIG_64BIT) ? | |
1095 | 0UL : PAGE_OFFSET - kernel_map.phys_addr; | |
658e2c51 | 1096 | kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr; |
6f1e9e94 | 1097 | |
f7ae0233 AG |
1098 | /* |
1099 | * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit | |
1100 | * kernel, whereas for 64-bit kernel, the end of the virtual address | |
1101 | * space is occupied by the modules/BPF/kernel mappings which reduces | |
1102 | * the available size of the linear mapping. | |
1103 | */ | |
1104 | memory_limit = KERN_VIRT_SIZE - (IS_ENABLED(CONFIG_64BIT) ? SZ_4G : 0); | |
1105 | ||
6f1e9e94 AP |
1106 | /* Sanity check alignment and size */ |
1107 | BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0); | |
526f83df | 1108 | BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0); |
671f9a3e | 1109 | |
db6b84a3 AG |
1110 | #ifdef CONFIG_64BIT |
1111 | /* | |
1112 | * The last 4K bytes of the addressable memory can not be mapped because | |
1113 | * of IS_ERR_VALUE macro. | |
1114 | */ | |
1115 | BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K); | |
e8dcb61f | 1116 | #endif |
db6b84a3 | 1117 | |
39b33072 AG |
1118 | #ifdef CONFIG_RELOCATABLE |
1119 | /* | |
1120 | * Early page table uses only one PUD, which makes it possible | |
1121 | * to map PUD_SIZE aligned on PUD_SIZE: if the relocation offset | |
1122 | * makes the kernel cross over a PUD_SIZE boundary, raise a bug | |
1123 | * since a part of the kernel would not get mapped. | |
1124 | */ | |
1125 | BUG_ON(PUD_SIZE - (kernel_map.virt_addr & (PUD_SIZE - 1)) < kernel_map.size); | |
1126 | relocate_kernel(); | |
1127 | #endif | |
1128 | ||
a35707c3 | 1129 | apply_early_boot_alternatives(); |
840125a9 AG |
1130 | pt_ops_set_early(); |
1131 | ||
671f9a3e AP |
1132 | /* Setup early PGD for fixmap */ |
1133 | create_pgd_mapping(early_pg_dir, FIXADDR_START, | |
e8a62cc2 | 1134 | fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE); |
6f1e9e94 AP |
1135 | |
1136 | #ifndef __PAGETABLE_PMD_FOLDED | |
677b9eb8 QP |
1137 | /* Setup fixmap P4D and PUD */ |
1138 | if (pgtable_l5_enabled) | |
1139 | create_p4d_mapping(fixmap_p4d, FIXADDR_START, | |
1140 | (uintptr_t)fixmap_pud, P4D_SIZE, PAGE_TABLE); | |
e8a62cc2 AG |
1141 | /* Setup fixmap PUD and PMD */ |
1142 | if (pgtable_l4_enabled) | |
1143 | create_pud_mapping(fixmap_pud, FIXADDR_START, | |
1144 | (uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE); | |
671f9a3e AP |
1145 | create_pmd_mapping(fixmap_pmd, FIXADDR_START, |
1146 | (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE); | |
1147 | /* Setup trampoline PGD and PMD */ | |
658e2c51 | 1148 | create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr, |
e8a62cc2 | 1149 | trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE); |
677b9eb8 QP |
1150 | if (pgtable_l5_enabled) |
1151 | create_p4d_mapping(trampoline_p4d, kernel_map.virt_addr, | |
1152 | (uintptr_t)trampoline_pud, P4D_SIZE, PAGE_TABLE); | |
e8a62cc2 AG |
1153 | if (pgtable_l4_enabled) |
1154 | create_pud_mapping(trampoline_pud, kernel_map.virt_addr, | |
1155 | (uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE); | |
44c92257 | 1156 | #ifdef CONFIG_XIP_KERNEL |
658e2c51 AG |
1157 | create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr, |
1158 | kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC); | |
44c92257 | 1159 | #else |
658e2c51 AG |
1160 | create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr, |
1161 | kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC); | |
44c92257 | 1162 | #endif |
671f9a3e AP |
1163 | #else |
1164 | /* Setup trampoline PGD */ | |
658e2c51 AG |
1165 | create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr, |
1166 | kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC); | |
671f9a3e | 1167 | #endif |
6f1e9e94 | 1168 | |
671f9a3e | 1169 | /* |
2bfc6cd8 | 1170 | * Setup early PGD covering entire kernel which will allow |
671f9a3e AP |
1171 | * us to reach paging_init(). We map all memory banks later |
1172 | * in setup_vm_final() below. | |
1173 | */ | |
526f83df | 1174 | create_kernel_page_table(early_pg_dir, true); |
671f9a3e | 1175 | |
fe45ffa4 | 1176 | /* Setup early mapping for FDT early scan */ |
e4ef93ed | 1177 | create_fdt_early_page_table(__fix_to_virt(FIX_FDT), dtb_pa); |
6262f661 AP |
1178 | |
1179 | /* | |
1180 | * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap | |
1181 | * range can not span multiple pmds. | |
1182 | */ | |
e8a62cc2 | 1183 | BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) |
6262f661 AP |
1184 | != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); |
1185 | ||
1186 | #ifndef __PAGETABLE_PMD_FOLDED | |
1187 | /* | |
1188 | * Early ioremap fixmap is already created as it lies within first 2MB | |
1189 | * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END | |
1190 | * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn | |
1191 | * the user if not. | |
1192 | */ | |
1193 | fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))]; | |
1194 | fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))]; | |
1195 | if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) { | |
1196 | WARN_ON(1); | |
1197 | pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n", | |
1198 | pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd)); | |
1199 | pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", | |
1200 | fix_to_virt(FIX_BTMAP_BEGIN)); | |
1201 | pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", | |
1202 | fix_to_virt(FIX_BTMAP_END)); | |
1203 | ||
1204 | pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); | |
1205 | pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); | |
1206 | } | |
1207 | #endif | |
840125a9 AG |
1208 | |
1209 | pt_ops_set_fixmap(); | |
671f9a3e | 1210 | } |
f2c17aab | 1211 | |
8589e346 | 1212 | static void __init create_linear_mapping_range(phys_addr_t start, |
25abe0db AG |
1213 | phys_addr_t end, |
1214 | uintptr_t fixed_map_size) | |
671f9a3e | 1215 | { |
8589e346 | 1216 | phys_addr_t pa; |
671f9a3e | 1217 | uintptr_t va, map_size; |
671f9a3e | 1218 | |
8589e346 AG |
1219 | for (pa = start; pa < end; pa += map_size) { |
1220 | va = (uintptr_t)__va(pa); | |
25abe0db | 1221 | map_size = fixed_map_size ? fixed_map_size : |
49a0a373 | 1222 | best_map_size(pa, va, end - pa); |
8589e346 AG |
1223 | |
1224 | create_pgd_mapping(swapper_pg_dir, va, pa, map_size, | |
1225 | pgprot_from_va(va)); | |
1226 | } | |
1227 | } | |
1228 | ||
1229 | static void __init create_linear_mapping_page_table(void) | |
1230 | { | |
1231 | phys_addr_t start, end; | |
25abe0db | 1232 | phys_addr_t kfence_pool __maybe_unused; |
b10d6bca | 1233 | u64 i; |
671f9a3e | 1234 | |
3335068f AG |
1235 | #ifdef CONFIG_STRICT_KERNEL_RWX |
1236 | phys_addr_t ktext_start = __pa_symbol(_start); | |
1237 | phys_addr_t ktext_size = __init_data_begin - _start; | |
1238 | phys_addr_t krodata_start = __pa_symbol(__start_rodata); | |
1239 | phys_addr_t krodata_size = _data - __start_rodata; | |
1240 | ||
1241 | /* Isolate kernel text and rodata so they don't get mapped with a PUD */ | |
1242 | memblock_mark_nomap(ktext_start, ktext_size); | |
1243 | memblock_mark_nomap(krodata_start, krodata_size); | |
1244 | #endif | |
1245 | ||
25abe0db AG |
1246 | #ifdef CONFIG_KFENCE |
1247 | /* | |
1248 | * kfence pool must be backed by PAGE_SIZE mappings, so allocate it | |
1249 | * before we setup the linear mapping so that we avoid using hugepages | |
1250 | * for this region. | |
1251 | */ | |
1252 | kfence_pool = memblock_phys_alloc(KFENCE_POOL_SIZE, PAGE_SIZE); | |
1253 | BUG_ON(!kfence_pool); | |
1254 | ||
1255 | memblock_mark_nomap(kfence_pool, KFENCE_POOL_SIZE); | |
1256 | __kfence_pool = __va(kfence_pool); | |
1257 | #endif | |
1258 | ||
2bfc6cd8 | 1259 | /* Map all memory banks in the linear mapping */ |
b10d6bca | 1260 | for_each_mem_range(i, &start, &end) { |
671f9a3e AP |
1261 | if (start >= end) |
1262 | break; | |
671f9a3e AP |
1263 | if (start <= __pa(PAGE_OFFSET) && |
1264 | __pa(PAGE_OFFSET) < end) | |
1265 | start = __pa(PAGE_OFFSET); | |
c99127c4 AG |
1266 | if (end >= __pa(PAGE_OFFSET) + memory_limit) |
1267 | end = __pa(PAGE_OFFSET) + memory_limit; | |
671f9a3e | 1268 | |
25abe0db | 1269 | create_linear_mapping_range(start, end, 0); |
6f1e9e94 | 1270 | } |
3335068f AG |
1271 | |
1272 | #ifdef CONFIG_STRICT_KERNEL_RWX | |
25abe0db | 1273 | create_linear_mapping_range(ktext_start, ktext_start + ktext_size, 0); |
3335068f | 1274 | create_linear_mapping_range(krodata_start, |
25abe0db | 1275 | krodata_start + krodata_size, 0); |
3335068f AG |
1276 | |
1277 | memblock_clear_nomap(ktext_start, ktext_size); | |
1278 | memblock_clear_nomap(krodata_start, krodata_size); | |
1279 | #endif | |
25abe0db AG |
1280 | |
1281 | #ifdef CONFIG_KFENCE | |
1282 | create_linear_mapping_range(kfence_pool, | |
1283 | kfence_pool + KFENCE_POOL_SIZE, | |
1284 | PAGE_SIZE); | |
1285 | ||
1286 | memblock_clear_nomap(kfence_pool, KFENCE_POOL_SIZE); | |
1287 | #endif | |
8589e346 AG |
1288 | } |
1289 | ||
1290 | static void __init setup_vm_final(void) | |
1291 | { | |
671f9a3e | 1292 | /* Setup swapper PGD for fixmap */ |
ef69d255 AG |
1293 | #if !defined(CONFIG_64BIT) |
1294 | /* | |
1295 | * In 32-bit, the device tree lies in a pgd entry, so it must be copied | |
1296 | * directly in swapper_pg_dir in addition to the pgd entry that points | |
1297 | * to fixmap_pte. | |
1298 | */ | |
1299 | unsigned long idx = pgd_index(__fix_to_virt(FIX_FDT)); | |
1300 | ||
1301 | set_pgd(&swapper_pg_dir[idx], early_pg_dir[idx]); | |
1302 | #endif | |
671f9a3e | 1303 | create_pgd_mapping(swapper_pg_dir, FIXADDR_START, |
ac51e005 | 1304 | __pa_symbol(fixmap_pgd_next), |
671f9a3e | 1305 | PGDIR_SIZE, PAGE_TABLE); |
f2c17aab | 1306 | |
8589e346 AG |
1307 | /* Map the linear mapping */ |
1308 | create_linear_mapping_page_table(); | |
f2c17aab | 1309 | |
2bfc6cd8 | 1310 | /* Map the kernel */ |
07aabe8f JZ |
1311 | if (IS_ENABLED(CONFIG_64BIT)) |
1312 | create_kernel_page_table(swapper_pg_dir, false); | |
2bfc6cd8 | 1313 | |
2efad17e AG |
1314 | #ifdef CONFIG_KASAN |
1315 | kasan_swapper_init(); | |
1316 | #endif | |
1317 | ||
671f9a3e AP |
1318 | /* Clear fixmap PTE and PMD mappings */ |
1319 | clear_fixmap(FIX_PTE); | |
1320 | clear_fixmap(FIX_PMD); | |
e8a62cc2 | 1321 | clear_fixmap(FIX_PUD); |
677b9eb8 | 1322 | clear_fixmap(FIX_P4D); |
671f9a3e AP |
1323 | |
1324 | /* Move to swapper page table */ | |
e8a62cc2 | 1325 | csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode); |
671f9a3e | 1326 | local_flush_tlb_all(); |
e8dcb61f | 1327 | |
840125a9 | 1328 | pt_ops_set_late(); |
671f9a3e | 1329 | } |
6bd33e1e CH |
1330 | #else |
1331 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) | |
1332 | { | |
1333 | dtb_early_va = (void *)dtb_pa; | |
a78c6f59 | 1334 | dtb_early_pa = dtb_pa; |
6bd33e1e CH |
1335 | } |
1336 | ||
1337 | static inline void setup_vm_final(void) | |
1338 | { | |
1339 | } | |
1340 | #endif /* CONFIG_MMU */ | |
671f9a3e | 1341 | |
e53d2818 NK |
1342 | /* |
1343 | * reserve_crashkernel() - reserves memory for crash kernel | |
1344 | * | |
1345 | * This function reserves memory area given in "crashkernel=" kernel command | |
1346 | * line parameter. The memory reserved is used by dump capture kernel when | |
1347 | * primary kernel is crashing. | |
1348 | */ | |
39365395 | 1349 | static void __init arch_reserve_crashkernel(void) |
e53d2818 | 1350 | { |
39365395 BH |
1351 | unsigned long long low_size = 0; |
1352 | unsigned long long crash_base, crash_size; | |
5882e5ac | 1353 | char *cmdline = boot_command_line; |
5882e5ac | 1354 | bool high = false; |
39365395 | 1355 | int ret; |
e53d2818 | 1356 | |
d414cb37 JZ |
1357 | if (!IS_ENABLED(CONFIG_KEXEC_CORE)) |
1358 | return; | |
56409750 | 1359 | |
5882e5ac | 1360 | ret = parse_crashkernel(cmdline, memblock_phys_mem_size(), |
39365395 BH |
1361 | &crash_size, &crash_base, |
1362 | &low_size, &high); | |
1363 | if (ret) | |
e53d2818 | 1364 | return; |
e53d2818 | 1365 | |
39365395 BH |
1366 | reserve_crashkernel_generic(cmdline, crash_size, crash_base, |
1367 | low_size, high); | |
e53d2818 | 1368 | } |
e53d2818 | 1369 | |
671f9a3e AP |
1370 | void __init paging_init(void) |
1371 | { | |
f842f5ff | 1372 | setup_bootmem(); |
671f9a3e | 1373 | setup_vm_final(); |
85fadc0d WZ |
1374 | |
1375 | /* Depend on that Linear Mapping is ready */ | |
1376 | memblock_allow_resize(); | |
cbd34f4b AP |
1377 | } |
1378 | ||
1379 | void __init misc_mem_init(void) | |
1380 | { | |
f6e5aedf | 1381 | early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT); |
4f0e8eef | 1382 | arch_numa_init(); |
cbd34f4b | 1383 | sparse_init(); |
671f9a3e | 1384 | zone_sizes_init(); |
39365395 | 1385 | arch_reserve_crashkernel(); |
4f0e8eef | 1386 | memblock_dump_all(); |
6f1e9e94 | 1387 | } |
d95f1a54 | 1388 | |
9fe57d8c | 1389 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
d95f1a54 LG |
1390 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
1391 | struct vmem_altmap *altmap) | |
1392 | { | |
1d9cfee7 | 1393 | return vmemmap_populate_basepages(start, end, node, NULL); |
d95f1a54 LG |
1394 | } |
1395 | #endif | |
7d3332be BT |
1396 | |
1397 | #if defined(CONFIG_MMU) && defined(CONFIG_64BIT) | |
1398 | /* | |
1399 | * Pre-allocates page-table pages for a specific area in the kernel | |
1400 | * page-table. Only the level which needs to be synchronized between | |
1401 | * all page-tables is allocated because the synchronization can be | |
1402 | * expensive. | |
1403 | */ | |
1404 | static void __init preallocate_pgd_pages_range(unsigned long start, unsigned long end, | |
1405 | const char *area) | |
1406 | { | |
1407 | unsigned long addr; | |
1408 | const char *lvl; | |
1409 | ||
1410 | for (addr = start; addr < end && addr >= start; addr = ALIGN(addr + 1, PGDIR_SIZE)) { | |
1411 | pgd_t *pgd = pgd_offset_k(addr); | |
1412 | p4d_t *p4d; | |
1413 | pud_t *pud; | |
1414 | pmd_t *pmd; | |
1415 | ||
1416 | lvl = "p4d"; | |
1417 | p4d = p4d_alloc(&init_mm, pgd, addr); | |
1418 | if (!p4d) | |
1419 | goto failed; | |
1420 | ||
1421 | if (pgtable_l5_enabled) | |
1422 | continue; | |
1423 | ||
1424 | lvl = "pud"; | |
1425 | pud = pud_alloc(&init_mm, p4d, addr); | |
1426 | if (!pud) | |
1427 | goto failed; | |
1428 | ||
1429 | if (pgtable_l4_enabled) | |
1430 | continue; | |
1431 | ||
1432 | lvl = "pmd"; | |
1433 | pmd = pmd_alloc(&init_mm, pud, addr); | |
1434 | if (!pmd) | |
1435 | goto failed; | |
1436 | } | |
1437 | return; | |
1438 | ||
1439 | failed: | |
1440 | /* | |
1441 | * The pages have to be there now or they will be missing in | |
1442 | * process page-tables later. | |
1443 | */ | |
1444 | panic("Failed to pre-allocate %s pages for %s area\n", lvl, area); | |
1445 | } | |
1446 | ||
1447 | void __init pgtable_cache_init(void) | |
1448 | { | |
1449 | preallocate_pgd_pages_range(VMALLOC_START, VMALLOC_END, "vmalloc"); | |
1450 | if (IS_ENABLED(CONFIG_MODULES)) | |
1451 | preallocate_pgd_pages_range(MODULES_VADDR, MODULES_END, "bpf/modules"); | |
1452 | } | |
1453 | #endif |