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Commit | Line | Data |
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7768a13c | 1 | /* |
2817142f | 2 | * omap_wdt.c |
7768a13c | 3 | * |
2817142f | 4 | * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog |
7768a13c KS |
5 | * |
6 | * Author: MontaVista Software, Inc. | |
7 | * <[email protected]> or <[email protected]> | |
8 | * | |
9 | * 2003 (c) MontaVista Software, Inc. This file is licensed under the | |
10 | * terms of the GNU General Public License version 2. This program is | |
11 | * licensed "as is" without any warranty of any kind, whether express | |
12 | * or implied. | |
13 | * | |
14 | * History: | |
15 | * | |
16 | * 20030527: George G. Davis <[email protected]> | |
17 | * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c | |
18 | * (c) Copyright 2000 Oleg Drokin <[email protected]> | |
29fa0586 | 19 | * Based on SoftDog driver by Alan Cox <[email protected]> |
7768a13c KS |
20 | * |
21 | * Copyright (c) 2004 Texas Instruments. | |
22 | * 1. Modified to support OMAP1610 32-KHz watchdog timer | |
23 | * 2. Ported to 2.6 kernel | |
24 | * | |
25 | * Copyright (c) 2005 David Brownell | |
26 | * Use the driver model and standard identifiers; handle bigger timeouts. | |
27 | */ | |
28 | ||
29 | #include <linux/module.h> | |
7768a13c KS |
30 | #include <linux/types.h> |
31 | #include <linux/kernel.h> | |
32 | #include <linux/fs.h> | |
33 | #include <linux/mm.h> | |
34 | #include <linux/miscdevice.h> | |
35 | #include <linux/watchdog.h> | |
36 | #include <linux/reboot.h> | |
7768a13c KS |
37 | #include <linux/init.h> |
38 | #include <linux/err.h> | |
39 | #include <linux/platform_device.h> | |
40 | #include <linux/moduleparam.h> | |
1977f032 | 41 | #include <linux/bitops.h> |
089ab079 | 42 | #include <linux/io.h> |
12b9df7d | 43 | #include <linux/uaccess.h> |
5a0e3ad6 | 44 | #include <linux/slab.h> |
7ec5ad0f | 45 | #include <linux/pm_runtime.h> |
a09e64fb | 46 | #include <mach/hardware.h> |
ce491cf8 | 47 | #include <plat/prcm.h> |
7768a13c KS |
48 | |
49 | #include "omap_wdt.h" | |
50 | ||
2817142f FB |
51 | static struct platform_device *omap_wdt_dev; |
52 | ||
7768a13c KS |
53 | static unsigned timer_margin; |
54 | module_param(timer_margin, uint, 0); | |
55 | MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); | |
56 | ||
7768a13c | 57 | static unsigned int wdt_trgr_pattern = 0x1234; |
12b9df7d | 58 | static spinlock_t wdt_lock; |
7768a13c | 59 | |
2817142f FB |
60 | struct omap_wdt_dev { |
61 | void __iomem *base; /* physical */ | |
62 | struct device *dev; | |
63 | int omap_wdt_users; | |
2817142f FB |
64 | struct resource *mem; |
65 | struct miscdevice omap_wdt_miscdev; | |
66 | }; | |
67 | ||
68 | static void omap_wdt_ping(struct omap_wdt_dev *wdev) | |
7768a13c | 69 | { |
2817142f | 70 | void __iomem *base = wdev->base; |
b3112180 | 71 | |
7768a13c | 72 | /* wait for posted write to complete */ |
9f69e3b0 | 73 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) |
7768a13c | 74 | cpu_relax(); |
b3112180 | 75 | |
7768a13c | 76 | wdt_trgr_pattern = ~wdt_trgr_pattern; |
9f69e3b0 | 77 | __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR)); |
b3112180 | 78 | |
7768a13c | 79 | /* wait for posted write to complete */ |
9f69e3b0 | 80 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) |
7768a13c KS |
81 | cpu_relax(); |
82 | /* reloaded WCRR from WLDR */ | |
83 | } | |
84 | ||
2817142f | 85 | static void omap_wdt_enable(struct omap_wdt_dev *wdev) |
7768a13c | 86 | { |
b3112180 FB |
87 | void __iomem *base = wdev->base; |
88 | ||
7768a13c | 89 | /* Sequence to enable the watchdog */ |
9f69e3b0 FB |
90 | __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR); |
91 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) | |
7768a13c | 92 | cpu_relax(); |
b3112180 | 93 | |
9f69e3b0 FB |
94 | __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR); |
95 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) | |
7768a13c KS |
96 | cpu_relax(); |
97 | } | |
98 | ||
2817142f | 99 | static void omap_wdt_disable(struct omap_wdt_dev *wdev) |
7768a13c | 100 | { |
b3112180 FB |
101 | void __iomem *base = wdev->base; |
102 | ||
7768a13c | 103 | /* sequence required to disable watchdog */ |
9f69e3b0 FB |
104 | __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ |
105 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) | |
7768a13c | 106 | cpu_relax(); |
b3112180 | 107 | |
9f69e3b0 FB |
108 | __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ |
109 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) | |
7768a13c KS |
110 | cpu_relax(); |
111 | } | |
112 | ||
113 | static void omap_wdt_adjust_timeout(unsigned new_timeout) | |
114 | { | |
115 | if (new_timeout < TIMER_MARGIN_MIN) | |
116 | new_timeout = TIMER_MARGIN_DEFAULT; | |
117 | if (new_timeout > TIMER_MARGIN_MAX) | |
118 | new_timeout = TIMER_MARGIN_MAX; | |
119 | timer_margin = new_timeout; | |
120 | } | |
121 | ||
2817142f | 122 | static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev) |
7768a13c KS |
123 | { |
124 | u32 pre_margin = GET_WLDR_VAL(timer_margin); | |
b3112180 | 125 | void __iomem *base = wdev->base; |
7768a13c | 126 | |
0503add9 PW |
127 | pm_runtime_get_sync(wdev->dev); |
128 | ||
7768a13c | 129 | /* just count up at 32 KHz */ |
9f69e3b0 | 130 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) |
7768a13c | 131 | cpu_relax(); |
b3112180 | 132 | |
9f69e3b0 FB |
133 | __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR); |
134 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) | |
7768a13c | 135 | cpu_relax(); |
0503add9 PW |
136 | |
137 | pm_runtime_put_sync(wdev->dev); | |
7768a13c KS |
138 | } |
139 | ||
140 | /* | |
141 | * Allow only one task to hold it open | |
142 | */ | |
7768a13c KS |
143 | static int omap_wdt_open(struct inode *inode, struct file *file) |
144 | { | |
b3112180 FB |
145 | struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev); |
146 | void __iomem *base = wdev->base; | |
147 | ||
2817142f | 148 | if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users))) |
7768a13c KS |
149 | return -EBUSY; |
150 | ||
7ec5ad0f | 151 | pm_runtime_get_sync(wdev->dev); |
7768a13c KS |
152 | |
153 | /* initialize prescaler */ | |
9f69e3b0 | 154 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) |
7768a13c | 155 | cpu_relax(); |
b3112180 | 156 | |
9f69e3b0 FB |
157 | __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL); |
158 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) | |
7768a13c KS |
159 | cpu_relax(); |
160 | ||
2817142f FB |
161 | file->private_data = (void *) wdev; |
162 | ||
163 | omap_wdt_set_timeout(wdev); | |
789cd470 | 164 | omap_wdt_ping(wdev); /* trigger loading of new timeout value */ |
2817142f | 165 | omap_wdt_enable(wdev); |
b3112180 | 166 | |
0503add9 PW |
167 | pm_runtime_put_sync(wdev->dev); |
168 | ||
ec9505a7 | 169 | return nonseekable_open(inode, file); |
7768a13c KS |
170 | } |
171 | ||
172 | static int omap_wdt_release(struct inode *inode, struct file *file) | |
173 | { | |
b3112180 FB |
174 | struct omap_wdt_dev *wdev = file->private_data; |
175 | ||
7768a13c KS |
176 | /* |
177 | * Shut off the timer unless NOWAYOUT is defined. | |
178 | */ | |
179 | #ifndef CONFIG_WATCHDOG_NOWAYOUT | |
0503add9 | 180 | pm_runtime_get_sync(wdev->dev); |
7768a13c | 181 | |
2817142f | 182 | omap_wdt_disable(wdev); |
7768a13c | 183 | |
7ec5ad0f | 184 | pm_runtime_put_sync(wdev->dev); |
7768a13c KS |
185 | #else |
186 | printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n"); | |
187 | #endif | |
2817142f | 188 | wdev->omap_wdt_users = 0; |
b3112180 | 189 | |
7768a13c KS |
190 | return 0; |
191 | } | |
192 | ||
12b9df7d | 193 | static ssize_t omap_wdt_write(struct file *file, const char __user *data, |
7768a13c KS |
194 | size_t len, loff_t *ppos) |
195 | { | |
b3112180 FB |
196 | struct omap_wdt_dev *wdev = file->private_data; |
197 | ||
7768a13c | 198 | /* Refresh LOAD_TIME. */ |
12b9df7d | 199 | if (len) { |
0503add9 | 200 | pm_runtime_get_sync(wdev->dev); |
12b9df7d | 201 | spin_lock(&wdt_lock); |
2817142f | 202 | omap_wdt_ping(wdev); |
12b9df7d | 203 | spin_unlock(&wdt_lock); |
0503add9 | 204 | pm_runtime_put_sync(wdev->dev); |
12b9df7d | 205 | } |
7768a13c KS |
206 | return len; |
207 | } | |
208 | ||
12b9df7d AC |
209 | static long omap_wdt_ioctl(struct file *file, unsigned int cmd, |
210 | unsigned long arg) | |
7768a13c | 211 | { |
2817142f | 212 | struct omap_wdt_dev *wdev; |
7768a13c | 213 | int new_margin; |
12b9df7d | 214 | static const struct watchdog_info ident = { |
7768a13c KS |
215 | .identity = "OMAP Watchdog", |
216 | .options = WDIOF_SETTIMEOUT, | |
217 | .firmware_version = 0, | |
218 | }; | |
b3112180 | 219 | |
2817142f | 220 | wdev = file->private_data; |
7768a13c KS |
221 | |
222 | switch (cmd) { | |
7768a13c KS |
223 | case WDIOC_GETSUPPORT: |
224 | return copy_to_user((struct watchdog_info __user *)arg, &ident, | |
225 | sizeof(ident)); | |
226 | case WDIOC_GETSTATUS: | |
227 | return put_user(0, (int __user *)arg); | |
228 | case WDIOC_GETBOOTSTATUS: | |
229 | if (cpu_is_omap16xx()) | |
9f69e3b0 | 230 | return put_user(__raw_readw(ARM_SYSST), |
7768a13c KS |
231 | (int __user *)arg); |
232 | if (cpu_is_omap24xx()) | |
233 | return put_user(omap_prcm_get_reset_sources(), | |
234 | (int __user *)arg); | |
235 | case WDIOC_KEEPALIVE: | |
0503add9 | 236 | pm_runtime_get_sync(wdev->dev); |
12b9df7d | 237 | spin_lock(&wdt_lock); |
2817142f | 238 | omap_wdt_ping(wdev); |
12b9df7d | 239 | spin_unlock(&wdt_lock); |
0503add9 | 240 | pm_runtime_put_sync(wdev->dev); |
7768a13c KS |
241 | return 0; |
242 | case WDIOC_SETTIMEOUT: | |
243 | if (get_user(new_margin, (int __user *)arg)) | |
244 | return -EFAULT; | |
245 | omap_wdt_adjust_timeout(new_margin); | |
246 | ||
0503add9 | 247 | pm_runtime_get_sync(wdev->dev); |
12b9df7d | 248 | spin_lock(&wdt_lock); |
2817142f FB |
249 | omap_wdt_disable(wdev); |
250 | omap_wdt_set_timeout(wdev); | |
251 | omap_wdt_enable(wdev); | |
7768a13c | 252 | |
2817142f | 253 | omap_wdt_ping(wdev); |
12b9df7d | 254 | spin_unlock(&wdt_lock); |
0503add9 | 255 | pm_runtime_put_sync(wdev->dev); |
7768a13c KS |
256 | /* Fall */ |
257 | case WDIOC_GETTIMEOUT: | |
258 | return put_user(timer_margin, (int __user *)arg); | |
0c06090c WVS |
259 | default: |
260 | return -ENOTTY; | |
7768a13c KS |
261 | } |
262 | } | |
263 | ||
2b8693c0 | 264 | static const struct file_operations omap_wdt_fops = { |
7768a13c KS |
265 | .owner = THIS_MODULE, |
266 | .write = omap_wdt_write, | |
12b9df7d | 267 | .unlocked_ioctl = omap_wdt_ioctl, |
7768a13c KS |
268 | .open = omap_wdt_open, |
269 | .release = omap_wdt_release, | |
6038f373 | 270 | .llseek = no_llseek, |
7768a13c KS |
271 | }; |
272 | ||
0e3912c7 | 273 | static int __devinit omap_wdt_probe(struct platform_device *pdev) |
7768a13c KS |
274 | { |
275 | struct resource *res, *mem; | |
2817142f | 276 | struct omap_wdt_dev *wdev; |
b3112180 | 277 | int ret; |
7768a13c KS |
278 | |
279 | /* reserve static register mappings */ | |
280 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
b3112180 FB |
281 | if (!res) { |
282 | ret = -ENOENT; | |
283 | goto err_get_resource; | |
284 | } | |
7768a13c | 285 | |
b3112180 FB |
286 | if (omap_wdt_dev) { |
287 | ret = -EBUSY; | |
288 | goto err_busy; | |
289 | } | |
2817142f | 290 | |
b782a563 | 291 | mem = request_mem_region(res->start, resource_size(res), pdev->name); |
b3112180 FB |
292 | if (!mem) { |
293 | ret = -EBUSY; | |
294 | goto err_busy; | |
295 | } | |
7768a13c | 296 | |
2817142f FB |
297 | wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL); |
298 | if (!wdev) { | |
299 | ret = -ENOMEM; | |
b3112180 | 300 | goto err_kzalloc; |
2817142f | 301 | } |
b3112180 | 302 | |
2817142f FB |
303 | wdev->omap_wdt_users = 0; |
304 | wdev->mem = mem; | |
7ec5ad0f | 305 | wdev->dev = &pdev->dev; |
2817142f | 306 | |
b782a563 | 307 | wdev->base = ioremap(res->start, resource_size(res)); |
9f69e3b0 FB |
308 | if (!wdev->base) { |
309 | ret = -ENOMEM; | |
b3112180 | 310 | goto err_ioremap; |
9f69e3b0 FB |
311 | } |
312 | ||
2817142f | 313 | platform_set_drvdata(pdev, wdev); |
7768a13c | 314 | |
7ec5ad0f VC |
315 | pm_runtime_enable(wdev->dev); |
316 | pm_runtime_get_sync(wdev->dev); | |
789cd470 | 317 | |
2817142f | 318 | omap_wdt_disable(wdev); |
7768a13c KS |
319 | omap_wdt_adjust_timeout(timer_margin); |
320 | ||
2817142f FB |
321 | wdev->omap_wdt_miscdev.parent = &pdev->dev; |
322 | wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR; | |
323 | wdev->omap_wdt_miscdev.name = "watchdog"; | |
324 | wdev->omap_wdt_miscdev.fops = &omap_wdt_fops; | |
325 | ||
326 | ret = misc_register(&(wdev->omap_wdt_miscdev)); | |
7768a13c | 327 | if (ret) |
b3112180 | 328 | goto err_misc; |
7768a13c | 329 | |
2817142f | 330 | pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n", |
9f69e3b0 | 331 | __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF, |
2817142f | 332 | timer_margin); |
7768a13c | 333 | |
7ec5ad0f | 334 | pm_runtime_put_sync(wdev->dev); |
789cd470 | 335 | |
2817142f FB |
336 | omap_wdt_dev = pdev; |
337 | ||
7768a13c KS |
338 | return 0; |
339 | ||
b3112180 FB |
340 | err_misc: |
341 | platform_set_drvdata(pdev, NULL); | |
342 | iounmap(wdev->base); | |
343 | ||
344 | err_ioremap: | |
345 | wdev->base = NULL; | |
b3112180 FB |
346 | kfree(wdev); |
347 | ||
348 | err_kzalloc: | |
b782a563 | 349 | release_mem_region(res->start, resource_size(res)); |
b3112180 FB |
350 | |
351 | err_busy: | |
352 | err_get_resource: | |
353 | ||
7768a13c KS |
354 | return ret; |
355 | } | |
356 | ||
357 | static void omap_wdt_shutdown(struct platform_device *pdev) | |
358 | { | |
b3112180 | 359 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
2817142f | 360 | |
0503add9 PW |
361 | if (wdev->omap_wdt_users) { |
362 | pm_runtime_get_sync(wdev->dev); | |
2817142f | 363 | omap_wdt_disable(wdev); |
0503add9 PW |
364 | pm_runtime_put_sync(wdev->dev); |
365 | } | |
7768a13c KS |
366 | } |
367 | ||
0e3912c7 | 368 | static int __devexit omap_wdt_remove(struct platform_device *pdev) |
7768a13c | 369 | { |
b3112180 | 370 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
2817142f FB |
371 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
372 | ||
373 | if (!res) | |
374 | return -ENOENT; | |
375 | ||
376 | misc_deregister(&(wdev->omap_wdt_miscdev)); | |
b782a563 | 377 | release_mem_region(res->start, resource_size(res)); |
2817142f | 378 | platform_set_drvdata(pdev, NULL); |
b3112180 | 379 | |
9f69e3b0 FB |
380 | iounmap(wdev->base); |
381 | ||
2817142f FB |
382 | kfree(wdev); |
383 | omap_wdt_dev = NULL; | |
b3112180 | 384 | |
7768a13c KS |
385 | return 0; |
386 | } | |
387 | ||
388 | #ifdef CONFIG_PM | |
389 | ||
390 | /* REVISIT ... not clear this is the best way to handle system suspend; and | |
391 | * it's very inappropriate for selective device suspend (e.g. suspending this | |
392 | * through sysfs rather than by stopping the watchdog daemon). Also, this | |
393 | * may not play well enough with NOWAYOUT... | |
394 | */ | |
395 | ||
396 | static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) | |
397 | { | |
b3112180 FB |
398 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
399 | ||
0503add9 PW |
400 | if (wdev->omap_wdt_users) { |
401 | pm_runtime_get_sync(wdev->dev); | |
2817142f | 402 | omap_wdt_disable(wdev); |
0503add9 PW |
403 | pm_runtime_put_sync(wdev->dev); |
404 | } | |
b3112180 | 405 | |
7768a13c KS |
406 | return 0; |
407 | } | |
408 | ||
409 | static int omap_wdt_resume(struct platform_device *pdev) | |
410 | { | |
b3112180 FB |
411 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
412 | ||
2817142f | 413 | if (wdev->omap_wdt_users) { |
0503add9 | 414 | pm_runtime_get_sync(wdev->dev); |
2817142f FB |
415 | omap_wdt_enable(wdev); |
416 | omap_wdt_ping(wdev); | |
0503add9 | 417 | pm_runtime_put_sync(wdev->dev); |
7768a13c | 418 | } |
b3112180 | 419 | |
7768a13c KS |
420 | return 0; |
421 | } | |
422 | ||
423 | #else | |
424 | #define omap_wdt_suspend NULL | |
425 | #define omap_wdt_resume NULL | |
426 | #endif | |
427 | ||
428 | static struct platform_driver omap_wdt_driver = { | |
429 | .probe = omap_wdt_probe, | |
0e3912c7 | 430 | .remove = __devexit_p(omap_wdt_remove), |
7768a13c KS |
431 | .shutdown = omap_wdt_shutdown, |
432 | .suspend = omap_wdt_suspend, | |
433 | .resume = omap_wdt_resume, | |
434 | .driver = { | |
435 | .owner = THIS_MODULE, | |
436 | .name = "omap_wdt", | |
437 | }, | |
438 | }; | |
439 | ||
440 | static int __init omap_wdt_init(void) | |
441 | { | |
12b9df7d | 442 | spin_lock_init(&wdt_lock); |
7768a13c KS |
443 | return platform_driver_register(&omap_wdt_driver); |
444 | } | |
445 | ||
446 | static void __exit omap_wdt_exit(void) | |
447 | { | |
448 | platform_driver_unregister(&omap_wdt_driver); | |
449 | } | |
450 | ||
451 | module_init(omap_wdt_init); | |
452 | module_exit(omap_wdt_exit); | |
453 | ||
454 | MODULE_AUTHOR("George G. Davis"); | |
455 | MODULE_LICENSE("GPL"); | |
456 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | |
f37d193c | 457 | MODULE_ALIAS("platform:omap_wdt"); |