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1 | /* |
2 | * Copyright 2014 Cisco Systems, Inc. All rights reserved. | |
3 | * | |
4 | * This program is free software; you may redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; version 2 of the License. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
9 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
10 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
11 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
12 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
14 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
15 | * SOFTWARE. | |
16 | */ | |
17 | ||
18 | #ifndef _VNIC_CQ_H_ | |
19 | #define _VNIC_CQ_H_ | |
20 | ||
21 | #include "cq_desc.h" | |
22 | #include "vnic_dev.h" | |
23 | ||
24 | /* Completion queue control */ | |
25 | struct vnic_cq_ctrl { | |
26 | u64 ring_base; /* 0x00 */ | |
27 | u32 ring_size; /* 0x08 */ | |
28 | u32 pad0; | |
29 | u32 flow_control_enable; /* 0x10 */ | |
30 | u32 pad1; | |
31 | u32 color_enable; /* 0x18 */ | |
32 | u32 pad2; | |
33 | u32 cq_head; /* 0x20 */ | |
34 | u32 pad3; | |
35 | u32 cq_tail; /* 0x28 */ | |
36 | u32 pad4; | |
37 | u32 cq_tail_color; /* 0x30 */ | |
38 | u32 pad5; | |
39 | u32 interrupt_enable; /* 0x38 */ | |
40 | u32 pad6; | |
41 | u32 cq_entry_enable; /* 0x40 */ | |
42 | u32 pad7; | |
43 | u32 cq_message_enable; /* 0x48 */ | |
44 | u32 pad8; | |
45 | u32 interrupt_offset; /* 0x50 */ | |
46 | u32 pad9; | |
47 | u64 cq_message_addr; /* 0x58 */ | |
48 | u32 pad10; | |
49 | }; | |
50 | ||
51 | struct vnic_cq { | |
52 | unsigned int index; | |
53 | struct vnic_dev *vdev; | |
54 | struct vnic_cq_ctrl __iomem *ctrl; /* memory-mapped */ | |
55 | struct vnic_dev_ring ring; | |
56 | unsigned int to_clean; | |
57 | unsigned int last_color; | |
58 | }; | |
59 | ||
60 | static inline unsigned int svnic_cq_service(struct vnic_cq *cq, | |
61 | unsigned int work_to_do, | |
62 | int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc, | |
63 | u8 type, u16 q_number, u16 completed_index, void *opaque), | |
64 | void *opaque) | |
65 | { | |
66 | struct cq_desc *cq_desc; | |
67 | unsigned int work_done = 0; | |
68 | u16 q_number, completed_index; | |
69 | u8 type, color; | |
70 | ||
71 | cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs + | |
72 | cq->ring.desc_size * cq->to_clean); | |
73 | cq_desc_dec(cq_desc, &type, &color, | |
74 | &q_number, &completed_index); | |
75 | ||
76 | while (color != cq->last_color) { | |
77 | ||
78 | if ((*q_service)(cq->vdev, cq_desc, type, | |
79 | q_number, completed_index, opaque)) | |
80 | break; | |
81 | ||
82 | cq->to_clean++; | |
83 | if (cq->to_clean == cq->ring.desc_count) { | |
84 | cq->to_clean = 0; | |
85 | cq->last_color = cq->last_color ? 0 : 1; | |
86 | } | |
87 | ||
88 | cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs + | |
89 | cq->ring.desc_size * cq->to_clean); | |
90 | cq_desc_dec(cq_desc, &type, &color, | |
91 | &q_number, &completed_index); | |
92 | ||
93 | work_done++; | |
94 | if (work_done >= work_to_do) | |
95 | break; | |
96 | } | |
97 | ||
98 | return work_done; | |
99 | } | |
100 | ||
101 | void svnic_cq_free(struct vnic_cq *cq); | |
102 | int svnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, | |
103 | unsigned int index, unsigned int desc_count, unsigned int desc_size); | |
104 | void svnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable, | |
105 | unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail, | |
106 | unsigned int cq_tail_color, unsigned int interrupt_enable, | |
107 | unsigned int cq_entry_enable, unsigned int message_enable, | |
108 | unsigned int interrupt_offset, u64 message_addr); | |
109 | void svnic_cq_clean(struct vnic_cq *cq); | |
110 | #endif /* _VNIC_CQ_H_ */ |