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81c22ad0 PZ |
1 | /* |
2 | * Simple Reset Controller ops | |
3 | * | |
4 | * Based on Allwinner SoCs Reset Controller driver | |
5 | * | |
6 | * Copyright 2013 Maxime Ripard | |
7 | * | |
8 | * Maxime Ripard <[email protected]> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | */ | |
15 | ||
16 | #ifndef __RESET_SIMPLE_H__ | |
17 | #define __RESET_SIMPLE_H__ | |
18 | ||
19 | #include <linux/io.h> | |
20 | #include <linux/reset-controller.h> | |
21 | #include <linux/spinlock.h> | |
22 | ||
23 | /** | |
24 | * struct reset_simple_data - driver data for simple reset controllers | |
25 | * @lock: spinlock to protect registers during read-modify-write cycles | |
26 | * @membase: memory mapped I/O register range | |
27 | * @rcdev: reset controller device base structure | |
28 | * @active_low: if true, bits are cleared to assert the reset. Otherwise, bits | |
29 | * are set to assert the reset. Note that this says nothing about | |
30 | * the voltage level of the actual reset line. | |
adf20d7c PZ |
31 | * @status_active_low: if true, bits read back as cleared while the reset is |
32 | * asserted. Otherwise, bits read back as set while the | |
33 | * reset is asserted. | |
81c22ad0 PZ |
34 | */ |
35 | struct reset_simple_data { | |
36 | spinlock_t lock; | |
37 | void __iomem *membase; | |
38 | struct reset_controller_dev rcdev; | |
39 | bool active_low; | |
adf20d7c | 40 | bool status_active_low; |
81c22ad0 PZ |
41 | }; |
42 | ||
43 | extern const struct reset_control_ops reset_simple_ops; | |
44 | ||
45 | #endif /* __RESET_SIMPLE_H__ */ |