[linux.git] / drivers / rtc / rtc-ds1511.c

/*
 * An rtc driver for the Dallas DS1511
 *
 * Copyright (C) 2006 Atsushi Nemoto <[email protected]>
 * Copyright (C) 2007 Andrew Sharp <[email protected]>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Real time clock driver for the Dallas 1511 chip, which also
 * contains a watchdog timer.  There is a tiny amount of code that
 * platform code could use to mess with the watchdog device a little
 * bit, but not a full watchdog driver.
 */

#include <linux/bcd.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gfp.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/rtc.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/module.h>

#define DRV_VERSION "0.6"

enum ds1511reg {
	DS1511_SEC = 0x0,
	DS1511_MIN = 0x1,
	DS1511_HOUR = 0x2,
	DS1511_DOW = 0x3,
	DS1511_DOM = 0x4,
	DS1511_MONTH = 0x5,
	DS1511_YEAR = 0x6,
	DS1511_CENTURY = 0x7,
	DS1511_AM1_SEC = 0x8,
	DS1511_AM2_MIN = 0x9,
	DS1511_AM3_HOUR = 0xa,
	DS1511_AM4_DATE = 0xb,
	DS1511_WD_MSEC = 0xc,
	DS1511_WD_SEC = 0xd,
	DS1511_CONTROL_A = 0xe,
	DS1511_CONTROL_B = 0xf,
	DS1511_RAMADDR_LSB = 0x10,
	DS1511_RAMDATA = 0x13
};

#define DS1511_BLF1	0x80
#define DS1511_BLF2	0x40
#define DS1511_PRS	0x20
#define DS1511_PAB	0x10
#define DS1511_TDF	0x08
#define DS1511_KSF	0x04
#define DS1511_WDF	0x02
#define DS1511_IRQF	0x01
#define DS1511_TE	0x80
#define DS1511_CS	0x40
#define DS1511_BME	0x20
#define DS1511_TPE	0x10
#define DS1511_TIE	0x08
#define DS1511_KIE	0x04
#define DS1511_WDE	0x02
#define DS1511_WDS	0x01
#define DS1511_RAM_MAX	0xff

#define RTC_CMD		DS1511_CONTROL_B
#define RTC_CMD1	DS1511_CONTROL_A

#define RTC_ALARM_SEC	DS1511_AM1_SEC
#define RTC_ALARM_MIN	DS1511_AM2_MIN
#define RTC_ALARM_HOUR	DS1511_AM3_HOUR
#define RTC_ALARM_DATE	DS1511_AM4_DATE

#define RTC_SEC		DS1511_SEC
#define RTC_MIN		DS1511_MIN
#define RTC_HOUR	DS1511_HOUR
#define RTC_DOW		DS1511_DOW
#define RTC_DOM		DS1511_DOM
#define RTC_MON		DS1511_MONTH
#define RTC_YEAR	DS1511_YEAR
#define RTC_CENTURY	DS1511_CENTURY

#define RTC_TIE	DS1511_TIE
#define RTC_TE	DS1511_TE

struct rtc_plat_data {
	struct rtc_device *rtc;
	void __iomem *ioaddr;		/* virtual base address */
	int irq;
	unsigned int irqen;
	int alrm_sec;
	int alrm_min;
	int alrm_hour;
	int alrm_mday;
	spinlock_t lock;
};

static DEFINE_SPINLOCK(ds1511_lock);

static __iomem char *ds1511_base;
static u32 reg_spacing = 1;

static noinline void
rtc_write(uint8_t val, uint32_t reg)
{
	writeb(val, ds1511_base + (reg * reg_spacing));
}

static inline void
rtc_write_alarm(uint8_t val, enum ds1511reg reg)
{
	rtc_write((val | 0x80), reg);
}

static noinline uint8_t
rtc_read(enum ds1511reg reg)
{
	return readb(ds1511_base + (reg * reg_spacing));
}

static inline void
rtc_disable_update(void)
{
	rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
}

static void
rtc_enable_update(void)
{
	rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
}

/*
 * #define DS1511_WDOG_RESET_SUPPORT
 *
 * Uncomment this if you want to use these routines in
 * some platform code.
 */
#ifdef DS1511_WDOG_RESET_SUPPORT
/*
 * just enough code to set the watchdog timer so that it
 * will reboot the system
 */
void
ds1511_wdog_set(unsigned long deciseconds)
{
	/*
	 * the wdog timer can take 99.99 seconds
	 */
	deciseconds %= 10000;
	/*
	 * set the wdog values in the wdog registers
	 */
	rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
	rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
	/*
	 * set wdog enable and wdog 'steering' bit to issue a reset
	 */
	rtc_write(DS1511_WDE | DS1511_WDS, RTC_CMD);
}

void
ds1511_wdog_disable(void)
{
	/*
	 * clear wdog enable and wdog 'steering' bits
	 */
	rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
	/*
	 * clear the wdog counter
	 */
	rtc_write(0, DS1511_WD_MSEC);
	rtc_write(0, DS1511_WD_SEC);
}
#endif

/*
 * set the rtc chip's idea of the time.
 * stupidly, some callers call with year unmolested;
 * and some call with  year = year - 1900.  thanks.
 */
static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
{
	u8 mon, day, dow, hrs, min, sec, yrs, cen;
	unsigned long flags;

	/*
	 * won't have to change this for a while
	 */
	if (rtc_tm->tm_year < 1900)
		rtc_tm->tm_year += 1900;

	if (rtc_tm->tm_year < 1970)
		return -EINVAL;

	yrs = rtc_tm->tm_year % 100;
	cen = rtc_tm->tm_year / 100;
	mon = rtc_tm->tm_mon + 1;   /* tm_mon starts at zero */
	day = rtc_tm->tm_mday;
	dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
	hrs = rtc_tm->tm_hour;
	min = rtc_tm->tm_min;
	sec = rtc_tm->tm_sec;

	if ((mon > 12) || (day == 0))
		return -EINVAL;

	if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
		return -EINVAL;

	if ((hrs >= 24) || (min >= 60) || (sec >= 60))
		return -EINVAL;

	/*
	 * each register is a different number of valid bits
	 */
	sec = bin2bcd(sec) & 0x7f;
	min = bin2bcd(min) & 0x7f;
	hrs = bin2bcd(hrs) & 0x3f;
	day = bin2bcd(day) & 0x3f;
	mon = bin2bcd(mon) & 0x1f;
	yrs = bin2bcd(yrs) & 0xff;
	cen = bin2bcd(cen) & 0xff;

	spin_lock_irqsave(&ds1511_lock, flags);
	rtc_disable_update();
	rtc_write(cen, RTC_CENTURY);
	rtc_write(yrs, RTC_YEAR);
	rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
	rtc_write(day, RTC_DOM);
	rtc_write(hrs, RTC_HOUR);
	rtc_write(min, RTC_MIN);
	rtc_write(sec, RTC_SEC);
	rtc_write(dow, RTC_DOW);
	rtc_enable_update();
	spin_unlock_irqrestore(&ds1511_lock, flags);

	return 0;
}

static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
{
	unsigned int century;
	unsigned long flags;

	spin_lock_irqsave(&ds1511_lock, flags);
	rtc_disable_update();

	rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
	rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
	rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
	rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
	rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
	rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
	rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
	century = rtc_read(RTC_CENTURY);

	rtc_enable_update();
	spin_unlock_irqrestore(&ds1511_lock, flags);

	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
	century = bcd2bin(century) * 100;

	/*
	 * Account for differences between how the RTC uses the values
	 * and how they are defined in a struct rtc_time;
	 */
	century += rtc_tm->tm_year;
	rtc_tm->tm_year = century - 1900;

	rtc_tm->tm_mon--;

	if (rtc_valid_tm(rtc_tm) < 0) {
		dev_err(dev, "retrieved date/time is not valid.\n");
		rtc_time_to_tm(0, rtc_tm);
	}
	return 0;
}

/*
 * write the alarm register settings
 *
 * we only have the use to interrupt every second, otherwise
 * known as the update interrupt, or the interrupt if the whole
 * date/hours/mins/secs matches.  the ds1511 has many more
 * permutations, but the kernel doesn't.
 */
static void
ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
{
	unsigned long flags;

	spin_lock_irqsave(&pdata->lock, flags);
	rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
	       0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
	       RTC_ALARM_DATE);
	rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
	       0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
	       RTC_ALARM_HOUR);
	rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
	       0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
	       RTC_ALARM_MIN);
	rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
	       0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
	       RTC_ALARM_SEC);
	rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
	rtc_read(RTC_CMD1);	/* clear interrupts */
	spin_unlock_irqrestore(&pdata->lock, flags);
}

static int
ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);

	if (pdata->irq <= 0)
		return -EINVAL;

	pdata->alrm_mday = alrm->time.tm_mday;
	pdata->alrm_hour = alrm->time.tm_hour;
	pdata->alrm_min = alrm->time.tm_min;
	pdata->alrm_sec = alrm->time.tm_sec;
	if (alrm->enabled)
		pdata->irqen |= RTC_AF;

	ds1511_rtc_update_alarm(pdata);
	return 0;
}

static int
ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);

	if (pdata->irq <= 0)
		return -EINVAL;

	alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
	alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
	alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
	alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
	alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
	return 0;
}

static irqreturn_t
ds1511_interrupt(int irq, void *dev_id)
{
	struct platform_device *pdev = dev_id;
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	unsigned long events = 0;

	spin_lock(&pdata->lock);
	/*
	 * read and clear interrupt
	 */
	if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
		events = RTC_IRQF;
		if (rtc_read(RTC_ALARM_SEC) & 0x80)
			events |= RTC_UF;
		else
			events |= RTC_AF;
		if (likely(pdata->rtc))
			rtc_update_irq(pdata->rtc, 1, events);
	}
	spin_unlock(&pdata->lock);
	return events ? IRQ_HANDLED : IRQ_NONE;
}

static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);

	if (pdata->irq <= 0)
		return -EINVAL;
	if (enabled)
		pdata->irqen |= RTC_AF;
	else
		pdata->irqen &= ~RTC_AF;
	ds1511_rtc_update_alarm(pdata);
	return 0;
}

static const struct rtc_class_ops ds1511_rtc_ops = {
	.read_time		= ds1511_rtc_read_time,
	.set_time		= ds1511_rtc_set_time,
	.read_alarm		= ds1511_rtc_read_alarm,
	.set_alarm		= ds1511_rtc_set_alarm,
	.alarm_irq_enable	= ds1511_rtc_alarm_irq_enable,
};

static ssize_t
ds1511_nvram_read(struct file *filp, struct kobject *kobj,
		  struct bin_attribute *ba,
		  char *buf, loff_t pos, size_t size)
{
	ssize_t count;

	/*
	 * if count is more than one, turn on "burst" mode
	 * turn it off when you're done
	 */
	if (size > 1)
		rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);

	if (pos > DS1511_RAM_MAX)
		pos = DS1511_RAM_MAX;

	if (size + pos > DS1511_RAM_MAX + 1)
		size = DS1511_RAM_MAX - pos + 1;

	rtc_write(pos, DS1511_RAMADDR_LSB);
	for (count = 0; size > 0; count++, size--)
		*buf++ = rtc_read(DS1511_RAMDATA);

	if (count > 1)
		rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);

	return count;
}

static ssize_t
ds1511_nvram_write(struct file *filp, struct kobject *kobj,
		   struct bin_attribute *bin_attr,
		   char *buf, loff_t pos, size_t size)
{
	ssize_t count;

	/*
	 * if count is more than one, turn on "burst" mode
	 * turn it off when you're done
	 */
	if (size > 1)
		rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);

	if (pos > DS1511_RAM_MAX)
		pos = DS1511_RAM_MAX;

	if (size + pos > DS1511_RAM_MAX + 1)
		size = DS1511_RAM_MAX - pos + 1;

	rtc_write(pos, DS1511_RAMADDR_LSB);
	for (count = 0; size > 0; count++, size--)
		rtc_write(*buf++, DS1511_RAMDATA);

	if (count > 1)
		rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);

	return count;
}

static struct bin_attribute ds1511_nvram_attr = {
	.attr = {
		.name = "nvram",
		.mode = S_IRUGO | S_IWUSR,
	},
	.size = DS1511_RAM_MAX,
	.read = ds1511_nvram_read,
	.write = ds1511_nvram_write,
};

static int ds1511_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	struct resource *res;
	struct rtc_plat_data *pdata;
	int ret = 0;

	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	ds1511_base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(ds1511_base))
		return PTR_ERR(ds1511_base);
	pdata->ioaddr = ds1511_base;
	pdata->irq = platform_get_irq(pdev, 0);

	/*
	 * turn on the clock and the crystal, etc.
	 */
	rtc_write(0, RTC_CMD);
	rtc_write(0, RTC_CMD1);
	/*
	 * clear the wdog counter
	 */
	rtc_write(0, DS1511_WD_MSEC);
	rtc_write(0, DS1511_WD_SEC);
	/*
	 * start the clock
	 */
	rtc_enable_update();

	/*
	 * check for a dying bat-tree
	 */
	if (rtc_read(RTC_CMD1) & DS1511_BLF1)
		dev_warn(&pdev->dev, "voltage-low detected.\n");

	spin_lock_init(&pdata->lock);
	platform_set_drvdata(pdev, pdata);
	/*
	 * if the platform has an interrupt in mind for this device,
	 * then by all means, set it
	 */
	if (pdata->irq > 0) {
		rtc_read(RTC_CMD1);
		if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
			IRQF_SHARED, pdev->name, pdev) < 0) {

			dev_warn(&pdev->dev, "interrupt not available.\n");
			pdata->irq = 0;
		}
	}

	rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &ds1511_rtc_ops,
					THIS_MODULE);
	if (IS_ERR(rtc))
		return PTR_ERR(rtc);
	pdata->rtc = rtc;

	ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);

	return ret;
}

static int ds1511_rtc_remove(struct platform_device *pdev)
{
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);

	sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
	if (pdata->irq > 0) {
		/*
		 * disable the alarm interrupt
		 */
		rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
		rtc_read(RTC_CMD1);
	}
	return 0;
}

/* work with hotplug and coldplug */
MODULE_ALIAS("platform:ds1511");

static struct platform_driver ds1511_rtc_driver = {
	.probe		= ds1511_rtc_probe,
	.remove		= ds1511_rtc_remove,
	.driver		= {
		.name	= "ds1511",
		.owner	= THIS_MODULE,
	},
};

module_platform_driver(ds1511_rtc_driver);

MODULE_AUTHOR("Andrew Sharp <[email protected]>");
MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
8f26795a AS	1	/*
	2	* An rtc driver for the Dallas DS1511
	3	*
	4	* Copyright (C) 2006 Atsushi Nemoto <[email protected]>
5b73a41c	5	* Copyright (C) 2007 Andrew Sharp <[email protected]>
8f26795a AS	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* Real time clock driver for the Dallas 1511 chip, which also
	12	* contains a watchdog timer. There is a tiny amount of code that
	13	* platform code could use to mess with the watchdog device a little
	14	* bit, but not a full watchdog driver.
	15	*/
	16
	17	#include <linux/bcd.h>
	18	#include <linux/init.h>
	19	#include <linux/kernel.h>
5a0e3ad6	20	#include <linux/gfp.h>
8f26795a AS	21	#include <linux/delay.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/rtc.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/io.h>
2113852b	26	#include <linux/module.h>
8f26795a AS	27
	28	#define DRV_VERSION "0.6"
	29
	30	enum ds1511reg {
	31	DS1511_SEC = 0x0,
	32	DS1511_MIN = 0x1,
	33	DS1511_HOUR = 0x2,
	34	DS1511_DOW = 0x3,
	35	DS1511_DOM = 0x4,
	36	DS1511_MONTH = 0x5,
	37	DS1511_YEAR = 0x6,
	38	DS1511_CENTURY = 0x7,
	39	DS1511_AM1_SEC = 0x8,
	40	DS1511_AM2_MIN = 0x9,
	41	DS1511_AM3_HOUR = 0xa,
	42	DS1511_AM4_DATE = 0xb,
	43	DS1511_WD_MSEC = 0xc,
	44	DS1511_WD_SEC = 0xd,
	45	DS1511_CONTROL_A = 0xe,
	46	DS1511_CONTROL_B = 0xf,
	47	DS1511_RAMADDR_LSB = 0x10,
	48	DS1511_RAMDATA = 0x13
	49	};
	50
	51	#define DS1511_BLF1 0x80
	52	#define DS1511_BLF2 0x40
	53	#define DS1511_PRS 0x20
	54	#define DS1511_PAB 0x10
	55	#define DS1511_TDF 0x08
	56	#define DS1511_KSF 0x04
	57	#define DS1511_WDF 0x02
	58	#define DS1511_IRQF 0x01
	59	#define DS1511_TE 0x80
	60	#define DS1511_CS 0x40
	61	#define DS1511_BME 0x20
	62	#define DS1511_TPE 0x10
	63	#define DS1511_TIE 0x08
	64	#define DS1511_KIE 0x04
	65	#define DS1511_WDE 0x02
	66	#define DS1511_WDS 0x01
	67	#define DS1511_RAM_MAX 0xff
	68
	69	#define RTC_CMD DS1511_CONTROL_B
	70	#define RTC_CMD1 DS1511_CONTROL_A
	71
	72	#define RTC_ALARM_SEC DS1511_AM1_SEC
	73	#define RTC_ALARM_MIN DS1511_AM2_MIN
	74	#define RTC_ALARM_HOUR DS1511_AM3_HOUR
	75	#define RTC_ALARM_DATE DS1511_AM4_DATE
	76
	77	#define RTC_SEC DS1511_SEC
	78	#define RTC_MIN DS1511_MIN
	79	#define RTC_HOUR DS1511_HOUR
	80	#define RTC_DOW DS1511_DOW
	81	#define RTC_DOM DS1511_DOM
	82	#define RTC_MON DS1511_MONTH
	83	#define RTC_YEAR DS1511_YEAR
	84	#define RTC_CENTURY DS1511_CENTURY
	85
	86	#define RTC_TIE DS1511_TIE
	87	#define RTC_TE DS1511_TE
	88
	89	struct rtc_plat_data {
	90	struct rtc_device *rtc;
91	void __iomem ioaddr; / virtual base address */
8f26795a AS	92	int irq;
	93	unsigned int irqen;
	94	int alrm_sec;
	95	int alrm_min;
	96	int alrm_hour;
	97	int alrm_mday;
ba4f3e47	98	spinlock_t lock;
8f26795a AS	99	};
	100
	101	static DEFINE_SPINLOCK(ds1511_lock);
	102
	103	static __iomem char *ds1511_base;
	104	static u32 reg_spacing = 1;
	105
7b2f0053	106	static noinline void
8f26795a AS	107	rtc_write(uint8_t val, uint32_t reg)
	108	{
	109	writeb(val, ds1511_base + (reg * reg_spacing));
	110	}
	111
7b2f0053	112	static inline void
8f26795a AS	113	rtc_write_alarm(uint8_t val, enum ds1511reg reg)
	114	{
	115	rtc_write((val \| 0x80), reg);
	116	}
	117
7b2f0053	118	static noinline uint8_t
8f26795a AS	119	rtc_read(enum ds1511reg reg)
	120	{
	121	return readb(ds1511_base + (reg * reg_spacing));
	122	}
	123
7b2f0053	124	static inline void
8f26795a AS	125	rtc_disable_update(void)
	126	{
	127	rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
	128	}
	129
7b2f0053	130	static void
8f26795a AS	131	rtc_enable_update(void)
	132	{
	133	rtc_write((rtc_read(RTC_CMD) \| RTC_TE), RTC_CMD);
	134	}
	135
	136	/*
	137	* #define DS1511_WDOG_RESET_SUPPORT
	138	*
	139	* Uncomment this if you want to use these routines in
	140	* some platform code.
	141	*/
	142	#ifdef DS1511_WDOG_RESET_SUPPORT
	143	/*
	144	* just enough code to set the watchdog timer so that it
	145	* will reboot the system
	146	*/
7b2f0053	147	void
8f26795a AS	148	ds1511_wdog_set(unsigned long deciseconds)
	149	{
	150	/*
	151	* the wdog timer can take 99.99 seconds
	152	*/
	153	deciseconds %= 10000;
	154	/*
	155	* set the wdog values in the wdog registers
	156	*/
fe20ba70 AB	157	rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
fe20ba70 AB	158	rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
8f26795a AS	159	/*
	160	* set wdog enable and wdog 'steering' bit to issue a reset
	161	*/
	162	rtc_write(DS1511_WDE \| DS1511_WDS, RTC_CMD);
	163	}
	164
7b2f0053	165	void
8f26795a AS	166	ds1511_wdog_disable(void)
	167	{
	168	/*
	169	* clear wdog enable and wdog 'steering' bits
	170	*/
	171	rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE \| DS1511_WDS), RTC_CMD);
	172	/*
	173	* clear the wdog counter
	174	*/
	175	rtc_write(0, DS1511_WD_MSEC);
	176	rtc_write(0, DS1511_WD_SEC);
	177	}
	178	#endif
	179
	180	/*
	181	* set the rtc chip's idea of the time.
	182	* stupidly, some callers call with year unmolested;
	183	* and some call with year = year - 1900. thanks.
	184	*/
a3ed107e	185	static int ds1511_rtc_set_time(struct device dev, struct rtc_time rtc_tm)
8f26795a AS	186	{
8f26795a AS	187	u8 mon, day, dow, hrs, min, sec, yrs, cen;
9a0f4aea	188	unsigned long flags;
8f26795a AS	189
	190	/*
	191	* won't have to change this for a while
	192	*/
7b2f0053	193	if (rtc_tm->tm_year < 1900)
8f26795a	194	rtc_tm->tm_year += 1900;
8f26795a	195
7b2f0053	196	if (rtc_tm->tm_year < 1970)
8f26795a	197	return -EINVAL;
7b2f0053	198
8f26795a AS	199	yrs = rtc_tm->tm_year % 100;
	200	cen = rtc_tm->tm_year / 100;
	201	mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
	202	day = rtc_tm->tm_mday;
	203	dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
	204	hrs = rtc_tm->tm_hour;
	205	min = rtc_tm->tm_min;
	206	sec = rtc_tm->tm_sec;
	207
7b2f0053	208	if ((mon > 12) \|\| (day == 0))
8f26795a	209	return -EINVAL;
8f26795a	210
7b2f0053	211	if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
8f26795a	212	return -EINVAL;
8f26795a	213
7b2f0053	214	if ((hrs >= 24) \|\| (min >= 60) \|\| (sec >= 60))
8f26795a	215	return -EINVAL;
8f26795a AS	216
	217	/*
	218	* each register is a different number of valid bits
	219	*/
fe20ba70 AB	220	sec = bin2bcd(sec) & 0x7f;
	221	min = bin2bcd(min) & 0x7f;
	222	hrs = bin2bcd(hrs) & 0x3f;
	223	day = bin2bcd(day) & 0x3f;
	224	mon = bin2bcd(mon) & 0x1f;
	225	yrs = bin2bcd(yrs) & 0xff;
	226	cen = bin2bcd(cen) & 0xff;
8f26795a AS	227
	228	spin_lock_irqsave(&ds1511_lock, flags);
	229	rtc_disable_update();
	230	rtc_write(cen, RTC_CENTURY);
	231	rtc_write(yrs, RTC_YEAR);
	232	rtc_write((rtc_read(RTC_MON) & 0xe0) \| mon, RTC_MON);
	233	rtc_write(day, RTC_DOM);
	234	rtc_write(hrs, RTC_HOUR);
	235	rtc_write(min, RTC_MIN);
	236	rtc_write(sec, RTC_SEC);
	237	rtc_write(dow, RTC_DOW);
	238	rtc_enable_update();
	239	spin_unlock_irqrestore(&ds1511_lock, flags);
	240
	241	return 0;
	242	}
	243
a3ed107e	244	static int ds1511_rtc_read_time(struct device dev, struct rtc_time rtc_tm)
8f26795a AS	245	{
8f26795a AS	246	unsigned int century;
9a0f4aea	247	unsigned long flags;
8f26795a AS	248
	249	spin_lock_irqsave(&ds1511_lock, flags);
	250	rtc_disable_update();
	251
	252	rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
	253	rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
	254	rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
	255	rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
	256	rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
	257	rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
	258	rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
	259	century = rtc_read(RTC_CENTURY);
	260
	261	rtc_enable_update();
	262	spin_unlock_irqrestore(&ds1511_lock, flags);
	263
fe20ba70 AB	264	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	265	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	266	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	267	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	268	rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
	269	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	270	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
	271	century = bcd2bin(century) * 100;
8f26795a AS	272
	273	/*
	274	* Account for differences between how the RTC uses the values
	275	* and how they are defined in a struct rtc_time;
	276	*/
	277	century += rtc_tm->tm_year;
	278	rtc_tm->tm_year = century - 1900;
	279
	280	rtc_tm->tm_mon--;
	281
	282	if (rtc_valid_tm(rtc_tm) < 0) {
	283	dev_err(dev, "retrieved date/time is not valid.\n");
	284	rtc_time_to_tm(0, rtc_tm);
	285	}
	286	return 0;
	287	}
	288
	289	/*
	290	* write the alarm register settings
	291	*
	292	* we only have the use to interrupt every second, otherwise
	293	* known as the update interrupt, or the interrupt if the whole
	294	* date/hours/mins/secs matches. the ds1511 has many more
	295	* permutations, but the kernel doesn't.
	296	*/
7b2f0053	297	static void
8f26795a AS	298	ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
	299	{
	300	unsigned long flags;
	301
ba4f3e47	302	spin_lock_irqsave(&pdata->lock, flags);
8f26795a	303	rtc_write(pdata->alrm_mday < 0 \|\| (pdata->irqen & RTC_UF) ?
fe20ba70	304	0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
8f26795a AS	305	RTC_ALARM_DATE);
8f26795a AS	306	rtc_write(pdata->alrm_hour < 0 \|\| (pdata->irqen & RTC_UF) ?
fe20ba70	307	0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
8f26795a AS	308	RTC_ALARM_HOUR);
8f26795a AS	309	rtc_write(pdata->alrm_min < 0 \|\| (pdata->irqen & RTC_UF) ?
fe20ba70	310	0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
8f26795a AS	311	RTC_ALARM_MIN);
8f26795a AS	312	rtc_write(pdata->alrm_sec < 0 \|\| (pdata->irqen & RTC_UF) ?
fe20ba70	313	0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
8f26795a AS	314	RTC_ALARM_SEC);
	315	rtc_write(rtc_read(RTC_CMD) \| (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
	316	rtc_read(RTC_CMD1); /* clear interrupts */
ba4f3e47	317	spin_unlock_irqrestore(&pdata->lock, flags);
8f26795a AS	318	}
8f26795a AS	319
7b2f0053	320	static int
8f26795a AS	321	ds1511_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	322	{
	323	struct platform_device *pdev = to_platform_device(dev);
	324	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	325
2fac6674	326	if (pdata->irq <= 0)
8f26795a	327	return -EINVAL;
2fac6674	328
8f26795a AS	329	pdata->alrm_mday = alrm->time.tm_mday;
	330	pdata->alrm_hour = alrm->time.tm_hour;
	331	pdata->alrm_min = alrm->time.tm_min;
	332	pdata->alrm_sec = alrm->time.tm_sec;
7b2f0053	333	if (alrm->enabled)
8f26795a	334	pdata->irqen \|= RTC_AF;
7b2f0053	335
8f26795a AS	336	ds1511_rtc_update_alarm(pdata);
	337	return 0;
	338	}
	339
7b2f0053	340	static int
8f26795a AS	341	ds1511_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	342	{
	343	struct platform_device *pdev = to_platform_device(dev);
	344	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	345
2fac6674	346	if (pdata->irq <= 0)
8f26795a	347	return -EINVAL;
2fac6674	348
8f26795a AS	349	alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
	350	alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
	351	alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
	352	alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
	353	alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
	354	return 0;
	355	}
	356
7b2f0053	357	static irqreturn_t
8f26795a AS	358	ds1511_interrupt(int irq, void *dev_id)
	359	{
	360	struct platform_device *pdev = dev_id;
	361	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
ba4f3e47	362	unsigned long events = 0;
8f26795a	363
ba4f3e47	364	spin_lock(&pdata->lock);
8f26795a AS	365	/*
	366	* read and clear interrupt
	367	*/
ba4f3e47 AN	368	if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
	369	events = RTC_IRQF;
	370	if (rtc_read(RTC_ALARM_SEC) & 0x80)
	371	events \|= RTC_UF;
	372	else
	373	events \|= RTC_AF;
	374	if (likely(pdata->rtc))
	375	rtc_update_irq(pdata->rtc, 1, events);
	376	}
	377	spin_unlock(&pdata->lock);
	378	return events ? IRQ_HANDLED : IRQ_NONE;
8f26795a AS	379	}
8f26795a AS	380
ba4f3e47	381	static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
8f26795a AS	382	{
	383	struct platform_device *pdev = to_platform_device(dev);
	384	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	385
ba4f3e47 AN	386	if (pdata->irq <= 0)
	387	return -EINVAL;
	388	if (enabled)
8f26795a	389	pdata->irqen \|= RTC_AF;
ba4f3e47 AN	390	else
	391	pdata->irqen &= ~RTC_AF;
	392	ds1511_rtc_update_alarm(pdata);
	393	return 0;
	394	}
	395
8f26795a	396	static const struct rtc_class_ops ds1511_rtc_ops = {
ba4f3e47 AN	397	.read_time = ds1511_rtc_read_time,
	398	.set_time = ds1511_rtc_set_time,
	399	.read_alarm = ds1511_rtc_read_alarm,
	400	.set_alarm = ds1511_rtc_set_alarm,
	401	.alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
8f26795a AS	402	};
8f26795a AS	403
7b2f0053	404	static ssize_t
2c3c8bea CW	405	ds1511_nvram_read(struct file filp, struct kobject kobj,
	406	struct bin_attribute *ba,
	407	char *buf, loff_t pos, size_t size)
8f26795a AS	408	{
	409	ssize_t count;
	410
	411	/*
	412	* if count is more than one, turn on "burst" mode
	413	* turn it off when you're done
	414	*/
7b2f0053	415	if (size > 1)
8f26795a	416	rtc_write((rtc_read(RTC_CMD) \| DS1511_BME), RTC_CMD);
7b2f0053 SK	417
7b2f0053 SK	418	if (pos > DS1511_RAM_MAX)
8f26795a	419	pos = DS1511_RAM_MAX;
7b2f0053 SK	420
7b2f0053 SK	421	if (size + pos > DS1511_RAM_MAX + 1)
8f26795a	422	size = DS1511_RAM_MAX - pos + 1;
7b2f0053	423
8f26795a	424	rtc_write(pos, DS1511_RAMADDR_LSB);
7b2f0053	425	for (count = 0; size > 0; count++, size--)
8f26795a	426	*buf++ = rtc_read(DS1511_RAMDATA);
7b2f0053 SK	427
7b2f0053 SK	428	if (count > 1)
8f26795a	429	rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
7b2f0053	430
8f26795a AS	431	return count;
	432	}
	433
7b2f0053	434	static ssize_t
2c3c8bea CW	435	ds1511_nvram_write(struct file filp, struct kobject kobj,
	436	struct bin_attribute *bin_attr,
	437	char *buf, loff_t pos, size_t size)
8f26795a AS	438	{
	439	ssize_t count;
	440
	441	/*
	442	* if count is more than one, turn on "burst" mode
	443	* turn it off when you're done
	444	*/
7b2f0053	445	if (size > 1)
8f26795a	446	rtc_write((rtc_read(RTC_CMD) \| DS1511_BME), RTC_CMD);
7b2f0053 SK	447
7b2f0053 SK	448	if (pos > DS1511_RAM_MAX)
8f26795a	449	pos = DS1511_RAM_MAX;
7b2f0053 SK	450
7b2f0053 SK	451	if (size + pos > DS1511_RAM_MAX + 1)
8f26795a	452	size = DS1511_RAM_MAX - pos + 1;
7b2f0053	453
8f26795a	454	rtc_write(pos, DS1511_RAMADDR_LSB);
7b2f0053	455	for (count = 0; size > 0; count++, size--)
8f26795a	456	rtc_write(*buf++, DS1511_RAMDATA);
7b2f0053 SK	457
7b2f0053 SK	458	if (count > 1)
8f26795a	459	rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
7b2f0053	460
8f26795a AS	461	return count;
	462	}
	463
	464	static struct bin_attribute ds1511_nvram_attr = {
	465	.attr = {
	466	.name = "nvram",
49d50fb1	467	.mode = S_IRUGO \| S_IWUSR,
8f26795a AS	468	},
	469	.size = DS1511_RAM_MAX,
	470	.read = ds1511_nvram_read,
	471	.write = ds1511_nvram_write,
	472	};
	473
5a167f45	474	static int ds1511_rtc_probe(struct platform_device *pdev)
8f26795a AS	475	{
	476	struct rtc_device *rtc;
	477	struct resource *res;
ba4f3e47	478	struct rtc_plat_data *pdata;
8f26795a AS	479	int ret = 0;
8f26795a AS	480
ba4f3e47 AN	481	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
ba4f3e47 AN	482	if (!pdata)
8f26795a	483	return -ENOMEM;
7c1d69ee JL	484
	485	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	486	ds1511_base = devm_ioremap_resource(&pdev->dev, res);
	487	if (IS_ERR(ds1511_base))
	488	return PTR_ERR(ds1511_base);
8f26795a AS	489	pdata->ioaddr = ds1511_base;
	490	pdata->irq = platform_get_irq(pdev, 0);
	491
	492	/*
	493	* turn on the clock and the crystal, etc.
	494	*/
	495	rtc_write(0, RTC_CMD);
	496	rtc_write(0, RTC_CMD1);
	497	/*
	498	* clear the wdog counter
	499	*/
	500	rtc_write(0, DS1511_WD_MSEC);
	501	rtc_write(0, DS1511_WD_SEC);
	502	/*
	503	* start the clock
	504	*/
	505	rtc_enable_update();
	506
	507	/*
	508	* check for a dying bat-tree
	509	*/
7b2f0053	510	if (rtc_read(RTC_CMD1) & DS1511_BLF1)
8f26795a	511	dev_warn(&pdev->dev, "voltage-low detected.\n");
8f26795a	512
ba4f3e47 AN	513	spin_lock_init(&pdata->lock);
ba4f3e47 AN	514	platform_set_drvdata(pdev, pdata);
8f26795a AS	515	/*
	516	* if the platform has an interrupt in mind for this device,
	517	* then by all means, set it
	518	*/
2fac6674	519	if (pdata->irq > 0) {
8f26795a	520	rtc_read(RTC_CMD1);
ba4f3e47	521	if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
2f6e5f94	522	IRQF_SHARED, pdev->name, pdev) < 0) {
8f26795a AS	523
8f26795a AS	524	dev_warn(&pdev->dev, "interrupt not available.\n");
2fac6674	525	pdata->irq = 0;
8f26795a AS	526	}
	527	}
	528
f650e657 JH	529	rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &ds1511_rtc_ops,
f650e657 JH	530	THIS_MODULE);
ba4f3e47 AN	531	if (IS_ERR(rtc))
ba4f3e47 AN	532	return PTR_ERR(rtc);
8f26795a	533	pdata->rtc = rtc;
ba4f3e47	534
8f26795a	535	ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
f650e657	536
8f26795a AS	537	return ret;
	538	}
	539
5a167f45	540	static int ds1511_rtc_remove(struct platform_device *pdev)
8f26795a AS	541	{
	542	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	543
	544	sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
2fac6674	545	if (pdata->irq > 0) {
8f26795a AS	546	/*
	547	* disable the alarm interrupt
	548	*/
	549	rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
	550	rtc_read(RTC_CMD1);
8f26795a	551	}
8f26795a AS	552	return 0;
	553	}
	554
ad28a07b KS	555	/* work with hotplug and coldplug */
	556	MODULE_ALIAS("platform:ds1511");
	557
8f26795a AS	558	static struct platform_driver ds1511_rtc_driver = {
8f26795a AS	559	.probe = ds1511_rtc_probe,
5a167f45	560	.remove = ds1511_rtc_remove,
8f26795a AS	561	.driver = {
	562	.name = "ds1511",
	563	.owner = THIS_MODULE,
	564	},
	565	};
	566
0c4eae66	567	module_platform_driver(ds1511_rtc_driver);
8f26795a	568
5b73a41c	569	MODULE_AUTHOR("Andrew Sharp <[email protected]>");
8f26795a AS	570	MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
	571	MODULE_LICENSE("GPL");
	572	MODULE_VERSION(DRV_VERSION);