[linux.git] / drivers / memory / ti-aemif.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * TI AEMIF driver
 *
 * Copyright (C) 2010 - 2013 Texas Instruments Incorporated. http://www.ti.com/
 *
 * Authors:
 * Murali Karicheri <[email protected]>
 * Ivan Khoronzhuk <[email protected]>
 */

#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/platform_data/ti-aemif.h>

#define TA_SHIFT	2
#define RHOLD_SHIFT	4
#define RSTROBE_SHIFT	7
#define RSETUP_SHIFT	13
#define WHOLD_SHIFT	17
#define WSTROBE_SHIFT	20
#define WSETUP_SHIFT	26
#define EW_SHIFT	30
#define SSTROBE_SHIFT	31

#define TA(x)		((x) << TA_SHIFT)
#define RHOLD(x)	((x) << RHOLD_SHIFT)
#define RSTROBE(x)	((x) << RSTROBE_SHIFT)
#define RSETUP(x)	((x) << RSETUP_SHIFT)
#define WHOLD(x)	((x) << WHOLD_SHIFT)
#define WSTROBE(x)	((x) << WSTROBE_SHIFT)
#define WSETUP(x)	((x) << WSETUP_SHIFT)
#define EW(x)		((x) << EW_SHIFT)
#define SSTROBE(x)	((x) << SSTROBE_SHIFT)

#define ASIZE_MAX	0x1
#define TA_MAX		0x3
#define RHOLD_MAX	0x7
#define RSTROBE_MAX	0x3f
#define RSETUP_MAX	0xf
#define WHOLD_MAX	0x7
#define WSTROBE_MAX	0x3f
#define WSETUP_MAX	0xf
#define EW_MAX		0x1
#define SSTROBE_MAX	0x1
#define NUM_CS		4

#define TA_VAL(x)	(((x) & TA(TA_MAX)) >> TA_SHIFT)
#define RHOLD_VAL(x)	(((x) & RHOLD(RHOLD_MAX)) >> RHOLD_SHIFT)
#define RSTROBE_VAL(x)	(((x) & RSTROBE(RSTROBE_MAX)) >> RSTROBE_SHIFT)
#define RSETUP_VAL(x)	(((x) & RSETUP(RSETUP_MAX)) >> RSETUP_SHIFT)
#define WHOLD_VAL(x)	(((x) & WHOLD(WHOLD_MAX)) >> WHOLD_SHIFT)
#define WSTROBE_VAL(x)	(((x) & WSTROBE(WSTROBE_MAX)) >> WSTROBE_SHIFT)
#define WSETUP_VAL(x)	(((x) & WSETUP(WSETUP_MAX)) >> WSETUP_SHIFT)
#define EW_VAL(x)	(((x) & EW(EW_MAX)) >> EW_SHIFT)
#define SSTROBE_VAL(x)	(((x) & SSTROBE(SSTROBE_MAX)) >> SSTROBE_SHIFT)

#define NRCSR_OFFSET	0x00
#define AWCCR_OFFSET	0x04
#define A1CR_OFFSET	0x10

#define ACR_ASIZE_MASK	0x3
#define ACR_EW_MASK	BIT(30)
#define ACR_SSTROBE_MASK	BIT(31)
#define ASIZE_16BIT	1

#define CONFIG_MASK	(TA(TA_MAX) | \
				RHOLD(RHOLD_MAX) | \
				RSTROBE(RSTROBE_MAX) |	\
				RSETUP(RSETUP_MAX) | \
				WHOLD(WHOLD_MAX) | \
				WSTROBE(WSTROBE_MAX) | \
				WSETUP(WSETUP_MAX) | \
				EW(EW_MAX) | SSTROBE(SSTROBE_MAX) | \
				ASIZE_MAX)

/**
 * struct aemif_cs_data: structure to hold cs parameters
 * @cs: chip-select number
 * @wstrobe: write strobe width, ns
 * @rstrobe: read strobe width, ns
 * @wsetup: write setup width, ns
 * @whold: write hold width, ns
 * @rsetup: read setup width, ns
 * @rhold: read hold width, ns
 * @ta: minimum turn around time, ns
 * @enable_ss: enable/disable select strobe mode
 * @enable_ew: enable/disable extended wait mode
 * @asize: width of the asynchronous device's data bus
 */
struct aemif_cs_data {
	u8	cs;
	u16	wstrobe;
	u16	rstrobe;
	u8	wsetup;
	u8	whold;
	u8	rsetup;
	u8	rhold;
	u8	ta;
	u8	enable_ss;
	u8	enable_ew;
	u8	asize;
};

/**
 * struct aemif_device: structure to hold device data
 * @base: base address of AEMIF registers
 * @clk: source clock
 * @clk_rate: clock's rate in kHz
 * @num_cs: number of assigned chip-selects
 * @cs_offset: start number of cs nodes
 * @cs_data: array of chip-select settings
 */
struct aemif_device {
	void __iomem *base;
	struct clk *clk;
	unsigned long clk_rate;
	u8 num_cs;
	int cs_offset;
	struct aemif_cs_data cs_data[NUM_CS];
};

/**
 * aemif_calc_rate - calculate timing data.
 * @pdev: platform device to calculate for
 * @wanted: The cycle time needed in nanoseconds.
 * @clk: The input clock rate in kHz.
 * @max: The maximum divider value that can be programmed.
 *
 * On success, returns the calculated timing value minus 1 for easy
 * programming into AEMIF timing registers, else negative errno.
 */
static int aemif_calc_rate(struct platform_device *pdev, int wanted,
			   unsigned long clk, int max)
{
	int result;

	result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;

	dev_dbg(&pdev->dev, "%s: result %d from %ld, %d\n", __func__, result,
		clk, wanted);

	/* It is generally OK to have a more relaxed timing than requested... */
	if (result < 0)
		result = 0;

	/* ... But configuring tighter timings is not an option. */
	else if (result > max)
		result = -EINVAL;

	return result;
}

/**
 * aemif_config_abus - configure async bus parameters
 * @pdev: platform device to configure for
 * @csnum: aemif chip select number
 *
 * This function programs the given timing values (in real clock) into the
 * AEMIF registers taking the AEMIF clock into account.
 *
 * This function does not use any locking while programming the AEMIF
 * because it is expected that there is only one user of a given
 * chip-select.
 *
 * Returns 0 on success, else negative errno.
 */
static int aemif_config_abus(struct platform_device *pdev, int csnum)
{
	struct aemif_device *aemif = platform_get_drvdata(pdev);
	struct aemif_cs_data *data = &aemif->cs_data[csnum];
	int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
	unsigned long clk_rate = aemif->clk_rate;
	unsigned offset;
	u32 set, val;

	offset = A1CR_OFFSET + (data->cs - aemif->cs_offset) * 4;

	ta	= aemif_calc_rate(pdev, data->ta, clk_rate, TA_MAX);
	rhold	= aemif_calc_rate(pdev, data->rhold, clk_rate, RHOLD_MAX);
	rstrobe	= aemif_calc_rate(pdev, data->rstrobe, clk_rate, RSTROBE_MAX);
	rsetup	= aemif_calc_rate(pdev, data->rsetup, clk_rate, RSETUP_MAX);
	whold	= aemif_calc_rate(pdev, data->whold, clk_rate, WHOLD_MAX);
	wstrobe	= aemif_calc_rate(pdev, data->wstrobe, clk_rate, WSTROBE_MAX);
	wsetup	= aemif_calc_rate(pdev, data->wsetup, clk_rate, WSETUP_MAX);

	if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 ||
	    whold < 0 || wstrobe < 0 || wsetup < 0) {
		dev_err(&pdev->dev, "%s: cannot get suitable timings\n",
			__func__);
		return -EINVAL;
	}

	set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) |
		WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup);

	set |= (data->asize & ACR_ASIZE_MASK);
	if (data->enable_ew)
		set |= ACR_EW_MASK;
	if (data->enable_ss)
		set |= ACR_SSTROBE_MASK;

	val = readl(aemif->base + offset);
	val &= ~CONFIG_MASK;
	val |= set;
	writel(val, aemif->base + offset);

	return 0;
}

static inline int aemif_cycles_to_nsec(int val, unsigned long clk_rate)
{
	return ((val + 1) * NSEC_PER_MSEC) / clk_rate;
}

/**
 * aemif_get_hw_params - function to read hw register values
 * @pdev: platform device to read for
 * @csnum: aemif chip select number
 *
 * This function reads the defaults from the registers and update
 * the timing values. Required for get/set commands and also for
 * the case when driver needs to use defaults in hardware.
 */
static void aemif_get_hw_params(struct platform_device *pdev, int csnum)
{
	struct aemif_device *aemif = platform_get_drvdata(pdev);
	struct aemif_cs_data *data = &aemif->cs_data[csnum];
	unsigned long clk_rate = aemif->clk_rate;
	u32 val, offset;

	offset = A1CR_OFFSET + (data->cs - aemif->cs_offset) * 4;
	val = readl(aemif->base + offset);

	data->ta = aemif_cycles_to_nsec(TA_VAL(val), clk_rate);
	data->rhold = aemif_cycles_to_nsec(RHOLD_VAL(val), clk_rate);
	data->rstrobe = aemif_cycles_to_nsec(RSTROBE_VAL(val), clk_rate);
	data->rsetup = aemif_cycles_to_nsec(RSETUP_VAL(val), clk_rate);
	data->whold = aemif_cycles_to_nsec(WHOLD_VAL(val), clk_rate);
	data->wstrobe = aemif_cycles_to_nsec(WSTROBE_VAL(val), clk_rate);
	data->wsetup = aemif_cycles_to_nsec(WSETUP_VAL(val), clk_rate);
	data->enable_ew = EW_VAL(val);
	data->enable_ss = SSTROBE_VAL(val);
	data->asize = val & ASIZE_MAX;
}

/**
 * of_aemif_parse_abus_config - parse CS configuration from DT
 * @pdev: platform device to parse for
 * @np: device node ptr
 *
 * This function update the emif async bus configuration based on the values
 * configured in a cs device binding node.
 */
static int of_aemif_parse_abus_config(struct platform_device *pdev,
				      struct device_node *np)
{
	struct aemif_device *aemif = platform_get_drvdata(pdev);
	struct aemif_cs_data *data;
	u32 cs;
	u32 val;

	if (of_property_read_u32(np, "ti,cs-chipselect", &cs)) {
		dev_dbg(&pdev->dev, "cs property is required");
		return -EINVAL;
	}

	if (cs - aemif->cs_offset >= NUM_CS || cs < aemif->cs_offset) {
		dev_dbg(&pdev->dev, "cs number is incorrect %d", cs);
		return -EINVAL;
	}

	if (aemif->num_cs >= NUM_CS) {
		dev_dbg(&pdev->dev, "cs count is more than %d", NUM_CS);
		return -EINVAL;
	}

	data = &aemif->cs_data[aemif->num_cs];
	data->cs = cs;

	/* read the current value in the hw register */
	aemif_get_hw_params(pdev, aemif->num_cs++);

	/* override the values from device node */
	if (!of_property_read_u32(np, "ti,cs-min-turnaround-ns", &val))
		data->ta = val;

	if (!of_property_read_u32(np, "ti,cs-read-hold-ns", &val))
		data->rhold = val;

	if (!of_property_read_u32(np, "ti,cs-read-strobe-ns", &val))
		data->rstrobe = val;

	if (!of_property_read_u32(np, "ti,cs-read-setup-ns", &val))
		data->rsetup = val;

	if (!of_property_read_u32(np, "ti,cs-write-hold-ns", &val))
		data->whold = val;

	if (!of_property_read_u32(np, "ti,cs-write-strobe-ns", &val))
		data->wstrobe = val;

	if (!of_property_read_u32(np, "ti,cs-write-setup-ns", &val))
		data->wsetup = val;

	if (!of_property_read_u32(np, "ti,cs-bus-width", &val))
		if (val == 16)
			data->asize = 1;
	data->enable_ew = of_property_read_bool(np, "ti,cs-extended-wait-mode");
	data->enable_ss = of_property_read_bool(np, "ti,cs-select-strobe-mode");
	return 0;
}

static const struct of_device_id aemif_of_match[] = {
	{ .compatible = "ti,davinci-aemif", },
	{ .compatible = "ti,da850-aemif", },
	{},
};
MODULE_DEVICE_TABLE(of, aemif_of_match);

static int aemif_probe(struct platform_device *pdev)
{
	int i;
	int ret = -ENODEV;
	struct resource *res;
	struct device *dev = &pdev->dev;
	struct device_node *np = dev->of_node;
	struct device_node *child_np;
	struct aemif_device *aemif;
	struct aemif_platform_data *pdata;
	struct of_dev_auxdata *dev_lookup;

	aemif = devm_kzalloc(dev, sizeof(*aemif), GFP_KERNEL);
	if (!aemif)
		return -ENOMEM;

	pdata = dev_get_platdata(&pdev->dev);
	dev_lookup = pdata ? pdata->dev_lookup : NULL;

	platform_set_drvdata(pdev, aemif);

	aemif->clk = devm_clk_get(dev, NULL);
	if (IS_ERR(aemif->clk)) {
		dev_err(dev, "cannot get clock 'aemif'\n");
		return PTR_ERR(aemif->clk);
	}

	ret = clk_prepare_enable(aemif->clk);
	if (ret)
		return ret;

	aemif->clk_rate = clk_get_rate(aemif->clk) / MSEC_PER_SEC;

	if (np && of_device_is_compatible(np, "ti,da850-aemif"))
		aemif->cs_offset = 2;
	else if (pdata)
		aemif->cs_offset = pdata->cs_offset;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	aemif->base = devm_ioremap_resource(dev, res);
	if (IS_ERR(aemif->base)) {
		ret = PTR_ERR(aemif->base);
		goto error;
	}

	if (np) {
		/*
		 * For every controller device node, there is a cs device node
		 * that describe the bus configuration parameters. This
		 * functions iterate over these nodes and update the cs data
		 * array.
		 */
		for_each_available_child_of_node(np, child_np) {
			ret = of_aemif_parse_abus_config(pdev, child_np);
			if (ret < 0)
				goto error;
		}
	} else if (pdata && pdata->num_abus_data > 0) {
		for (i = 0; i < pdata->num_abus_data; i++, aemif->num_cs++) {
			aemif->cs_data[i].cs = pdata->abus_data[i].cs;
			aemif_get_hw_params(pdev, i);
		}
	}

	for (i = 0; i < aemif->num_cs; i++) {
		ret = aemif_config_abus(pdev, i);
		if (ret < 0) {
			dev_err(dev, "Error configuring chip select %d\n",
				aemif->cs_data[i].cs);
			goto error;
		}
	}

	/*
	 * Create a child devices explicitly from here to guarantee that the
	 * child will be probed after the AEMIF timing parameters are set.
	 */
	if (np) {
		for_each_available_child_of_node(np, child_np) {
			ret = of_platform_populate(child_np, NULL,
						   dev_lookup, dev);
			if (ret < 0)
				goto error;
		}
	} else if (pdata) {
		for (i = 0; i < pdata->num_sub_devices; i++) {
			pdata->sub_devices[i].dev.parent = dev;
			ret = platform_device_register(&pdata->sub_devices[i]);
			if (ret) {
				dev_warn(dev, "Error register sub device %s\n",
					 pdata->sub_devices[i].name);
			}
		}
	}

	return 0;
error:
	clk_disable_unprepare(aemif->clk);
	return ret;
}

static int aemif_remove(struct platform_device *pdev)
{
	struct aemif_device *aemif = platform_get_drvdata(pdev);

	clk_disable_unprepare(aemif->clk);
	return 0;
}

static struct platform_driver aemif_driver = {
	.probe = aemif_probe,
	.remove = aemif_remove,
	.driver = {
		.name = "ti-aemif",
		.of_match_table = of_match_ptr(aemif_of_match),
	},
};

module_platform_driver(aemif_driver);

MODULE_AUTHOR("Murali Karicheri <[email protected]>");
MODULE_AUTHOR("Ivan Khoronzhuk <[email protected]>");
MODULE_DESCRIPTION("Texas Instruments AEMIF driver");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:" KBUILD_MODNAME);
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
5a7c8154 IK	2	/*
	3	* TI AEMIF driver
	4	*
	5	* Copyright (C) 2010 - 2013 Texas Instruments Incorporated. http://www.ti.com/
	6	*
	7	* Authors:
	8	* Murali Karicheri <[email protected]>
	9	* Ivan Khoronzhuk <[email protected]>
5a7c8154 IK	10	*/
	11
	12	#include <linux/clk.h>
	13	#include <linux/err.h>
	14	#include <linux/io.h>
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
	17	#include <linux/of.h>
	18	#include <linux/of_platform.h>
	19	#include <linux/platform_device.h>
f95bd041	20	#include <linux/platform_data/ti-aemif.h>
5a7c8154 IK	21
	22	#define TA_SHIFT 2
	23	#define RHOLD_SHIFT 4
	24	#define RSTROBE_SHIFT 7
	25	#define RSETUP_SHIFT 13
	26	#define WHOLD_SHIFT 17
	27	#define WSTROBE_SHIFT 20
	28	#define WSETUP_SHIFT 26
	29	#define EW_SHIFT 30
fdc482ff	30	#define SSTROBE_SHIFT 31
5a7c8154 IK	31
	32	#define TA(x) ((x) << TA_SHIFT)
	33	#define RHOLD(x) ((x) << RHOLD_SHIFT)
	34	#define RSTROBE(x) ((x) << RSTROBE_SHIFT)
	35	#define RSETUP(x) ((x) << RSETUP_SHIFT)
	36	#define WHOLD(x) ((x) << WHOLD_SHIFT)
	37	#define WSTROBE(x) ((x) << WSTROBE_SHIFT)
	38	#define WSETUP(x) ((x) << WSETUP_SHIFT)
	39	#define EW(x) ((x) << EW_SHIFT)
fdc482ff	40	#define SSTROBE(x) ((x) << SSTROBE_SHIFT)
5a7c8154 IK	41
	42	#define ASIZE_MAX 0x1
	43	#define TA_MAX 0x3
	44	#define RHOLD_MAX 0x7
	45	#define RSTROBE_MAX 0x3f
	46	#define RSETUP_MAX 0xf
	47	#define WHOLD_MAX 0x7
	48	#define WSTROBE_MAX 0x3f
	49	#define WSETUP_MAX 0xf
	50	#define EW_MAX 0x1
fdc482ff	51	#define SSTROBE_MAX 0x1
5a7c8154 IK	52	#define NUM_CS 4
	53
	54	#define TA_VAL(x) (((x) & TA(TA_MAX)) >> TA_SHIFT)
	55	#define RHOLD_VAL(x) (((x) & RHOLD(RHOLD_MAX)) >> RHOLD_SHIFT)
	56	#define RSTROBE_VAL(x) (((x) & RSTROBE(RSTROBE_MAX)) >> RSTROBE_SHIFT)
	57	#define RSETUP_VAL(x) (((x) & RSETUP(RSETUP_MAX)) >> RSETUP_SHIFT)
	58	#define WHOLD_VAL(x) (((x) & WHOLD(WHOLD_MAX)) >> WHOLD_SHIFT)
	59	#define WSTROBE_VAL(x) (((x) & WSTROBE(WSTROBE_MAX)) >> WSTROBE_SHIFT)
	60	#define WSETUP_VAL(x) (((x) & WSETUP(WSETUP_MAX)) >> WSETUP_SHIFT)
	61	#define EW_VAL(x) (((x) & EW(EW_MAX)) >> EW_SHIFT)
fdc482ff	62	#define SSTROBE_VAL(x) (((x) & SSTROBE(SSTROBE_MAX)) >> SSTROBE_SHIFT)
5a7c8154 IK	63
	64	#define NRCSR_OFFSET 0x00
	65	#define AWCCR_OFFSET 0x04
	66	#define A1CR_OFFSET 0x10
	67
	68	#define ACR_ASIZE_MASK 0x3
	69	#define ACR_EW_MASK BIT(30)
fdc482ff	70	#define ACR_SSTROBE_MASK BIT(31)
5a7c8154 IK	71	#define ASIZE_16BIT 1
	72
	73	#define CONFIG_MASK (TA(TA_MAX) \| \
	74	RHOLD(RHOLD_MAX) \| \
	75	RSTROBE(RSTROBE_MAX) \| \
	76	RSETUP(RSETUP_MAX) \| \
	77	WHOLD(WHOLD_MAX) \| \
	78	WSTROBE(WSTROBE_MAX) \| \
	79	WSETUP(WSETUP_MAX) \| \
fdc482ff	80	EW(EW_MAX) \| SSTROBE(SSTROBE_MAX) \| \
5a7c8154 IK	81	ASIZE_MAX)
	82
	83	/**
	84	* struct aemif_cs_data: structure to hold cs parameters
	85	* @cs: chip-select number
	86	* @wstrobe: write strobe width, ns
	87	* @rstrobe: read strobe width, ns
	88	* @wsetup: write setup width, ns
	89	* @whold: write hold width, ns
	90	* @rsetup: read setup width, ns
	91	* @rhold: read hold width, ns
	92	* @ta: minimum turn around time, ns
	93	* @enable_ss: enable/disable select strobe mode
	94	* @enable_ew: enable/disable extended wait mode
	95	* @asize: width of the asynchronous device's data bus
	96	*/
	97	struct aemif_cs_data {
	98	u8 cs;
	99	u16 wstrobe;
	100	u16 rstrobe;
	101	u8 wsetup;
	102	u8 whold;
	103	u8 rsetup;
	104	u8 rhold;
	105	u8 ta;
	106	u8 enable_ss;
	107	u8 enable_ew;
	108	u8 asize;
	109	};
	110
	111	/**
	112	* struct aemif_device: structure to hold device data
	113	* @base: base address of AEMIF registers
	114	* @clk: source clock
	115	* @clk_rate: clock's rate in kHz
	116	* @num_cs: number of assigned chip-selects
	117	* @cs_offset: start number of cs nodes
	118	* @cs_data: array of chip-select settings
	119	*/
	120	struct aemif_device {
	121	void __iomem *base;
	122	struct clk *clk;
	123	unsigned long clk_rate;
	124	u8 num_cs;
	125	int cs_offset;
	126	struct aemif_cs_data cs_data[NUM_CS];
	127	};
	128
	129	/**
	130	* aemif_calc_rate - calculate timing data.
	131	* @pdev: platform device to calculate for
	132	* @wanted: The cycle time needed in nanoseconds.
	133	* @clk: The input clock rate in kHz.
	134	* @max: The maximum divider value that can be programmed.
	135	*
	136	* On success, returns the calculated timing value minus 1 for easy
	137	* programming into AEMIF timing registers, else negative errno.
	138	*/
	139	static int aemif_calc_rate(struct platform_device *pdev, int wanted,
	140	unsigned long clk, int max)
	141	{
	142	int result;
	143
	144	result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;
145
146	dev_dbg(&pdev->dev, "%s: result %d from %ld, %d\n", __func__, result,
147	clk, wanted);
148
149	/* It is generally OK to have a more relaxed timing than requested... */
150	if (result < 0)
151	result = 0;
152
153	/* ... But configuring tighter timings is not an option. */
154	else if (result > max)
155	result = -EINVAL;
156
157	return result;
158	}
159
160	/**
161	* aemif_config_abus - configure async bus parameters
162	* @pdev: platform device to configure for
163	* @csnum: aemif chip select number
164	*
165	* This function programs the given timing values (in real clock) into the
166	* AEMIF registers taking the AEMIF clock into account.
167	*
168	* This function does not use any locking while programming the AEMIF
169	* because it is expected that there is only one user of a given
170	* chip-select.
171	*
172	* Returns 0 on success, else negative errno.
173	*/
174	static int aemif_config_abus(struct platform_device *pdev, int csnum)
175	{
176	struct aemif_device *aemif = platform_get_drvdata(pdev);
177	struct aemif_cs_data *data = &aemif->cs_data[csnum];
178	int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
179	unsigned long clk_rate = aemif->clk_rate;
180	unsigned offset;
181	u32 set, val;
182
183	offset = A1CR_OFFSET + (data->cs - aemif->cs_offset) * 4;
184
185	ta = aemif_calc_rate(pdev, data->ta, clk_rate, TA_MAX);
186	rhold = aemif_calc_rate(pdev, data->rhold, clk_rate, RHOLD_MAX);
187	rstrobe = aemif_calc_rate(pdev, data->rstrobe, clk_rate, RSTROBE_MAX);
188	rsetup = aemif_calc_rate(pdev, data->rsetup, clk_rate, RSETUP_MAX);
189	whold = aemif_calc_rate(pdev, data->whold, clk_rate, WHOLD_MAX);
190	wstrobe = aemif_calc_rate(pdev, data->wstrobe, clk_rate, WSTROBE_MAX);
191	wsetup = aemif_calc_rate(pdev, data->wsetup, clk_rate, WSETUP_MAX);
192
193	if (ta < 0 \|\| rhold < 0 \|\| rstrobe < 0 \|\| rsetup < 0 \|\|
194	whold < 0 \|\| wstrobe < 0 \|\| wsetup < 0) {
195	dev_err(&pdev->dev, "%s: cannot get suitable timings\n",
196	__func__);
197	return -EINVAL;
198	}
199
200	set = TA(ta) \| RHOLD(rhold) \| RSTROBE(rstrobe) \| RSETUP(rsetup) \|
201	WHOLD(whold) \| WSTROBE(wstrobe) \| WSETUP(wsetup);
202
203	set \|= (data->asize & ACR_ASIZE_MASK);
204	if (data->enable_ew)
205	set \|= ACR_EW_MASK;
206	if (data->enable_ss)
fdc482ff	207	set \|= ACR_SSTROBE_MASK;
5a7c8154 IK	208
	209	val = readl(aemif->base + offset);
	210	val &= ~CONFIG_MASK;
	211	val \|= set;
	212	writel(val, aemif->base + offset);
	213
	214	return 0;
	215	}
	216
	217	static inline int aemif_cycles_to_nsec(int val, unsigned long clk_rate)
	218	{
	219	return ((val + 1) * NSEC_PER_MSEC) / clk_rate;
	220	}
	221
	222	/**
	223	* aemif_get_hw_params - function to read hw register values
	224	* @pdev: platform device to read for
	225	* @csnum: aemif chip select number
	226	*
	227	* This function reads the defaults from the registers and update
	228	* the timing values. Required for get/set commands and also for
	229	* the case when driver needs to use defaults in hardware.
	230	*/
	231	static void aemif_get_hw_params(struct platform_device *pdev, int csnum)
	232	{
	233	struct aemif_device *aemif = platform_get_drvdata(pdev);
	234	struct aemif_cs_data *data = &aemif->cs_data[csnum];
	235	unsigned long clk_rate = aemif->clk_rate;
	236	u32 val, offset;
	237
	238	offset = A1CR_OFFSET + (data->cs - aemif->cs_offset) * 4;
	239	val = readl(aemif->base + offset);
	240
	241	data->ta = aemif_cycles_to_nsec(TA_VAL(val), clk_rate);
	242	data->rhold = aemif_cycles_to_nsec(RHOLD_VAL(val), clk_rate);
	243	data->rstrobe = aemif_cycles_to_nsec(RSTROBE_VAL(val), clk_rate);
	244	data->rsetup = aemif_cycles_to_nsec(RSETUP_VAL(val), clk_rate);
	245	data->whold = aemif_cycles_to_nsec(WHOLD_VAL(val), clk_rate);
	246	data->wstrobe = aemif_cycles_to_nsec(WSTROBE_VAL(val), clk_rate);
	247	data->wsetup = aemif_cycles_to_nsec(WSETUP_VAL(val), clk_rate);
	248	data->enable_ew = EW_VAL(val);
fdc482ff	249	data->enable_ss = SSTROBE_VAL(val);
5a7c8154 IK	250	data->asize = val & ASIZE_MAX;
	251	}
	252
	253	/**
	254	* of_aemif_parse_abus_config - parse CS configuration from DT
	255	* @pdev: platform device to parse for
	256	* @np: device node ptr
	257	*
	258	* This function update the emif async bus configuration based on the values
	259	* configured in a cs device binding node.
	260	*/
	261	static int of_aemif_parse_abus_config(struct platform_device *pdev,
	262	struct device_node *np)
	263	{
	264	struct aemif_device *aemif = platform_get_drvdata(pdev);
	265	struct aemif_cs_data *data;
	266	u32 cs;
	267	u32 val;
	268
	269	if (of_property_read_u32(np, "ti,cs-chipselect", &cs)) {
	270	dev_dbg(&pdev->dev, "cs property is required");
	271	return -EINVAL;
	272	}
	273
	274	if (cs - aemif->cs_offset >= NUM_CS \|\| cs < aemif->cs_offset) {
	275	dev_dbg(&pdev->dev, "cs number is incorrect %d", cs);
	276	return -EINVAL;
	277	}
	278
	279	if (aemif->num_cs >= NUM_CS) {
	280	dev_dbg(&pdev->dev, "cs count is more than %d", NUM_CS);
	281	return -EINVAL;
	282	}
	283
	284	data = &aemif->cs_data[aemif->num_cs];
	285	data->cs = cs;
	286
	287	/* read the current value in the hw register */
	288	aemif_get_hw_params(pdev, aemif->num_cs++);
	289
	290	/* override the values from device node */
	291	if (!of_property_read_u32(np, "ti,cs-min-turnaround-ns", &val))
	292	data->ta = val;
	293
	294	if (!of_property_read_u32(np, "ti,cs-read-hold-ns", &val))
	295	data->rhold = val;
	296
	297	if (!of_property_read_u32(np, "ti,cs-read-strobe-ns", &val))
	298	data->rstrobe = val;
	299
	300	if (!of_property_read_u32(np, "ti,cs-read-setup-ns", &val))
	301	data->rsetup = val;
	302
	303	if (!of_property_read_u32(np, "ti,cs-write-hold-ns", &val))
	304	data->whold = val;
	305
	306	if (!of_property_read_u32(np, "ti,cs-write-strobe-ns", &val))
	307	data->wstrobe = val;
	308
	309	if (!of_property_read_u32(np, "ti,cs-write-setup-ns", &val))
	310	data->wsetup = val;
	311
	312	if (!of_property_read_u32(np, "ti,cs-bus-width", &val))
	313	if (val == 16)
314	data->asize = 1;
315	data->enable_ew = of_property_read_bool(np, "ti,cs-extended-wait-mode");
316	data->enable_ss = of_property_read_bool(np, "ti,cs-select-strobe-mode");
317	return 0;
318	}
319
320	static const struct of_device_id aemif_of_match[] = {
321	{ .compatible = "ti,davinci-aemif", },
322	{ .compatible = "ti,da850-aemif", },
323	{},
324	};
df6be790	325	MODULE_DEVICE_TABLE(of, aemif_of_match);
5a7c8154 IK	326
	327	static int aemif_probe(struct platform_device *pdev)
	328	{
	329	int i;
	330	int ret = -ENODEV;
	331	struct resource *res;
	332	struct device *dev = &pdev->dev;
	333	struct device_node *np = dev->of_node;
	334	struct device_node *child_np;
	335	struct aemif_device *aemif;
f95bd041 BG	336	struct aemif_platform_data *pdata;
f95bd041 BG	337	struct of_dev_auxdata *dev_lookup;
5a7c8154	338
5a7c8154 IK	339	aemif = devm_kzalloc(dev, sizeof(*aemif), GFP_KERNEL);
	340	if (!aemif)
	341	return -ENOMEM;
	342
f95bd041 BG	343	pdata = dev_get_platdata(&pdev->dev);
	344	dev_lookup = pdata ? pdata->dev_lookup : NULL;
	345
5a7c8154 IK	346	platform_set_drvdata(pdev, aemif);
	347
	348	aemif->clk = devm_clk_get(dev, NULL);
	349	if (IS_ERR(aemif->clk)) {
	350	dev_err(dev, "cannot get clock 'aemif'\n");
	351	return PTR_ERR(aemif->clk);
	352	}
	353
761d031e AY	354	ret = clk_prepare_enable(aemif->clk);
	355	if (ret)
	356	return ret;
	357
5a7c8154 IK	358	aemif->clk_rate = clk_get_rate(aemif->clk) / MSEC_PER_SEC;
5a7c8154 IK	359
8af70cd2	360	if (np && of_device_is_compatible(np, "ti,da850-aemif"))
5a7c8154	361	aemif->cs_offset = 2;
8af70cd2 BG	362	else if (pdata)
8af70cd2 BG	363	aemif->cs_offset = pdata->cs_offset;
5a7c8154 IK	364
	365	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	366	aemif->base = devm_ioremap_resource(dev, res);
	367	if (IS_ERR(aemif->base)) {
	368	ret = PTR_ERR(aemif->base);
	369	goto error;
	370	}
	371
8af70cd2 BG	372	if (np) {
	373	/*
	374	* For every controller device node, there is a cs device node
	375	* that describe the bus configuration parameters. This
	376	* functions iterate over these nodes and update the cs data
	377	* array.
	378	*/
	379	for_each_available_child_of_node(np, child_np) {
	380	ret = of_aemif_parse_abus_config(pdev, child_np);
	381	if (ret < 0)
	382	goto error;
	383	}
	384	} else if (pdata && pdata->num_abus_data > 0) {
	385	for (i = 0; i < pdata->num_abus_data; i++, aemif->num_cs++) {
	386	aemif->cs_data[i].cs = pdata->abus_data[i].cs;
	387	aemif_get_hw_params(pdev, i);
	388	}
5a7c8154 IK	389	}
	390
	391	for (i = 0; i < aemif->num_cs; i++) {
	392	ret = aemif_config_abus(pdev, i);
	393	if (ret < 0) {
	394	dev_err(dev, "Error configuring chip select %d\n",
	395	aemif->cs_data[i].cs);
	396	goto error;
	397	}
	398	}
	399
	400	/*
8af70cd2 BG	401	* Create a child devices explicitly from here to guarantee that the
8af70cd2 BG	402	* child will be probed after the AEMIF timing parameters are set.
5a7c8154	403	*/
8af70cd2 BG	404	if (np) {
	405	for_each_available_child_of_node(np, child_np) {
	406	ret = of_platform_populate(child_np, NULL,
	407	dev_lookup, dev);
	408	if (ret < 0)
	409	goto error;
	410	}
6b45a2b1	411	} else if (pdata) {
8af70cd2 BG	412	for (i = 0; i < pdata->num_sub_devices; i++) {
	413	pdata->sub_devices[i].dev.parent = dev;
	414	ret = platform_device_register(&pdata->sub_devices[i]);
	415	if (ret) {
	416	dev_warn(dev, "Error register sub device %s\n",
	417	pdata->sub_devices[i].name);
	418	}
	419	}
5a7c8154 IK	420	}
	421
	422	return 0;
	423	error:
	424	clk_disable_unprepare(aemif->clk);
	425	return ret;
	426	}
	427
	428	static int aemif_remove(struct platform_device *pdev)
	429	{
	430	struct aemif_device *aemif = platform_get_drvdata(pdev);
	431
	432	clk_disable_unprepare(aemif->clk);
	433	return 0;
	434	}
	435
	436	static struct platform_driver aemif_driver = {
	437	.probe = aemif_probe,
	438	.remove = aemif_remove,
	439	.driver = {
f12cb8e2	440	.name = "ti-aemif",
5a7c8154 IK	441	.of_match_table = of_match_ptr(aemif_of_match),
	442	},
	443	};
	444
	445	module_platform_driver(aemif_driver);
	446
	447	MODULE_AUTHOR("Murali Karicheri <[email protected]>");
	448	MODULE_AUTHOR("Ivan Khoronzhuk <[email protected]>");
	449	MODULE_DESCRIPTION("Texas Instruments AEMIF driver");
	450	MODULE_LICENSE("GPL v2");
	451	MODULE_ALIAS("platform:" KBUILD_MODNAME);