]> Git Repo - linux.git/blame - drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.h
x86/MCE/AMD: Fix the thresholding machinery initialization order
[linux.git] / drivers / gpu / drm / amd / powerplay / hwmgr / vega12_processpptables.h
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1/*
2 * Copyright 2017 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef VEGA12_PROCESSPPTABLES_H
25#define VEGA12_PROCESSPPTABLES_H
26
27#include "hwmgr.h"
28
29enum Vega12_I2CLineID {
30 Vega12_I2CLineID_DDC1 = 0x90,
31 Vega12_I2CLineID_DDC2 = 0x91,
32 Vega12_I2CLineID_DDC3 = 0x92,
33 Vega12_I2CLineID_DDC4 = 0x93,
34 Vega12_I2CLineID_DDC5 = 0x94,
35 Vega12_I2CLineID_DDC6 = 0x95,
36 Vega12_I2CLineID_SCLSDA = 0x96,
37 Vega12_I2CLineID_DDCVGA = 0x97
38};
39
40#define Vega12_I2C_DDC1DATA 0
41#define Vega12_I2C_DDC1CLK 1
42#define Vega12_I2C_DDC2DATA 2
43#define Vega12_I2C_DDC2CLK 3
44#define Vega12_I2C_DDC3DATA 4
45#define Vega12_I2C_DDC3CLK 5
46#define Vega12_I2C_SDA 40
47#define Vega12_I2C_SCL 41
48#define Vega12_I2C_DDC4DATA 65
49#define Vega12_I2C_DDC4CLK 66
50#define Vega12_I2C_DDC5DATA 0x48
51#define Vega12_I2C_DDC5CLK 0x49
52#define Vega12_I2C_DDC6DATA 0x4a
53#define Vega12_I2C_DDC6CLK 0x4b
54#define Vega12_I2C_DDCVGADATA 0x4c
55#define Vega12_I2C_DDCVGACLK 0x4d
56
57extern const struct pp_table_func vega12_pptable_funcs;
58#endif
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