[linux.git] / include / linux / i2c / twl4030-madc.h

/*
 * twl4030_madc.h - Header for TWL4030 MADC
 *
 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
 * J Keerthy <[email protected]>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#ifndef _TWL4030_MADC_H
#define _TWL4030_MADC_H

struct twl4030_madc_conversion_method {
	u8 sel;
	u8 avg;
	u8 rbase;
	u8 ctrl;
};

#define TWL4030_MADC_MAX_CHANNELS 16


/*
 * twl4030_madc_request- madc request packet for channel conversion
 * @channels:	16 bit bitmap for individual channels
 * @do_avgP:	sample the input channel for 4 consecutive cycles
 * @method:	RT, SW1, SW2
 * @type:	Polling or interrupt based method
 */

struct twl4030_madc_request {
	unsigned long channels;
	u16 do_avg;
	u16 method;
	u16 type;
	bool active;
	bool result_pending;
	int rbuf[TWL4030_MADC_MAX_CHANNELS];
	void (*func_cb)(int len, int channels, int *buf);
};

enum conversion_methods {
	TWL4030_MADC_RT,
	TWL4030_MADC_SW1,
	TWL4030_MADC_SW2,
	TWL4030_MADC_NUM_METHODS
};

enum sample_type {
	TWL4030_MADC_WAIT,
	TWL4030_MADC_IRQ_ONESHOT,
	TWL4030_MADC_IRQ_REARM
};

#define TWL4030_MADC_CTRL1		0x00
#define TWL4030_MADC_CTRL2		0x01

#define TWL4030_MADC_RTSELECT_LSB	0x02
#define TWL4030_MADC_SW1SELECT_LSB	0x06
#define TWL4030_MADC_SW2SELECT_LSB	0x0A

#define TWL4030_MADC_RTAVERAGE_LSB	0x04
#define TWL4030_MADC_SW1AVERAGE_LSB	0x08
#define TWL4030_MADC_SW2AVERAGE_LSB	0x0C

#define TWL4030_MADC_CTRL_SW1		0x12
#define TWL4030_MADC_CTRL_SW2		0x13

#define TWL4030_MADC_RTCH0_LSB		0x17
#define TWL4030_MADC_GPCH0_LSB		0x37

#define TWL4030_MADC_MADCON	(1 << 0)	/* MADC power on */
#define TWL4030_MADC_BUSY	(1 << 0)	/* MADC busy */
/* MADC conversion completion */
#define TWL4030_MADC_EOC_SW	(1 << 1)
/* MADC SWx start conversion */
#define TWL4030_MADC_SW_START	(1 << 5)
#define TWL4030_MADC_ADCIN0	(1 << 0)
#define TWL4030_MADC_ADCIN1	(1 << 1)
#define TWL4030_MADC_ADCIN2	(1 << 2)
#define TWL4030_MADC_ADCIN3	(1 << 3)
#define TWL4030_MADC_ADCIN4	(1 << 4)
#define TWL4030_MADC_ADCIN5	(1 << 5)
#define TWL4030_MADC_ADCIN6	(1 << 6)
#define TWL4030_MADC_ADCIN7	(1 << 7)
#define TWL4030_MADC_ADCIN8	(1 << 8)
#define TWL4030_MADC_ADCIN9	(1 << 9)
#define TWL4030_MADC_ADCIN10	(1 << 10)
#define TWL4030_MADC_ADCIN11	(1 << 11)
#define TWL4030_MADC_ADCIN12	(1 << 12)
#define TWL4030_MADC_ADCIN13	(1 << 13)
#define TWL4030_MADC_ADCIN14	(1 << 14)
#define TWL4030_MADC_ADCIN15	(1 << 15)

/* Fixed channels */
#define TWL4030_MADC_BTEMP	TWL4030_MADC_ADCIN1
#define TWL4030_MADC_VBUS	TWL4030_MADC_ADCIN8
#define TWL4030_MADC_VBKB	TWL4030_MADC_ADCIN9
#define TWL4030_MADC_ICHG	TWL4030_MADC_ADCIN10
#define TWL4030_MADC_VCHG	TWL4030_MADC_ADCIN11
#define TWL4030_MADC_VBAT	TWL4030_MADC_ADCIN12

/* Step size and prescaler ratio */
#define TEMP_STEP_SIZE          147
#define TEMP_PSR_R              100
#define CURR_STEP_SIZE		147
#define CURR_PSR_R1		44
#define CURR_PSR_R2		88

#define TWL4030_BCI_BCICTL1	0x23
#define TWL4030_BCI_CGAIN	0x020
#define TWL4030_BCI_MESBAT	(1 << 1)
#define TWL4030_BCI_TYPEN	(1 << 4)
#define TWL4030_BCI_ITHEN	(1 << 3)

#define REG_BCICTL2             0x024
#define TWL4030_BCI_ITHSENS	0x007

/* Register and bits for GPBR1 register */
#define TWL4030_REG_GPBR1		0x0c
#define TWL4030_GPBR1_MADC_HFCLK_EN	(1 << 7)

struct twl4030_madc_user_parms {
	int channel;
	int average;
	int status;
	u16 result;
};

int twl4030_madc_conversion(struct twl4030_madc_request *conv);
int twl4030_get_madc_conversion(int channel_no);
#endif
Commit	Line	Data
f99c1d4f K	1	/*
	2	* twl4030_madc.h - Header for TWL4030 MADC
	3	*
	4	* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
	5	* J Keerthy <[email protected]>
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* version 2 as published by the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful, but
	12	* WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	19	* 02110-1301 USA
	20	*
	21	*/
	22
	23	#ifndef _TWL4030_MADC_H
	24	#define _TWL4030_MADC_H
	25
	26	struct twl4030_madc_conversion_method {
	27	u8 sel;
	28	u8 avg;
	29	u8 rbase;
	30	u8 ctrl;
	31	};
	32
	33	#define TWL4030_MADC_MAX_CHANNELS 16
	34
	35
	36	/*
	37	* twl4030_madc_request- madc request packet for channel conversion
	38	* @channels: 16 bit bitmap for individual channels
	39	* @do_avgP: sample the input channel for 4 consecutive cycles
	40	* @method: RT, SW1, SW2
	41	* @type: Polling or interrupt based method
	42	*/
	43
	44	struct twl4030_madc_request {
	45	unsigned long channels;
	46	u16 do_avg;
	47	u16 method;
	48	u16 type;
	49	bool active;
	50	bool result_pending;
	51	int rbuf[TWL4030_MADC_MAX_CHANNELS];
	52	void (func_cb)(int len, int channels, int buf);
	53	};
	54
	55	enum conversion_methods {
	56	TWL4030_MADC_RT,
	57	TWL4030_MADC_SW1,
	58	TWL4030_MADC_SW2,
	59	TWL4030_MADC_NUM_METHODS
	60	};
	61
	62	enum sample_type {
	63	TWL4030_MADC_WAIT,
	64	TWL4030_MADC_IRQ_ONESHOT,
65	TWL4030_MADC_IRQ_REARM
66	};
67
68	#define TWL4030_MADC_CTRL1 0x00
69	#define TWL4030_MADC_CTRL2 0x01
70
71	#define TWL4030_MADC_RTSELECT_LSB 0x02
72	#define TWL4030_MADC_SW1SELECT_LSB 0x06
73	#define TWL4030_MADC_SW2SELECT_LSB 0x0A
74
75	#define TWL4030_MADC_RTAVERAGE_LSB 0x04
76	#define TWL4030_MADC_SW1AVERAGE_LSB 0x08
77	#define TWL4030_MADC_SW2AVERAGE_LSB 0x0C
78
79	#define TWL4030_MADC_CTRL_SW1 0x12
80	#define TWL4030_MADC_CTRL_SW2 0x13
81
82	#define TWL4030_MADC_RTCH0_LSB 0x17
83	#define TWL4030_MADC_GPCH0_LSB 0x37
84
85	#define TWL4030_MADC_MADCON (1 << 0) /* MADC power on */
86	#define TWL4030_MADC_BUSY (1 << 0) /* MADC busy */
87	/* MADC conversion completion */
88	#define TWL4030_MADC_EOC_SW (1 << 1)
89	/* MADC SWx start conversion */
90	#define TWL4030_MADC_SW_START (1 << 5)
91	#define TWL4030_MADC_ADCIN0 (1 << 0)
92	#define TWL4030_MADC_ADCIN1 (1 << 1)
93	#define TWL4030_MADC_ADCIN2 (1 << 2)
94	#define TWL4030_MADC_ADCIN3 (1 << 3)
95	#define TWL4030_MADC_ADCIN4 (1 << 4)
96	#define TWL4030_MADC_ADCIN5 (1 << 5)
97	#define TWL4030_MADC_ADCIN6 (1 << 6)
98	#define TWL4030_MADC_ADCIN7 (1 << 7)
99	#define TWL4030_MADC_ADCIN8 (1 << 8)
100	#define TWL4030_MADC_ADCIN9 (1 << 9)
101	#define TWL4030_MADC_ADCIN10 (1 << 10)
102	#define TWL4030_MADC_ADCIN11 (1 << 11)
103	#define TWL4030_MADC_ADCIN12 (1 << 12)
104	#define TWL4030_MADC_ADCIN13 (1 << 13)
105	#define TWL4030_MADC_ADCIN14 (1 << 14)
106	#define TWL4030_MADC_ADCIN15 (1 << 15)
107
108	/* Fixed channels */
109	#define TWL4030_MADC_BTEMP TWL4030_MADC_ADCIN1
110	#define TWL4030_MADC_VBUS TWL4030_MADC_ADCIN8
111	#define TWL4030_MADC_VBKB TWL4030_MADC_ADCIN9
112	#define TWL4030_MADC_ICHG TWL4030_MADC_ADCIN10
113	#define TWL4030_MADC_VCHG TWL4030_MADC_ADCIN11
114	#define TWL4030_MADC_VBAT TWL4030_MADC_ADCIN12
115
116	/* Step size and prescaler ratio */
117	#define TEMP_STEP_SIZE 147
118	#define TEMP_PSR_R 100
119	#define CURR_STEP_SIZE 147
120	#define CURR_PSR_R1 44
121	#define CURR_PSR_R2 88
122
123	#define TWL4030_BCI_BCICTL1 0x23
124	#define TWL4030_BCI_CGAIN 0x020
125	#define TWL4030_BCI_MESBAT (1 << 1)
126	#define TWL4030_BCI_TYPEN (1 << 4)
127	#define TWL4030_BCI_ITHEN (1 << 3)
128
129	#define REG_BCICTL2 0x024
130	#define TWL4030_BCI_ITHSENS 0x007
131
3d6271f9 KM	132	/* Register and bits for GPBR1 register */
	133	#define TWL4030_REG_GPBR1 0x0c
	134	#define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7)
	135
f99c1d4f K	136	struct twl4030_madc_user_parms {
	137	int channel;
	138	int average;
	139	int status;
	140	u16 result;
	141	};
	142
	143	int twl4030_madc_conversion(struct twl4030_madc_request *conv);
	144	int twl4030_get_madc_conversion(int channel_no);
	145	#endif