[linux.git] / arch / arm / mach-iop33x / iq80331.c

/*
 * arch/arm/mach-iop33x/iq80331.c
 *
 * Board support code for the Intel IQ80331 platform.
 *
 * Author: Dave Jiang <[email protected]>
 * Copyright (C) 2003 Intel Corp.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 */

#include <linux/mm.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/pci.h>
#include <asm/mach/time.h>
#include <asm/mach-types.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <mach/time.h>

/*
 * IQ80331 timer tick configuration.
 */
static void __init iq80331_timer_init(void)
{
	/* D-Step parts run at a higher internal bus frequency */
	if (*IOP3XX_ATURID >= 0xa)
		iop_init_time(333000000);
	else
		iop_init_time(266000000);
}

static struct sys_timer iq80331_timer = {
	.init		= iq80331_timer_init,
};


/*
 * IQ80331 PCI.
 */
static int __init
iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
	int irq;

	if (slot == 1 && pin == 1) {
		/* PCI-X Slot INTA */
		irq = IRQ_IOP33X_XINT1;
	} else if (slot == 1 && pin == 2) {
		/* PCI-X Slot INTB */
		irq = IRQ_IOP33X_XINT2;
	} else if (slot == 1 && pin == 3) {
		/* PCI-X Slot INTC */
		irq = IRQ_IOP33X_XINT3;
	} else if (slot == 1 && pin == 4) {
		/* PCI-X Slot INTD */
		irq = IRQ_IOP33X_XINT0;
	} else if (slot == 2) {
		/* GigE */
		irq = IRQ_IOP33X_XINT2;
	} else {
		printk(KERN_ERR "iq80331_pci_map_irq() called for unknown "
			"device PCI:%d:%d:%d\n", dev->bus->number,
			PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
		irq = -1;
	}

	return irq;
}

static struct hw_pci iq80331_pci __initdata = {
	.swizzle	= pci_std_swizzle,
	.nr_controllers = 1,
	.setup		= iop3xx_pci_setup,
	.preinit	= iop3xx_pci_preinit_cond,
	.scan		= iop3xx_pci_scan_bus,
	.map_irq	= iq80331_pci_map_irq,
};

static int __init iq80331_pci_init(void)
{
	if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
		machine_is_iq80331())
		pci_common_init(&iq80331_pci);

	return 0;
}

subsys_initcall(iq80331_pci_init);


/*
 * IQ80331 machine initialisation.
 */
static struct physmap_flash_data iq80331_flash_data = {
	.width		= 1,
};

static struct resource iq80331_flash_resource = {
	.start		= 0xc0000000,
	.end		= 0xc07fffff,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device iq80331_flash_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data	= &iq80331_flash_data,
	},
	.num_resources	= 1,
	.resource	= &iq80331_flash_resource,
};

static void __init iq80331_init_machine(void)
{
	platform_device_register(&iop3xx_i2c0_device);
	platform_device_register(&iop3xx_i2c1_device);
	platform_device_register(&iop33x_uart0_device);
	platform_device_register(&iop33x_uart1_device);
	platform_device_register(&iq80331_flash_device);
	platform_device_register(&iop3xx_dma_0_channel);
	platform_device_register(&iop3xx_dma_1_channel);
	platform_device_register(&iop3xx_aau_channel);
}

MACHINE_START(IQ80331, "Intel IQ80331")
	/* Maintainer: Intel Corp. */
	.phys_io	= 0xfefff000,
	.io_pg_offst	= ((0xfffff000) >> 18) & 0xfffc,
	.boot_params	= 0x00000100,
	.map_io		= iop3xx_map_io,
	.init_irq	= iop33x_init_irq,
	.timer		= &iq80331_timer,
	.init_machine	= iq80331_init_machine,
MACHINE_END
Commit	Line	Data
c680b77e LB	1	/*
	2	* arch/arm/mach-iop33x/iq80331.c
	3	*
	4	* Board support code for the Intel IQ80331 platform.
	5	*
	6	* Author: Dave Jiang <[email protected]>
	7	* Copyright (C) 2003 Intel Corp.
	8	*
	9	* This program is free software; you can redistribute it and/or modify it
	10	* under the terms of the GNU General Public License as published by the
	11	* Free Software Foundation; either version 2 of the License, or (at your
	12	* option) any later version.
	13	*/
	14
	15	#include <linux/mm.h>
	16	#include <linux/init.h>
	17	#include <linux/kernel.h>
	18	#include <linux/pci.h>
	19	#include <linux/string.h>
c680b77e LB	20	#include <linux/serial_core.h>
	21	#include <linux/serial_8250.h>
	22	#include <linux/mtd/physmap.h>
	23	#include <linux/platform_device.h>
fced80c7	24	#include <linux/io.h>
a09e64fb	25	#include <mach/hardware.h>
c680b77e LB	26	#include <asm/irq.h>
	27	#include <asm/mach/arch.h>
	28	#include <asm/mach/map.h>
	29	#include <asm/mach/pci.h>
	30	#include <asm/mach/time.h>
	31	#include <asm/mach-types.h>
	32	#include <asm/page.h>
	33	#include <asm/pgtable.h>
a09e64fb	34	#include <mach/time.h>
c680b77e LB	35
	36	/*
	37	* IQ80331 timer tick configuration.
	38	*/
	39	static void __init iq80331_timer_init(void)
	40	{
	41	/* D-Step parts run at a higher internal bus frequency */
	42	if (*IOP3XX_ATURID >= 0xa)
3668b45d	43	iop_init_time(333000000);
c680b77e	44	else
3668b45d	45	iop_init_time(266000000);
c680b77e LB	46	}
	47
	48	static struct sys_timer iq80331_timer = {
	49	.init = iq80331_timer_init,
c680b77e LB	50	};
	51
	52
	53	/*
	54	* IQ80331 PCI.
	55	*/
d73d8011	56	static int __init
c680b77e LB	57	iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
	58	{
	59	int irq;
	60
	61	if (slot == 1 && pin == 1) {
	62	/* PCI-X Slot INTA */
c852ac80	63	irq = IRQ_IOP33X_XINT1;
c680b77e LB	64	} else if (slot == 1 && pin == 2) {
c680b77e LB	65	/* PCI-X Slot INTB */
c852ac80	66	irq = IRQ_IOP33X_XINT2;
c680b77e LB	67	} else if (slot == 1 && pin == 3) {
c680b77e LB	68	/* PCI-X Slot INTC */
c852ac80	69	irq = IRQ_IOP33X_XINT3;
c680b77e LB	70	} else if (slot == 1 && pin == 4) {
c680b77e LB	71	/* PCI-X Slot INTD */
c852ac80	72	irq = IRQ_IOP33X_XINT0;
c680b77e LB	73	} else if (slot == 2) {
c680b77e LB	74	/* GigE */
c852ac80	75	irq = IRQ_IOP33X_XINT2;
c680b77e LB	76	} else {
	77	printk(KERN_ERR "iq80331_pci_map_irq() called for unknown "
	78	"device PCI:%d:%d:%d\n", dev->bus->number,
	79	PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
	80	irq = -1;
	81	}
	82
	83	return irq;
	84	}
	85
	86	static struct hw_pci iq80331_pci __initdata = {
	87	.swizzle = pci_std_swizzle,
	88	.nr_controllers = 1,
	89	.setup = iop3xx_pci_setup,
c34002c1	90	.preinit = iop3xx_pci_preinit_cond,
c680b77e LB	91	.scan = iop3xx_pci_scan_bus,
	92	.map_irq = iq80331_pci_map_irq,
	93	};
	94
	95	static int __init iq80331_pci_init(void)
	96	{
e90ddd81 DW	97	if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
e90ddd81 DW	98	machine_is_iq80331())
c680b77e LB	99	pci_common_init(&iq80331_pci);
	100
	101	return 0;
	102	}
	103
	104	subsys_initcall(iq80331_pci_init);
	105
	106
	107	/*
	108	* IQ80331 machine initialisation.
	109	*/
	110	static struct physmap_flash_data iq80331_flash_data = {
	111	.width = 1,
	112	};
	113
	114	static struct resource iq80331_flash_resource = {
	115	.start = 0xc0000000,
	116	.end = 0xc07fffff,
	117	.flags = IORESOURCE_MEM,
	118	};
	119
	120	static struct platform_device iq80331_flash_device = {
	121	.name = "physmap-flash",
	122	.id = 0,
	123	.dev = {
	124	.platform_data = &iq80331_flash_data,
	125	},
	126	.num_resources = 1,
	127	.resource = &iq80331_flash_resource,
	128	};
	129
	130	static void __init iq80331_init_machine(void)
	131	{
	132	platform_device_register(&iop3xx_i2c0_device);
	133	platform_device_register(&iop3xx_i2c1_device);
	134	platform_device_register(&iop33x_uart0_device);
	135	platform_device_register(&iop33x_uart1_device);
	136	platform_device_register(&iq80331_flash_device);
2492c845 DW	137	platform_device_register(&iop3xx_dma_0_channel);
	138	platform_device_register(&iop3xx_dma_1_channel);
	139	platform_device_register(&iop3xx_aau_channel);
c680b77e LB	140	}
	141
	142	MACHINE_START(IQ80331, "Intel IQ80331")
	143	/* Maintainer: Intel Corp. */
	144	.phys_io = 0xfefff000,
	145	.io_pg_offst = ((0xfffff000) >> 18) & 0xfffc,
	146	.boot_params = 0x00000100,
	147	.map_io = iop3xx_map_io,
c852ac80	148	.init_irq = iop33x_init_irq,
c680b77e LB	149	.timer = &iq80331_timer,
	150	.init_machine = iq80331_init_machine,
	151	MACHINE_END