[linux.git] / drivers / pwm / pwm-lp3943.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * TI/National Semiconductor LP3943 PWM driver
 *
 * Copyright 2013 Texas Instruments
 *
 * Author: Milo Kim <[email protected]>
 */

#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/mfd/lp3943.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/slab.h>

#define LP3943_MAX_DUTY			255
#define LP3943_MIN_PERIOD		6250
#define LP3943_MAX_PERIOD		1600000

struct lp3943_pwm {
	struct pwm_chip chip;
	struct lp3943 *lp3943;
	struct lp3943_platform_data *pdata;
};

static inline struct lp3943_pwm *to_lp3943_pwm(struct pwm_chip *_chip)
{
	return container_of(_chip, struct lp3943_pwm, chip);
}

static struct lp3943_pwm_map *
lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm)
{
	struct lp3943_platform_data *pdata = lp3943_pwm->pdata;
	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	struct lp3943_pwm_map *pwm_map;
	int i, offset;

	pwm_map = kzalloc(sizeof(*pwm_map), GFP_KERNEL);
	if (!pwm_map)
		return ERR_PTR(-ENOMEM);

	pwm_map->output = pdata->pwms[hwpwm]->output;
	pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs;

	for (i = 0; i < pwm_map->num_outputs; i++) {
		offset = pwm_map->output[i];

		/* Return an error if the pin is already assigned */
		if (test_and_set_bit(offset, &lp3943->pin_used)) {
			kfree(pwm_map);
			return ERR_PTR(-EBUSY);
		}
	}

	return pwm_map;
}

static int lp3943_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943_pwm_map *pwm_map;

	pwm_map = lp3943_pwm_request_map(lp3943_pwm, pwm->hwpwm);
	if (IS_ERR(pwm_map))
		return PTR_ERR(pwm_map);

	return pwm_set_chip_data(pwm, pwm_map);
}

static void lp3943_pwm_free_map(struct lp3943_pwm *lp3943_pwm,
				struct lp3943_pwm_map *pwm_map)
{
	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	int i, offset;

	for (i = 0; i < pwm_map->num_outputs; i++) {
		offset = pwm_map->output[i];
		clear_bit(offset, &lp3943->pin_used);
	}

	kfree(pwm_map);
}

static void lp3943_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);

	lp3943_pwm_free_map(lp3943_pwm, pwm_map);
}

static int lp3943_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
			     u64 duty_ns, u64 period_ns)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	u8 val, reg_duty, reg_prescale;
	int err;

	/*
	 * How to configure the LP3943 PWMs
	 *
	 * 1) Period = 6250 ~ 1600000
	 * 2) Prescale = period / 6250 -1
	 * 3) Duty = input duty
	 *
	 * Prescale and duty are register values
	 */

	if (pwm->hwpwm == 0) {
		reg_prescale = LP3943_REG_PRESCALE0;
		reg_duty     = LP3943_REG_PWM0;
	} else {
		reg_prescale = LP3943_REG_PRESCALE1;
		reg_duty     = LP3943_REG_PWM1;
	}

	/*
	 * Note that after this clamping, period_ns fits into an int. This is
	 * helpful because we can resort to integer division below instead of
	 * the (more expensive) 64 bit division.
	 */
	period_ns = clamp(period_ns, (u64)LP3943_MIN_PERIOD, (u64)LP3943_MAX_PERIOD);
	val       = (u8)((int)period_ns / LP3943_MIN_PERIOD - 1);

	err = lp3943_write_byte(lp3943, reg_prescale, val);
	if (err)
		return err;

	duty_ns = min(duty_ns, period_ns);
	val = (u8)((int)duty_ns * LP3943_MAX_DUTY / (int)period_ns);

	return lp3943_write_byte(lp3943, reg_duty, val);
}

static int lp3943_pwm_set_mode(struct lp3943_pwm *lp3943_pwm,
			       struct lp3943_pwm_map *pwm_map,
			       u8 val)
{
	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
	int i, index, err;

	for (i = 0; i < pwm_map->num_outputs; i++) {
		index = pwm_map->output[i];
		err = lp3943_update_bits(lp3943, mux[index].reg,
					 mux[index].mask,
					 val << mux[index].shift);
		if (err)
			return err;
	}

	return 0;
}

static int lp3943_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
	u8 val;

	if (pwm->hwpwm == 0)
		val = LP3943_DIM_PWM0;
	else
		val = LP3943_DIM_PWM1;

	/*
	 * Each PWM generator is set to control any of outputs of LP3943.
	 * To enable/disable the PWM, these output pins should be configured.
	 */

	return lp3943_pwm_set_mode(lp3943_pwm, pwm_map, val);
}

static void lp3943_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);

	/*
	 * LP3943 outputs are open-drain, so the pin should be configured
	 * when the PWM is disabled.
	 */

	lp3943_pwm_set_mode(lp3943_pwm, pwm_map, LP3943_GPIO_OUT_HIGH);
}

static int lp3943_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
			    const struct pwm_state *state)
{
	int err;

	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	if (!state->enabled) {
		if (pwm->state.enabled)
			lp3943_pwm_disable(chip, pwm);
		return 0;
	}

	err = lp3943_pwm_config(chip, pwm, state->duty_cycle, state->period);
	if (err)
		return err;

	if (!pwm->state.enabled)
		err = lp3943_pwm_enable(chip, pwm);

	return err;
}

static const struct pwm_ops lp3943_pwm_ops = {
	.request	= lp3943_pwm_request,
	.free		= lp3943_pwm_free,
	.apply		= lp3943_pwm_apply,
	.owner		= THIS_MODULE,
};

static int lp3943_pwm_parse_dt(struct device *dev,
			       struct lp3943_pwm *lp3943_pwm)
{
	static const char * const name[] = { "ti,pwm0", "ti,pwm1", };
	struct device_node *node = dev->of_node;
	struct lp3943_platform_data *pdata;
	struct lp3943_pwm_map *pwm_map;
	enum lp3943_pwm_output *output;
	int i, err, proplen, count = 0;
	u32 num_outputs;

	if (!node)
		return -EINVAL;

	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return -ENOMEM;

	/*
	 * Read the output map configuration from the device tree.
	 * Each of the two PWM generators can drive zero or more outputs.
	 */

	for (i = 0; i < LP3943_NUM_PWMS; i++) {
		if (!of_get_property(node, name[i], &proplen))
			continue;

		num_outputs = proplen / sizeof(u32);
		if (num_outputs == 0)
			continue;

		output = devm_kcalloc(dev, num_outputs, sizeof(*output),
				      GFP_KERNEL);
		if (!output)
			return -ENOMEM;

		err = of_property_read_u32_array(node, name[i], output,
						 num_outputs);
		if (err)
			return err;

		pwm_map = devm_kzalloc(dev, sizeof(*pwm_map), GFP_KERNEL);
		if (!pwm_map)
			return -ENOMEM;

		pwm_map->output = output;
		pwm_map->num_outputs = num_outputs;
		pdata->pwms[i] = pwm_map;

		count++;
	}

	if (count == 0)
		return -ENODATA;

	lp3943_pwm->pdata = pdata;
	return 0;
}

static int lp3943_pwm_probe(struct platform_device *pdev)
{
	struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
	struct lp3943_pwm *lp3943_pwm;
	int ret;

	lp3943_pwm = devm_kzalloc(&pdev->dev, sizeof(*lp3943_pwm), GFP_KERNEL);
	if (!lp3943_pwm)
		return -ENOMEM;

	lp3943_pwm->pdata = lp3943->pdata;
	if (!lp3943_pwm->pdata) {
		if (IS_ENABLED(CONFIG_OF))
			ret = lp3943_pwm_parse_dt(&pdev->dev, lp3943_pwm);
		else
			ret = -ENODEV;

		if (ret)
			return ret;
	}

	lp3943_pwm->lp3943 = lp3943;
	lp3943_pwm->chip.dev = &pdev->dev;
	lp3943_pwm->chip.ops = &lp3943_pwm_ops;
	lp3943_pwm->chip.npwm = LP3943_NUM_PWMS;

	return devm_pwmchip_add(&pdev->dev, &lp3943_pwm->chip);
}

#ifdef CONFIG_OF
static const struct of_device_id lp3943_pwm_of_match[] = {
	{ .compatible = "ti,lp3943-pwm", },
	{ }
};
MODULE_DEVICE_TABLE(of, lp3943_pwm_of_match);
#endif

static struct platform_driver lp3943_pwm_driver = {
	.probe = lp3943_pwm_probe,
	.driver = {
		.name = "lp3943-pwm",
		.of_match_table = of_match_ptr(lp3943_pwm_of_match),
	},
};
module_platform_driver(lp3943_pwm_driver);

MODULE_DESCRIPTION("LP3943 PWM driver");
MODULE_ALIAS("platform:lp3943-pwm");
MODULE_AUTHOR("Milo Kim");
MODULE_LICENSE("GPL");
Commit	Line	Data
a10e763b	1	// SPDX-License-Identifier: GPL-2.0-only
af66b3c0 MK	2	/*
	3	* TI/National Semiconductor LP3943 PWM driver
	4	*
	5	* Copyright 2013 Texas Instruments
	6	*
	7	* Author: Milo Kim <[email protected]>
af66b3c0 MK	8	*/
	9
	10	#include <linux/err.h>
	11	#include <linux/i2c.h>
	12	#include <linux/mfd/lp3943.h>
	13	#include <linux/module.h>
	14	#include <linux/platform_device.h>
	15	#include <linux/pwm.h>
	16	#include <linux/slab.h>
	17
	18	#define LP3943_MAX_DUTY 255
	19	#define LP3943_MIN_PERIOD 6250
	20	#define LP3943_MAX_PERIOD 1600000
	21
	22	struct lp3943_pwm {
	23	struct pwm_chip chip;
	24	struct lp3943 *lp3943;
	25	struct lp3943_platform_data *pdata;
	26	};
	27
	28	static inline struct lp3943_pwm to_lp3943_pwm(struct pwm_chip _chip)
	29	{
	30	return container_of(_chip, struct lp3943_pwm, chip);
	31	}
	32
	33	static struct lp3943_pwm_map *
	34	lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm)
	35	{
	36	struct lp3943_platform_data *pdata = lp3943_pwm->pdata;
	37	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	38	struct lp3943_pwm_map *pwm_map;
	39	int i, offset;
	40
	41	pwm_map = kzalloc(sizeof(*pwm_map), GFP_KERNEL);
	42	if (!pwm_map)
	43	return ERR_PTR(-ENOMEM);
	44
	45	pwm_map->output = pdata->pwms[hwpwm]->output;
	46	pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs;
	47
	48	for (i = 0; i < pwm_map->num_outputs; i++) {
	49	offset = pwm_map->output[i];
	50
	51	/* Return an error if the pin is already assigned */
0b7d25c3 CE	52	if (test_and_set_bit(offset, &lp3943->pin_used)) {
0b7d25c3 CE	53	kfree(pwm_map);
af66b3c0	54	return ERR_PTR(-EBUSY);
0b7d25c3	55	}
af66b3c0 MK	56	}
	57
	58	return pwm_map;
	59	}
	60
	61	static int lp3943_pwm_request(struct pwm_chip chip, struct pwm_device pwm)
	62	{
	63	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	64	struct lp3943_pwm_map *pwm_map;
	65
	66	pwm_map = lp3943_pwm_request_map(lp3943_pwm, pwm->hwpwm);
	67	if (IS_ERR(pwm_map))
	68	return PTR_ERR(pwm_map);
	69
	70	return pwm_set_chip_data(pwm, pwm_map);
	71	}
	72
	73	static void lp3943_pwm_free_map(struct lp3943_pwm *lp3943_pwm,
	74	struct lp3943_pwm_map *pwm_map)
	75	{
	76	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	77	int i, offset;
	78
	79	for (i = 0; i < pwm_map->num_outputs; i++) {
	80	offset = pwm_map->output[i];
	81	clear_bit(offset, &lp3943->pin_used);
	82	}
	83
	84	kfree(pwm_map);
	85	}
	86
	87	static void lp3943_pwm_free(struct pwm_chip chip, struct pwm_device pwm)
	88	{
	89	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	90	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
	91
	92	lp3943_pwm_free_map(lp3943_pwm, pwm_map);
	93	}
	94
	95	static int lp3943_pwm_config(struct pwm_chip chip, struct pwm_device pwm,
1d24cc89	96	u64 duty_ns, u64 period_ns)
af66b3c0 MK	97	{
	98	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	99	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	100	u8 val, reg_duty, reg_prescale;
	101	int err;
	102
	103	/*
	104	* How to configure the LP3943 PWMs
	105	*
	106	* 1) Period = 6250 ~ 1600000
	107	* 2) Prescale = period / 6250 -1
	108	* 3) Duty = input duty
	109	*
	110	* Prescale and duty are register values
	111	*/
	112
	113	if (pwm->hwpwm == 0) {
	114	reg_prescale = LP3943_REG_PRESCALE0;
	115	reg_duty = LP3943_REG_PWM0;
	116	} else {
	117	reg_prescale = LP3943_REG_PRESCALE1;
	118	reg_duty = LP3943_REG_PWM1;
	119	}
	120
1d24cc89 UKK	121	/*
	122	* Note that after this clamping, period_ns fits into an int. This is
	123	* helpful because we can resort to integer division below instead of
	124	* the (more expensive) 64 bit division.
	125	*/
	126	period_ns = clamp(period_ns, (u64)LP3943_MIN_PERIOD, (u64)LP3943_MAX_PERIOD);
	127	val = (u8)((int)period_ns / LP3943_MIN_PERIOD - 1);
af66b3c0 MK	128
	129	err = lp3943_write_byte(lp3943, reg_prescale, val);
	130	if (err)
	131	return err;
	132
5e3b07ca	133	duty_ns = min(duty_ns, period_ns);
1d24cc89	134	val = (u8)((int)duty_ns * LP3943_MAX_DUTY / (int)period_ns);
af66b3c0 MK	135
	136	return lp3943_write_byte(lp3943, reg_duty, val);
	137	}
	138
	139	static int lp3943_pwm_set_mode(struct lp3943_pwm *lp3943_pwm,
	140	struct lp3943_pwm_map *pwm_map,
	141	u8 val)
	142	{
	143	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
	144	const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
	145	int i, index, err;
	146
	147	for (i = 0; i < pwm_map->num_outputs; i++) {
	148	index = pwm_map->output[i];
	149	err = lp3943_update_bits(lp3943, mux[index].reg,
	150	mux[index].mask,
	151	val << mux[index].shift);
	152	if (err)
	153	return err;
	154	}
	155
	156	return 0;
	157	}
	158
	159	static int lp3943_pwm_enable(struct pwm_chip chip, struct pwm_device pwm)
	160	{
	161	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	162	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
	163	u8 val;
	164
	165	if (pwm->hwpwm == 0)
	166	val = LP3943_DIM_PWM0;
	167	else
	168	val = LP3943_DIM_PWM1;
	169
	170	/*
	171	* Each PWM generator is set to control any of outputs of LP3943.
	172	* To enable/disable the PWM, these output pins should be configured.
	173	*/
	174
	175	return lp3943_pwm_set_mode(lp3943_pwm, pwm_map, val);
	176	}
	177
	178	static void lp3943_pwm_disable(struct pwm_chip chip, struct pwm_device pwm)
	179	{
	180	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
	181	struct lp3943_pwm_map *pwm_map = pwm_get_chip_data(pwm);
	182
	183	/*
	184	* LP3943 outputs are open-drain, so the pin should be configured
	185	* when the PWM is disabled.
	186	*/
	187
	188	lp3943_pwm_set_mode(lp3943_pwm, pwm_map, LP3943_GPIO_OUT_HIGH);
	189	}
	190
1d24cc89 UKK	191	static int lp3943_pwm_apply(struct pwm_chip chip, struct pwm_device pwm,
	192	const struct pwm_state *state)
	193	{
	194	int err;
	195
	196	if (state->polarity != PWM_POLARITY_NORMAL)
	197	return -EINVAL;
	198
	199	if (!state->enabled) {
	200	if (pwm->state.enabled)
	201	lp3943_pwm_disable(chip, pwm);
	202	return 0;
	203	}
	204
	205	err = lp3943_pwm_config(chip, pwm, state->duty_cycle, state->period);
	206	if (err)
	207	return err;
	208
	209	if (!pwm->state.enabled)
	210	err = lp3943_pwm_enable(chip, pwm);
	211
	212	return err;
	213	}
	214
af66b3c0 MK	215	static const struct pwm_ops lp3943_pwm_ops = {
	216	.request = lp3943_pwm_request,
	217	.free = lp3943_pwm_free,
1d24cc89	218	.apply = lp3943_pwm_apply,
af66b3c0 MK	219	.owner = THIS_MODULE,
	220	};
	221
	222	static int lp3943_pwm_parse_dt(struct device *dev,
	223	struct lp3943_pwm *lp3943_pwm)
	224	{
	225	static const char * const name[] = { "ti,pwm0", "ti,pwm1", };
	226	struct device_node *node = dev->of_node;
	227	struct lp3943_platform_data *pdata;
	228	struct lp3943_pwm_map *pwm_map;
	229	enum lp3943_pwm_output *output;
	230	int i, err, proplen, count = 0;
	231	u32 num_outputs;
	232
	233	if (!node)
	234	return -EINVAL;
	235
	236	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	237	if (!pdata)
	238	return -ENOMEM;
	239
	240	/*
	241	* Read the output map configuration from the device tree.
	242	* Each of the two PWM generators can drive zero or more outputs.
	243	*/
	244
	245	for (i = 0; i < LP3943_NUM_PWMS; i++) {
	246	if (!of_get_property(node, name[i], &proplen))
	247	continue;
	248
	249	num_outputs = proplen / sizeof(u32);
	250	if (num_outputs == 0)
	251	continue;
	252
a86854d0	253	output = devm_kcalloc(dev, num_outputs, sizeof(*output),
af66b3c0 MK	254	GFP_KERNEL);
	255	if (!output)
	256	return -ENOMEM;
	257
	258	err = of_property_read_u32_array(node, name[i], output,
	259	num_outputs);
	260	if (err)
	261	return err;
	262
	263	pwm_map = devm_kzalloc(dev, sizeof(*pwm_map), GFP_KERNEL);
	264	if (!pwm_map)
	265	return -ENOMEM;
	266
	267	pwm_map->output = output;
	268	pwm_map->num_outputs = num_outputs;
	269	pdata->pwms[i] = pwm_map;
	270
	271	count++;
	272	}
	273
	274	if (count == 0)
	275	return -ENODATA;
	276
	277	lp3943_pwm->pdata = pdata;
	278	return 0;
	279	}
	280
	281	static int lp3943_pwm_probe(struct platform_device *pdev)
	282	{
	283	struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
	284	struct lp3943_pwm *lp3943_pwm;
	285	int ret;
	286
	287	lp3943_pwm = devm_kzalloc(&pdev->dev, sizeof(*lp3943_pwm), GFP_KERNEL);
	288	if (!lp3943_pwm)
	289	return -ENOMEM;
	290
	291	lp3943_pwm->pdata = lp3943->pdata;
	292	if (!lp3943_pwm->pdata) {
	293	if (IS_ENABLED(CONFIG_OF))
	294	ret = lp3943_pwm_parse_dt(&pdev->dev, lp3943_pwm);
	295	else
	296	ret = -ENODEV;
	297
	298	if (ret)
	299	return ret;
	300	}
	301
	302	lp3943_pwm->lp3943 = lp3943;
	303	lp3943_pwm->chip.dev = &pdev->dev;
	304	lp3943_pwm->chip.ops = &lp3943_pwm_ops;
	305	lp3943_pwm->chip.npwm = LP3943_NUM_PWMS;
	306
071beb7c	307	return devm_pwmchip_add(&pdev->dev, &lp3943_pwm->chip);
af66b3c0 MK	308	}
	309
	310	#ifdef CONFIG_OF
	311	static const struct of_device_id lp3943_pwm_of_match[] = {
	312	{ .compatible = "ti,lp3943-pwm", },
	313	{ }
	314	};
	315	MODULE_DEVICE_TABLE(of, lp3943_pwm_of_match);
	316	#endif
	317
	318	static struct platform_driver lp3943_pwm_driver = {
	319	.probe = lp3943_pwm_probe,
af66b3c0 MK	320	.driver = {
af66b3c0 MK	321	.name = "lp3943-pwm",
af66b3c0 MK	322	.of_match_table = of_match_ptr(lp3943_pwm_of_match),
	323	},
	324	};
	325	module_platform_driver(lp3943_pwm_driver);
	326
	327	MODULE_DESCRIPTION("LP3943 PWM driver");
	328	MODULE_ALIAS("platform:lp3943-pwm");
	329	MODULE_AUTHOR("Milo Kim");
	330	MODULE_LICENSE("GPL");