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8c25c36f SH |
1 | /* |
2 | * Copyright (C) 1999,2000 Arm Limited | |
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
4 | * Copyright (C) 2002 Shane Nay ([email protected]) | |
5 | * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
6 | * - add MX31 specific definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
8c25c36f SH |
17 | */ |
18 | ||
19 | #include <linux/mm.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/err.h> | |
22 | ||
23 | #include <asm/pgtable.h> | |
24 | #include <asm/mach/map.h> | |
25 | ||
26 | #include <mach/common.h> | |
36223604 | 27 | #include <mach/devices-common.h> |
8c25c36f SH |
28 | #include <mach/hardware.h> |
29 | #include <mach/mx25.h> | |
30 | #include <mach/iomux-v3.h> | |
5ae30b47 | 31 | #include <mach/irqs.h> |
8c25c36f SH |
32 | |
33 | /* | |
34 | * This table defines static virtual address mappings for I/O regions. | |
08ff97b5 | 35 | * These are the mappings common across all MX25 boards. |
8c25c36f | 36 | */ |
08ff97b5 UKK |
37 | static struct map_desc mx25_io_desc[] __initdata = { |
38 | imx_map_entry(MX25, AVIC, MT_DEVICE_NONSHARED), | |
39 | imx_map_entry(MX25, AIPS1, MT_DEVICE_NONSHARED), | |
40 | imx_map_entry(MX25, AIPS2, MT_DEVICE_NONSHARED), | |
8c25c36f SH |
41 | }; |
42 | ||
43 | /* | |
44 | * This function initializes the memory map. It is called during the | |
45 | * system startup to create static physical to virtual memory mappings | |
46 | * for the IO modules. | |
47 | */ | |
48 | void __init mx25_map_io(void) | |
3dac2196 UKK |
49 | { |
50 | iotable_init(mx25_io_desc, ARRAY_SIZE(mx25_io_desc)); | |
51 | } | |
52 | ||
53 | void __init imx25_init_early(void) | |
8c25c36f SH |
54 | { |
55 | mxc_set_cpu_type(MXC_CPU_MX25); | |
56 | mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR)); | |
57 | mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); | |
8c25c36f SH |
58 | } |
59 | ||
60 | void __init mx25_init_irq(void) | |
61 | { | |
cf3a6aba | 62 | mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); |
8c25c36f SH |
63 | } |
64 | ||
36223604 SG |
65 | static struct sdma_script_start_addrs imx25_sdma_script __initdata = { |
66 | .ap_2_ap_addr = 729, | |
67 | .uart_2_mcu_addr = 904, | |
68 | .per_2_app_addr = 1255, | |
69 | .mcu_2_app_addr = 834, | |
70 | .uartsh_2_mcu_addr = 1120, | |
71 | .per_2_shp_addr = 1329, | |
72 | .mcu_2_shp_addr = 1048, | |
73 | .ata_2_mcu_addr = 1560, | |
74 | .mcu_2_ata_addr = 1479, | |
75 | .app_2_per_addr = 1189, | |
76 | .app_2_mcu_addr = 770, | |
77 | .shp_2_per_addr = 1407, | |
78 | .shp_2_mcu_addr = 979, | |
79 | }; | |
80 | ||
81 | static struct sdma_platform_data imx25_sdma_pdata __initdata = { | |
2e534b21 | 82 | .fw_name = "sdma-imx25.bin", |
36223604 SG |
83 | .script_addrs = &imx25_sdma_script, |
84 | }; | |
85 | ||
b78d8e59 SG |
86 | void __init imx25_soc_init(void) |
87 | { | |
e7fc6ae7 SG |
88 | /* i.mx25 has the i.mx31 type gpio */ |
89 | mxc_register_gpio("imx31-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); | |
90 | mxc_register_gpio("imx31-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); | |
91 | mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); | |
92 | mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); | |
36223604 | 93 | |
62550cd7 SG |
94 | /* i.mx25 has the i.mx35 type sdma */ |
95 | imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); | |
b78d8e59 | 96 | } |