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0a0c3b5a DHG |
1 | /* |
2 | * drivers/uio/uio_dmem_genirq.c | |
3 | * | |
4 | * Userspace I/O platform driver with generic IRQ handling code. | |
5 | * | |
6 | * Copyright (C) 2012 Damian Hobson-Garcia | |
7 | * | |
8 | * Based on uio_pdrv_genirq.c by Magnus Damm | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License version 2 as published by | |
12 | * the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/platform_device.h> | |
16 | #include <linux/uio_driver.h> | |
17 | #include <linux/spinlock.h> | |
18 | #include <linux/bitops.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/platform_data/uio_dmem_genirq.h> | |
22 | #include <linux/stringify.h> | |
23 | #include <linux/pm_runtime.h> | |
24 | #include <linux/dma-mapping.h> | |
25 | #include <linux/slab.h> | |
26 | ||
27 | #include <linux/of.h> | |
28 | #include <linux/of_platform.h> | |
29 | #include <linux/of_address.h> | |
30 | ||
31 | #define DRIVER_NAME "uio_dmem_genirq" | |
87c4d1a7 | 32 | #define DMEM_MAP_ERROR (~0) |
0a0c3b5a DHG |
33 | |
34 | struct uio_dmem_genirq_platdata { | |
35 | struct uio_info *uioinfo; | |
36 | spinlock_t lock; | |
37 | unsigned long flags; | |
38 | struct platform_device *pdev; | |
39 | unsigned int dmem_region_start; | |
40 | unsigned int num_dmem_regions; | |
24fce61b | 41 | void *dmem_region_vaddr[MAX_UIO_MAPS]; |
0a0c3b5a DHG |
42 | struct mutex alloc_lock; |
43 | unsigned int refcnt; | |
44 | }; | |
45 | ||
46 | static int uio_dmem_genirq_open(struct uio_info *info, struct inode *inode) | |
47 | { | |
48 | struct uio_dmem_genirq_platdata *priv = info->priv; | |
49 | struct uio_mem *uiomem; | |
50 | int ret = 0; | |
24fce61b | 51 | int dmem_region = priv->dmem_region_start; |
0a0c3b5a DHG |
52 | |
53 | uiomem = &priv->uioinfo->mem[priv->dmem_region_start]; | |
54 | ||
55 | mutex_lock(&priv->alloc_lock); | |
56 | while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) { | |
57 | void *addr; | |
58 | if (!uiomem->size) | |
59 | break; | |
60 | ||
61 | addr = dma_alloc_coherent(&priv->pdev->dev, uiomem->size, | |
62 | (dma_addr_t *)&uiomem->addr, GFP_KERNEL); | |
63 | if (!addr) { | |
87c4d1a7 | 64 | uiomem->addr = DMEM_MAP_ERROR; |
0a0c3b5a | 65 | } |
24fce61b | 66 | priv->dmem_region_vaddr[dmem_region++] = addr; |
0a0c3b5a DHG |
67 | ++uiomem; |
68 | } | |
69 | priv->refcnt++; | |
70 | ||
71 | mutex_unlock(&priv->alloc_lock); | |
72 | /* Wait until the Runtime PM code has woken up the device */ | |
73 | pm_runtime_get_sync(&priv->pdev->dev); | |
74 | return ret; | |
75 | } | |
76 | ||
77 | static int uio_dmem_genirq_release(struct uio_info *info, struct inode *inode) | |
78 | { | |
79 | struct uio_dmem_genirq_platdata *priv = info->priv; | |
80 | struct uio_mem *uiomem; | |
24fce61b | 81 | int dmem_region = priv->dmem_region_start; |
0a0c3b5a DHG |
82 | |
83 | /* Tell the Runtime PM code that the device has become idle */ | |
84 | pm_runtime_put_sync(&priv->pdev->dev); | |
85 | ||
86 | uiomem = &priv->uioinfo->mem[priv->dmem_region_start]; | |
87 | ||
88 | mutex_lock(&priv->alloc_lock); | |
89 | ||
90 | priv->refcnt--; | |
91 | while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) { | |
92 | if (!uiomem->size) | |
93 | break; | |
439926c8 DHG |
94 | if (priv->dmem_region_vaddr[dmem_region]) { |
95 | dma_free_coherent(&priv->pdev->dev, uiomem->size, | |
96 | priv->dmem_region_vaddr[dmem_region], | |
97 | uiomem->addr); | |
98 | } | |
87c4d1a7 | 99 | uiomem->addr = DMEM_MAP_ERROR; |
439926c8 | 100 | ++dmem_region; |
0a0c3b5a DHG |
101 | ++uiomem; |
102 | } | |
103 | ||
104 | mutex_unlock(&priv->alloc_lock); | |
105 | return 0; | |
106 | } | |
107 | ||
108 | static irqreturn_t uio_dmem_genirq_handler(int irq, struct uio_info *dev_info) | |
109 | { | |
110 | struct uio_dmem_genirq_platdata *priv = dev_info->priv; | |
111 | ||
112 | /* Just disable the interrupt in the interrupt controller, and | |
113 | * remember the state so we can allow user space to enable it later. | |
114 | */ | |
115 | ||
116 | if (!test_and_set_bit(0, &priv->flags)) | |
117 | disable_irq_nosync(irq); | |
118 | ||
119 | return IRQ_HANDLED; | |
120 | } | |
121 | ||
122 | static int uio_dmem_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on) | |
123 | { | |
124 | struct uio_dmem_genirq_platdata *priv = dev_info->priv; | |
125 | unsigned long flags; | |
126 | ||
127 | /* Allow user space to enable and disable the interrupt | |
128 | * in the interrupt controller, but keep track of the | |
129 | * state to prevent per-irq depth damage. | |
130 | * | |
131 | * Serialize this operation to support multiple tasks. | |
132 | */ | |
133 | ||
134 | spin_lock_irqsave(&priv->lock, flags); | |
135 | if (irq_on) { | |
136 | if (test_and_clear_bit(0, &priv->flags)) | |
137 | enable_irq(dev_info->irq); | |
138 | } else { | |
139 | if (!test_and_set_bit(0, &priv->flags)) | |
140 | disable_irq(dev_info->irq); | |
141 | } | |
142 | spin_unlock_irqrestore(&priv->lock, flags); | |
143 | ||
144 | return 0; | |
145 | } | |
146 | ||
147 | static int uio_dmem_genirq_probe(struct platform_device *pdev) | |
148 | { | |
31f52213 | 149 | struct uio_dmem_genirq_pdata *pdata = dev_get_platdata(&pdev->dev); |
0a0c3b5a DHG |
150 | struct uio_info *uioinfo = &pdata->uioinfo; |
151 | struct uio_dmem_genirq_platdata *priv; | |
152 | struct uio_mem *uiomem; | |
153 | int ret = -EINVAL; | |
154 | int i; | |
155 | ||
d5185c4e | 156 | if (pdev->dev.of_node) { |
0a0c3b5a DHG |
157 | int irq; |
158 | ||
159 | /* alloc uioinfo for one device */ | |
160 | uioinfo = kzalloc(sizeof(*uioinfo), GFP_KERNEL); | |
161 | if (!uioinfo) { | |
162 | ret = -ENOMEM; | |
163 | dev_err(&pdev->dev, "unable to kmalloc\n"); | |
164 | goto bad2; | |
165 | } | |
52e2dc2c RH |
166 | uioinfo->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOFn", |
167 | pdev->dev.of_node); | |
0a0c3b5a DHG |
168 | uioinfo->version = "devicetree"; |
169 | ||
170 | /* Multiple IRQs are not supported */ | |
171 | irq = platform_get_irq(pdev, 0); | |
172 | if (irq == -ENXIO) | |
173 | uioinfo->irq = UIO_IRQ_NONE; | |
174 | else | |
175 | uioinfo->irq = irq; | |
176 | } | |
177 | ||
178 | if (!uioinfo || !uioinfo->name || !uioinfo->version) { | |
179 | dev_err(&pdev->dev, "missing platform_data\n"); | |
180 | goto bad0; | |
181 | } | |
182 | ||
183 | if (uioinfo->handler || uioinfo->irqcontrol || | |
184 | uioinfo->irq_flags & IRQF_SHARED) { | |
185 | dev_err(&pdev->dev, "interrupt configuration error\n"); | |
186 | goto bad0; | |
187 | } | |
188 | ||
189 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
190 | if (!priv) { | |
191 | ret = -ENOMEM; | |
192 | dev_err(&pdev->dev, "unable to kmalloc\n"); | |
193 | goto bad0; | |
194 | } | |
195 | ||
196 | dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); | |
197 | ||
198 | priv->uioinfo = uioinfo; | |
199 | spin_lock_init(&priv->lock); | |
200 | priv->flags = 0; /* interrupt is enabled to begin with */ | |
201 | priv->pdev = pdev; | |
202 | mutex_init(&priv->alloc_lock); | |
203 | ||
204 | if (!uioinfo->irq) { | |
205 | ret = platform_get_irq(pdev, 0); | |
206 | if (ret < 0) { | |
207 | dev_err(&pdev->dev, "failed to get IRQ\n"); | |
ca3c61f3 | 208 | goto bad1; |
0a0c3b5a DHG |
209 | } |
210 | uioinfo->irq = ret; | |
211 | } | |
212 | uiomem = &uioinfo->mem[0]; | |
213 | ||
214 | for (i = 0; i < pdev->num_resources; ++i) { | |
215 | struct resource *r = &pdev->resource[i]; | |
216 | ||
217 | if (r->flags != IORESOURCE_MEM) | |
218 | continue; | |
219 | ||
220 | if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) { | |
221 | dev_warn(&pdev->dev, "device has more than " | |
222 | __stringify(MAX_UIO_MAPS) | |
223 | " I/O memory resources.\n"); | |
224 | break; | |
225 | } | |
226 | ||
227 | uiomem->memtype = UIO_MEM_PHYS; | |
228 | uiomem->addr = r->start; | |
229 | uiomem->size = resource_size(r); | |
230 | ++uiomem; | |
231 | } | |
232 | ||
4d31a258 | 233 | priv->dmem_region_start = uiomem - &uioinfo->mem[0]; |
0a0c3b5a DHG |
234 | priv->num_dmem_regions = pdata->num_dynamic_regions; |
235 | ||
236 | for (i = 0; i < pdata->num_dynamic_regions; ++i) { | |
237 | if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) { | |
238 | dev_warn(&pdev->dev, "device has more than " | |
239 | __stringify(MAX_UIO_MAPS) | |
240 | " dynamic and fixed memory regions.\n"); | |
241 | break; | |
242 | } | |
243 | uiomem->memtype = UIO_MEM_PHYS; | |
87c4d1a7 | 244 | uiomem->addr = DMEM_MAP_ERROR; |
0a0c3b5a DHG |
245 | uiomem->size = pdata->dynamic_region_sizes[i]; |
246 | ++uiomem; | |
247 | } | |
248 | ||
249 | while (uiomem < &uioinfo->mem[MAX_UIO_MAPS]) { | |
250 | uiomem->size = 0; | |
251 | ++uiomem; | |
252 | } | |
253 | ||
254 | /* This driver requires no hardware specific kernel code to handle | |
255 | * interrupts. Instead, the interrupt handler simply disables the | |
256 | * interrupt in the interrupt controller. User space is responsible | |
257 | * for performing hardware specific acknowledge and re-enabling of | |
258 | * the interrupt in the interrupt controller. | |
259 | * | |
260 | * Interrupt sharing is not supported. | |
261 | */ | |
262 | ||
263 | uioinfo->handler = uio_dmem_genirq_handler; | |
264 | uioinfo->irqcontrol = uio_dmem_genirq_irqcontrol; | |
265 | uioinfo->open = uio_dmem_genirq_open; | |
266 | uioinfo->release = uio_dmem_genirq_release; | |
267 | uioinfo->priv = priv; | |
268 | ||
269 | /* Enable Runtime PM for this device: | |
270 | * The device starts in suspended state to allow the hardware to be | |
271 | * turned off by default. The Runtime PM bus code should power on the | |
272 | * hardware and enable clocks at open(). | |
273 | */ | |
274 | pm_runtime_enable(&pdev->dev); | |
275 | ||
276 | ret = uio_register_device(&pdev->dev, priv->uioinfo); | |
277 | if (ret) { | |
278 | dev_err(&pdev->dev, "unable to register uio device\n"); | |
ca3c61f3 | 279 | pm_runtime_disable(&pdev->dev); |
0a0c3b5a DHG |
280 | goto bad1; |
281 | } | |
282 | ||
283 | platform_set_drvdata(pdev, priv); | |
284 | return 0; | |
285 | bad1: | |
286 | kfree(priv); | |
0a0c3b5a DHG |
287 | bad0: |
288 | /* kfree uioinfo for OF */ | |
289 | if (pdev->dev.of_node) | |
290 | kfree(uioinfo); | |
291 | bad2: | |
292 | return ret; | |
293 | } | |
294 | ||
295 | static int uio_dmem_genirq_remove(struct platform_device *pdev) | |
296 | { | |
297 | struct uio_dmem_genirq_platdata *priv = platform_get_drvdata(pdev); | |
298 | ||
299 | uio_unregister_device(priv->uioinfo); | |
300 | pm_runtime_disable(&pdev->dev); | |
301 | ||
302 | priv->uioinfo->handler = NULL; | |
303 | priv->uioinfo->irqcontrol = NULL; | |
304 | ||
305 | /* kfree uioinfo for OF */ | |
306 | if (pdev->dev.of_node) | |
307 | kfree(priv->uioinfo); | |
308 | ||
309 | kfree(priv); | |
310 | return 0; | |
311 | } | |
312 | ||
313 | static int uio_dmem_genirq_runtime_nop(struct device *dev) | |
314 | { | |
315 | /* Runtime PM callback shared between ->runtime_suspend() | |
316 | * and ->runtime_resume(). Simply returns success. | |
317 | * | |
318 | * In this driver pm_runtime_get_sync() and pm_runtime_put_sync() | |
319 | * are used at open() and release() time. This allows the | |
320 | * Runtime PM code to turn off power to the device while the | |
321 | * device is unused, ie before open() and after release(). | |
322 | * | |
323 | * This Runtime PM callback does not need to save or restore | |
324 | * any registers since user space is responsbile for hardware | |
325 | * register reinitialization after open(). | |
326 | */ | |
327 | return 0; | |
328 | } | |
329 | ||
330 | static const struct dev_pm_ops uio_dmem_genirq_dev_pm_ops = { | |
331 | .runtime_suspend = uio_dmem_genirq_runtime_nop, | |
332 | .runtime_resume = uio_dmem_genirq_runtime_nop, | |
333 | }; | |
334 | ||
335 | #ifdef CONFIG_OF | |
336 | static const struct of_device_id uio_of_genirq_match[] = { | |
337 | { /* empty for now */ }, | |
338 | }; | |
339 | MODULE_DEVICE_TABLE(of, uio_of_genirq_match); | |
0a0c3b5a DHG |
340 | #endif |
341 | ||
342 | static struct platform_driver uio_dmem_genirq = { | |
343 | .probe = uio_dmem_genirq_probe, | |
344 | .remove = uio_dmem_genirq_remove, | |
345 | .driver = { | |
346 | .name = DRIVER_NAME, | |
0a0c3b5a | 347 | .pm = &uio_dmem_genirq_dev_pm_ops, |
07779711 | 348 | .of_match_table = of_match_ptr(uio_of_genirq_match), |
0a0c3b5a DHG |
349 | }, |
350 | }; | |
351 | ||
352 | module_platform_driver(uio_dmem_genirq); | |
353 | ||
354 | MODULE_AUTHOR("Damian Hobson-Garcia"); | |
355 | MODULE_DESCRIPTION("Userspace I/O platform driver with dynamic memory."); | |
356 | MODULE_LICENSE("GPL v2"); | |
357 | MODULE_ALIAS("platform:" DRIVER_NAME); |