[linux.git] / drivers / rtc / rtc-mc146818-lib.c

// SPDX-License-Identifier: GPL-2.0-only
#include <linux/bcd.h>
#include <linux/delay.h>
#include <linux/export.h>
#include <linux/mc146818rtc.h>

#ifdef CONFIG_ACPI
#include <linux/acpi.h>
#endif

/*
 * Execute a function while the UIP (Update-in-progress) bit of the RTC is
 * unset.
 *
 * Warning: callback may be executed more then once.
 */
bool mc146818_avoid_UIP(void (*callback)(unsigned char seconds, void *param),
			void *param)
{
	int i;
	unsigned long flags;
	unsigned char seconds;

	for (i = 0; i < 100; i++) {
		spin_lock_irqsave(&rtc_lock, flags);

		/*
		 * Check whether there is an update in progress during which the
		 * readout is unspecified. The maximum update time is ~2ms. Poll
		 * every 100 usec for completion.
		 *
		 * Store the second value before checking UIP so a long lasting
		 * NMI which happens to hit after the UIP check cannot make
		 * an update cycle invisible.
		 */
		seconds = CMOS_READ(RTC_SECONDS);

		if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) {
			spin_unlock_irqrestore(&rtc_lock, flags);
			udelay(100);
			continue;
		}

		/* Revalidate the above readout */
		if (seconds != CMOS_READ(RTC_SECONDS)) {
			spin_unlock_irqrestore(&rtc_lock, flags);
			continue;
		}

		if (callback)
			callback(seconds, param);

		/*
		 * Check for the UIP bit again. If it is set now then
		 * the above values may contain garbage.
		 */
		if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) {
			spin_unlock_irqrestore(&rtc_lock, flags);
			udelay(100);
			continue;
		}

		/*
		 * A NMI might have interrupted the above sequence so check
		 * whether the seconds value has changed which indicates that
		 * the NMI took longer than the UIP bit was set. Unlikely, but
		 * possible and there is also virt...
		 */
		if (seconds != CMOS_READ(RTC_SECONDS)) {
			spin_unlock_irqrestore(&rtc_lock, flags);
			continue;
		}
		spin_unlock_irqrestore(&rtc_lock, flags);

		return true;
	}
	return false;
}
EXPORT_SYMBOL_GPL(mc146818_avoid_UIP);

/*
 * If the UIP (Update-in-progress) bit of the RTC is set for more then
 * 10ms, the RTC is apparently broken or not present.
 */
bool mc146818_does_rtc_work(void)
{
	return mc146818_avoid_UIP(NULL, NULL);
}
EXPORT_SYMBOL_GPL(mc146818_does_rtc_work);

struct mc146818_get_time_callback_param {
	struct rtc_time *time;
	unsigned char ctrl;
#ifdef CONFIG_ACPI
	unsigned char century;
#endif
#ifdef CONFIG_MACH_DECSTATION
	unsigned int real_year;
#endif
};

static void mc146818_get_time_callback(unsigned char seconds, void *param_in)
{
	struct mc146818_get_time_callback_param *p = param_in;

	/*
	 * Only the values that we read from the RTC are set. We leave
	 * tm_wday, tm_yday and tm_isdst untouched. Even though the
	 * RTC has RTC_DAY_OF_WEEK, we ignore it, as it is only updated
	 * by the RTC when initially set to a non-zero value.
	 */
	p->time->tm_sec = seconds;
	p->time->tm_min = CMOS_READ(RTC_MINUTES);
	p->time->tm_hour = CMOS_READ(RTC_HOURS);
	p->time->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
	p->time->tm_mon = CMOS_READ(RTC_MONTH);
	p->time->tm_year = CMOS_READ(RTC_YEAR);
#ifdef CONFIG_MACH_DECSTATION
	p->real_year = CMOS_READ(RTC_DEC_YEAR);
#endif
#ifdef CONFIG_ACPI
	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
	    acpi_gbl_FADT.century) {
		p->century = CMOS_READ(acpi_gbl_FADT.century);
	} else {
		p->century = 0;
	}
#endif

	p->ctrl = CMOS_READ(RTC_CONTROL);
}

int mc146818_get_time(struct rtc_time *time)
{
	struct mc146818_get_time_callback_param p = {
		.time = time
	};

	if (!mc146818_avoid_UIP(mc146818_get_time_callback, &p)) {
		memset(time, 0, sizeof(*time));
		return -EIO;
	}

	if (!(p.ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
	{
		time->tm_sec = bcd2bin(time->tm_sec);
		time->tm_min = bcd2bin(time->tm_min);
		time->tm_hour = bcd2bin(time->tm_hour);
		time->tm_mday = bcd2bin(time->tm_mday);
		time->tm_mon = bcd2bin(time->tm_mon);
		time->tm_year = bcd2bin(time->tm_year);
#ifdef CONFIG_ACPI
		p.century = bcd2bin(p.century);
#endif
	}

#ifdef CONFIG_MACH_DECSTATION
	time->tm_year += p.real_year - 72;
#endif

#ifdef CONFIG_ACPI
	if (p.century > 19)
		time->tm_year += (p.century - 19) * 100;
#endif

	/*
	 * Account for differences between how the RTC uses the values
	 * and how they are defined in a struct rtc_time;
	 */
	if (time->tm_year <= 69)
		time->tm_year += 100;

	time->tm_mon--;

	return 0;
}
EXPORT_SYMBOL_GPL(mc146818_get_time);

/* AMD systems don't allow access to AltCentury with DV1 */
static bool apply_amd_register_a_behavior(void)
{
#ifdef CONFIG_X86
	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
		return true;
#endif
	return false;
}

/* Set the current date and time in the real time clock. */
int mc146818_set_time(struct rtc_time *time)
{
	unsigned long flags;
	unsigned char mon, day, hrs, min, sec;
	unsigned char save_control, save_freq_select;
	unsigned int yrs;
#ifdef CONFIG_MACH_DECSTATION
	unsigned int real_yrs, leap_yr;
#endif
	unsigned char century = 0;

	yrs = time->tm_year;
	mon = time->tm_mon + 1;   /* tm_mon starts at zero */
	day = time->tm_mday;
	hrs = time->tm_hour;
	min = time->tm_min;
	sec = time->tm_sec;

	if (yrs > 255)	/* They are unsigned */
		return -EINVAL;

#ifdef CONFIG_MACH_DECSTATION
	real_yrs = yrs;
	leap_yr = ((!((yrs + 1900) % 4) && ((yrs + 1900) % 100)) ||
			!((yrs + 1900) % 400));
	yrs = 72;

	/*
	 * We want to keep the year set to 73 until March
	 * for non-leap years, so that Feb, 29th is handled
	 * correctly.
	 */
	if (!leap_yr && mon < 3) {
		real_yrs--;
		yrs = 73;
	}
#endif

#ifdef CONFIG_ACPI
	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
	    acpi_gbl_FADT.century) {
		century = (yrs + 1900) / 100;
		yrs %= 100;
	}
#endif

	/* These limits and adjustments are independent of
	 * whether the chip is in binary mode or not.
	 */
	if (yrs > 169)
		return -EINVAL;

	if (yrs >= 100)
		yrs -= 100;

	spin_lock_irqsave(&rtc_lock, flags);
	save_control = CMOS_READ(RTC_CONTROL);
	spin_unlock_irqrestore(&rtc_lock, flags);
	if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
		sec = bin2bcd(sec);
		min = bin2bcd(min);
		hrs = bin2bcd(hrs);
		day = bin2bcd(day);
		mon = bin2bcd(mon);
		yrs = bin2bcd(yrs);
		century = bin2bcd(century);
	}

	spin_lock_irqsave(&rtc_lock, flags);
	save_control = CMOS_READ(RTC_CONTROL);
	CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
	save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
	if (apply_amd_register_a_behavior())
		CMOS_WRITE((save_freq_select & ~RTC_AMD_BANK_SELECT), RTC_FREQ_SELECT);
	else
		CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);

#ifdef CONFIG_MACH_DECSTATION
	CMOS_WRITE(real_yrs, RTC_DEC_YEAR);
#endif
	CMOS_WRITE(yrs, RTC_YEAR);
	CMOS_WRITE(mon, RTC_MONTH);
	CMOS_WRITE(day, RTC_DAY_OF_MONTH);
	CMOS_WRITE(hrs, RTC_HOURS);
	CMOS_WRITE(min, RTC_MINUTES);
	CMOS_WRITE(sec, RTC_SECONDS);
#ifdef CONFIG_ACPI
	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
	    acpi_gbl_FADT.century)
		CMOS_WRITE(century, acpi_gbl_FADT.century);
#endif

	CMOS_WRITE(save_control, RTC_CONTROL);
	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);

	spin_unlock_irqrestore(&rtc_lock, flags);

	return 0;
}
EXPORT_SYMBOL_GPL(mc146818_set_time);
Commit	Line	Data
457c8996	1	// SPDX-License-Identifier: GPL-2.0-only
d6faca40 AB	2	#include <linux/bcd.h>
	3	#include <linux/delay.h>
	4	#include <linux/export.h>
	5	#include <linux/mc146818rtc.h>
	6
	7	#ifdef CONFIG_ACPI
	8	#include <linux/acpi.h>
	9	#endif
	10
ec5895c0 MJ	11	/*
	12	* Execute a function while the UIP (Update-in-progress) bit of the RTC is
	13	* unset.
	14	*
	15	* Warning: callback may be executed more then once.
	16	*/
	17	bool mc146818_avoid_UIP(void (callback)(unsigned char seconds, void param),
	18	void *param)
	19	{
	20	int i;
	21	unsigned long flags;
	22	unsigned char seconds;
	23
d2a632a8	24	for (i = 0; i < 100; i++) {
ec5895c0 MJ	25	spin_lock_irqsave(&rtc_lock, flags);
	26
	27	/*
	28	* Check whether there is an update in progress during which the
	29	* readout is unspecified. The maximum update time is ~2ms. Poll
d2a632a8	30	* every 100 usec for completion.
ec5895c0 MJ	31	*
	32	* Store the second value before checking UIP so a long lasting
	33	* NMI which happens to hit after the UIP check cannot make
	34	* an update cycle invisible.
	35	*/
	36	seconds = CMOS_READ(RTC_SECONDS);
	37
	38	if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) {
	39	spin_unlock_irqrestore(&rtc_lock, flags);
d2a632a8	40	udelay(100);
ec5895c0 MJ	41	continue;
	42	}
	43
	44	/* Revalidate the above readout */
	45	if (seconds != CMOS_READ(RTC_SECONDS)) {
	46	spin_unlock_irqrestore(&rtc_lock, flags);
	47	continue;
	48	}
	49
	50	if (callback)
	51	callback(seconds, param);
	52
	53	/*
	54	* Check for the UIP bit again. If it is set now then
	55	* the above values may contain garbage.
	56	*/
	57	if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) {
	58	spin_unlock_irqrestore(&rtc_lock, flags);
d2a632a8	59	udelay(100);
ec5895c0 MJ	60	continue;
	61	}
	62
	63	/*
	64	* A NMI might have interrupted the above sequence so check
	65	* whether the seconds value has changed which indicates that
	66	* the NMI took longer than the UIP bit was set. Unlikely, but
	67	* possible and there is also virt...
	68	*/
	69	if (seconds != CMOS_READ(RTC_SECONDS)) {
	70	spin_unlock_irqrestore(&rtc_lock, flags);
	71	continue;
	72	}
	73	spin_unlock_irqrestore(&rtc_lock, flags);
	74
	75	return true;
	76	}
	77	return false;
	78	}
	79	EXPORT_SYMBOL_GPL(mc146818_avoid_UIP);
	80
ea6fa496 MJ	81	/*
	82	* If the UIP (Update-in-progress) bit of the RTC is set for more then
	83	* 10ms, the RTC is apparently broken or not present.
	84	*/
	85	bool mc146818_does_rtc_work(void)
	86	{
2c7d47a4	87	return mc146818_avoid_UIP(NULL, NULL);
ea6fa496 MJ	88	}
	89	EXPORT_SYMBOL_GPL(mc146818_does_rtc_work);
	90
2a61b0ac MJ	91	struct mc146818_get_time_callback_param {
2a61b0ac MJ	92	struct rtc_time *time;
d6faca40	93	unsigned char ctrl;
2a61b0ac MJ	94	#ifdef CONFIG_ACPI
	95	unsigned char century;
	96	#endif
d6faca40 AB	97	#ifdef CONFIG_MACH_DECSTATION
	98	unsigned int real_year;
	99	#endif
2a61b0ac	100	};
d6faca40	101
2a61b0ac MJ	102	static void mc146818_get_time_callback(unsigned char seconds, void *param_in)
	103	{
	104	struct mc146818_get_time_callback_param *p = param_in;
d6faca40 AB	105
	106	/*
	107	* Only the values that we read from the RTC are set. We leave
	108	* tm_wday, tm_yday and tm_isdst untouched. Even though the
	109	* RTC has RTC_DAY_OF_WEEK, we ignore it, as it is only updated
	110	* by the RTC when initially set to a non-zero value.
	111	*/
2a61b0ac MJ	112	p->time->tm_sec = seconds;
	113	p->time->tm_min = CMOS_READ(RTC_MINUTES);
	114	p->time->tm_hour = CMOS_READ(RTC_HOURS);
	115	p->time->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
	116	p->time->tm_mon = CMOS_READ(RTC_MONTH);
	117	p->time->tm_year = CMOS_READ(RTC_YEAR);
d6faca40	118	#ifdef CONFIG_MACH_DECSTATION
2a61b0ac	119	p->real_year = CMOS_READ(RTC_DEC_YEAR);
d6faca40 AB	120	#endif
	121	#ifdef CONFIG_ACPI
	122	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
2a61b0ac MJ	123	acpi_gbl_FADT.century) {
	124	p->century = CMOS_READ(acpi_gbl_FADT.century);
	125	} else {
	126	p->century = 0;
	127	}
d6faca40	128	#endif
05a0302c	129
2a61b0ac MJ	130	p->ctrl = CMOS_READ(RTC_CONTROL);
	131	}
	132
7372971c	133	int mc146818_get_time(struct rtc_time *time)
2a61b0ac MJ	134	{
	135	struct mc146818_get_time_callback_param p = {
	136	.time = time
	137	};
d6faca40	138
2a61b0ac MJ	139	if (!mc146818_avoid_UIP(mc146818_get_time_callback, &p)) {
	140	memset(time, 0, sizeof(*time));
	141	return -EIO;
	142	}
05a0302c	143
2a61b0ac	144	if (!(p.ctrl & RTC_DM_BINARY) \|\| RTC_ALWAYS_BCD)
d6faca40 AB	145	{
	146	time->tm_sec = bcd2bin(time->tm_sec);
	147	time->tm_min = bcd2bin(time->tm_min);
	148	time->tm_hour = bcd2bin(time->tm_hour);
	149	time->tm_mday = bcd2bin(time->tm_mday);
	150	time->tm_mon = bcd2bin(time->tm_mon);
	151	time->tm_year = bcd2bin(time->tm_year);
2a61b0ac MJ	152	#ifdef CONFIG_ACPI
	153	p.century = bcd2bin(p.century);
	154	#endif
d6faca40 AB	155	}
	156
	157	#ifdef CONFIG_MACH_DECSTATION
2a61b0ac	158	time->tm_year += p.real_year - 72;
d6faca40 AB	159	#endif
d6faca40 AB	160
2a61b0ac	161	#ifdef CONFIG_ACPI
ff164ae3	162	if (p.century > 19)
2a61b0ac MJ	163	time->tm_year += (p.century - 19) * 100;
2a61b0ac MJ	164	#endif
d6faca40 AB	165
	166	/*
	167	* Account for differences between how the RTC uses the values
	168	* and how they are defined in a struct rtc_time;
	169	*/
	170	if (time->tm_year <= 69)
	171	time->tm_year += 100;
	172
	173	time->tm_mon--;
	174
d35786b3	175	return 0;
d6faca40 AB	176	}
	177	EXPORT_SYMBOL_GPL(mc146818_get_time);
	178
3ae8fd41 ML	179	/* AMD systems don't allow access to AltCentury with DV1 */
	180	static bool apply_amd_register_a_behavior(void)
	181	{
	182	#ifdef CONFIG_X86
	183	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD \|\|
	184	boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
	185	return true;
	186	#endif
	187	return false;
	188	}
	189
d6faca40 AB	190	/* Set the current date and time in the real time clock. */
	191	int mc146818_set_time(struct rtc_time *time)
	192	{
	193	unsigned long flags;
	194	unsigned char mon, day, hrs, min, sec;
	195	unsigned char save_control, save_freq_select;
	196	unsigned int yrs;
	197	#ifdef CONFIG_MACH_DECSTATION
	198	unsigned int real_yrs, leap_yr;
	199	#endif
	200	unsigned char century = 0;
	201
	202	yrs = time->tm_year;
	203	mon = time->tm_mon + 1; /* tm_mon starts at zero */
	204	day = time->tm_mday;
	205	hrs = time->tm_hour;
	206	min = time->tm_min;
	207	sec = time->tm_sec;
	208
	209	if (yrs > 255) /* They are unsigned */
	210	return -EINVAL;
	211
d6faca40 AB	212	#ifdef CONFIG_MACH_DECSTATION
	213	real_yrs = yrs;
	214	leap_yr = ((!((yrs + 1900) % 4) && ((yrs + 1900) % 100)) \|\|
	215	!((yrs + 1900) % 400));
	216	yrs = 72;
	217
	218	/*
	219	* We want to keep the year set to 73 until March
	220	* for non-leap years, so that Feb, 29th is handled
	221	* correctly.
	222	*/
	223	if (!leap_yr && mon < 3) {
	224	real_yrs--;
	225	yrs = 73;
	226	}
	227	#endif
	228
	229	#ifdef CONFIG_ACPI
	230	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
	231	acpi_gbl_FADT.century) {
	232	century = (yrs + 1900) / 100;
	233	yrs %= 100;
	234	}
	235	#endif
	236
	237	/* These limits and adjustments are independent of
	238	* whether the chip is in binary mode or not.
	239	*/
dcf257e9	240	if (yrs > 169)
d6faca40	241	return -EINVAL;
d6faca40 AB	242
	243	if (yrs >= 100)
	244	yrs -= 100;
	245
811f5559 MJ	246	spin_lock_irqsave(&rtc_lock, flags);
	247	save_control = CMOS_READ(RTC_CONTROL);
	248	spin_unlock_irqrestore(&rtc_lock, flags);
	249	if (!(save_control & RTC_DM_BINARY) \|\| RTC_ALWAYS_BCD) {
d6faca40 AB	250	sec = bin2bcd(sec);
	251	min = bin2bcd(min);
	252	hrs = bin2bcd(hrs);
	253	day = bin2bcd(day);
	254	mon = bin2bcd(mon);
	255	yrs = bin2bcd(yrs);
	256	century = bin2bcd(century);
	257	}
	258
dcf257e9	259	spin_lock_irqsave(&rtc_lock, flags);
d6faca40 AB	260	save_control = CMOS_READ(RTC_CONTROL);
	261	CMOS_WRITE((save_control\|RTC_SET), RTC_CONTROL);
	262	save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
3ae8fd41 ML	263	if (apply_amd_register_a_behavior())
	264	CMOS_WRITE((save_freq_select & ~RTC_AMD_BANK_SELECT), RTC_FREQ_SELECT);
	265	else
	266	CMOS_WRITE((save_freq_select\|RTC_DIV_RESET2), RTC_FREQ_SELECT);
d6faca40 AB	267
	268	#ifdef CONFIG_MACH_DECSTATION
	269	CMOS_WRITE(real_yrs, RTC_DEC_YEAR);
	270	#endif
	271	CMOS_WRITE(yrs, RTC_YEAR);
	272	CMOS_WRITE(mon, RTC_MONTH);
	273	CMOS_WRITE(day, RTC_DAY_OF_MONTH);
	274	CMOS_WRITE(hrs, RTC_HOURS);
	275	CMOS_WRITE(min, RTC_MINUTES);
	276	CMOS_WRITE(sec, RTC_SECONDS);
	277	#ifdef CONFIG_ACPI
	278	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
	279	acpi_gbl_FADT.century)
	280	CMOS_WRITE(century, acpi_gbl_FADT.century);
	281	#endif
	282
	283	CMOS_WRITE(save_control, RTC_CONTROL);
	284	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
	285
	286	spin_unlock_irqrestore(&rtc_lock, flags);
	287
	288	return 0;
	289	}
	290	EXPORT_SYMBOL_GPL(mc146818_set_time);