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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/entry.S | |
3 | * S390 low-level entry points. | |
4 | * | |
54dfe5dd | 5 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 LT |
6 | * Author(s): Martin Schwidefsky ([email protected]), |
7 | * Hartmut Penner ([email protected]), | |
8 | * Denis Joseph Barrow ([email protected],[email protected]), | |
77fa2245 | 9 | * Heiko Carstens <[email protected]> |
1da177e4 LT |
10 | */ |
11 | ||
12 | #include <linux/sys.h> | |
13 | #include <linux/linkage.h> | |
1da177e4 LT |
14 | #include <asm/cache.h> |
15 | #include <asm/lowcore.h> | |
16 | #include <asm/errno.h> | |
17 | #include <asm/ptrace.h> | |
18 | #include <asm/thread_info.h> | |
0013a854 | 19 | #include <asm/asm-offsets.h> |
1da177e4 LT |
20 | #include <asm/unistd.h> |
21 | #include <asm/page.h> | |
22 | ||
23 | /* | |
24 | * Stack layout for the system_call stack entry. | |
25 | * The first few entries are identical to the user_regs_struct. | |
26 | */ | |
27 | SP_PTREGS = STACK_FRAME_OVERHEAD | |
28 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
29 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
30 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
31 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 | |
32 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
33 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 | |
34 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
35 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 | |
36 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
37 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 | |
38 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
39 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36 | |
40 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
41 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44 | |
42 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
43 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52 | |
44 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
45 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60 | |
46 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
47 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
48 | SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP | |
49 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE | |
50 | ||
54dfe5dd HC |
51 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ |
52 | _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) | |
53 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ | |
54 | _TIF_MCCK_PENDING) | |
1da177e4 LT |
55 | |
56 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
57 | STACK_SIZE = 1 << STACK_SHIFT | |
58 | ||
59 | #define BASED(name) name-system_call(%r13) | |
60 | ||
1f194a4c HC |
61 | #ifdef CONFIG_TRACE_IRQFLAGS |
62 | .macro TRACE_IRQS_ON | |
63 | l %r1,BASED(.Ltrace_irq_on) | |
64 | basr %r14,%r1 | |
65 | .endm | |
66 | ||
67 | .macro TRACE_IRQS_OFF | |
68 | l %r1,BASED(.Ltrace_irq_off) | |
69 | basr %r14,%r1 | |
70 | .endm | |
71 | #else | |
72 | #define TRACE_IRQS_ON | |
73 | #define TRACE_IRQS_OFF | |
74 | #endif | |
75 | ||
1da177e4 LT |
76 | /* |
77 | * Register usage in interrupt handlers: | |
78 | * R9 - pointer to current task structure | |
79 | * R13 - pointer to literal pool | |
80 | * R14 - return register for function calls | |
81 | * R15 - kernel stack pointer | |
82 | */ | |
83 | ||
84 | .macro STORE_TIMER lc_offset | |
85 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
86 | stpt \lc_offset | |
87 | #endif | |
88 | .endm | |
89 | ||
90 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
91 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum | |
92 | lm %r10,%r11,\lc_from | |
93 | sl %r10,\lc_to | |
94 | sl %r11,\lc_to+4 | |
95 | bc 3,BASED(0f) | |
96 | sl %r10,BASED(.Lc_1) | |
97 | 0: al %r10,\lc_sum | |
98 | al %r11,\lc_sum+4 | |
99 | bc 12,BASED(1f) | |
100 | al %r10,BASED(.Lc_1) | |
101 | 1: stm %r10,%r11,\lc_sum | |
102 | .endm | |
103 | #endif | |
104 | ||
105 | .macro SAVE_ALL_BASE savearea | |
106 | stm %r12,%r15,\savearea | |
107 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 | |
108 | .endm | |
109 | ||
63b12246 | 110 | .macro SAVE_ALL_SYNC psworg,savearea |
1da177e4 | 111 | la %r12,\psworg |
1da177e4 LT |
112 | tm \psworg+1,0x01 # test problem state bit |
113 | bz BASED(2f) # skip stack setup save | |
114 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
63b12246 MS |
115 | #ifdef CONFIG_CHECK_STACK |
116 | b BASED(3f) | |
117 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
118 | bz BASED(stack_overflow) | |
119 | 3: | |
120 | #endif | |
121 | 2: | |
122 | .endm | |
123 | ||
124 | .macro SAVE_ALL_ASYNC psworg,savearea | |
125 | la %r12,\psworg | |
1da177e4 LT |
126 | tm \psworg+1,0x01 # test problem state bit |
127 | bnz BASED(1f) # from user -> load async stack | |
128 | clc \psworg+4(4),BASED(.Lcritical_end) | |
129 | bhe BASED(0f) | |
130 | clc \psworg+4(4),BASED(.Lcritical_start) | |
131 | bl BASED(0f) | |
132 | l %r14,BASED(.Lcleanup_critical) | |
133 | basr %r14,%r14 | |
6add9f7f | 134 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
135 | bnz BASED(1f) |
136 | 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ? | |
137 | slr %r14,%r15 | |
138 | sra %r14,STACK_SHIFT | |
139 | be BASED(2f) | |
140 | 1: l %r15,__LC_ASYNC_STACK | |
1da177e4 LT |
141 | #ifdef CONFIG_CHECK_STACK |
142 | b BASED(3f) | |
143 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
144 | bz BASED(stack_overflow) | |
145 | 3: | |
146 | #endif | |
77fa2245 HC |
147 | 2: |
148 | .endm | |
149 | ||
150 | .macro CREATE_STACK_FRAME psworg,savearea | |
151 | s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
1da177e4 LT |
152 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack |
153 | la %r12,\psworg | |
154 | st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 | |
155 | icm %r12,12,__LC_SVC_ILC | |
156 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
157 | st %r12,SP_ILC(%r15) | |
158 | mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack | |
159 | la %r12,0 | |
160 | st %r12,__SF_BACKCHAIN(%r15) # clear back chain | |
161 | .endm | |
162 | ||
ae6aa2ea MS |
163 | .macro RESTORE_ALL psworg,sync |
164 | mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore | |
1da177e4 | 165 | .if !\sync |
ae6aa2ea | 166 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 LT |
167 | .endif |
168 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user | |
169 | STORE_TIMER __LC_EXIT_TIMER | |
ae6aa2ea | 170 | lpsw \psworg # back to caller |
1da177e4 LT |
171 | .endm |
172 | ||
173 | /* | |
174 | * Scheduler resume function, called by switch_to | |
175 | * gpr2 = (task_struct *) prev | |
176 | * gpr3 = (task_struct *) next | |
177 | * Returns: | |
178 | * gpr2 = prev | |
179 | */ | |
180 | .globl __switch_to | |
181 | __switch_to: | |
182 | basr %r1,0 | |
183 | __switch_to_base: | |
184 | tm __THREAD_per(%r3),0xe8 # new process is using per ? | |
185 | bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine | |
186 | stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff | |
187 | clc __THREAD_per(12,%r3),__SF_EMPTY(%r15) | |
188 | be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's | |
189 | lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
190 | __switch_to_noper: | |
77fa2245 HC |
191 | l %r4,__THREAD_info(%r2) # get thread_info of prev |
192 | tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? | |
193 | bz __switch_to_no_mcck-__switch_to_base(%r1) | |
194 | ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
195 | l %r4,__THREAD_info(%r3) # get thread_info of next | |
196 | oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next | |
197 | __switch_to_no_mcck: | |
1da177e4 LT |
198 | stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
199 | st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp | |
200 | l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
201 | lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task | |
202 | st %r3,__LC_CURRENT # __LC_CURRENT = current task struct | |
203 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
204 | l %r3,__THREAD_info(%r3) # load thread_info from task struct | |
205 | st %r3,__LC_THREAD_INFO | |
206 | ahi %r3,STACK_SIZE | |
207 | st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
208 | br %r14 | |
209 | ||
210 | __critical_start: | |
211 | /* | |
212 | * SVC interrupt handler routine. System calls are synchronous events and | |
213 | * are executed with interrupts enabled. | |
214 | */ | |
215 | ||
216 | .globl system_call | |
217 | system_call: | |
218 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
219 | sysc_saveall: | |
220 | SAVE_ALL_BASE __LC_SAVE_AREA | |
63b12246 | 221 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 222 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
223 | lh %r7,0x8a # get svc number from lowcore |
224 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
225 | sysc_vtime: | |
226 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
227 | bz BASED(sysc_do_svc) | |
228 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
229 | sysc_stime: | |
230 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
231 | sysc_update: | |
232 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
233 | #endif | |
234 | sysc_do_svc: | |
235 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
236 | sla %r7,2 # *4 and test for svc 0 | |
237 | bnz BASED(sysc_nr_ok) # svc number > 0 | |
238 | # svc 0: system call number in %r1 | |
239 | cl %r1,BASED(.Lnr_syscalls) | |
240 | bnl BASED(sysc_nr_ok) | |
241 | lr %r7,%r1 # copy svc number to %r7 | |
242 | sla %r7,2 # *4 | |
243 | sysc_nr_ok: | |
244 | mvc SP_ARGS(4,%r15),SP_R7(%r15) | |
245 | sysc_do_restart: | |
d882b172 | 246 | l %r8,BASED(.Lsysc_table) |
1da177e4 | 247 | tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) |
d882b172 | 248 | l %r8,0(%r7,%r8) # get system call addr. |
1da177e4 LT |
249 | bnz BASED(sysc_tracesys) |
250 | basr %r14,%r8 # call sys_xxxx | |
251 | st %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
252 | # ATTENTION: check sys_execve_glue before | |
253 | # changing anything here !! | |
254 | ||
255 | sysc_return: | |
256 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
257 | bno BASED(sysc_leave) | |
258 | tm __TI_flags+3(%r9),_TIF_WORK_SVC | |
259 | bnz BASED(sysc_work) # there is work to do (signals etc.) | |
260 | sysc_leave: | |
ae6aa2ea | 261 | RESTORE_ALL __LC_RETURN_PSW,1 |
1da177e4 LT |
262 | |
263 | # | |
264 | # recheck if there is more work to do | |
265 | # | |
266 | sysc_work_loop: | |
267 | tm __TI_flags+3(%r9),_TIF_WORK_SVC | |
268 | bz BASED(sysc_leave) # there is no work to do | |
269 | # | |
270 | # One of the work bits is on. Find out which one. | |
271 | # | |
272 | sysc_work: | |
77fa2245 HC |
273 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
274 | bo BASED(sysc_mcck_pending) | |
1da177e4 LT |
275 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
276 | bo BASED(sysc_reschedule) | |
54dfe5dd HC |
277 | tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) |
278 | bnz BASED(sysc_sigpending) | |
1da177e4 LT |
279 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC |
280 | bo BASED(sysc_restart) | |
281 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
282 | bo BASED(sysc_singlestep) | |
283 | b BASED(sysc_leave) | |
284 | ||
285 | # | |
286 | # _TIF_NEED_RESCHED is set, call schedule | |
287 | # | |
288 | sysc_reschedule: | |
289 | l %r1,BASED(.Lschedule) | |
290 | la %r14,BASED(sysc_work_loop) | |
291 | br %r1 # call scheduler | |
292 | ||
77fa2245 HC |
293 | # |
294 | # _TIF_MCCK_PENDING is set, call handler | |
295 | # | |
296 | sysc_mcck_pending: | |
297 | l %r1,BASED(.Ls390_handle_mcck) | |
298 | la %r14,BASED(sysc_work_loop) | |
299 | br %r1 # TIF bit will be cleared by handler | |
300 | ||
1da177e4 | 301 | # |
54dfe5dd | 302 | # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal |
1da177e4 LT |
303 | # |
304 | sysc_sigpending: | |
305 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP | |
306 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
307 | l %r1,BASED(.Ldo_signal) |
308 | basr %r14,%r1 # call do_signal | |
309 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC | |
310 | bo BASED(sysc_restart) | |
311 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
312 | bo BASED(sysc_singlestep) | |
e1c3ad96 | 313 | b BASED(sysc_work_loop) |
1da177e4 LT |
314 | |
315 | # | |
316 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
317 | # | |
318 | sysc_restart: | |
319 | ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC | |
320 | l %r7,SP_R2(%r15) # load new svc number | |
321 | sla %r7,2 | |
322 | mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument | |
323 | lm %r2,%r6,SP_R2(%r15) # load svc arguments | |
324 | b BASED(sysc_do_restart) # restart svc | |
325 | ||
326 | # | |
327 | # _TIF_SINGLE_STEP is set, call do_single_step | |
328 | # | |
329 | sysc_singlestep: | |
330 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP | |
331 | mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check | |
332 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
333 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
334 | la %r14,BASED(sysc_return) # load adr. of system return | |
335 | br %r1 # branch to do_single_step | |
336 | ||
1da177e4 LT |
337 | # |
338 | # call trace before and after sys_call | |
339 | # | |
340 | sysc_tracesys: | |
341 | l %r1,BASED(.Ltrace) | |
342 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
343 | la %r3,0 | |
344 | srl %r7,2 | |
345 | st %r7,SP_R2(%r15) | |
346 | basr %r14,%r1 | |
347 | clc SP_R2(4,%r15),BASED(.Lnr_syscalls) | |
348 | bnl BASED(sysc_tracenogo) | |
d882b172 | 349 | l %r8,BASED(.Lsysc_table) |
1da177e4 LT |
350 | l %r7,SP_R2(%r15) # strace might have changed the |
351 | sll %r7,2 # system call | |
d882b172 | 352 | l %r8,0(%r7,%r8) |
1da177e4 LT |
353 | sysc_tracego: |
354 | lm %r3,%r6,SP_R3(%r15) | |
355 | l %r2,SP_ORIG_R2(%r15) | |
356 | basr %r14,%r8 # call sys_xxx | |
357 | st %r2,SP_R2(%r15) # store return value | |
358 | sysc_tracenogo: | |
359 | tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
360 | bz BASED(sysc_return) | |
361 | l %r1,BASED(.Ltrace) | |
362 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
363 | la %r3,1 | |
364 | la %r14,BASED(sysc_return) | |
365 | br %r1 | |
366 | ||
367 | # | |
368 | # a new process exits the kernel with ret_from_fork | |
369 | # | |
370 | .globl ret_from_fork | |
371 | ret_from_fork: | |
372 | l %r13,__LC_SVC_NEW_PSW+4 | |
373 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
374 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? | |
375 | bo BASED(0f) | |
376 | st %r15,SP_R15(%r15) # store stack pointer for new kthread | |
377 | 0: l %r1,BASED(.Lschedtail) | |
378 | basr %r14,%r1 | |
1f194a4c | 379 | TRACE_IRQS_ON |
1da177e4 LT |
380 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
381 | b BASED(sysc_return) | |
382 | ||
383 | # | |
384 | # clone, fork, vfork, exec and sigreturn need glue, | |
385 | # because they all expect pt_regs as parameter, | |
386 | # but are called with different parameter. | |
387 | # return-address is set up above | |
388 | # | |
389 | sys_clone_glue: | |
390 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
391 | l %r1,BASED(.Lclone) | |
392 | br %r1 # branch to sys_clone | |
393 | ||
394 | sys_fork_glue: | |
395 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
396 | l %r1,BASED(.Lfork) | |
397 | br %r1 # branch to sys_fork | |
398 | ||
399 | sys_vfork_glue: | |
400 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
401 | l %r1,BASED(.Lvfork) | |
402 | br %r1 # branch to sys_vfork | |
403 | ||
404 | sys_execve_glue: | |
405 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
406 | l %r1,BASED(.Lexecve) | |
407 | lr %r12,%r14 # save return address | |
408 | basr %r14,%r1 # call sys_execve | |
409 | ltr %r2,%r2 # check if execve failed | |
410 | bnz 0(%r12) # it did fail -> store result in gpr2 | |
411 | b 4(%r12) # SKIP ST 2,SP_R2(15) after BASR 14,8 | |
412 | # in system_call/sysc_tracesys | |
413 | ||
414 | sys_sigreturn_glue: | |
415 | la %r2,SP_PTREGS(%r15) # load pt_regs as parameter | |
416 | l %r1,BASED(.Lsigreturn) | |
417 | br %r1 # branch to sys_sigreturn | |
418 | ||
419 | sys_rt_sigreturn_glue: | |
420 | la %r2,SP_PTREGS(%r15) # load pt_regs as parameter | |
421 | l %r1,BASED(.Lrt_sigreturn) | |
422 | br %r1 # branch to sys_sigreturn | |
423 | ||
1da177e4 LT |
424 | sys_sigaltstack_glue: |
425 | la %r4,SP_PTREGS(%r15) # load pt_regs as parameter | |
426 | l %r1,BASED(.Lsigaltstack) | |
427 | br %r1 # branch to sys_sigreturn | |
428 | ||
429 | ||
430 | /* | |
431 | * Program check handler routine | |
432 | */ | |
433 | ||
434 | .globl pgm_check_handler | |
435 | pgm_check_handler: | |
436 | /* | |
437 | * First we need to check for a special case: | |
438 | * Single stepping an instruction that disables the PER event mask will | |
439 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
440 | * For a single stepped SVC the program check handler gets control after | |
441 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
442 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
443 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
444 | * if we have to load the kernel stack register. | |
445 | * For every other possible cause for PER event without the PER mask set | |
446 | * we just ignore the PER event (FIXME: is there anything we have to do | |
447 | * for LPSW?). | |
448 | */ | |
449 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
450 | SAVE_ALL_BASE __LC_SAVE_AREA | |
451 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception | |
452 | bnz BASED(pgm_per) # got per exception -> special case | |
63b12246 | 453 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 454 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
455 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
456 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
457 | bz BASED(pgm_no_vtime) | |
458 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
459 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
460 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
461 | pgm_no_vtime: | |
462 | #endif | |
463 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
464 | l %r3,__LC_PGM_ILC # load program interruption code | |
465 | la %r8,0x7f | |
466 | nr %r8,%r3 | |
467 | pgm_do_call: | |
468 | l %r7,BASED(.Ljump_table) | |
469 | sll %r8,2 | |
470 | l %r7,0(%r8,%r7) # load address of handler routine | |
471 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
472 | la %r14,BASED(sysc_return) | |
473 | br %r7 # branch to interrupt-handler | |
474 | ||
475 | # | |
476 | # handle per exception | |
477 | # | |
478 | pgm_per: | |
479 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on | |
480 | bnz BASED(pgm_per_std) # ok, normal per event from user space | |
481 | # ok its one of the special cases, now we need to find out which one | |
482 | clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW | |
483 | be BASED(pgm_svcper) | |
484 | # no interesting special case, ignore PER event | |
485 | lm %r12,%r15,__LC_SAVE_AREA | |
486 | lpsw 0x28 | |
487 | ||
488 | # | |
489 | # Normal per exception | |
490 | # | |
491 | pgm_per_std: | |
63b12246 | 492 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 493 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
494 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
495 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
496 | bz BASED(pgm_no_vtime2) | |
497 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
498 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
499 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
500 | pgm_no_vtime2: | |
501 | #endif | |
502 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
503 | l %r1,__TI_task(%r9) | |
504 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
505 | mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS | |
506 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
507 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
4ba069b8 MG |
508 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
509 | bz BASED(kernel_per) | |
1da177e4 LT |
510 | l %r3,__LC_PGM_ILC # load program interruption code |
511 | la %r8,0x7f | |
512 | nr %r8,%r3 # clear per-event-bit and ilc | |
513 | be BASED(sysc_return) # only per or per+check ? | |
514 | b BASED(pgm_do_call) | |
515 | ||
516 | # | |
517 | # it was a single stepped SVC that is causing all the trouble | |
518 | # | |
519 | pgm_svcper: | |
63b12246 | 520 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 521 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
522 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
523 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
524 | bz BASED(pgm_no_vtime3) | |
525 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
526 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
527 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
528 | pgm_no_vtime3: | |
529 | #endif | |
530 | lh %r7,0x8a # get svc number from lowcore | |
531 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
532 | l %r1,__TI_task(%r9) | |
533 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
534 | mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS | |
535 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
536 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
1f194a4c | 537 | TRACE_IRQS_ON |
1da177e4 LT |
538 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
539 | b BASED(sysc_do_svc) | |
540 | ||
4ba069b8 MG |
541 | # |
542 | # per was called from kernel, must be kprobes | |
543 | # | |
544 | kernel_per: | |
545 | mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check | |
546 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
547 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
548 | la %r14,BASED(sysc_leave) # load adr. of system return | |
549 | br %r1 # branch to do_single_step | |
550 | ||
1da177e4 LT |
551 | /* |
552 | * IO interrupt handler routine | |
553 | */ | |
554 | ||
555 | .globl io_int_handler | |
556 | io_int_handler: | |
557 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
558 | stck __LC_INT_CLOCK | |
559 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | |
63b12246 | 560 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
77fa2245 | 561 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
562 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
563 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
564 | bz BASED(io_no_vtime) | |
565 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
566 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
567 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
568 | io_no_vtime: | |
569 | #endif | |
570 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
1f194a4c | 571 | TRACE_IRQS_OFF |
1da177e4 LT |
572 | l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ |
573 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
574 | basr %r14,%r1 # branch to standard irq handler | |
1f194a4c | 575 | TRACE_IRQS_ON |
1da177e4 LT |
576 | |
577 | io_return: | |
578 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
579 | #ifdef CONFIG_PREEMPT | |
580 | bno BASED(io_preempt) # no -> check for preemptive scheduling | |
581 | #else | |
582 | bno BASED(io_leave) # no-> skip resched & signal | |
583 | #endif | |
584 | tm __TI_flags+3(%r9),_TIF_WORK_INT | |
585 | bnz BASED(io_work) # there is work to do (signals etc.) | |
586 | io_leave: | |
ae6aa2ea MS |
587 | RESTORE_ALL __LC_RETURN_PSW,0 |
588 | io_done: | |
1da177e4 LT |
589 | |
590 | #ifdef CONFIG_PREEMPT | |
591 | io_preempt: | |
592 | icm %r0,15,__TI_precount(%r9) | |
593 | bnz BASED(io_leave) | |
594 | l %r1,SP_R15(%r15) | |
595 | s %r1,BASED(.Lc_spsize) | |
596 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
597 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
598 | lr %r15,%r1 | |
599 | io_resume_loop: | |
600 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED | |
601 | bno BASED(io_leave) | |
602 | mvc __TI_precount(4,%r9),BASED(.Lc_pactive) | |
603 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
604 | l %r1,BASED(.Lschedule) | |
605 | basr %r14,%r1 # call schedule | |
606 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
607 | xc __TI_precount(4,%r9),__TI_precount(%r9) | |
608 | b BASED(io_resume_loop) | |
609 | #endif | |
610 | ||
611 | # | |
612 | # switch to kernel stack, then check the TIF bits | |
613 | # | |
614 | io_work: | |
615 | l %r1,__LC_KERNEL_STACK | |
616 | s %r1,BASED(.Lc_spsize) | |
617 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
618 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
619 | lr %r15,%r1 | |
620 | # | |
621 | # One of the work bits is on. Find out which one. | |
54dfe5dd HC |
622 | # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGMASK, _TIF_NEED_RESCHED |
623 | # and _TIF_MCCK_PENDING | |
1da177e4 LT |
624 | # |
625 | io_work_loop: | |
77fa2245 HC |
626 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
627 | bo BASED(io_mcck_pending) | |
1da177e4 LT |
628 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
629 | bo BASED(io_reschedule) | |
54dfe5dd HC |
630 | tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) |
631 | bnz BASED(io_sigpending) | |
1da177e4 LT |
632 | b BASED(io_leave) |
633 | ||
77fa2245 HC |
634 | # |
635 | # _TIF_MCCK_PENDING is set, call handler | |
636 | # | |
637 | io_mcck_pending: | |
638 | l %r1,BASED(.Ls390_handle_mcck) | |
ae6aa2ea | 639 | la %r14,BASED(io_work_loop) |
77fa2245 HC |
640 | br %r1 # TIF bit will be cleared by handler |
641 | ||
1da177e4 LT |
642 | # |
643 | # _TIF_NEED_RESCHED is set, call schedule | |
644 | # | |
645 | io_reschedule: | |
646 | l %r1,BASED(.Lschedule) | |
647 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
648 | basr %r14,%r1 # call scheduler | |
649 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
650 | tm __TI_flags+3(%r9),_TIF_WORK_INT | |
651 | bz BASED(io_leave) # there is no work to do | |
652 | b BASED(io_work_loop) | |
653 | ||
654 | # | |
54dfe5dd | 655 | # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal |
1da177e4 LT |
656 | # |
657 | io_sigpending: | |
658 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
659 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
660 | l %r1,BASED(.Ldo_signal) |
661 | basr %r14,%r1 # call do_signal | |
662 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
e1c3ad96 | 663 | b BASED(io_work_loop) |
1da177e4 LT |
664 | |
665 | /* | |
666 | * External interrupt handler routine | |
667 | */ | |
668 | ||
669 | .globl ext_int_handler | |
670 | ext_int_handler: | |
671 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
672 | stck __LC_INT_CLOCK | |
673 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | |
63b12246 | 674 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
77fa2245 | 675 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
676 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
677 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
678 | bz BASED(ext_no_vtime) | |
679 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
680 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
681 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
682 | ext_no_vtime: | |
683 | #endif | |
684 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
1f194a4c | 685 | TRACE_IRQS_OFF |
1da177e4 LT |
686 | la %r2,SP_PTREGS(%r15) # address of register-save area |
687 | lh %r3,__LC_EXT_INT_CODE # get interruption code | |
688 | l %r1,BASED(.Ldo_extint) | |
689 | basr %r14,%r1 | |
1f194a4c | 690 | TRACE_IRQS_ON |
1da177e4 LT |
691 | b BASED(io_return) |
692 | ||
ae6aa2ea MS |
693 | __critical_end: |
694 | ||
1da177e4 LT |
695 | /* |
696 | * Machine check handler routines | |
697 | */ | |
698 | ||
699 | .globl mcck_int_handler | |
700 | mcck_int_handler: | |
77fa2245 HC |
701 | spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer |
702 | lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs | |
1da177e4 | 703 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
77fa2245 HC |
704 | la %r12,__LC_MCK_OLD_PSW |
705 | tm __LC_MCCK_CODE,0x80 # system damage? | |
706 | bo BASED(mcck_int_main) # yes -> rest of mcck code invalid | |
1da177e4 | 707 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
63b12246 MS |
708 | mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER |
709 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA | |
710 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | |
711 | bo BASED(1f) | |
712 | la %r14,__LC_SYNC_ENTER_TIMER | |
713 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
714 | bl BASED(0f) | |
715 | la %r14,__LC_ASYNC_ENTER_TIMER | |
716 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
717 | bl BASED(0f) | |
718 | la %r14,__LC_EXIT_TIMER | |
719 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
720 | bl BASED(0f) | |
721 | la %r14,__LC_LAST_UPDATE_TIMER | |
722 | 0: spt 0(%r14) | |
723 | mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) | |
724 | 1: | |
1da177e4 | 725 | #endif |
63b12246 | 726 | tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 HC |
727 | bno BASED(mcck_int_main) # no -> skip cleanup critical |
728 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit | |
729 | bnz BASED(mcck_int_main) # from user -> load async stack | |
730 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) | |
731 | bhe BASED(mcck_int_main) | |
732 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) | |
733 | bl BASED(mcck_int_main) | |
734 | l %r14,BASED(.Lcleanup_critical) | |
735 | basr %r14,%r14 | |
736 | mcck_int_main: | |
737 | l %r14,__LC_PANIC_STACK # are we already on the panic stack? | |
738 | slr %r14,%r15 | |
739 | sra %r14,PAGE_SHIFT | |
740 | be BASED(0f) | |
741 | l %r15,__LC_PANIC_STACK # load panic stack | |
742 | 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 | |
ae6aa2ea MS |
743 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
744 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? | |
745 | bno BASED(mcck_no_vtime) # no -> skip cleanup critical | |
63b12246 | 746 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea MS |
747 | bz BASED(mcck_no_vtime) |
748 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
749 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
750 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
751 | mcck_no_vtime: | |
752 | #endif | |
77fa2245 HC |
753 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
754 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 | 755 | l %r1,BASED(.Ls390_mcck) |
77fa2245 HC |
756 | basr %r14,%r1 # call machine check handler |
757 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
758 | bno BASED(mcck_return) | |
759 | l %r1,__LC_KERNEL_STACK # switch to kernel stack | |
760 | s %r1,BASED(.Lc_spsize) | |
761 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
762 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
763 | lr %r15,%r1 | |
764 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
765 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING | |
766 | bno BASED(mcck_return) | |
1f194a4c | 767 | TRACE_IRQS_OFF |
77fa2245 HC |
768 | l %r1,BASED(.Ls390_handle_mcck) |
769 | basr %r14,%r1 # call machine check handler | |
1f194a4c | 770 | TRACE_IRQS_ON |
1da177e4 | 771 | mcck_return: |
63b12246 MS |
772 | mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW |
773 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
774 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
775 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52 | |
776 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? | |
777 | bno BASED(0f) | |
778 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
779 | stpt __LC_EXIT_TIMER | |
780 | lpsw __LC_RETURN_MCCK_PSW # back to caller | |
781 | 0: | |
782 | #endif | |
783 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
784 | lpsw __LC_RETURN_MCCK_PSW # back to caller | |
785 | ||
ae6aa2ea | 786 | RESTORE_ALL __LC_RETURN_MCCK_PSW,0 |
1da177e4 LT |
787 | |
788 | #ifdef CONFIG_SMP | |
789 | /* | |
790 | * Restart interruption handler, kick starter for additional CPUs | |
791 | */ | |
792 | .globl restart_int_handler | |
793 | restart_int_handler: | |
794 | l %r15,__LC_SAVE_AREA+60 # load ksp | |
795 | lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs | |
796 | lam %a0,%a15,__LC_AREGS_SAVE_AREA | |
797 | lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
798 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on | |
799 | basr %r14,0 | |
800 | l %r14,restart_addr-.(%r14) | |
801 | br %r14 # branch to start_secondary | |
802 | restart_addr: | |
803 | .long start_secondary | |
804 | #else | |
805 | /* | |
806 | * If we do not run with SMP enabled, let the new CPU crash ... | |
807 | */ | |
808 | .globl restart_int_handler | |
809 | restart_int_handler: | |
810 | basr %r1,0 | |
811 | restart_base: | |
812 | lpsw restart_crash-restart_base(%r1) | |
813 | .align 8 | |
814 | restart_crash: | |
815 | .long 0x000a0000,0x00000000 | |
816 | restart_go: | |
817 | #endif | |
818 | ||
819 | #ifdef CONFIG_CHECK_STACK | |
820 | /* | |
821 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
822 | * No need to properly save the registers, we are going to panic anyway. | |
823 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
824 | */ | |
825 | stack_overflow: | |
826 | l %r15,__LC_PANIC_STACK # change to panic stack | |
827 | sl %r15,BASED(.Lc_spsize) | |
828 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack | |
829 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
830 | la %r1,__LC_SAVE_AREA | |
831 | ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? | |
832 | be BASED(0f) | |
833 | ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? | |
834 | be BASED(0f) | |
835 | la %r1,__LC_SAVE_AREA+16 | |
836 | 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack | |
837 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain | |
838 | l %r1,BASED(1f) # branch to kernel_stack_overflow | |
839 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
840 | br %r1 | |
841 | 1: .long kernel_stack_overflow | |
842 | #endif | |
843 | ||
844 | cleanup_table_system_call: | |
845 | .long system_call + 0x80000000, sysc_do_svc + 0x80000000 | |
846 | cleanup_table_sysc_return: | |
847 | .long sysc_return + 0x80000000, sysc_leave + 0x80000000 | |
848 | cleanup_table_sysc_leave: | |
849 | .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000 | |
850 | cleanup_table_sysc_work_loop: | |
851 | .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000 | |
63b12246 MS |
852 | cleanup_table_io_return: |
853 | .long io_return + 0x80000000, io_leave + 0x80000000 | |
ae6aa2ea MS |
854 | cleanup_table_io_leave: |
855 | .long io_leave + 0x80000000, io_done + 0x80000000 | |
856 | cleanup_table_io_work_loop: | |
857 | .long io_work_loop + 0x80000000, io_mcck_pending + 0x80000000 | |
1da177e4 LT |
858 | |
859 | cleanup_critical: | |
860 | clc 4(4,%r12),BASED(cleanup_table_system_call) | |
861 | bl BASED(0f) | |
862 | clc 4(4,%r12),BASED(cleanup_table_system_call+4) | |
863 | bl BASED(cleanup_system_call) | |
864 | 0: | |
865 | clc 4(4,%r12),BASED(cleanup_table_sysc_return) | |
866 | bl BASED(0f) | |
867 | clc 4(4,%r12),BASED(cleanup_table_sysc_return+4) | |
868 | bl BASED(cleanup_sysc_return) | |
869 | 0: | |
870 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave) | |
871 | bl BASED(0f) | |
872 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4) | |
873 | bl BASED(cleanup_sysc_leave) | |
874 | 0: | |
875 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop) | |
876 | bl BASED(0f) | |
877 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) | |
77fa2245 | 878 | bl BASED(cleanup_sysc_return) |
63b12246 MS |
879 | 0: |
880 | clc 4(4,%r12),BASED(cleanup_table_io_return) | |
881 | bl BASED(0f) | |
882 | clc 4(4,%r12),BASED(cleanup_table_io_return+4) | |
883 | bl BASED(cleanup_io_return) | |
ae6aa2ea MS |
884 | 0: |
885 | clc 4(4,%r12),BASED(cleanup_table_io_leave) | |
886 | bl BASED(0f) | |
887 | clc 4(4,%r12),BASED(cleanup_table_io_leave+4) | |
888 | bl BASED(cleanup_io_leave) | |
889 | 0: | |
890 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop) | |
891 | bl BASED(0f) | |
892 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4) | |
893 | bl BASED(cleanup_io_return) | |
1da177e4 LT |
894 | 0: |
895 | br %r14 | |
896 | ||
897 | cleanup_system_call: | |
898 | mvc __LC_RETURN_PSW(8),0(%r12) | |
ae6aa2ea MS |
899 | c %r12,BASED(.Lmck_old_psw) |
900 | be BASED(0f) | |
901 | la %r12,__LC_SAVE_AREA+16 | |
902 | b BASED(1f) | |
903 | 0: la %r12,__LC_SAVE_AREA+32 | |
904 | 1: | |
1da177e4 LT |
905 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
906 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) | |
907 | bh BASED(0f) | |
908 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
909 | 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) | |
910 | bhe BASED(cleanup_vtime) | |
911 | #endif | |
912 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) | |
913 | bh BASED(0f) | |
ae6aa2ea MS |
914 | mvc __LC_SAVE_AREA(16),0(%r12) |
915 | 0: st %r13,4(%r12) | |
916 | st %r12,__LC_SAVE_AREA+48 # argh | |
63b12246 | 917 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 918 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
ae6aa2ea MS |
919 | l %r12,__LC_SAVE_AREA+48 # argh |
920 | st %r15,12(%r12) | |
1da177e4 LT |
921 | lh %r7,0x8a |
922 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
923 | cleanup_vtime: | |
924 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) | |
925 | bhe BASED(cleanup_stime) | |
926 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
927 | bz BASED(cleanup_novtime) | |
928 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
929 | cleanup_stime: | |
930 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) | |
931 | bh BASED(cleanup_update) | |
932 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
933 | cleanup_update: | |
934 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
935 | cleanup_novtime: | |
936 | #endif | |
937 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) | |
938 | la %r12,__LC_RETURN_PSW | |
939 | br %r14 | |
940 | cleanup_system_call_insn: | |
941 | .long sysc_saveall + 0x80000000 | |
942 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
943 | .long system_call + 0x80000000 | |
944 | .long sysc_vtime + 0x80000000 | |
945 | .long sysc_stime + 0x80000000 | |
946 | .long sysc_update + 0x80000000 | |
947 | #endif | |
948 | ||
949 | cleanup_sysc_return: | |
950 | mvc __LC_RETURN_PSW(4),0(%r12) | |
951 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return) | |
952 | la %r12,__LC_RETURN_PSW | |
953 | br %r14 | |
954 | ||
955 | cleanup_sysc_leave: | |
956 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) | |
ae6aa2ea | 957 | be BASED(2f) |
1da177e4 LT |
958 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
959 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
960 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) | |
ae6aa2ea | 961 | be BASED(2f) |
1da177e4 LT |
962 | #endif |
963 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) | |
ae6aa2ea MS |
964 | c %r12,BASED(.Lmck_old_psw) |
965 | bne BASED(0f) | |
966 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
967 | b BASED(1f) | |
968 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
969 | 1: lm %r0,%r11,SP_R0(%r15) | |
1da177e4 | 970 | l %r15,SP_R15(%r15) |
ae6aa2ea | 971 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 LT |
972 | br %r14 |
973 | cleanup_sysc_leave_insn: | |
974 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
975 | .long sysc_leave + 14 + 0x80000000 | |
976 | #endif | |
977 | .long sysc_leave + 10 + 0x80000000 | |
978 | ||
ae6aa2ea MS |
979 | cleanup_io_return: |
980 | mvc __LC_RETURN_PSW(4),0(%r12) | |
981 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop) | |
982 | la %r12,__LC_RETURN_PSW | |
983 | br %r14 | |
984 | ||
985 | cleanup_io_leave: | |
986 | clc 4(4,%r12),BASED(cleanup_io_leave_insn) | |
987 | be BASED(2f) | |
988 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
989 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
990 | clc 4(4,%r12),BASED(cleanup_io_leave_insn+4) | |
991 | be BASED(2f) | |
992 | #endif | |
993 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) | |
994 | c %r12,BASED(.Lmck_old_psw) | |
995 | bne BASED(0f) | |
996 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
997 | b BASED(1f) | |
998 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
999 | 1: lm %r0,%r11,SP_R0(%r15) | |
1000 | l %r15,SP_R15(%r15) | |
1001 | 2: la %r12,__LC_RETURN_PSW | |
1002 | br %r14 | |
1003 | cleanup_io_leave_insn: | |
1004 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
1005 | .long io_leave + 18 + 0x80000000 | |
1006 | #endif | |
1007 | .long io_leave + 14 + 0x80000000 | |
1008 | ||
1da177e4 LT |
1009 | /* |
1010 | * Integer constants | |
1011 | */ | |
1012 | .align 4 | |
1013 | .Lc_spsize: .long SP_SIZE | |
1014 | .Lc_overhead: .long STACK_FRAME_OVERHEAD | |
1015 | .Lc_pactive: .long PREEMPT_ACTIVE | |
1016 | .Lnr_syscalls: .long NR_syscalls | |
1017 | .L0x018: .short 0x018 | |
1018 | .L0x020: .short 0x020 | |
1019 | .L0x028: .short 0x028 | |
1020 | .L0x030: .short 0x030 | |
1021 | .L0x038: .short 0x038 | |
1022 | .Lc_1: .long 1 | |
1023 | ||
1024 | /* | |
1025 | * Symbol constants | |
1026 | */ | |
1027 | .Ls390_mcck: .long s390_do_machine_check | |
77fa2245 HC |
1028 | .Ls390_handle_mcck: |
1029 | .long s390_handle_mcck | |
ae6aa2ea | 1030 | .Lmck_old_psw: .long __LC_MCK_OLD_PSW |
1da177e4 LT |
1031 | .Ldo_IRQ: .long do_IRQ |
1032 | .Ldo_extint: .long do_extint | |
1033 | .Ldo_signal: .long do_signal | |
1034 | .Lhandle_per: .long do_single_step | |
1035 | .Ljump_table: .long pgm_check_table | |
1036 | .Lschedule: .long schedule | |
1037 | .Lclone: .long sys_clone | |
1038 | .Lexecve: .long sys_execve | |
1039 | .Lfork: .long sys_fork | |
1040 | .Lrt_sigreturn:.long sys_rt_sigreturn | |
1041 | .Lrt_sigsuspend: | |
1042 | .long sys_rt_sigsuspend | |
1043 | .Lsigreturn: .long sys_sigreturn | |
1044 | .Lsigsuspend: .long sys_sigsuspend | |
1045 | .Lsigaltstack: .long sys_sigaltstack | |
1046 | .Ltrace: .long syscall_trace | |
1047 | .Lvfork: .long sys_vfork | |
1048 | .Lschedtail: .long schedule_tail | |
d882b172 | 1049 | .Lsysc_table: .long sys_call_table |
1f194a4c HC |
1050 | #ifdef CONFIG_TRACE_IRQFLAGS |
1051 | .Ltrace_irq_on:.long trace_hardirqs_on | |
1052 | .Ltrace_irq_off: | |
1053 | .long trace_hardirqs_off | |
1054 | #endif | |
1da177e4 LT |
1055 | .Lcritical_start: |
1056 | .long __critical_start + 0x80000000 | |
1057 | .Lcritical_end: | |
1058 | .long __critical_end + 0x80000000 | |
1059 | .Lcleanup_critical: | |
1060 | .long cleanup_critical | |
1061 | ||
d882b172 | 1062 | .section .rodata, "a" |
1da177e4 | 1063 | #define SYSCALL(esa,esame,emu) .long esa |
1da177e4 LT |
1064 | sys_call_table: |
1065 | #include "syscalls.S" | |
1066 | #undef SYSCALL |