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a1365275 SH |
1 | /* |
2 | * dm9000.c: Version 1.2 03/18/2003 | |
3 | * | |
4 | * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux. | |
5 | * Copyright (C) 1997 Sten Wang | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version 2 | |
10 | * of the License, or (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved. | |
18 | * | |
19 | * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match | |
20 | * 06/22/2001 Support DM9801 progrmming | |
21 | * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000 | |
22 | * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200 | |
23 | * R17 = (R17 & 0xfff0) | NF + 3 | |
24 | * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200 | |
25 | * R17 = (R17 & 0xfff0) | NF | |
26 | * | |
27 | * v1.00 modify by simon 2001.9.5 | |
28 | * change for kernel 2.4.x | |
29 | * | |
30 | * v1.1 11/09/2001 fix force mode bug | |
31 | * | |
32 | * v1.2 03/18/2003 Weilun Huang <[email protected]>: | |
33 | * Fixed phy reset. | |
34 | * Added tx/rx 32 bit mode. | |
35 | * Cleaned up for kernel merge. | |
36 | * | |
37 | * 03/03/2004 Sascha Hauer <[email protected]> | |
38 | * Port to 2.6 kernel | |
39 | * | |
40 | * 24-Sep-2004 Ben Dooks <[email protected]> | |
41 | * Cleanup of code to remove ifdefs | |
42 | * Allowed platform device data to influence access width | |
43 | * Reformatting areas of code | |
44 | * | |
45 | * 17-Mar-2005 Sascha Hauer <[email protected]> | |
46 | * * removed 2.4 style module parameters | |
47 | * * removed removed unused stat counter and fixed | |
48 | * net_device_stats | |
49 | * * introduced tx_timeout function | |
50 | * * reworked locking | |
9ef9ac51 BD |
51 | * |
52 | * 01-Jul-2005 Ben Dooks <[email protected]> | |
53 | * * fixed spinlock call without pointer | |
54 | * * ensure spinlock is initialised | |
a1365275 SH |
55 | */ |
56 | ||
57 | #include <linux/module.h> | |
58 | #include <linux/ioport.h> | |
59 | #include <linux/netdevice.h> | |
60 | #include <linux/etherdevice.h> | |
61 | #include <linux/init.h> | |
62 | #include <linux/skbuff.h> | |
a1365275 SH |
63 | #include <linux/spinlock.h> |
64 | #include <linux/crc32.h> | |
65 | #include <linux/mii.h> | |
66 | #include <linux/dm9000.h> | |
67 | #include <linux/delay.h> | |
d052d1be | 68 | #include <linux/platform_device.h> |
a1365275 SH |
69 | |
70 | #include <asm/delay.h> | |
71 | #include <asm/irq.h> | |
72 | #include <asm/io.h> | |
73 | ||
74 | #include "dm9000.h" | |
75 | ||
76 | /* Board/System/Debug information/definition ---------------- */ | |
77 | ||
78 | #define DM9000_PHY 0x40 /* PHY address 0x01 */ | |
79 | ||
a1365275 SH |
80 | #define CARDNAME "dm9000" |
81 | #define PFX CARDNAME ": " | |
82 | ||
83 | #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */ | |
84 | ||
85 | #define DM9000_DEBUG 0 | |
86 | ||
87 | #if DM9000_DEBUG > 2 | |
88 | #define PRINTK3(args...) printk(CARDNAME ": " args) | |
89 | #else | |
90 | #define PRINTK3(args...) do { } while(0) | |
91 | #endif | |
92 | ||
93 | #if DM9000_DEBUG > 1 | |
94 | #define PRINTK2(args...) printk(CARDNAME ": " args) | |
95 | #else | |
96 | #define PRINTK2(args...) do { } while(0) | |
97 | #endif | |
98 | ||
99 | #if DM9000_DEBUG > 0 | |
100 | #define PRINTK1(args...) printk(CARDNAME ": " args) | |
101 | #define PRINTK(args...) printk(CARDNAME ": " args) | |
102 | #else | |
103 | #define PRINTK1(args...) do { } while(0) | |
104 | #define PRINTK(args...) printk(KERN_DEBUG args) | |
105 | #endif | |
106 | ||
f40d24d9 AL |
107 | #ifdef CONFIG_BLACKFIN |
108 | #define readsb insb | |
109 | #define readsw insw | |
110 | #define readsl insl | |
111 | #define writesb outsb | |
112 | #define writesw outsw | |
113 | #define writesl outsl | |
114 | #define DM9000_IRQ_FLAGS (IRQF_SHARED | IRQF_TRIGGER_HIGH) | |
115 | #else | |
116 | #define DM9000_IRQ_FLAGS IRQF_SHARED | |
117 | #endif | |
118 | ||
a1365275 SH |
119 | /* |
120 | * Transmit timeout, default 5 seconds. | |
121 | */ | |
122 | static int watchdog = 5000; | |
123 | module_param(watchdog, int, 0400); | |
124 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | |
125 | ||
126 | /* Structure/enum declaration ------------------------------- */ | |
127 | typedef struct board_info { | |
128 | ||
129 | void __iomem *io_addr; /* Register I/O base address */ | |
130 | void __iomem *io_data; /* Data I/O address */ | |
131 | u16 irq; /* IRQ */ | |
132 | ||
133 | u16 tx_pkt_cnt; | |
134 | u16 queue_pkt_len; | |
135 | u16 queue_start_addr; | |
136 | u16 dbug_cnt; | |
137 | u8 io_mode; /* 0:word, 2:byte */ | |
138 | u8 phy_addr; | |
139 | ||
140 | void (*inblk)(void __iomem *port, void *data, int length); | |
141 | void (*outblk)(void __iomem *port, void *data, int length); | |
142 | void (*dumpblk)(void __iomem *port, int length); | |
143 | ||
144 | struct resource *addr_res; /* resources found */ | |
145 | struct resource *data_res; | |
146 | struct resource *addr_req; /* resources requested */ | |
147 | struct resource *data_req; | |
148 | struct resource *irq_res; | |
149 | ||
150 | struct timer_list timer; | |
a1365275 SH |
151 | unsigned char srom[128]; |
152 | spinlock_t lock; | |
153 | ||
154 | struct mii_if_info mii; | |
155 | u32 msg_enable; | |
156 | } board_info_t; | |
157 | ||
158 | /* function declaration ------------------------------------- */ | |
3ae5eaec | 159 | static int dm9000_probe(struct platform_device *); |
a1365275 SH |
160 | static int dm9000_open(struct net_device *); |
161 | static int dm9000_start_xmit(struct sk_buff *, struct net_device *); | |
162 | static int dm9000_stop(struct net_device *); | |
a1365275 SH |
163 | |
164 | ||
165 | static void dm9000_timer(unsigned long); | |
166 | static void dm9000_init_dm9000(struct net_device *); | |
167 | ||
7d12e780 | 168 | static irqreturn_t dm9000_interrupt(int, void *); |
a1365275 SH |
169 | |
170 | static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg); | |
171 | static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, | |
172 | int value); | |
173 | static u16 read_srom_word(board_info_t *, int); | |
174 | static void dm9000_rx(struct net_device *); | |
175 | static void dm9000_hash_table(struct net_device *); | |
176 | ||
177 | //#define DM9000_PROGRAM_EEPROM | |
178 | #ifdef DM9000_PROGRAM_EEPROM | |
179 | static void program_eeprom(board_info_t * db); | |
180 | #endif | |
181 | /* DM9000 network board routine ---------------------------- */ | |
182 | ||
183 | static void | |
184 | dm9000_reset(board_info_t * db) | |
185 | { | |
186 | PRINTK1("dm9000x: resetting\n"); | |
187 | /* RESET device */ | |
188 | writeb(DM9000_NCR, db->io_addr); | |
189 | udelay(200); | |
190 | writeb(NCR_RST, db->io_data); | |
191 | udelay(200); | |
192 | } | |
193 | ||
194 | /* | |
195 | * Read a byte from I/O port | |
196 | */ | |
197 | static u8 | |
198 | ior(board_info_t * db, int reg) | |
199 | { | |
200 | writeb(reg, db->io_addr); | |
201 | return readb(db->io_data); | |
202 | } | |
203 | ||
204 | /* | |
205 | * Write a byte to I/O port | |
206 | */ | |
207 | ||
208 | static void | |
209 | iow(board_info_t * db, int reg, int value) | |
210 | { | |
211 | writeb(reg, db->io_addr); | |
212 | writeb(value, db->io_data); | |
213 | } | |
214 | ||
215 | /* routines for sending block to chip */ | |
216 | ||
217 | static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count) | |
218 | { | |
219 | writesb(reg, data, count); | |
220 | } | |
221 | ||
222 | static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count) | |
223 | { | |
224 | writesw(reg, data, (count+1) >> 1); | |
225 | } | |
226 | ||
227 | static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count) | |
228 | { | |
229 | writesl(reg, data, (count+3) >> 2); | |
230 | } | |
231 | ||
232 | /* input block from chip to memory */ | |
233 | ||
234 | static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count) | |
235 | { | |
5f6b5517 | 236 | readsb(reg, data, count); |
a1365275 SH |
237 | } |
238 | ||
239 | ||
240 | static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count) | |
241 | { | |
242 | readsw(reg, data, (count+1) >> 1); | |
243 | } | |
244 | ||
245 | static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count) | |
246 | { | |
247 | readsl(reg, data, (count+3) >> 2); | |
248 | } | |
249 | ||
250 | /* dump block from chip to null */ | |
251 | ||
252 | static void dm9000_dumpblk_8bit(void __iomem *reg, int count) | |
253 | { | |
254 | int i; | |
255 | int tmp; | |
256 | ||
257 | for (i = 0; i < count; i++) | |
258 | tmp = readb(reg); | |
259 | } | |
260 | ||
261 | static void dm9000_dumpblk_16bit(void __iomem *reg, int count) | |
262 | { | |
263 | int i; | |
264 | int tmp; | |
265 | ||
266 | count = (count + 1) >> 1; | |
267 | ||
268 | for (i = 0; i < count; i++) | |
269 | tmp = readw(reg); | |
270 | } | |
271 | ||
272 | static void dm9000_dumpblk_32bit(void __iomem *reg, int count) | |
273 | { | |
274 | int i; | |
275 | int tmp; | |
276 | ||
277 | count = (count + 3) >> 2; | |
278 | ||
279 | for (i = 0; i < count; i++) | |
280 | tmp = readl(reg); | |
281 | } | |
282 | ||
283 | /* dm9000_set_io | |
284 | * | |
285 | * select the specified set of io routines to use with the | |
286 | * device | |
287 | */ | |
288 | ||
289 | static void dm9000_set_io(struct board_info *db, int byte_width) | |
290 | { | |
291 | /* use the size of the data resource to work out what IO | |
292 | * routines we want to use | |
293 | */ | |
294 | ||
295 | switch (byte_width) { | |
296 | case 1: | |
297 | db->dumpblk = dm9000_dumpblk_8bit; | |
298 | db->outblk = dm9000_outblk_8bit; | |
299 | db->inblk = dm9000_inblk_8bit; | |
300 | break; | |
301 | ||
302 | case 2: | |
303 | db->dumpblk = dm9000_dumpblk_16bit; | |
304 | db->outblk = dm9000_outblk_16bit; | |
305 | db->inblk = dm9000_inblk_16bit; | |
306 | break; | |
307 | ||
308 | case 3: | |
309 | printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n"); | |
310 | db->dumpblk = dm9000_dumpblk_16bit; | |
311 | db->outblk = dm9000_outblk_16bit; | |
312 | db->inblk = dm9000_inblk_16bit; | |
313 | break; | |
314 | ||
315 | case 4: | |
316 | default: | |
317 | db->dumpblk = dm9000_dumpblk_32bit; | |
318 | db->outblk = dm9000_outblk_32bit; | |
319 | db->inblk = dm9000_inblk_32bit; | |
320 | break; | |
321 | } | |
322 | } | |
323 | ||
324 | ||
325 | /* Our watchdog timed out. Called by the networking layer */ | |
326 | static void dm9000_timeout(struct net_device *dev) | |
327 | { | |
328 | board_info_t *db = (board_info_t *) dev->priv; | |
329 | u8 reg_save; | |
330 | unsigned long flags; | |
331 | ||
332 | /* Save previous register address */ | |
333 | reg_save = readb(db->io_addr); | |
9ef9ac51 | 334 | spin_lock_irqsave(&db->lock,flags); |
a1365275 SH |
335 | |
336 | netif_stop_queue(dev); | |
337 | dm9000_reset(db); | |
338 | dm9000_init_dm9000(dev); | |
339 | /* We can accept TX packets again */ | |
340 | dev->trans_start = jiffies; | |
341 | netif_wake_queue(dev); | |
342 | ||
343 | /* Restore previous register address */ | |
344 | writeb(reg_save, db->io_addr); | |
9ef9ac51 | 345 | spin_unlock_irqrestore(&db->lock,flags); |
a1365275 SH |
346 | } |
347 | ||
2fd0e33f KH |
348 | #ifdef CONFIG_NET_POLL_CONTROLLER |
349 | /* | |
350 | *Used by netconsole | |
351 | */ | |
352 | static void dm9000_poll_controller(struct net_device *dev) | |
353 | { | |
354 | disable_irq(dev->irq); | |
28431146 | 355 | dm9000_interrupt(dev->irq,dev); |
2fd0e33f KH |
356 | enable_irq(dev->irq); |
357 | } | |
358 | #endif | |
a1365275 SH |
359 | |
360 | /* dm9000_release_board | |
361 | * | |
362 | * release a board, and any mapped resources | |
363 | */ | |
364 | ||
365 | static void | |
366 | dm9000_release_board(struct platform_device *pdev, struct board_info *db) | |
367 | { | |
368 | if (db->data_res == NULL) { | |
369 | if (db->addr_res != NULL) | |
370 | release_mem_region((unsigned long)db->io_addr, 4); | |
371 | return; | |
372 | } | |
373 | ||
374 | /* unmap our resources */ | |
375 | ||
376 | iounmap(db->io_addr); | |
377 | iounmap(db->io_data); | |
378 | ||
379 | /* release the resources */ | |
380 | ||
381 | if (db->data_req != NULL) { | |
382 | release_resource(db->data_req); | |
383 | kfree(db->data_req); | |
384 | } | |
385 | ||
51985487 DO |
386 | if (db->addr_req != NULL) { |
387 | release_resource(db->addr_req); | |
a1365275 SH |
388 | kfree(db->addr_req); |
389 | } | |
390 | } | |
391 | ||
392 | #define res_size(_r) (((_r)->end - (_r)->start) + 1) | |
393 | ||
394 | /* | |
395 | * Search DM9000 board, allocate space and register it | |
396 | */ | |
397 | static int | |
3ae5eaec | 398 | dm9000_probe(struct platform_device *pdev) |
a1365275 | 399 | { |
a1365275 SH |
400 | struct dm9000_plat_data *pdata = pdev->dev.platform_data; |
401 | struct board_info *db; /* Point a board information structure */ | |
402 | struct net_device *ndev; | |
403 | unsigned long base; | |
404 | int ret = 0; | |
405 | int iosize; | |
406 | int i; | |
407 | u32 id_val; | |
408 | ||
a1365275 SH |
409 | /* Init network device */ |
410 | ndev = alloc_etherdev(sizeof (struct board_info)); | |
411 | if (!ndev) { | |
412 | printk("%s: could not allocate device.\n", CARDNAME); | |
413 | return -ENOMEM; | |
414 | } | |
415 | ||
3ae5eaec | 416 | SET_NETDEV_DEV(ndev, &pdev->dev); |
a1365275 SH |
417 | |
418 | PRINTK2("dm9000_probe()"); | |
419 | ||
420 | /* setup board info structure */ | |
421 | db = (struct board_info *) ndev->priv; | |
422 | memset(db, 0, sizeof (*db)); | |
423 | ||
9ef9ac51 BD |
424 | spin_lock_init(&db->lock); |
425 | ||
a1365275 SH |
426 | if (pdev->num_resources < 2) { |
427 | ret = -ENODEV; | |
428 | goto out; | |
b4ed03ff | 429 | } else if (pdev->num_resources == 2) { |
a1365275 SH |
430 | base = pdev->resource[0].start; |
431 | ||
432 | if (!request_mem_region(base, 4, ndev->name)) { | |
433 | ret = -EBUSY; | |
434 | goto out; | |
435 | } | |
436 | ||
437 | ndev->base_addr = base; | |
438 | ndev->irq = pdev->resource[1].start; | |
b4ed03ff BD |
439 | db->io_addr = (void __iomem *)base; |
440 | db->io_data = (void __iomem *)(base + 4); | |
a1365275 | 441 | |
f40d24d9 AL |
442 | /* ensure at least we have a default set of IO routines */ |
443 | dm9000_set_io(db, 2); | |
444 | ||
b4ed03ff | 445 | } else { |
a1365275 SH |
446 | db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
447 | db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
448 | db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
449 | ||
b4ed03ff BD |
450 | if (db->addr_res == NULL || db->data_res == NULL || |
451 | db->irq_res == NULL) { | |
a1365275 SH |
452 | printk(KERN_ERR PFX "insufficient resources\n"); |
453 | ret = -ENOENT; | |
454 | goto out; | |
455 | } | |
456 | ||
457 | i = res_size(db->addr_res); | |
458 | db->addr_req = request_mem_region(db->addr_res->start, i, | |
459 | pdev->name); | |
460 | ||
461 | if (db->addr_req == NULL) { | |
462 | printk(KERN_ERR PFX "cannot claim address reg area\n"); | |
463 | ret = -EIO; | |
464 | goto out; | |
465 | } | |
466 | ||
467 | db->io_addr = ioremap(db->addr_res->start, i); | |
468 | ||
469 | if (db->io_addr == NULL) { | |
470 | printk(KERN_ERR "failed to ioremap address reg\n"); | |
471 | ret = -EINVAL; | |
472 | goto out; | |
473 | } | |
474 | ||
475 | iosize = res_size(db->data_res); | |
476 | db->data_req = request_mem_region(db->data_res->start, iosize, | |
477 | pdev->name); | |
478 | ||
479 | if (db->data_req == NULL) { | |
480 | printk(KERN_ERR PFX "cannot claim data reg area\n"); | |
481 | ret = -EIO; | |
482 | goto out; | |
483 | } | |
484 | ||
485 | db->io_data = ioremap(db->data_res->start, iosize); | |
486 | ||
487 | if (db->io_data == NULL) { | |
488 | printk(KERN_ERR "failed to ioremap data reg\n"); | |
489 | ret = -EINVAL; | |
490 | goto out; | |
491 | } | |
492 | ||
493 | /* fill in parameters for net-dev structure */ | |
494 | ||
495 | ndev->base_addr = (unsigned long)db->io_addr; | |
496 | ndev->irq = db->irq_res->start; | |
497 | ||
498 | /* ensure at least we have a default set of IO routines */ | |
499 | dm9000_set_io(db, iosize); | |
a1365275 SH |
500 | } |
501 | ||
502 | /* check to see if anything is being over-ridden */ | |
503 | if (pdata != NULL) { | |
504 | /* check to see if the driver wants to over-ride the | |
505 | * default IO width */ | |
506 | ||
507 | if (pdata->flags & DM9000_PLATF_8BITONLY) | |
508 | dm9000_set_io(db, 1); | |
509 | ||
510 | if (pdata->flags & DM9000_PLATF_16BITONLY) | |
511 | dm9000_set_io(db, 2); | |
512 | ||
513 | if (pdata->flags & DM9000_PLATF_32BITONLY) | |
514 | dm9000_set_io(db, 4); | |
515 | ||
516 | /* check to see if there are any IO routine | |
517 | * over-rides */ | |
518 | ||
519 | if (pdata->inblk != NULL) | |
520 | db->inblk = pdata->inblk; | |
521 | ||
522 | if (pdata->outblk != NULL) | |
523 | db->outblk = pdata->outblk; | |
524 | ||
525 | if (pdata->dumpblk != NULL) | |
526 | db->dumpblk = pdata->dumpblk; | |
527 | } | |
528 | ||
529 | dm9000_reset(db); | |
530 | ||
531 | /* try two times, DM9000 sometimes gets the first read wrong */ | |
532 | for (i = 0; i < 2; i++) { | |
533 | id_val = ior(db, DM9000_VIDL); | |
534 | id_val |= (u32)ior(db, DM9000_VIDH) << 8; | |
535 | id_val |= (u32)ior(db, DM9000_PIDL) << 16; | |
536 | id_val |= (u32)ior(db, DM9000_PIDH) << 24; | |
537 | ||
538 | if (id_val == DM9000_ID) | |
539 | break; | |
540 | printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val); | |
541 | } | |
542 | ||
543 | if (id_val != DM9000_ID) { | |
544 | printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val); | |
545 | goto release; | |
546 | } | |
547 | ||
548 | /* from this point we assume that we have found a DM9000 */ | |
549 | ||
550 | /* driver system function */ | |
551 | ether_setup(ndev); | |
552 | ||
553 | ndev->open = &dm9000_open; | |
554 | ndev->hard_start_xmit = &dm9000_start_xmit; | |
555 | ndev->tx_timeout = &dm9000_timeout; | |
556 | ndev->watchdog_timeo = msecs_to_jiffies(watchdog); | |
557 | ndev->stop = &dm9000_stop; | |
a1365275 | 558 | ndev->set_multicast_list = &dm9000_hash_table; |
2fd0e33f KH |
559 | #ifdef CONFIG_NET_POLL_CONTROLLER |
560 | ndev->poll_controller = &dm9000_poll_controller; | |
561 | #endif | |
a1365275 SH |
562 | |
563 | #ifdef DM9000_PROGRAM_EEPROM | |
564 | program_eeprom(db); | |
565 | #endif | |
566 | db->msg_enable = NETIF_MSG_LINK; | |
567 | db->mii.phy_id_mask = 0x1f; | |
568 | db->mii.reg_num_mask = 0x1f; | |
569 | db->mii.force_media = 0; | |
570 | db->mii.full_duplex = 0; | |
571 | db->mii.dev = ndev; | |
572 | db->mii.mdio_read = dm9000_phy_read; | |
573 | db->mii.mdio_write = dm9000_phy_write; | |
574 | ||
575 | /* Read SROM content */ | |
576 | for (i = 0; i < 64; i++) | |
577 | ((u16 *) db->srom)[i] = read_srom_word(db, i); | |
578 | ||
579 | /* Set Node Address */ | |
580 | for (i = 0; i < 6; i++) | |
581 | ndev->dev_addr[i] = db->srom[i]; | |
582 | ||
5b55dda6 BD |
583 | if (!is_valid_ether_addr(ndev->dev_addr)) { |
584 | /* try reading from mac */ | |
585 | ||
586 | for (i = 0; i < 6; i++) | |
587 | ndev->dev_addr[i] = ior(db, i+DM9000_PAR); | |
588 | } | |
589 | ||
a1365275 SH |
590 | if (!is_valid_ether_addr(ndev->dev_addr)) |
591 | printk("%s: Invalid ethernet MAC address. Please " | |
592 | "set using ifconfig\n", ndev->name); | |
593 | ||
3ae5eaec | 594 | platform_set_drvdata(pdev, ndev); |
a1365275 SH |
595 | ret = register_netdev(ndev); |
596 | ||
597 | if (ret == 0) { | |
0795af57 JP |
598 | DECLARE_MAC_BUF(mac); |
599 | printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n", | |
600 | ndev->name, db->io_addr, db->io_data, ndev->irq, | |
601 | print_mac(mac, ndev->dev_addr)); | |
a1365275 SH |
602 | } |
603 | return 0; | |
604 | ||
605 | release: | |
606 | out: | |
607 | printk("%s: not found (%d).\n", CARDNAME, ret); | |
608 | ||
609 | dm9000_release_board(pdev, db); | |
9fd9f9b6 | 610 | free_netdev(ndev); |
a1365275 SH |
611 | |
612 | return ret; | |
613 | } | |
614 | ||
615 | /* | |
616 | * Open the interface. | |
617 | * The interface is opened whenever "ifconfig" actives it. | |
618 | */ | |
619 | static int | |
620 | dm9000_open(struct net_device *dev) | |
621 | { | |
622 | board_info_t *db = (board_info_t *) dev->priv; | |
623 | ||
624 | PRINTK2("entering dm9000_open\n"); | |
625 | ||
f40d24d9 | 626 | if (request_irq(dev->irq, &dm9000_interrupt, DM9000_IRQ_FLAGS, dev->name, dev)) |
a1365275 SH |
627 | return -EAGAIN; |
628 | ||
629 | /* Initialize DM9000 board */ | |
630 | dm9000_reset(db); | |
631 | dm9000_init_dm9000(dev); | |
632 | ||
633 | /* Init driver variable */ | |
634 | db->dbug_cnt = 0; | |
635 | ||
636 | /* set and active a timer process */ | |
637 | init_timer(&db->timer); | |
9ef9ac51 | 638 | db->timer.expires = DM9000_TIMER_WUT; |
a1365275 SH |
639 | db->timer.data = (unsigned long) dev; |
640 | db->timer.function = &dm9000_timer; | |
641 | add_timer(&db->timer); | |
642 | ||
643 | mii_check_media(&db->mii, netif_msg_link(db), 1); | |
644 | netif_start_queue(dev); | |
645 | ||
646 | return 0; | |
647 | } | |
648 | ||
649 | /* | |
650 | * Initilize dm9000 board | |
651 | */ | |
652 | static void | |
653 | dm9000_init_dm9000(struct net_device *dev) | |
654 | { | |
655 | board_info_t *db = (board_info_t *) dev->priv; | |
656 | ||
657 | PRINTK1("entering %s\n",__FUNCTION__); | |
658 | ||
659 | /* I/O mode */ | |
660 | db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */ | |
661 | ||
662 | /* GPIO0 on pre-activate PHY */ | |
663 | iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ | |
664 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ | |
665 | iow(db, DM9000_GPR, 0); /* Enable PHY */ | |
666 | ||
667 | /* Program operating register */ | |
668 | iow(db, DM9000_TCR, 0); /* TX Polling clear */ | |
669 | iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */ | |
670 | iow(db, DM9000_FCR, 0xff); /* Flow Control */ | |
671 | iow(db, DM9000_SMCR, 0); /* Special Mode */ | |
672 | /* clear TX status */ | |
673 | iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); | |
674 | iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */ | |
675 | ||
676 | /* Set address filter table */ | |
677 | dm9000_hash_table(dev); | |
678 | ||
679 | /* Activate DM9000 */ | |
680 | iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN); | |
681 | /* Enable TX/RX interrupt mask */ | |
682 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
683 | ||
684 | /* Init Driver variable */ | |
685 | db->tx_pkt_cnt = 0; | |
686 | db->queue_pkt_len = 0; | |
687 | dev->trans_start = 0; | |
a1365275 SH |
688 | } |
689 | ||
690 | /* | |
691 | * Hardware start transmission. | |
692 | * Send a packet to media from the upper layer. | |
693 | */ | |
694 | static int | |
695 | dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
696 | { | |
c46ac946 | 697 | unsigned long flags; |
a1365275 SH |
698 | board_info_t *db = (board_info_t *) dev->priv; |
699 | ||
700 | PRINTK3("dm9000_start_xmit\n"); | |
701 | ||
702 | if (db->tx_pkt_cnt > 1) | |
703 | return 1; | |
704 | ||
c46ac946 | 705 | spin_lock_irqsave(&db->lock, flags); |
a1365275 SH |
706 | |
707 | /* Move data to DM9000 TX RAM */ | |
708 | writeb(DM9000_MWCMD, db->io_addr); | |
709 | ||
710 | (db->outblk)(db->io_data, skb->data, skb->len); | |
09f75cd7 | 711 | dev->stats.tx_bytes += skb->len; |
a1365275 | 712 | |
c46ac946 | 713 | db->tx_pkt_cnt++; |
a1365275 | 714 | /* TX control: First packet immediately send, second packet queue */ |
c46ac946 | 715 | if (db->tx_pkt_cnt == 1) { |
a1365275 SH |
716 | /* Set TX length to DM9000 */ |
717 | iow(db, DM9000_TXPLL, skb->len & 0xff); | |
718 | iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff); | |
719 | ||
720 | /* Issue TX polling command */ | |
721 | iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ | |
722 | ||
723 | dev->trans_start = jiffies; /* save the time stamp */ | |
a1365275 SH |
724 | } else { |
725 | /* Second packet */ | |
a1365275 | 726 | db->queue_pkt_len = skb->len; |
c46ac946 | 727 | netif_stop_queue(dev); |
a1365275 SH |
728 | } |
729 | ||
c46ac946 FW |
730 | spin_unlock_irqrestore(&db->lock, flags); |
731 | ||
a1365275 SH |
732 | /* free this SKB */ |
733 | dev_kfree_skb(skb); | |
734 | ||
a1365275 SH |
735 | return 0; |
736 | } | |
737 | ||
738 | static void | |
739 | dm9000_shutdown(struct net_device *dev) | |
740 | { | |
741 | board_info_t *db = (board_info_t *) dev->priv; | |
742 | ||
743 | /* RESET device */ | |
744 | dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */ | |
745 | iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */ | |
746 | iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */ | |
747 | iow(db, DM9000_RCR, 0x00); /* Disable RX */ | |
748 | } | |
749 | ||
750 | /* | |
751 | * Stop the interface. | |
752 | * The interface is stopped when it is brought. | |
753 | */ | |
754 | static int | |
755 | dm9000_stop(struct net_device *ndev) | |
756 | { | |
757 | board_info_t *db = (board_info_t *) ndev->priv; | |
758 | ||
759 | PRINTK1("entering %s\n",__FUNCTION__); | |
760 | ||
761 | /* deleted timer */ | |
762 | del_timer(&db->timer); | |
763 | ||
764 | netif_stop_queue(ndev); | |
765 | netif_carrier_off(ndev); | |
766 | ||
767 | /* free interrupt */ | |
768 | free_irq(ndev->irq, ndev); | |
769 | ||
770 | dm9000_shutdown(ndev); | |
771 | ||
772 | return 0; | |
773 | } | |
774 | ||
775 | /* | |
776 | * DM9000 interrupt handler | |
777 | * receive the packet to upper layer, free the transmitted packet | |
778 | */ | |
779 | ||
5d22a312 | 780 | static void |
a1365275 SH |
781 | dm9000_tx_done(struct net_device *dev, board_info_t * db) |
782 | { | |
783 | int tx_status = ior(db, DM9000_NSR); /* Got TX status */ | |
784 | ||
785 | if (tx_status & (NSR_TX2END | NSR_TX1END)) { | |
786 | /* One packet sent complete */ | |
787 | db->tx_pkt_cnt--; | |
09f75cd7 | 788 | dev->stats.tx_packets++; |
a1365275 SH |
789 | |
790 | /* Queue packet check & send */ | |
791 | if (db->tx_pkt_cnt > 0) { | |
792 | iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff); | |
793 | iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff); | |
794 | iow(db, DM9000_TCR, TCR_TXREQ); | |
795 | dev->trans_start = jiffies; | |
796 | } | |
797 | netif_wake_queue(dev); | |
798 | } | |
799 | } | |
800 | ||
801 | static irqreturn_t | |
7d12e780 | 802 | dm9000_interrupt(int irq, void *dev_id) |
a1365275 SH |
803 | { |
804 | struct net_device *dev = dev_id; | |
805 | board_info_t *db; | |
806 | int int_status; | |
807 | u8 reg_save; | |
808 | ||
809 | PRINTK3("entering %s\n",__FUNCTION__); | |
810 | ||
811 | if (!dev) { | |
812 | PRINTK1("dm9000_interrupt() without DEVICE arg\n"); | |
813 | return IRQ_HANDLED; | |
814 | } | |
815 | ||
816 | /* A real interrupt coming */ | |
817 | db = (board_info_t *) dev->priv; | |
818 | spin_lock(&db->lock); | |
819 | ||
820 | /* Save previous register address */ | |
821 | reg_save = readb(db->io_addr); | |
822 | ||
823 | /* Disable all interrupts */ | |
824 | iow(db, DM9000_IMR, IMR_PAR); | |
825 | ||
826 | /* Got DM9000 interrupt status */ | |
827 | int_status = ior(db, DM9000_ISR); /* Got ISR */ | |
828 | iow(db, DM9000_ISR, int_status); /* Clear ISR status */ | |
829 | ||
830 | /* Received the coming packet */ | |
831 | if (int_status & ISR_PRS) | |
832 | dm9000_rx(dev); | |
833 | ||
834 | /* Trnasmit Interrupt check */ | |
835 | if (int_status & ISR_PTS) | |
836 | dm9000_tx_done(dev, db); | |
837 | ||
838 | /* Re-enable interrupt mask */ | |
839 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | |
840 | ||
841 | /* Restore previous register address */ | |
842 | writeb(reg_save, db->io_addr); | |
843 | ||
844 | spin_unlock(&db->lock); | |
845 | ||
846 | return IRQ_HANDLED; | |
847 | } | |
848 | ||
a1365275 SH |
849 | /* |
850 | * A periodic timer routine | |
851 | * Dynamic media sense, allocated Rx buffer... | |
852 | */ | |
853 | static void | |
854 | dm9000_timer(unsigned long data) | |
855 | { | |
856 | struct net_device *dev = (struct net_device *) data; | |
857 | board_info_t *db = (board_info_t *) dev->priv; | |
a1365275 SH |
858 | |
859 | PRINTK3("dm9000_timer()\n"); | |
860 | ||
a1365275 SH |
861 | mii_check_media(&db->mii, netif_msg_link(db), 0); |
862 | ||
a1365275 SH |
863 | /* Set timer again */ |
864 | db->timer.expires = DM9000_TIMER_WUT; | |
865 | add_timer(&db->timer); | |
866 | } | |
867 | ||
868 | struct dm9000_rxhdr { | |
869 | u16 RxStatus; | |
870 | u16 RxLen; | |
871 | } __attribute__((__packed__)); | |
872 | ||
873 | /* | |
874 | * Received a packet and pass to upper layer | |
875 | */ | |
876 | static void | |
877 | dm9000_rx(struct net_device *dev) | |
878 | { | |
879 | board_info_t *db = (board_info_t *) dev->priv; | |
880 | struct dm9000_rxhdr rxhdr; | |
881 | struct sk_buff *skb; | |
882 | u8 rxbyte, *rdptr; | |
6478fac6 | 883 | bool GoodPacket; |
a1365275 SH |
884 | int RxLen; |
885 | ||
886 | /* Check packet ready or not */ | |
887 | do { | |
888 | ior(db, DM9000_MRCMDX); /* Dummy read */ | |
889 | ||
890 | /* Get most updated data */ | |
891 | rxbyte = readb(db->io_data); | |
892 | ||
893 | /* Status check: this byte must be 0 or 1 */ | |
894 | if (rxbyte > DM9000_PKT_RDY) { | |
895 | printk("status check failed: %d\n", rxbyte); | |
896 | iow(db, DM9000_RCR, 0x00); /* Stop Device */ | |
897 | iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */ | |
898 | return; | |
899 | } | |
900 | ||
901 | if (rxbyte != DM9000_PKT_RDY) | |
902 | return; | |
903 | ||
904 | /* A packet ready now & Get status/length */ | |
6478fac6 | 905 | GoodPacket = true; |
a1365275 SH |
906 | writeb(DM9000_MRCMD, db->io_addr); |
907 | ||
908 | (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr)); | |
909 | ||
910 | RxLen = rxhdr.RxLen; | |
911 | ||
912 | /* Packet Status check */ | |
913 | if (RxLen < 0x40) { | |
6478fac6 | 914 | GoodPacket = false; |
a1365275 SH |
915 | PRINTK1("Bad Packet received (runt)\n"); |
916 | } | |
917 | ||
918 | if (RxLen > DM9000_PKT_MAX) { | |
919 | PRINTK1("RST: RX Len:%x\n", RxLen); | |
920 | } | |
921 | ||
922 | if (rxhdr.RxStatus & 0xbf00) { | |
6478fac6 | 923 | GoodPacket = false; |
a1365275 SH |
924 | if (rxhdr.RxStatus & 0x100) { |
925 | PRINTK1("fifo error\n"); | |
09f75cd7 | 926 | dev->stats.rx_fifo_errors++; |
a1365275 SH |
927 | } |
928 | if (rxhdr.RxStatus & 0x200) { | |
929 | PRINTK1("crc error\n"); | |
09f75cd7 | 930 | dev->stats.rx_crc_errors++; |
a1365275 SH |
931 | } |
932 | if (rxhdr.RxStatus & 0x8000) { | |
933 | PRINTK1("length error\n"); | |
09f75cd7 | 934 | dev->stats.rx_length_errors++; |
a1365275 SH |
935 | } |
936 | } | |
937 | ||
938 | /* Move data from DM9000 */ | |
939 | if (GoodPacket | |
940 | && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) { | |
a1365275 SH |
941 | skb_reserve(skb, 2); |
942 | rdptr = (u8 *) skb_put(skb, RxLen - 4); | |
943 | ||
944 | /* Read received packet from RX SRAM */ | |
945 | ||
946 | (db->inblk)(db->io_data, rdptr, RxLen); | |
09f75cd7 | 947 | dev->stats.rx_bytes += RxLen; |
a1365275 SH |
948 | |
949 | /* Pass to upper layer */ | |
950 | skb->protocol = eth_type_trans(skb, dev); | |
951 | netif_rx(skb); | |
09f75cd7 | 952 | dev->stats.rx_packets++; |
a1365275 SH |
953 | |
954 | } else { | |
955 | /* need to dump the packet's data */ | |
956 | ||
957 | (db->dumpblk)(db->io_data, RxLen); | |
958 | } | |
959 | } while (rxbyte == DM9000_PKT_RDY); | |
960 | } | |
961 | ||
962 | /* | |
963 | * Read a word data from SROM | |
964 | */ | |
965 | static u16 | |
966 | read_srom_word(board_info_t * db, int offset) | |
967 | { | |
968 | iow(db, DM9000_EPAR, offset); | |
969 | iow(db, DM9000_EPCR, EPCR_ERPRR); | |
970 | mdelay(8); /* according to the datasheet 200us should be enough, | |
971 | but it doesn't work */ | |
972 | iow(db, DM9000_EPCR, 0x0); | |
973 | return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8)); | |
974 | } | |
975 | ||
976 | #ifdef DM9000_PROGRAM_EEPROM | |
977 | /* | |
978 | * Write a word data to SROM | |
979 | */ | |
980 | static void | |
981 | write_srom_word(board_info_t * db, int offset, u16 val) | |
982 | { | |
983 | iow(db, DM9000_EPAR, offset); | |
984 | iow(db, DM9000_EPDRH, ((val >> 8) & 0xff)); | |
985 | iow(db, DM9000_EPDRL, (val & 0xff)); | |
986 | iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW); | |
987 | mdelay(8); /* same shit */ | |
988 | iow(db, DM9000_EPCR, 0); | |
989 | } | |
990 | ||
991 | /* | |
992 | * Only for development: | |
993 | * Here we write static data to the eeprom in case | |
994 | * we don't have valid content on a new board | |
995 | */ | |
996 | static void | |
997 | program_eeprom(board_info_t * db) | |
998 | { | |
999 | u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */ | |
1000 | 0x0000, /* Autoload: accept nothing */ | |
1001 | 0x0a46, 0x9000, /* Vendor / Product ID */ | |
1002 | 0x0000, /* pin control */ | |
1003 | 0x0000, | |
1004 | }; /* Wake-up mode control */ | |
1005 | int i; | |
1006 | for (i = 0; i < 8; i++) | |
1007 | write_srom_word(db, i, eeprom[i]); | |
1008 | } | |
1009 | #endif | |
1010 | ||
1011 | ||
1012 | /* | |
1013 | * Calculate the CRC valude of the Rx packet | |
1014 | * flag = 1 : return the reverse CRC (for the received packet CRC) | |
1015 | * 0 : return the normal CRC (for Hash Table index) | |
1016 | */ | |
1017 | ||
1018 | static unsigned long | |
1019 | cal_CRC(unsigned char *Data, unsigned int Len, u8 flag) | |
1020 | { | |
1021 | ||
1022 | u32 crc = ether_crc_le(Len, Data); | |
1023 | ||
1024 | if (flag) | |
1025 | return ~crc; | |
1026 | ||
1027 | return crc; | |
1028 | } | |
1029 | ||
1030 | /* | |
1031 | * Set DM9000 multicast address | |
1032 | */ | |
1033 | static void | |
1034 | dm9000_hash_table(struct net_device *dev) | |
1035 | { | |
1036 | board_info_t *db = (board_info_t *) dev->priv; | |
1037 | struct dev_mc_list *mcptr = dev->mc_list; | |
1038 | int mc_cnt = dev->mc_count; | |
1039 | u32 hash_val; | |
1040 | u16 i, oft, hash_table[4]; | |
1041 | unsigned long flags; | |
1042 | ||
1043 | PRINTK2("dm9000_hash_table()\n"); | |
1044 | ||
1045 | spin_lock_irqsave(&db->lock,flags); | |
1046 | ||
1047 | for (i = 0, oft = 0x10; i < 6; i++, oft++) | |
1048 | iow(db, oft, dev->dev_addr[i]); | |
1049 | ||
1050 | /* Clear Hash Table */ | |
1051 | for (i = 0; i < 4; i++) | |
1052 | hash_table[i] = 0x0; | |
1053 | ||
1054 | /* broadcast address */ | |
1055 | hash_table[3] = 0x8000; | |
1056 | ||
1057 | /* the multicast address in Hash Table : 64 bits */ | |
1058 | for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { | |
1059 | hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f; | |
1060 | hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16); | |
1061 | } | |
1062 | ||
1063 | /* Write the hash table to MAC MD table */ | |
1064 | for (i = 0, oft = 0x16; i < 4; i++) { | |
1065 | iow(db, oft++, hash_table[i] & 0xff); | |
1066 | iow(db, oft++, (hash_table[i] >> 8) & 0xff); | |
1067 | } | |
1068 | ||
1069 | spin_unlock_irqrestore(&db->lock,flags); | |
1070 | } | |
1071 | ||
1072 | ||
1073 | /* | |
1074 | * Read a word from phyxcer | |
1075 | */ | |
1076 | static int | |
1077 | dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg) | |
1078 | { | |
1079 | board_info_t *db = (board_info_t *) dev->priv; | |
1080 | unsigned long flags; | |
9ef9ac51 | 1081 | unsigned int reg_save; |
a1365275 SH |
1082 | int ret; |
1083 | ||
1084 | spin_lock_irqsave(&db->lock,flags); | |
9ef9ac51 BD |
1085 | |
1086 | /* Save previous register address */ | |
1087 | reg_save = readb(db->io_addr); | |
1088 | ||
a1365275 SH |
1089 | /* Fill the phyxcer register into REG_0C */ |
1090 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | |
1091 | ||
1092 | iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */ | |
1093 | udelay(100); /* Wait read complete */ | |
1094 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */ | |
1095 | ||
1096 | /* The read data keeps on REG_0D & REG_0E */ | |
1097 | ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL); | |
1098 | ||
9ef9ac51 BD |
1099 | /* restore the previous address */ |
1100 | writeb(reg_save, db->io_addr); | |
1101 | ||
a1365275 SH |
1102 | spin_unlock_irqrestore(&db->lock,flags); |
1103 | ||
1104 | return ret; | |
1105 | } | |
1106 | ||
1107 | /* | |
1108 | * Write a word to phyxcer | |
1109 | */ | |
1110 | static void | |
1111 | dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value) | |
1112 | { | |
1113 | board_info_t *db = (board_info_t *) dev->priv; | |
1114 | unsigned long flags; | |
9ef9ac51 | 1115 | unsigned long reg_save; |
a1365275 SH |
1116 | |
1117 | spin_lock_irqsave(&db->lock,flags); | |
1118 | ||
9ef9ac51 BD |
1119 | /* Save previous register address */ |
1120 | reg_save = readb(db->io_addr); | |
1121 | ||
a1365275 SH |
1122 | /* Fill the phyxcer register into REG_0C */ |
1123 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | |
1124 | ||
1125 | /* Fill the written data into REG_0D & REG_0E */ | |
1126 | iow(db, DM9000_EPDRL, (value & 0xff)); | |
1127 | iow(db, DM9000_EPDRH, ((value >> 8) & 0xff)); | |
1128 | ||
1129 | iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */ | |
1130 | udelay(500); /* Wait write complete */ | |
1131 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */ | |
1132 | ||
9ef9ac51 BD |
1133 | /* restore the previous address */ |
1134 | writeb(reg_save, db->io_addr); | |
1135 | ||
a1365275 SH |
1136 | spin_unlock_irqrestore(&db->lock,flags); |
1137 | } | |
1138 | ||
1139 | static int | |
3ae5eaec | 1140 | dm9000_drv_suspend(struct platform_device *dev, pm_message_t state) |
a1365275 | 1141 | { |
3ae5eaec | 1142 | struct net_device *ndev = platform_get_drvdata(dev); |
a1365275 | 1143 | |
9480e307 | 1144 | if (ndev) { |
a1365275 SH |
1145 | if (netif_running(ndev)) { |
1146 | netif_device_detach(ndev); | |
1147 | dm9000_shutdown(ndev); | |
1148 | } | |
1149 | } | |
1150 | return 0; | |
1151 | } | |
1152 | ||
1153 | static int | |
3ae5eaec | 1154 | dm9000_drv_resume(struct platform_device *dev) |
a1365275 | 1155 | { |
3ae5eaec | 1156 | struct net_device *ndev = platform_get_drvdata(dev); |
a1365275 SH |
1157 | board_info_t *db = (board_info_t *) ndev->priv; |
1158 | ||
9480e307 | 1159 | if (ndev) { |
a1365275 SH |
1160 | |
1161 | if (netif_running(ndev)) { | |
1162 | dm9000_reset(db); | |
1163 | dm9000_init_dm9000(ndev); | |
1164 | ||
1165 | netif_device_attach(ndev); | |
1166 | } | |
1167 | } | |
1168 | return 0; | |
1169 | } | |
1170 | ||
1171 | static int | |
3ae5eaec | 1172 | dm9000_drv_remove(struct platform_device *pdev) |
a1365275 | 1173 | { |
3ae5eaec | 1174 | struct net_device *ndev = platform_get_drvdata(pdev); |
a1365275 | 1175 | |
3ae5eaec | 1176 | platform_set_drvdata(pdev, NULL); |
a1365275 SH |
1177 | |
1178 | unregister_netdev(ndev); | |
1179 | dm9000_release_board(pdev, (board_info_t *) ndev->priv); | |
9fd9f9b6 | 1180 | free_netdev(ndev); /* free device structure */ |
a1365275 SH |
1181 | |
1182 | PRINTK1("clean_module() exit\n"); | |
1183 | ||
1184 | return 0; | |
1185 | } | |
1186 | ||
3ae5eaec | 1187 | static struct platform_driver dm9000_driver = { |
5d22a312 BD |
1188 | .driver = { |
1189 | .name = "dm9000", | |
1190 | .owner = THIS_MODULE, | |
1191 | }, | |
a1365275 SH |
1192 | .probe = dm9000_probe, |
1193 | .remove = dm9000_drv_remove, | |
1194 | .suspend = dm9000_drv_suspend, | |
1195 | .resume = dm9000_drv_resume, | |
1196 | }; | |
1197 | ||
1198 | static int __init | |
1199 | dm9000_init(void) | |
1200 | { | |
2ae2d77c BD |
1201 | printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME); |
1202 | ||
3ae5eaec | 1203 | return platform_driver_register(&dm9000_driver); /* search board and register */ |
a1365275 SH |
1204 | } |
1205 | ||
1206 | static void __exit | |
1207 | dm9000_cleanup(void) | |
1208 | { | |
3ae5eaec | 1209 | platform_driver_unregister(&dm9000_driver); |
a1365275 SH |
1210 | } |
1211 | ||
1212 | module_init(dm9000_init); | |
1213 | module_exit(dm9000_cleanup); | |
1214 | ||
1215 | MODULE_AUTHOR("Sascha Hauer, Ben Dooks"); | |
1216 | MODULE_DESCRIPTION("Davicom DM9000 network driver"); | |
1217 | MODULE_LICENSE("GPL"); |