[linux.git] / arch / openrisc / kernel / setup.c

/*
 * OpenRISC setup.c
 *
 * Linux architectural port borrowing liberally from similar works of
 * others.  All original copyrights apply as per the original source
 * declaration.
 *
 * Modifications for the OpenRISC architecture:
 * Copyright (C) 2003 Matjaz Breskvar <[email protected]>
 * Copyright (C) 2010-2011 Jonas Bonn <[email protected]>
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 *
 * This file handles the architecture-dependent parts of initialization
 */

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/tty.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/seq_file.h>
#include <linux/serial.h>
#include <linux/initrd.h>
#include <linux/of_fdt.h>
#include <linux/of.h>
#include <linux/memblock.h>
#include <linux/device.h>
#include <linux/of_platform.h>

#include <asm/segment.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/io.h>
#include <asm/cpuinfo.h>
#include <asm/delay.h>

#include "vmlinux.h"

char __initdata cmd_line[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;

static unsigned long __init setup_memory(void)
{
	unsigned long bootmap_size;
	unsigned long ram_start_pfn;
	unsigned long free_ram_start_pfn;
	unsigned long ram_end_pfn;
	phys_addr_t memory_start, memory_end;
	struct memblock_region *region;

	memory_end = memory_start = 0;

	/* Find main memory where is the kernel */
	for_each_memblock(memory, region) {
		memory_start = region->base;
		memory_end = region->base + region->size;
		printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
		       memory_start, memory_end);
	}

	if (!memory_end) {
		panic("No memory!");
	}

	ram_start_pfn = PFN_UP(memory_start);
	/* free_ram_start_pfn is first page after kernel */
	free_ram_start_pfn = PFN_UP(__pa(&_end));
	ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());

	max_pfn = ram_end_pfn;

	/*
	 * initialize the boot-time allocator (with low memory only).
	 *
	 * This makes the memory from the end of the kernel to the end of
	 * RAM usable.
	 * init_bootmem sets the global values min_low_pfn, max_low_pfn.
	 */
	bootmap_size = init_bootmem(free_ram_start_pfn,
				    ram_end_pfn - ram_start_pfn);
	free_bootmem(PFN_PHYS(free_ram_start_pfn),
		     (ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
	reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
			BOOTMEM_DEFAULT);

	for_each_memblock(reserved, region) {
		printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
		       (u32) region->base, (u32) region->size);
		reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
	}

	return ram_end_pfn;
}

struct cpuinfo cpuinfo;

static void print_cpuinfo(void)
{
	unsigned long upr = mfspr(SPR_UPR);
	unsigned long vr = mfspr(SPR_VR);
	unsigned int version;
	unsigned int revision;

	version = (vr & SPR_VR_VER) >> 24;
	revision = (vr & SPR_VR_REV);

	printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
	       version, revision, cpuinfo.clock_frequency / 1000000);

	if (!(upr & SPR_UPR_UP)) {
		printk(KERN_INFO
		       "-- no UPR register... unable to detect configuration\n");
		return;
	}

	if (upr & SPR_UPR_DCP)
		printk(KERN_INFO
		       "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
		       cpuinfo.dcache_size, cpuinfo.dcache_block_size, 1);
	else
		printk(KERN_INFO "-- dcache disabled\n");
	if (upr & SPR_UPR_ICP)
		printk(KERN_INFO
		       "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
		       cpuinfo.icache_size, cpuinfo.icache_block_size, 1);
	else
		printk(KERN_INFO "-- icache disabled\n");

	if (upr & SPR_UPR_DMP)
		printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
		       1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
		       1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
	if (upr & SPR_UPR_IMP)
		printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
		       1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
		       1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));

	printk(KERN_INFO "-- additional features:\n");
	if (upr & SPR_UPR_DUP)
		printk(KERN_INFO "-- debug unit\n");
	if (upr & SPR_UPR_PCUP)
		printk(KERN_INFO "-- performance counters\n");
	if (upr & SPR_UPR_PMP)
		printk(KERN_INFO "-- power management\n");
	if (upr & SPR_UPR_PICP)
		printk(KERN_INFO "-- PIC\n");
	if (upr & SPR_UPR_TTP)
		printk(KERN_INFO "-- timer\n");
	if (upr & SPR_UPR_CUP)
		printk(KERN_INFO "-- custom unit(s)\n");
}

void __init setup_cpuinfo(void)
{
	struct device_node *cpu;
	unsigned long iccfgr, dccfgr;
	unsigned long cache_set_size, cache_ways;

	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
	if (!cpu)
		panic("No compatible CPU found in device tree...\n");

	iccfgr = mfspr(SPR_ICCFGR);
	cache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
	cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
	cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
	cpuinfo.icache_size =
	    cache_set_size * cache_ways * cpuinfo.icache_block_size;

	dccfgr = mfspr(SPR_DCCFGR);
	cache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
	cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
	cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
	cpuinfo.dcache_size =
	    cache_set_size * cache_ways * cpuinfo.dcache_block_size;

	if (of_property_read_u32(cpu, "clock-frequency",
				 &cpuinfo.clock_frequency)) {
		printk(KERN_WARNING
		       "Device tree missing CPU 'clock-frequency' parameter."
		       "Assuming frequency 25MHZ"
		       "This is probably not what you want.");
	}

	of_node_put(cpu);

	print_cpuinfo();
}

/**
 * or32_early_setup
 *
 * Handles the pointer to the device tree that this kernel is to use
 * for establishing the available platform devices.
 *
 * For now, this is limited to using the built-in device tree.  In the future,
 * it is intended that this function will take a pointer to the device tree
 * that is potentially built-in, but potentially also passed in by the
 * bootloader, or discovered by some equally clever means...
 */

void __init or32_early_setup(void)
{

	early_init_devtree(__dtb_start);

	printk(KERN_INFO "Compiled-in FDT at 0x%p\n", __dtb_start);
}

static int __init openrisc_device_probe(void)
{
	of_platform_populate(NULL, NULL, NULL, NULL);

	return 0;
}

device_initcall(openrisc_device_probe);

static inline unsigned long extract_value_bits(unsigned long reg,
					       short bit_nr, short width)
{
	return (reg >> bit_nr) & (0 << width);
}

static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
{
	while (!(mask & 0x1)) {
		reg = reg >> 1;
		mask = mask >> 1;
	}
	return mask & reg;
}

void __init detect_unit_config(unsigned long upr, unsigned long mask,
			       char *text, void (*func) (void))
{
	if (text != NULL)
		printk("%s", text);

	if (upr & mask) {
		if (func != NULL)
			func();
		else
			printk("present\n");
	} else
		printk("not present\n");
}

/*
 * calibrate_delay
 *
 * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
 * from the clock frequency passed in via the device tree
 *
 */

void __cpuinit calibrate_delay(void)
{
	const int *val;
	struct device_node *cpu = NULL;
	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
	val = of_get_property(cpu, "clock-frequency", NULL);
	if (!val)
		panic("no cpu 'clock-frequency' parameter in device tree");
	loops_per_jiffy = *val / HZ;
	pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
		loops_per_jiffy / (500000 / HZ),
		(loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
}

void __init setup_arch(char **cmdline_p)
{
	unsigned long max_low_pfn;

	unflatten_device_tree();

	setup_cpuinfo();

	/* process 1's initial memory region is the kernel code/data */
	init_mm.start_code = (unsigned long)&_stext;
	init_mm.end_code = (unsigned long)&_etext;
	init_mm.end_data = (unsigned long)&_edata;
	init_mm.brk = (unsigned long)&_end;

#ifdef CONFIG_BLK_DEV_INITRD
	initrd_start = (unsigned long)&__initrd_start;
	initrd_end = (unsigned long)&__initrd_end;
	if (initrd_start == initrd_end) {
		initrd_start = 0;
		initrd_end = 0;
	}
	initrd_below_start_ok = 1;
#endif

	/* setup bootmem allocator */
	max_low_pfn = setup_memory();

	/* paging_init() sets up the MMU and marks all pages as reserved */
	paging_init();

#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
	if (!conswitchp)
		conswitchp = &dummy_con;
#endif

	*cmdline_p = cmd_line;

	printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
}

static int show_cpuinfo(struct seq_file *m, void *v)
{
	unsigned long vr;
	int version, revision;

	vr = mfspr(SPR_VR);
	version = (vr & SPR_VR_VER) >> 24;
	revision = vr & SPR_VR_REV;

	return seq_printf(m,
			  "cpu\t\t: OpenRISC-%x\n"
			  "revision\t: %d\n"
			  "frequency\t: %ld\n"
			  "dcache size\t: %d bytes\n"
			  "dcache block size\t: %d bytes\n"
			  "icache size\t: %d bytes\n"
			  "icache block size\t: %d bytes\n"
			  "immu\t\t: %d entries, %lu ways\n"
			  "dmmu\t\t: %d entries, %lu ways\n"
			  "bogomips\t: %lu.%02lu\n",
			  version,
			  revision,
			  loops_per_jiffy * HZ,
			  cpuinfo.dcache_size,
			  cpuinfo.dcache_block_size,
			  cpuinfo.icache_size,
			  cpuinfo.icache_block_size,
			  1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
			  1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW),
			  1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
			  1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW),
			  (loops_per_jiffy * HZ) / 500000,
			  ((loops_per_jiffy * HZ) / 5000) % 100);
}

static void *c_start(struct seq_file *m, loff_t * pos)
{
	/* We only have one CPU... */
	return *pos < 1 ? (void *)1 : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t * pos)
{
	++*pos;
	return NULL;
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start = c_start,
	.next = c_next,
	.stop = c_stop,
	.show = show_cpuinfo,
};
Commit	Line	Data
9d02a428 JB	1	/*
	2	* OpenRISC setup.c
	3	*
	4	* Linux architectural port borrowing liberally from similar works of
	5	* others. All original copyrights apply as per the original source
	6	* declaration.
	7	*
	8	* Modifications for the OpenRISC architecture:
	9	* Copyright (C) 2003 Matjaz Breskvar <[email protected]>
	10	* Copyright (C) 2010-2011 Jonas Bonn <[email protected]>
	11	*
	12	* This program is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License
	14	* as published by the Free Software Foundation; either version
	15	* 2 of the License, or (at your option) any later version.
	16	*
	17	* This file handles the architecture-dependent parts of initialization
	18	*/
	19
	20	#include <linux/errno.h>
	21	#include <linux/sched.h>
	22	#include <linux/kernel.h>
	23	#include <linux/mm.h>
	24	#include <linux/stddef.h>
	25	#include <linux/unistd.h>
	26	#include <linux/ptrace.h>
	27	#include <linux/slab.h>
	28	#include <linux/tty.h>
	29	#include <linux/ioport.h>
	30	#include <linux/delay.h>
	31	#include <linux/console.h>
	32	#include <linux/init.h>
	33	#include <linux/bootmem.h>
	34	#include <linux/seq_file.h>
	35	#include <linux/serial.h>
	36	#include <linux/initrd.h>
	37	#include <linux/of_fdt.h>
	38	#include <linux/of.h>
	39	#include <linux/memblock.h>
	40	#include <linux/device.h>
	41	#include <linux/of_platform.h>
	42
	43	#include <asm/segment.h>
	44	#include <asm/system.h>
	45	#include <asm/pgtable.h>
	46	#include <asm/types.h>
	47	#include <asm/setup.h>
	48	#include <asm/io.h>
	49	#include <asm/cpuinfo.h>
	50	#include <asm/delay.h>
	51
	52	#include "vmlinux.h"
	53
	54	char __initdata cmd_line[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
	55
	56	static unsigned long __init setup_memory(void)
	57	{
	58	unsigned long bootmap_size;
	59	unsigned long ram_start_pfn;
	60	unsigned long free_ram_start_pfn;
	61	unsigned long ram_end_pfn;
	62	phys_addr_t memory_start, memory_end;
	63	struct memblock_region *region;
	64
65	memory_end = memory_start = 0;
66
67	/* Find main memory where is the kernel */
68	for_each_memblock(memory, region) {
69	memory_start = region->base;
70	memory_end = region->base + region->size;
71	printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
72	memory_start, memory_end);
73	}
74
75	if (!memory_end) {
76	panic("No memory!");
77	}
78
79	ram_start_pfn = PFN_UP(memory_start);
80	/* free_ram_start_pfn is first page after kernel */
81	free_ram_start_pfn = PFN_UP(__pa(&_end));
82	ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
83
84	max_pfn = ram_end_pfn;
85
86	/*
87	* initialize the boot-time allocator (with low memory only).
88	*
89	* This makes the memory from the end of the kernel to the end of
90	* RAM usable.
91	* init_bootmem sets the global values min_low_pfn, max_low_pfn.
92	*/
93	bootmap_size = init_bootmem(free_ram_start_pfn,
94	ram_end_pfn - ram_start_pfn);
95	free_bootmem(PFN_PHYS(free_ram_start_pfn),
96	(ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
97	reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
98	BOOTMEM_DEFAULT);
99
100	for_each_memblock(reserved, region) {
101	printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
102	(u32) region->base, (u32) region->size);
103	reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
104	}
105
106	return ram_end_pfn;
107	}
108
109	struct cpuinfo cpuinfo;
110
111	static void print_cpuinfo(void)
112	{
113	unsigned long upr = mfspr(SPR_UPR);
114	unsigned long vr = mfspr(SPR_VR);
115	unsigned int version;
116	unsigned int revision;
117
118	version = (vr & SPR_VR_VER) >> 24;
119	revision = (vr & SPR_VR_REV);
120
121	printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
122	version, revision, cpuinfo.clock_frequency / 1000000);
123
124	if (!(upr & SPR_UPR_UP)) {
125	printk(KERN_INFO
126	"-- no UPR register... unable to detect configuration\n");
127	return;
128	}
129
130	if (upr & SPR_UPR_DCP)
131	printk(KERN_INFO
132	"-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
133	cpuinfo.dcache_size, cpuinfo.dcache_block_size, 1);
134	else
135	printk(KERN_INFO "-- dcache disabled\n");
136	if (upr & SPR_UPR_ICP)
137	printk(KERN_INFO
138	"-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
139	cpuinfo.icache_size, cpuinfo.icache_block_size, 1);
140	else
141	printk(KERN_INFO "-- icache disabled\n");
142
143	if (upr & SPR_UPR_DMP)
144	printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
145	1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
146	1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
147	if (upr & SPR_UPR_IMP)
148	printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
149	1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
150	1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
151
152	printk(KERN_INFO "-- additional features:\n");
153	if (upr & SPR_UPR_DUP)
154	printk(KERN_INFO "-- debug unit\n");
155	if (upr & SPR_UPR_PCUP)
156	printk(KERN_INFO "-- performance counters\n");
157	if (upr & SPR_UPR_PMP)
158	printk(KERN_INFO "-- power management\n");
159	if (upr & SPR_UPR_PICP)
160	printk(KERN_INFO "-- PIC\n");
161	if (upr & SPR_UPR_TTP)
162	printk(KERN_INFO "-- timer\n");
163	if (upr & SPR_UPR_CUP)
164	printk(KERN_INFO "-- custom unit(s)\n");
165	}
166
167	void __init setup_cpuinfo(void)
168	{
169	struct device_node *cpu;
170	unsigned long iccfgr, dccfgr;
171	unsigned long cache_set_size, cache_ways;
172
173	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
174	if (!cpu)
175	panic("No compatible CPU found in device tree...\n");
176
177	iccfgr = mfspr(SPR_ICCFGR);
178	cache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
179	cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
180	cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
181	cpuinfo.icache_size =
182	cache_set_size * cache_ways * cpuinfo.icache_block_size;
183
184	dccfgr = mfspr(SPR_DCCFGR);
185	cache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
186	cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
187	cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
188	cpuinfo.dcache_size =
189	cache_set_size * cache_ways * cpuinfo.dcache_block_size;
190
191	if (of_property_read_u32(cpu, "clock-frequency",
192	&cpuinfo.clock_frequency)) {
193	printk(KERN_WARNING
194	"Device tree missing CPU 'clock-frequency' parameter."
195	"Assuming frequency 25MHZ"
196	"This is probably not what you want.");
197	}
198
199	of_node_put(cpu);
200
201	print_cpuinfo();
202	}
203
204	/**
205	* or32_early_setup
206	*
207	* Handles the pointer to the device tree that this kernel is to use
208	* for establishing the available platform devices.
209	*
210	* For now, this is limited to using the built-in device tree. In the future,
211	* it is intended that this function will take a pointer to the device tree
212	* that is potentially built-in, but potentially also passed in by the
213	* bootloader, or discovered by some equally clever means...
214	*/
215
216	void __init or32_early_setup(void)
217	{
218
219	early_init_devtree(__dtb_start);
220
221	printk(KERN_INFO "Compiled-in FDT at 0x%p\n", __dtb_start);
222	}
223
224	static int __init openrisc_device_probe(void)
225	{
226	of_platform_populate(NULL, NULL, NULL, NULL);
227
228	return 0;
229	}
230
231	device_initcall(openrisc_device_probe);
232
233	static inline unsigned long extract_value_bits(unsigned long reg,
234	short bit_nr, short width)
235	{
236	return (reg >> bit_nr) & (0 << width);
237	}
238
239	static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
240	{
241	while (!(mask & 0x1)) {
242	reg = reg >> 1;
243	mask = mask >> 1;
244	}
245	return mask & reg;
246	}
247
248	void __init detect_unit_config(unsigned long upr, unsigned long mask,
249	char text, void (func) (void))
250	{
251	if (text != NULL)
252	printk("%s", text);
253
254	if (upr & mask) {
255	if (func != NULL)
256	func();
257	else
258	printk("present\n");
259	} else
260	printk("not present\n");
261	}
262
263	/*
264	* calibrate_delay
265	*
266	* Lightweight calibrate_delay implementation that calculates loops_per_jiffy
267	* from the clock frequency passed in via the device tree
268	*
269	*/
270
271	void __cpuinit calibrate_delay(void)
272	{
273	const int *val;
274	struct device_node *cpu = NULL;
275	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
276	val = of_get_property(cpu, "clock-frequency", NULL);
277	if (!val)
278	panic("no cpu 'clock-frequency' parameter in device tree");
279	loops_per_jiffy = *val / HZ;
280	pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
281	loops_per_jiffy / (500000 / HZ),
282	(loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
283	}
284
285	void __init setup_arch(char **cmdline_p)
286	{
287	unsigned long max_low_pfn;
288
289	unflatten_device_tree();
290
291	setup_cpuinfo();
292
293	/* process 1's initial memory region is the kernel code/data */
294	init_mm.start_code = (unsigned long)&_stext;
295	init_mm.end_code = (unsigned long)&_etext;
296	init_mm.end_data = (unsigned long)&_edata;
297	init_mm.brk = (unsigned long)&_end;
298
299	#ifdef CONFIG_BLK_DEV_INITRD
300	initrd_start = (unsigned long)&__initrd_start;
301	initrd_end = (unsigned long)&__initrd_end;
302	if (initrd_start == initrd_end) {
303	initrd_start = 0;
304	initrd_end = 0;
305	}
306	initrd_below_start_ok = 1;
307	#endif
308
309	/* setup bootmem allocator */
310	max_low_pfn = setup_memory();
311
312	/* paging_init() sets up the MMU and marks all pages as reserved */
313	paging_init();
314
315	#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
316	if (!conswitchp)
317	conswitchp = &dummy_con;
318	#endif
319
320	*cmdline_p = cmd_line;
321
322	printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
323	}
324
325	static int show_cpuinfo(struct seq_file m, void v)
326	{
327	unsigned long vr;
328	int version, revision;
329
330	vr = mfspr(SPR_VR);
331	version = (vr & SPR_VR_VER) >> 24;
332	revision = vr & SPR_VR_REV;
333
334	return seq_printf(m,
335	"cpu\t\t: OpenRISC-%x\n"
336	"revision\t: %d\n"
337	"frequency\t: %ld\n"
338	"dcache size\t: %d bytes\n"
339	"dcache block size\t: %d bytes\n"
340	"icache size\t: %d bytes\n"
341	"icache block size\t: %d bytes\n"
342	"immu\t\t: %d entries, %lu ways\n"
343	"dmmu\t\t: %d entries, %lu ways\n"
344	"bogomips\t: %lu.%02lu\n",
345	version,
346	revision,
347	loops_per_jiffy * HZ,
348	cpuinfo.dcache_size,
349	cpuinfo.dcache_block_size,
350	cpuinfo.icache_size,
351	cpuinfo.icache_block_size,
352	1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
353	1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW),
354	1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
355	1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW),
356	(loops_per_jiffy * HZ) / 500000,
357	((loops_per_jiffy * HZ) / 5000) % 100);
358	}
359
360	static void c_start(struct seq_file m, loff_t * pos)
361	{
362	/* We only have one CPU... */
363	return pos < 1 ? (void )1 : NULL;
364	}
365
366	static void c_next(struct seq_file m, void v, loff_t pos)
367	{
368	++*pos;
369	return NULL;
370	}
371
372	static void c_stop(struct seq_file m, void v)
373	{
374	}
375
376	const struct seq_operations cpuinfo_op = {
377	.start = c_start,
378	.next = c_next,
379	.stop = c_stop,
380	.show = show_cpuinfo,
381	};