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Commit | Line | Data |
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2c2e6ecf DD |
1 | /* |
2 | * cpuidle-powernv - idle state cpuidle driver. | |
3 | * Adapted from drivers/cpuidle/cpuidle-pseries | |
4 | * | |
5 | */ | |
6 | ||
7 | #include <linux/kernel.h> | |
8 | #include <linux/module.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/moduleparam.h> | |
11 | #include <linux/cpuidle.h> | |
12 | #include <linux/cpu.h> | |
13 | #include <linux/notifier.h> | |
0d948730 | 14 | #include <linux/clockchips.h> |
0888839c | 15 | #include <linux/of.h> |
92c83ff5 | 16 | #include <linux/slab.h> |
2c2e6ecf DD |
17 | |
18 | #include <asm/machdep.h> | |
19 | #include <asm/firmware.h> | |
8eb8ac89 | 20 | #include <asm/opal.h> |
591ac0cb | 21 | #include <asm/runlatch.h> |
09206b60 | 22 | #include <asm/cpuidle.h> |
2c2e6ecf | 23 | |
9e9fc6f0 GS |
24 | /* |
25 | * Expose only those Hardware idle states via the cpuidle framework | |
26 | * that have latency value below POWERNV_THRESHOLD_LATENCY_NS. | |
27 | */ | |
3005c597 SP |
28 | #define POWERNV_THRESHOLD_LATENCY_NS 200000 |
29 | ||
ed61390b | 30 | static struct cpuidle_driver powernv_idle_driver = { |
2c2e6ecf DD |
31 | .name = "powernv_idle", |
32 | .owner = THIS_MODULE, | |
33 | }; | |
34 | ||
624e46d0 NP |
35 | static int max_idle_state __read_mostly; |
36 | static struct cpuidle_state *cpuidle_state_table __read_mostly; | |
3005c597 | 37 | |
09206b60 GS |
38 | struct stop_psscr_table { |
39 | u64 val; | |
40 | u64 mask; | |
41 | }; | |
42 | ||
624e46d0 | 43 | static struct stop_psscr_table stop_psscr_table[CPUIDLE_STATE_MAX] __read_mostly; |
3005c597 | 44 | |
624e46d0 NP |
45 | static u64 snooze_timeout __read_mostly; |
46 | static bool snooze_timeout_en __read_mostly; | |
2c2e6ecf DD |
47 | |
48 | static int snooze_loop(struct cpuidle_device *dev, | |
49 | struct cpuidle_driver *drv, | |
50 | int index) | |
51 | { | |
78eaa10f SB |
52 | u64 snooze_exit_time; |
53 | ||
2c2e6ecf DD |
54 | set_thread_flag(TIF_POLLING_NRFLAG); |
55 | ||
3fc5ee92 NP |
56 | local_irq_enable(); |
57 | ||
78eaa10f | 58 | snooze_exit_time = get_tb() + snooze_timeout; |
591ac0cb | 59 | ppc64_runlatch_off(); |
26eb48a9 | 60 | HMT_very_low(); |
2c2e6ecf | 61 | while (!need_resched()) { |
7ded4291 NP |
62 | if (likely(snooze_timeout_en) && get_tb() > snooze_exit_time) { |
63 | /* | |
64 | * Task has not woken up but we are exiting the polling | |
65 | * loop anyway. Require a barrier after polling is | |
66 | * cleared to order subsequent test of need_resched(). | |
67 | */ | |
68 | clear_thread_flag(TIF_POLLING_NRFLAG); | |
69 | smp_mb(); | |
78eaa10f | 70 | break; |
7ded4291 | 71 | } |
2c2e6ecf DD |
72 | } |
73 | ||
74 | HMT_medium(); | |
591ac0cb | 75 | ppc64_runlatch_on(); |
2c2e6ecf | 76 | clear_thread_flag(TIF_POLLING_NRFLAG); |
3fc5ee92 | 77 | |
2c2e6ecf DD |
78 | return index; |
79 | } | |
80 | ||
81 | static int nap_loop(struct cpuidle_device *dev, | |
82 | struct cpuidle_driver *drv, | |
83 | int index) | |
84 | { | |
2201f994 NP |
85 | power7_idle_type(PNV_THREAD_NAP); |
86 | ||
2c2e6ecf DD |
87 | return index; |
88 | } | |
89 | ||
cc5a2f7b | 90 | /* Register for fastsleep only in oneshot mode of broadcast */ |
91 | #ifdef CONFIG_TICK_ONESHOT | |
0d948730 PM |
92 | static int fastsleep_loop(struct cpuidle_device *dev, |
93 | struct cpuidle_driver *drv, | |
94 | int index) | |
95 | { | |
96 | unsigned long old_lpcr = mfspr(SPRN_LPCR); | |
97 | unsigned long new_lpcr; | |
98 | ||
99 | if (unlikely(system_state < SYSTEM_RUNNING)) | |
100 | return index; | |
101 | ||
102 | new_lpcr = old_lpcr; | |
9b6a68d9 MN |
103 | /* Do not exit powersave upon decrementer as we've setup the timer |
104 | * offload. | |
0d948730 | 105 | */ |
9b6a68d9 | 106 | new_lpcr &= ~LPCR_PECE1; |
0d948730 PM |
107 | |
108 | mtspr(SPRN_LPCR, new_lpcr); | |
2201f994 NP |
109 | |
110 | power7_idle_type(PNV_THREAD_SLEEP); | |
0d948730 PM |
111 | |
112 | mtspr(SPRN_LPCR, old_lpcr); | |
113 | ||
114 | return index; | |
115 | } | |
cc5a2f7b | 116 | #endif |
3005c597 SP |
117 | |
118 | static int stop_loop(struct cpuidle_device *dev, | |
119 | struct cpuidle_driver *drv, | |
120 | int index) | |
121 | { | |
2201f994 | 122 | power9_idle_type(stop_psscr_table[index].val, |
09206b60 | 123 | stop_psscr_table[index].mask); |
3005c597 SP |
124 | return index; |
125 | } | |
126 | ||
2c2e6ecf DD |
127 | /* |
128 | * States for dedicated partition case. | |
129 | */ | |
169f3fae | 130 | static struct cpuidle_state powernv_states[CPUIDLE_STATE_MAX] = { |
2c2e6ecf DD |
131 | { /* Snooze */ |
132 | .name = "snooze", | |
133 | .desc = "snooze", | |
2c2e6ecf DD |
134 | .exit_latency = 0, |
135 | .target_residency = 0, | |
957efced | 136 | .enter = snooze_loop }, |
2c2e6ecf DD |
137 | }; |
138 | ||
10fcca9d | 139 | static int powernv_cpuidle_cpu_online(unsigned int cpu) |
2c2e6ecf | 140 | { |
10fcca9d | 141 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); |
2c2e6ecf DD |
142 | |
143 | if (dev && cpuidle_get_driver()) { | |
10fcca9d SAS |
144 | cpuidle_pause_and_lock(); |
145 | cpuidle_enable_device(dev); | |
146 | cpuidle_resume_and_unlock(); | |
147 | } | |
148 | return 0; | |
149 | } | |
2c2e6ecf | 150 | |
10fcca9d SAS |
151 | static int powernv_cpuidle_cpu_dead(unsigned int cpu) |
152 | { | |
153 | struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu); | |
2c2e6ecf | 154 | |
10fcca9d SAS |
155 | if (dev && cpuidle_get_driver()) { |
156 | cpuidle_pause_and_lock(); | |
157 | cpuidle_disable_device(dev); | |
158 | cpuidle_resume_and_unlock(); | |
2c2e6ecf | 159 | } |
10fcca9d | 160 | return 0; |
2c2e6ecf DD |
161 | } |
162 | ||
2c2e6ecf DD |
163 | /* |
164 | * powernv_cpuidle_driver_init() | |
165 | */ | |
166 | static int powernv_cpuidle_driver_init(void) | |
167 | { | |
168 | int idle_state; | |
169 | struct cpuidle_driver *drv = &powernv_idle_driver; | |
170 | ||
171 | drv->state_count = 0; | |
172 | ||
173 | for (idle_state = 0; idle_state < max_idle_state; ++idle_state) { | |
174 | /* Is the state not enabled? */ | |
175 | if (cpuidle_state_table[idle_state].enter == NULL) | |
176 | continue; | |
177 | ||
178 | drv->states[drv->state_count] = /* structure copy */ | |
179 | cpuidle_state_table[idle_state]; | |
180 | ||
181 | drv->state_count += 1; | |
182 | } | |
183 | ||
293d264f VS |
184 | /* |
185 | * On the PowerNV platform cpu_present may be less than cpu_possible in | |
186 | * cases when firmware detects the CPU, but it is not available to the | |
187 | * OS. If CONFIG_HOTPLUG_CPU=n, then such CPUs are not hotplugable at | |
188 | * run time and hence cpu_devices are not created for those CPUs by the | |
189 | * generic topology_init(). | |
190 | * | |
191 | * drv->cpumask defaults to cpu_possible_mask in | |
192 | * __cpuidle_driver_init(). This breaks cpuidle on PowerNV where | |
193 | * cpu_devices are not created for CPUs in cpu_possible_mask that | |
194 | * cannot be hot-added later at run time. | |
195 | * | |
196 | * Trying cpuidle_register_device() on a CPU without a cpu_device is | |
197 | * incorrect, so pass a correct CPU mask to the generic cpuidle driver. | |
198 | */ | |
199 | ||
200 | drv->cpumask = (struct cpumask *)cpu_present_mask; | |
201 | ||
2c2e6ecf DD |
202 | return 0; |
203 | } | |
204 | ||
9e9fc6f0 GS |
205 | static inline void add_powernv_state(int index, const char *name, |
206 | unsigned int flags, | |
207 | int (*idle_fn)(struct cpuidle_device *, | |
208 | struct cpuidle_driver *, | |
209 | int), | |
210 | unsigned int target_residency, | |
211 | unsigned int exit_latency, | |
09206b60 | 212 | u64 psscr_val, u64 psscr_mask) |
9e9fc6f0 GS |
213 | { |
214 | strlcpy(powernv_states[index].name, name, CPUIDLE_NAME_LEN); | |
215 | strlcpy(powernv_states[index].desc, name, CPUIDLE_NAME_LEN); | |
216 | powernv_states[index].flags = flags; | |
217 | powernv_states[index].target_residency = target_residency; | |
218 | powernv_states[index].exit_latency = exit_latency; | |
219 | powernv_states[index].enter = idle_fn; | |
09206b60 GS |
220 | stop_psscr_table[index].val = psscr_val; |
221 | stop_psscr_table[index].mask = psscr_mask; | |
9e9fc6f0 GS |
222 | } |
223 | ||
ecad4502 GS |
224 | /* |
225 | * Returns 0 if prop1_len == prop2_len. Else returns -1 | |
226 | */ | |
227 | static inline int validate_dt_prop_sizes(const char *prop1, int prop1_len, | |
228 | const char *prop2, int prop2_len) | |
229 | { | |
230 | if (prop1_len == prop2_len) | |
231 | return 0; | |
232 | ||
233 | pr_warn("cpuidle-powernv: array sizes don't match for %s and %s\n", | |
234 | prop1, prop2); | |
235 | return -1; | |
236 | } | |
237 | ||
0888839c PM |
238 | static int powernv_add_idle_states(void) |
239 | { | |
240 | struct device_node *power_mgt; | |
0888839c | 241 | int nr_idle_states = 1; /* Snooze */ |
ecad4502 | 242 | int dt_idle_states, count; |
957efced SP |
243 | u32 latency_ns[CPUIDLE_STATE_MAX]; |
244 | u32 residency_ns[CPUIDLE_STATE_MAX]; | |
245 | u32 flags[CPUIDLE_STATE_MAX]; | |
3005c597 | 246 | u64 psscr_val[CPUIDLE_STATE_MAX]; |
09206b60 | 247 | u64 psscr_mask[CPUIDLE_STATE_MAX]; |
3005c597 | 248 | const char *names[CPUIDLE_STATE_MAX]; |
09206b60 | 249 | u32 has_stop_states = 0; |
92c83ff5 | 250 | int i, rc; |
0888839c PM |
251 | |
252 | /* Currently we have snooze statically defined */ | |
253 | ||
254 | power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); | |
255 | if (!power_mgt) { | |
256 | pr_warn("opal: PowerMgmt Node not found\n"); | |
92c83ff5 | 257 | goto out; |
0888839c PM |
258 | } |
259 | ||
70734a78 PM |
260 | /* Read values of any property to determine the num of idle states */ |
261 | dt_idle_states = of_property_count_u32_elems(power_mgt, "ibm,cpu-idle-state-flags"); | |
262 | if (dt_idle_states < 0) { | |
263 | pr_warn("cpuidle-powernv: no idle states found in the DT\n"); | |
92c83ff5 | 264 | goto out; |
0888839c PM |
265 | } |
266 | ||
ecad4502 GS |
267 | count = of_property_count_u32_elems(power_mgt, |
268 | "ibm,cpu-idle-state-latencies-ns"); | |
269 | ||
270 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states, | |
271 | "ibm,cpu-idle-state-latencies-ns", | |
272 | count) != 0) | |
273 | goto out; | |
274 | ||
275 | count = of_property_count_strings(power_mgt, | |
276 | "ibm,cpu-idle-state-names"); | |
277 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states, | |
278 | "ibm,cpu-idle-state-names", | |
279 | count) != 0) | |
280 | goto out; | |
281 | ||
957efced SP |
282 | /* |
283 | * Since snooze is used as first idle state, max idle states allowed is | |
284 | * CPUIDLE_STATE_MAX -1 | |
285 | */ | |
286 | if (dt_idle_states > CPUIDLE_STATE_MAX - 1) { | |
287 | pr_warn("cpuidle-powernv: discovered idle states more than allowed"); | |
288 | dt_idle_states = CPUIDLE_STATE_MAX - 1; | |
289 | } | |
290 | ||
70734a78 PM |
291 | if (of_property_read_u32_array(power_mgt, |
292 | "ibm,cpu-idle-state-flags", flags, dt_idle_states)) { | |
293 | pr_warn("cpuidle-powernv : missing ibm,cpu-idle-state-flags in DT\n"); | |
957efced | 294 | goto out; |
70734a78 | 295 | } |
92c83ff5 | 296 | |
957efced SP |
297 | if (of_property_read_u32_array(power_mgt, |
298 | "ibm,cpu-idle-state-latencies-ns", latency_ns, | |
299 | dt_idle_states)) { | |
92c83ff5 | 300 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-latencies-ns in DT\n"); |
957efced | 301 | goto out; |
74aa51b5 | 302 | } |
3005c597 SP |
303 | if (of_property_read_string_array(power_mgt, |
304 | "ibm,cpu-idle-state-names", names, dt_idle_states) < 0) { | |
305 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-names in DT\n"); | |
306 | goto out; | |
307 | } | |
308 | ||
309 | /* | |
310 | * If the idle states use stop instruction, probe for psscr values | |
09206b60 | 311 | * and psscr mask which are necessary to specify required stop level. |
3005c597 | 312 | */ |
09206b60 GS |
313 | has_stop_states = (flags[0] & |
314 | (OPAL_PM_STOP_INST_FAST | OPAL_PM_STOP_INST_DEEP)); | |
315 | if (has_stop_states) { | |
ecad4502 GS |
316 | count = of_property_count_u64_elems(power_mgt, |
317 | "ibm,cpu-idle-state-psscr"); | |
318 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
319 | dt_idle_states, | |
320 | "ibm,cpu-idle-state-psscr", | |
321 | count) != 0) | |
322 | goto out; | |
323 | ||
324 | count = of_property_count_u64_elems(power_mgt, | |
325 | "ibm,cpu-idle-state-psscr-mask"); | |
326 | if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
327 | dt_idle_states, | |
328 | "ibm,cpu-idle-state-psscr-mask", | |
329 | count) != 0) | |
330 | goto out; | |
331 | ||
3005c597 SP |
332 | if (of_property_read_u64_array(power_mgt, |
333 | "ibm,cpu-idle-state-psscr", psscr_val, dt_idle_states)) { | |
09206b60 | 334 | pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-psscr in DT\n"); |
3005c597 SP |
335 | goto out; |
336 | } | |
74aa51b5 | 337 | |
09206b60 GS |
338 | if (of_property_read_u64_array(power_mgt, |
339 | "ibm,cpu-idle-state-psscr-mask", | |
340 | psscr_mask, dt_idle_states)) { | |
341 | pr_warn("cpuidle-powernv:Missing ibm,cpu-idle-state-psscr-mask in DT\n"); | |
342 | goto out; | |
343 | } | |
344 | } | |
345 | ||
ecad4502 GS |
346 | count = of_property_count_u32_elems(power_mgt, |
347 | "ibm,cpu-idle-state-residency-ns"); | |
348 | ||
349 | if (count < 0) { | |
350 | rc = count; | |
351 | } else if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", | |
352 | dt_idle_states, | |
353 | "ibm,cpu-idle-state-residency-ns", | |
354 | count) != 0) { | |
355 | goto out; | |
356 | } else { | |
357 | rc = of_property_read_u32_array(power_mgt, | |
358 | "ibm,cpu-idle-state-residency-ns", | |
359 | residency_ns, dt_idle_states); | |
360 | } | |
0888839c PM |
361 | |
362 | for (i = 0; i < dt_idle_states; i++) { | |
9e9fc6f0 | 363 | unsigned int exit_latency, target_residency; |
f9122ee4 | 364 | bool stops_timebase = false; |
3005c597 SP |
365 | /* |
366 | * If an idle state has exit latency beyond | |
367 | * POWERNV_THRESHOLD_LATENCY_NS then don't use it | |
368 | * in cpu-idle. | |
369 | */ | |
370 | if (latency_ns[i] > POWERNV_THRESHOLD_LATENCY_NS) | |
371 | continue; | |
9e9fc6f0 GS |
372 | /* |
373 | * Firmware passes residency and latency values in ns. | |
374 | * cpuidle expects it in us. | |
375 | */ | |
376 | exit_latency = latency_ns[i] / 1000; | |
377 | if (!rc) | |
378 | target_residency = residency_ns[i] / 1000; | |
379 | else | |
380 | target_residency = 0; | |
0888839c | 381 | |
09206b60 GS |
382 | if (has_stop_states) { |
383 | int err = validate_psscr_val_mask(&psscr_val[i], | |
384 | &psscr_mask[i], | |
385 | flags[i]); | |
386 | if (err) { | |
387 | report_invalid_psscr_val(psscr_val[i], err); | |
388 | continue; | |
389 | } | |
390 | } | |
391 | ||
f9122ee4 GS |
392 | if (flags[i] & OPAL_PM_TIMEBASE_STOP) |
393 | stops_timebase = true; | |
394 | ||
92c83ff5 | 395 | /* |
9e9fc6f0 GS |
396 | * For nap and fastsleep, use default target_residency |
397 | * values if f/w does not expose it. | |
74aa51b5 | 398 | */ |
70734a78 | 399 | if (flags[i] & OPAL_PM_NAP_ENABLED) { |
9e9fc6f0 GS |
400 | if (!rc) |
401 | target_residency = 100; | |
0888839c | 402 | /* Add NAP state */ |
9e9fc6f0 GS |
403 | add_powernv_state(nr_idle_states, "Nap", |
404 | CPUIDLE_FLAG_NONE, nap_loop, | |
09206b60 | 405 | target_residency, exit_latency, 0, 0); |
f9122ee4 | 406 | } else if (has_stop_states && !stops_timebase) { |
9e9fc6f0 GS |
407 | add_powernv_state(nr_idle_states, names[i], |
408 | CPUIDLE_FLAG_NONE, stop_loop, | |
409 | target_residency, exit_latency, | |
09206b60 | 410 | psscr_val[i], psscr_mask[i]); |
cc5a2f7b | 411 | } |
412 | ||
413 | /* | |
414 | * All cpuidle states with CPUIDLE_FLAG_TIMER_STOP set must come | |
415 | * within this config dependency check. | |
416 | */ | |
417 | #ifdef CONFIG_TICK_ONESHOT | |
f9122ee4 GS |
418 | else if (flags[i] & OPAL_PM_SLEEP_ENABLED || |
419 | flags[i] & OPAL_PM_SLEEP_ENABLED_ER1) { | |
9e9fc6f0 GS |
420 | if (!rc) |
421 | target_residency = 300000; | |
0888839c | 422 | /* Add FASTSLEEP state */ |
9e9fc6f0 GS |
423 | add_powernv_state(nr_idle_states, "FastSleep", |
424 | CPUIDLE_FLAG_TIMER_STOP, | |
425 | fastsleep_loop, | |
09206b60 | 426 | target_residency, exit_latency, 0, 0); |
f9122ee4 | 427 | } else if (has_stop_states && stops_timebase) { |
9e9fc6f0 GS |
428 | add_powernv_state(nr_idle_states, names[i], |
429 | CPUIDLE_FLAG_TIMER_STOP, stop_loop, | |
430 | target_residency, exit_latency, | |
09206b60 | 431 | psscr_val[i], psscr_mask[i]); |
0888839c | 432 | } |
cc5a2f7b | 433 | #endif |
f9122ee4 GS |
434 | else |
435 | continue; | |
92c83ff5 | 436 | nr_idle_states++; |
0888839c | 437 | } |
92c83ff5 | 438 | out: |
0888839c PM |
439 | return nr_idle_states; |
440 | } | |
441 | ||
2c2e6ecf DD |
442 | /* |
443 | * powernv_idle_probe() | |
444 | * Choose state table for shared versus dedicated partition | |
445 | */ | |
446 | static int powernv_idle_probe(void) | |
447 | { | |
2c2e6ecf DD |
448 | if (cpuidle_disable != IDLE_NO_OVERRIDE) |
449 | return -ENODEV; | |
450 | ||
e4d54f71 | 451 | if (firmware_has_feature(FW_FEATURE_OPAL)) { |
2c2e6ecf | 452 | cpuidle_state_table = powernv_states; |
0888839c PM |
453 | /* Device tree can indicate more idle states */ |
454 | max_idle_state = powernv_add_idle_states(); | |
78eaa10f SB |
455 | if (max_idle_state > 1) { |
456 | snooze_timeout_en = true; | |
457 | snooze_timeout = powernv_states[1].target_residency * | |
458 | tb_ticks_per_usec; | |
459 | } | |
2c2e6ecf DD |
460 | } else |
461 | return -ENODEV; | |
462 | ||
463 | return 0; | |
464 | } | |
465 | ||
466 | static int __init powernv_processor_idle_init(void) | |
467 | { | |
468 | int retval; | |
469 | ||
470 | retval = powernv_idle_probe(); | |
471 | if (retval) | |
472 | return retval; | |
473 | ||
474 | powernv_cpuidle_driver_init(); | |
475 | retval = cpuidle_register(&powernv_idle_driver, NULL); | |
476 | if (retval) { | |
477 | printk(KERN_DEBUG "Registration of powernv driver failed.\n"); | |
478 | return retval; | |
479 | } | |
480 | ||
10fcca9d SAS |
481 | retval = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, |
482 | "cpuidle/powernv:online", | |
483 | powernv_cpuidle_cpu_online, NULL); | |
484 | WARN_ON(retval < 0); | |
485 | retval = cpuhp_setup_state_nocalls(CPUHP_CPUIDLE_DEAD, | |
486 | "cpuidle/powernv:dead", NULL, | |
487 | powernv_cpuidle_cpu_dead); | |
488 | WARN_ON(retval < 0); | |
2c2e6ecf DD |
489 | printk(KERN_DEBUG "powernv_idle_driver registered\n"); |
490 | return 0; | |
491 | } | |
492 | ||
493 | device_initcall(powernv_processor_idle_init); |