[linux.git] / drivers / thermal / rcar_gen3_thermal.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  R-Car Gen3 THS thermal sensor driver
 *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
 *
 * Copyright (C) 2016 Renesas Electronics Corporation.
 * Copyright (C) 2016 Sang Engineering
 */
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/thermal.h>

#include "thermal_hwmon.h"

/* Register offsets */
#define REG_GEN3_IRQSTR		0x04
#define REG_GEN3_IRQMSK		0x08
#define REG_GEN3_IRQCTL		0x0C
#define REG_GEN3_IRQEN		0x10
#define REG_GEN3_IRQTEMP1	0x14
#define REG_GEN3_IRQTEMP2	0x18
#define REG_GEN3_IRQTEMP3	0x1C
#define REG_GEN3_THCTR		0x20
#define REG_GEN3_TEMP		0x28
#define REG_GEN3_THCODE1	0x50
#define REG_GEN3_THCODE2	0x54
#define REG_GEN3_THCODE3	0x58
#define REG_GEN3_PTAT1		0x5c
#define REG_GEN3_PTAT2		0x60
#define REG_GEN3_PTAT3		0x64
#define REG_GEN3_THSCP		0x68
#define REG_GEN4_THSFMON00	0x180
#define REG_GEN4_THSFMON01	0x184
#define REG_GEN4_THSFMON02	0x188
#define REG_GEN4_THSFMON15	0x1BC
#define REG_GEN4_THSFMON16	0x1C0
#define REG_GEN4_THSFMON17	0x1C4

/* IRQ{STR,MSK,EN} bits */
#define IRQ_TEMP1		BIT(0)
#define IRQ_TEMP2		BIT(1)
#define IRQ_TEMP3		BIT(2)
#define IRQ_TEMPD1		BIT(3)
#define IRQ_TEMPD2		BIT(4)
#define IRQ_TEMPD3		BIT(5)

/* THCTR bits */
#define THCTR_PONM	BIT(6)
#define THCTR_THSST	BIT(0)

/* THSCP bits */
#define THSCP_COR_PARA_VLD	(BIT(15) | BIT(14))

#define CTEMP_MASK	0xFFF

#define MCELSIUS(temp)	((temp) * 1000)
#define GEN3_FUSE_MASK	0xFFF
#define GEN4_FUSE_MASK	0xFFF

#define TSC_MAX_NUM	5

/* Structure for thermal temperature calculation */
struct equation_coefs {
	int a1;
	int b1;
	int a2;
	int b2;
};

struct rcar_gen3_thermal_priv;

struct rcar_thermal_info {
	int ths_tj_1;
	void (*read_fuses)(struct rcar_gen3_thermal_priv *priv);
};

struct rcar_gen3_thermal_tsc {
	void __iomem *base;
	struct thermal_zone_device *zone;
	struct equation_coefs coef;
	int tj_t;
	int thcode[3];
};

struct rcar_gen3_thermal_priv {
	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
	struct thermal_zone_device_ops ops;
	unsigned int num_tscs;
	int ptat[3];
	const struct rcar_thermal_info *info;
};

static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
					 u32 reg)
{
	return ioread32(tsc->base + reg);
}

static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
					   u32 reg, u32 data)
{
	iowrite32(data, tsc->base + reg);
}

/*
 * Linear approximation for temperature
 *
 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
 *
 * The constants a and b are calculated using two triplets of int values PTAT
 * and THCODE. PTAT and THCODE can either be read from hardware or use hard
 * coded values from driver. The formula to calculate a and b are taken from
 * BSP and sparsely documented and understood.
 *
 * Examining the linear formula and the formula used to calculate constants a
 * and b while knowing that the span for PTAT and THCODE values are between
 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
 * Integer also needs to be signed so that leaves 7 bits for binary
 * fixed point scaling.
 */

#define FIXPT_SHIFT 7
#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)

#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */

/* no idea where these constants come from */
#define TJ_3 -41

static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_priv *priv,
					 struct rcar_gen3_thermal_tsc *tsc,
					 int ths_tj_1)
{
	/* TODO: Find documentation and document constant calculation formula */

	/*
	 * Division is not scaled in BSP and if scaled it might overflow
	 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	 */
	tsc->tj_t = (FIXPT_INT((priv->ptat[1] - priv->ptat[2]) * (ths_tj_1 - TJ_3))
		     / (priv->ptat[0] - priv->ptat[2])) + FIXPT_INT(TJ_3);

	tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[2]),
				 tsc->tj_t - FIXPT_INT(TJ_3));
	tsc->coef.b1 = FIXPT_INT(tsc->thcode[2]) - tsc->coef.a1 * TJ_3;

	tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[0]),
				 tsc->tj_t - FIXPT_INT(ths_tj_1));
	tsc->coef.b2 = FIXPT_INT(tsc->thcode[0]) - tsc->coef.a2 * ths_tj_1;
}

static int rcar_gen3_thermal_round(int temp)
{
	int result, round_offs;

	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
		-RCAR3_THERMAL_GRAN / 2;
	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	return result * RCAR3_THERMAL_GRAN;
}

static int rcar_gen3_thermal_get_temp(struct thermal_zone_device *tz, int *temp)
{
	struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tz);
	int mcelsius, val;
	int reg;

	/* Read register and convert to mili Celsius */
	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;

	if (reg <= tsc->thcode[1])
		val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
				tsc->coef.a1);
	else
		val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
				tsc->coef.a2);
	mcelsius = FIXPT_TO_MCELSIUS(val);

	/* Guaranteed operating range is -40C to 125C. */

	/* Round value to device granularity setting */
	*temp = rcar_gen3_thermal_round(mcelsius);

	return 0;
}

static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
					      int mcelsius)
{
	int celsius, val;

	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	if (celsius <= INT_FIXPT(tsc->tj_t))
		val = celsius * tsc->coef.a1 + tsc->coef.b1;
	else
		val = celsius * tsc->coef.a2 + tsc->coef.b2;

	return INT_FIXPT(val);
}

static int rcar_gen3_thermal_set_trips(struct thermal_zone_device *tz, int low, int high)
{
	struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tz);
	u32 irqmsk = 0;

	if (low != -INT_MAX) {
		irqmsk |= IRQ_TEMPD1;
		rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
					rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
	}

	if (high != INT_MAX) {
		irqmsk |= IRQ_TEMP2;
		rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
					rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
	}

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, irqmsk);

	return 0;
}

static const struct thermal_zone_device_ops rcar_gen3_tz_of_ops = {
	.get_temp	= rcar_gen3_thermal_get_temp,
	.set_trips	= rcar_gen3_thermal_set_trips,
};

static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
{
	struct rcar_gen3_thermal_priv *priv = data;
	unsigned int i;
	u32 status;

	for (i = 0; i < priv->num_tscs; i++) {
		status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
		if (status && priv->tscs[i]->zone)
			thermal_zone_device_update(priv->tscs[i]->zone,
						   THERMAL_EVENT_UNSPECIFIED);
	}

	return IRQ_HANDLED;
}

static void rcar_gen3_thermal_read_fuses_gen3(struct rcar_gen3_thermal_priv *priv)
{
	unsigned int i;

	/*
	 * Set the pseudo calibration points with fused values.
	 * PTAT is shared between all TSCs but only fused for the first
	 * TSC while THCODEs are fused for each TSC.
	 */
	priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT1) &
		GEN3_FUSE_MASK;
	priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT2) &
		GEN3_FUSE_MASK;
	priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT3) &
		GEN3_FUSE_MASK;

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) &
			GEN3_FUSE_MASK;
		tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) &
			GEN3_FUSE_MASK;
		tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) &
			GEN3_FUSE_MASK;
	}
}

static void rcar_gen3_thermal_read_fuses_gen4(struct rcar_gen3_thermal_priv *priv)
{
	unsigned int i;

	/*
	 * Set the pseudo calibration points with fused values.
	 * PTAT is shared between all TSCs but only fused for the first
	 * TSC while THCODEs are fused for each TSC.
	 */
	priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON16) &
		GEN4_FUSE_MASK;
	priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON17) &
		GEN4_FUSE_MASK;
	priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON15) &
		GEN4_FUSE_MASK;

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON01) &
			GEN4_FUSE_MASK;
		tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON02) &
			GEN4_FUSE_MASK;
		tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON00) &
			GEN4_FUSE_MASK;
	}
}

static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
{
	unsigned int i;
	u32 thscp;

	/* If fuses are not set, fallback to pseudo values. */
	thscp = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_THSCP);
	if (!priv->info->read_fuses ||
	    (thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) {
		/* Default THCODE values in case FUSEs are not set. */
		static const int thcodes[TSC_MAX_NUM][3] = {
			{ 3397, 2800, 2221 },
			{ 3393, 2795, 2216 },
			{ 3389, 2805, 2237 },
			{ 3415, 2694, 2195 },
			{ 3356, 2724, 2244 },
		};

		priv->ptat[0] = 2631;
		priv->ptat[1] = 1509;
		priv->ptat[2] = 435;

		for (i = 0; i < priv->num_tscs; i++) {
			struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

			tsc->thcode[0] = thcodes[i][0];
			tsc->thcode[1] = thcodes[i][1];
			tsc->thcode[2] = thcodes[i][2];
		}

		return false;
	}

	priv->info->read_fuses(priv);
	return true;
}

static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv,
				   struct rcar_gen3_thermal_tsc *tsc)
{
	u32 reg_val;

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val &= ~THCTR_PONM;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	if (priv->ops.set_trips)
		rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
					IRQ_TEMPD1 | IRQ_TEMP2);

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val |= THCTR_THSST;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);
}

static const struct rcar_thermal_info rcar_m3w_thermal_info = {
	.ths_tj_1 = 116,
	.read_fuses = rcar_gen3_thermal_read_fuses_gen3,
};

static const struct rcar_thermal_info rcar_gen3_thermal_info = {
	.ths_tj_1 = 126,
	.read_fuses = rcar_gen3_thermal_read_fuses_gen3,
};

static const struct rcar_thermal_info rcar_gen4_thermal_info = {
	.ths_tj_1 = 126,
	.read_fuses = rcar_gen3_thermal_read_fuses_gen4,
};

static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
	{
		.compatible = "renesas,r8a774a1-thermal",
		.data = &rcar_m3w_thermal_info,
	},
	{
		.compatible = "renesas,r8a774b1-thermal",
		.data = &rcar_gen3_thermal_info,
	},
	{
		.compatible = "renesas,r8a774e1-thermal",
		.data = &rcar_gen3_thermal_info,
	},
	{
		.compatible = "renesas,r8a7795-thermal",
		.data = &rcar_gen3_thermal_info,
	},
	{
		.compatible = "renesas,r8a7796-thermal",
		.data = &rcar_m3w_thermal_info,
	},
	{
		.compatible = "renesas,r8a77961-thermal",
		.data = &rcar_m3w_thermal_info,
	},
	{
		.compatible = "renesas,r8a77965-thermal",
		.data = &rcar_gen3_thermal_info,
	},
	{
		.compatible = "renesas,r8a77980-thermal",
		.data = &rcar_gen3_thermal_info,
	},
	{
		.compatible = "renesas,r8a779a0-thermal",
		.data = &rcar_gen3_thermal_info,
	},
	{
		.compatible = "renesas,r8a779f0-thermal",
		.data = &rcar_gen4_thermal_info,
	},
	{
		.compatible = "renesas,r8a779g0-thermal",
		.data = &rcar_gen4_thermal_info,
	},
	{},
};
MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);

static void rcar_gen3_thermal_remove(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;

	pm_runtime_put(dev);
	pm_runtime_disable(dev);
}

static void rcar_gen3_hwmon_action(void *data)
{
	struct thermal_zone_device *zone = data;

	thermal_remove_hwmon_sysfs(zone);
}

static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv,
					  struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	unsigned int i;
	char *irqname;
	int ret, irq;

	for (i = 0; i < 2; i++) {
		irq = platform_get_irq_optional(pdev, i);
		if (irq < 0)
			return irq;

		irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
					 dev_name(dev), i);
		if (!irqname)
			return -ENOMEM;

		ret = devm_request_threaded_irq(dev, irq, NULL,
						rcar_gen3_thermal_irq,
						IRQF_ONESHOT, irqname, priv);
		if (ret)
			return ret;
	}

	return 0;
}

static int rcar_gen3_thermal_probe(struct platform_device *pdev)
{
	struct rcar_gen3_thermal_priv *priv;
	struct device *dev = &pdev->dev;
	struct resource *res;
	struct thermal_zone_device *zone;
	unsigned int i;
	int ret;

	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->ops = rcar_gen3_tz_of_ops;

	priv->info = of_device_get_match_data(dev);
	platform_set_drvdata(pdev, priv);

	if (rcar_gen3_thermal_request_irqs(priv, pdev))
		priv->ops.set_trips = NULL;

	pm_runtime_enable(dev);
	pm_runtime_get_sync(dev);

	for (i = 0; i < TSC_MAX_NUM; i++) {
		struct rcar_gen3_thermal_tsc *tsc;

		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
		if (!res)
			break;

		tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
		if (!tsc) {
			ret = -ENOMEM;
			goto error_unregister;
		}

		tsc->base = devm_ioremap_resource(dev, res);
		if (IS_ERR(tsc->base)) {
			ret = PTR_ERR(tsc->base);
			goto error_unregister;
		}

		priv->tscs[i] = tsc;
	}

	priv->num_tscs = i;

	if (!rcar_gen3_thermal_read_fuses(priv))
		dev_info(dev, "No calibration values fused, fallback to driver values\n");

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		rcar_gen3_thermal_init(priv, tsc);
		rcar_gen3_thermal_calc_coefs(priv, tsc, priv->info->ths_tj_1);

		zone = devm_thermal_of_zone_register(dev, i, tsc, &priv->ops);
		if (IS_ERR(zone)) {
			dev_err(dev, "Sensor %u: Can't register thermal zone\n", i);
			ret = PTR_ERR(zone);
			goto error_unregister;
		}
		tsc->zone = zone;

		ret = thermal_add_hwmon_sysfs(tsc->zone);
		if (ret)
			goto error_unregister;

		ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
		if (ret)
			goto error_unregister;

		ret = thermal_zone_get_num_trips(tsc->zone);
		if (ret < 0)
			goto error_unregister;

		dev_info(dev, "Sensor %u: Loaded %d trip points\n", i, ret);
	}

	if (!priv->num_tscs) {
		ret = -ENODEV;
		goto error_unregister;
	}

	return 0;

error_unregister:
	rcar_gen3_thermal_remove(pdev);

	return ret;
}

static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
{
	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	unsigned int i;

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		rcar_gen3_thermal_init(priv, tsc);
	}

	return 0;
}

static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
			 rcar_gen3_thermal_resume);

static struct platform_driver rcar_gen3_thermal_driver = {
	.driver	= {
		.name	= "rcar_gen3_thermal",
		.pm = &rcar_gen3_thermal_pm_ops,
		.of_match_table = rcar_gen3_thermal_dt_ids,
	},
	.probe		= rcar_gen3_thermal_probe,
	.remove_new	= rcar_gen3_thermal_remove,
};
module_platform_driver(rcar_gen3_thermal_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
MODULE_AUTHOR("Wolfram Sang <[email protected]>");
Commit	Line	Data
d316522d	1	// SPDX-License-Identifier: GPL-2.0
564e73d2 WS	2	/*
	3	* R-Car Gen3 THS thermal sensor driver
	4	* Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
	5	*
	6	* Copyright (C) 2016 Renesas Electronics Corporation.
	7	* Copyright (C) 2016 Sang Engineering
564e73d2 WS	8	*/
	9	#include <linux/delay.h>
	10	#include <linux/err.h>
	11	#include <linux/interrupt.h>
	12	#include <linux/io.h>
	13	#include <linux/module.h>
f6a756e8	14	#include <linux/of.h>
564e73d2 WS	15	#include <linux/platform_device.h>
	16	#include <linux/pm_runtime.h>
	17	#include <linux/thermal.h>
	18
6269e9f7	19	#include "thermal_hwmon.h"
7d4b2697	20
564e73d2 WS	21	/* Register offsets */
	22	#define REG_GEN3_IRQSTR 0x04
	23	#define REG_GEN3_IRQMSK 0x08
	24	#define REG_GEN3_IRQCTL 0x0C
	25	#define REG_GEN3_IRQEN 0x10
	26	#define REG_GEN3_IRQTEMP1 0x14
	27	#define REG_GEN3_IRQTEMP2 0x18
	28	#define REG_GEN3_IRQTEMP3 0x1C
564e73d2 WS	29	#define REG_GEN3_THCTR 0x20
	30	#define REG_GEN3_TEMP 0x28
	31	#define REG_GEN3_THCODE1 0x50
	32	#define REG_GEN3_THCODE2 0x54
	33	#define REG_GEN3_THCODE3 0x58
c3131bd5 NS	34	#define REG_GEN3_PTAT1 0x5c
	35	#define REG_GEN3_PTAT2 0x60
	36	#define REG_GEN3_PTAT3 0x64
	37	#define REG_GEN3_THSCP 0x68
edeab75b WS	38	#define REG_GEN4_THSFMON00 0x180
	39	#define REG_GEN4_THSFMON01 0x184
	40	#define REG_GEN4_THSFMON02 0x188
	41	#define REG_GEN4_THSFMON15 0x1BC
	42	#define REG_GEN4_THSFMON16 0x1C0
	43	#define REG_GEN4_THSFMON17 0x1C4
564e73d2	44
7d4b2697 NS	45	/* IRQ{STR,MSK,EN} bits */
	46	#define IRQ_TEMP1 BIT(0)
	47	#define IRQ_TEMP2 BIT(1)
	48	#define IRQ_TEMP3 BIT(2)
	49	#define IRQ_TEMPD1 BIT(3)
	50	#define IRQ_TEMPD2 BIT(4)
	51	#define IRQ_TEMPD3 BIT(5)
	52
564e73d2 WS	53	/* THCTR bits */
	54	#define THCTR_PONM BIT(6)
	55	#define THCTR_THSST BIT(0)
	56
c3131bd5 NS	57	/* THSCP bits */
	58	#define THSCP_COR_PARA_VLD (BIT(15) \| BIT(14))
	59
564e73d2 WS	60	#define CTEMP_MASK 0xFFF
	61
	62	#define MCELSIUS(temp) ((temp) * 1000)
	63	#define GEN3_FUSE_MASK 0xFFF
edeab75b	64	#define GEN4_FUSE_MASK 0xFFF
564e73d2	65
7fd49ca0	66	#define TSC_MAX_NUM 5
564e73d2 WS	67
	68	/* Structure for thermal temperature calculation */
	69	struct equation_coefs {
	70	int a1;
	71	int b1;
	72	int a2;
	73	int b2;
	74	};
	75
a216261d WS	76	struct rcar_gen3_thermal_priv;
a216261d WS	77
fe3bfa75 WS	78	struct rcar_thermal_info {
fe3bfa75 WS	79	int ths_tj_1;
a216261d	80	void (read_fuses)(struct rcar_gen3_thermal_priv priv);
fe3bfa75 WS	81	};
fe3bfa75 WS	82
564e73d2 WS	83	struct rcar_gen3_thermal_tsc {
	84	void __iomem *base;
	85	struct thermal_zone_device *zone;
	86	struct equation_coefs coef;
bdc4480a	87	int tj_t;
b8aaf141	88	int thcode[3];
564e73d2 WS	89	};
	90
	91	struct rcar_gen3_thermal_priv {
	92	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
aef43e04	93	struct thermal_zone_device_ops ops;
97dad1f1	94	unsigned int num_tscs;
b8aaf141	95	int ptat[3];
fe3bfa75	96	const struct rcar_thermal_info *info;
564e73d2 WS	97	};
	98
	99	static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
	100	u32 reg)
	101	{
	102	return ioread32(tsc->base + reg);
	103	}
	104
	105	static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
	106	u32 reg, u32 data)
	107	{
	108	iowrite32(data, tsc->base + reg);
	109	}
	110
	111	/*
	112	* Linear approximation for temperature
	113	*
	114	* [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
	115	*
	116	* The constants a and b are calculated using two triplets of int values PTAT
	117	* and THCODE. PTAT and THCODE can either be read from hardware or use hard
	118	* coded values from driver. The formula to calculate a and b are taken from
	119	* BSP and sparsely documented and understood.
	120	*
	121	* Examining the linear formula and the formula used to calculate constants a
	122	* and b while knowing that the span for PTAT and THCODE values are between
	123	* 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
	124	* Integer also needs to be signed so that leaves 7 bits for binary
	125	* fixed point scaling.
	126	*/
	127
	128	#define FIXPT_SHIFT 7
	129	#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
7d4b2697	130	#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
564e73d2 WS	131	#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
	132	#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
	133
	134	#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
	135
	136	/* no idea where these constants come from */
564e73d2 WS	137	#define TJ_3 -41
564e73d2 WS	138
b8aaf141 NS	139	static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_priv *priv,
b8aaf141 NS	140	struct rcar_gen3_thermal_tsc *tsc,
4eb39f79	141	int ths_tj_1)
564e73d2	142	{
564e73d2 WS	143	/* TODO: Find documentation and document constant calculation formula */
	144
	145	/*
	146	* Division is not scaled in BSP and if scaled it might overflow
	147	* the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	148	*/
b8aaf141 NS	149	tsc->tj_t = (FIXPT_INT((priv->ptat[1] - priv->ptat[2]) * (ths_tj_1 - TJ_3))
b8aaf141 NS	150	/ (priv->ptat[0] - priv->ptat[2])) + FIXPT_INT(TJ_3);
564e73d2	151
b8aaf141	152	tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[2]),
bdc4480a	153	tsc->tj_t - FIXPT_INT(TJ_3));
b8aaf141	154	tsc->coef.b1 = FIXPT_INT(tsc->thcode[2]) - tsc->coef.a1 * TJ_3;
564e73d2	155
b8aaf141	156	tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[0]),
bdc4480a	157	tsc->tj_t - FIXPT_INT(ths_tj_1));
b8aaf141	158	tsc->coef.b2 = FIXPT_INT(tsc->thcode[0]) - tsc->coef.a2 * ths_tj_1;
564e73d2 WS	159	}
	160
	161	static int rcar_gen3_thermal_round(int temp)
	162	{
	163	int result, round_offs;
	164
	165	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
	166	-RCAR3_THERMAL_GRAN / 2;
	167	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	168	return result * RCAR3_THERMAL_GRAN;
	169	}
	170
2ebd4f2f	171	static int rcar_gen3_thermal_get_temp(struct thermal_zone_device tz, int temp)
564e73d2	172	{
5f68d078	173	struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tz);
6a310f8f	174	int mcelsius, val;
5f8f0642	175	int reg;
564e73d2 WS	176
564e73d2 WS	177	/* Read register and convert to mili Celsius */
564e73d2 WS	178	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
564e73d2 WS	179
b8aaf141	180	if (reg <= tsc->thcode[1])
6a310f8f YK	181	val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
	182	tsc->coef.a1);
	183	else
	184	val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
	185	tsc->coef.a2);
	186	mcelsius = FIXPT_TO_MCELSIUS(val);
564e73d2	187
0f510a24	188	/* Guaranteed operating range is -40C to 125C. */
564e73d2 WS	189
	190	/* Round value to device granularity setting */
	191	*temp = rcar_gen3_thermal_round(mcelsius);
	192
	193	return 0;
	194	}
	195
47cf09e0 NS	196	static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
	197	int mcelsius)
	198	{
	199	int celsius, val;
	200
	201	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	202	if (celsius <= INT_FIXPT(tsc->tj_t))
	203	val = celsius * tsc->coef.a1 + tsc->coef.b1;
	204	else
	205	val = celsius * tsc->coef.a2 + tsc->coef.b2;
	206
	207	return INT_FIXPT(val);
	208	}
	209
2ebd4f2f	210	static int rcar_gen3_thermal_set_trips(struct thermal_zone_device *tz, int low, int high)
47cf09e0	211	{
5f68d078	212	struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tz);
47cf09e0 NS	213	u32 irqmsk = 0;
	214
	215	if (low != -INT_MAX) {
	216	irqmsk \|= IRQ_TEMPD1;
	217	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
	218	rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
	219	}
	220
	221	if (high != INT_MAX) {
	222	irqmsk \|= IRQ_TEMP2;
	223	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
	224	rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
	225	}
	226
	227	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, irqmsk);
	228
	229	return 0;
	230	}
	231
aef43e04	232	static const struct thermal_zone_device_ops rcar_gen3_tz_of_ops = {
564e73d2	233	.get_temp = rcar_gen3_thermal_get_temp,
47cf09e0	234	.set_trips = rcar_gen3_thermal_set_trips,
564e73d2 WS	235	};
564e73d2 WS	236
47cf09e0 NS	237	static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
	238	{
	239	struct rcar_gen3_thermal_priv *priv = data;
	240	unsigned int i;
	241	u32 status;
	242
	243	for (i = 0; i < priv->num_tscs; i++) {
	244	status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
	245	rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
47b2d3d2	246	if (status && priv->tscs[i]->zone)
47cf09e0 NS	247	thermal_zone_device_update(priv->tscs[i]->zone,
	248	THERMAL_EVENT_UNSPECIFIED);
	249	}
	250
	251	return IRQ_HANDLED;
	252	}
	253
a216261d WS	254	static void rcar_gen3_thermal_read_fuses_gen3(struct rcar_gen3_thermal_priv *priv)
	255	{
	256	unsigned int i;
	257
	258	/*
	259	* Set the pseudo calibration points with fused values.
	260	* PTAT is shared between all TSCs but only fused for the first
	261	* TSC while THCODEs are fused for each TSC.
	262	*/
	263	priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT1) &
	264	GEN3_FUSE_MASK;
	265	priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT2) &
	266	GEN3_FUSE_MASK;
	267	priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT3) &
	268	GEN3_FUSE_MASK;
	269
	270	for (i = 0; i < priv->num_tscs; i++) {
	271	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	272
	273	tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) &
	274	GEN3_FUSE_MASK;
	275	tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) &
	276	GEN3_FUSE_MASK;
	277	tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) &
	278	GEN3_FUSE_MASK;
	279	}
	280	}
	281
edeab75b WS	282	static void rcar_gen3_thermal_read_fuses_gen4(struct rcar_gen3_thermal_priv *priv)
	283	{
	284	unsigned int i;
	285
	286	/*
	287	* Set the pseudo calibration points with fused values.
	288	* PTAT is shared between all TSCs but only fused for the first
	289	* TSC while THCODEs are fused for each TSC.
	290	*/
	291	priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON16) &
	292	GEN4_FUSE_MASK;
	293	priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON17) &
	294	GEN4_FUSE_MASK;
	295	priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON15) &
	296	GEN4_FUSE_MASK;
	297
	298	for (i = 0; i < priv->num_tscs; i++) {
	299	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	300
	301	tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON01) &
	302	GEN4_FUSE_MASK;
	303	tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON02) &
	304	GEN4_FUSE_MASK;
	305	tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON00) &
	306	GEN4_FUSE_MASK;
	307	}
	308	}
	309
c3131bd5 NS	310	static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
	311	{
	312	unsigned int i;
	313	u32 thscp;
	314
	315	/* If fuses are not set, fallback to pseudo values. */
	316	thscp = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_THSCP);
a216261d WS	317	if (!priv->info->read_fuses \|\|
a216261d WS	318	(thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) {
c3131bd5 NS	319	/* Default THCODE values in case FUSEs are not set. */
	320	static const int thcodes[TSC_MAX_NUM][3] = {
	321	{ 3397, 2800, 2221 },
	322	{ 3393, 2795, 2216 },
	323	{ 3389, 2805, 2237 },
	324	{ 3415, 2694, 2195 },
	325	{ 3356, 2724, 2244 },
	326	};
	327
	328	priv->ptat[0] = 2631;
	329	priv->ptat[1] = 1509;
	330	priv->ptat[2] = 435;
	331
	332	for (i = 0; i < priv->num_tscs; i++) {
	333	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	334
	335	tsc->thcode[0] = thcodes[i][0];
	336	tsc->thcode[1] = thcodes[i][1];
	337	tsc->thcode[2] = thcodes[i][2];
	338	}
	339
	340	return false;
	341	}
	342
a216261d	343	priv->info->read_fuses(priv);
c3131bd5 NS	344	return true;
	345	}
	346
47b2d3d2 NS	347	static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv,
47b2d3d2 NS	348	struct rcar_gen3_thermal_tsc *tsc)
564e73d2 WS	349	{
	350	u32 reg_val;
	351
	352	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	353	reg_val &= ~THCTR_PONM;
	354	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
	355
	356	usleep_range(1000, 2000);
	357
ed1b1ac1	358	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
7d4b2697	359	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
47b2d3d2	360	if (priv->ops.set_trips)
47cf09e0 NS	361	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
47cf09e0 NS	362	IRQ_TEMPD1 \| IRQ_TEMP2);
7d4b2697	363
564e73d2 WS	364	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	365	reg_val \|= THCTR_THSST;
	366	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
78aefd2d NS	367
78aefd2d NS	368	usleep_range(1000, 2000);
564e73d2 WS	369	}
564e73d2 WS	370
fe3bfa75 WS	371	static const struct rcar_thermal_info rcar_m3w_thermal_info = {
fe3bfa75 WS	372	.ths_tj_1 = 116,
a216261d	373	.read_fuses = rcar_gen3_thermal_read_fuses_gen3,
fe3bfa75 WS	374	};
	375
	376	static const struct rcar_thermal_info rcar_gen3_thermal_info = {
	377	.ths_tj_1 = 126,
a216261d	378	.read_fuses = rcar_gen3_thermal_read_fuses_gen3,
fe3bfa75 WS	379	};
fe3bfa75 WS	380
edeab75b WS	381	static const struct rcar_thermal_info rcar_gen4_thermal_info = {
	382	.ths_tj_1 = 126,
	383	.read_fuses = rcar_gen3_thermal_read_fuses_gen4,
	384	};
	385
564e73d2	386	static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
4eb39f79 YK	387	{
4eb39f79 YK	388	.compatible = "renesas,r8a774a1-thermal",
fe3bfa75	389	.data = &rcar_m3w_thermal_info,
4eb39f79	390	},
1a005912 BD	391	{
1a005912 BD	392	.compatible = "renesas,r8a774b1-thermal",
fe3bfa75	393	.data = &rcar_gen3_thermal_info,
1a005912	394	},
947d85f0 MCR	395	{
947d85f0 MCR	396	.compatible = "renesas,r8a774e1-thermal",
fe3bfa75	397	.data = &rcar_gen3_thermal_info,
947d85f0	398	},
4eb39f79 YK	399	{
4eb39f79 YK	400	.compatible = "renesas,r8a7795-thermal",
fe3bfa75	401	.data = &rcar_gen3_thermal_info,
4eb39f79 YK	402	},
	403	{
	404	.compatible = "renesas,r8a7796-thermal",
fe3bfa75	405	.data = &rcar_m3w_thermal_info,
4eb39f79	406	},
8d74bf79 GU	407	{
8d74bf79 GU	408	.compatible = "renesas,r8a77961-thermal",
fe3bfa75	409	.data = &rcar_m3w_thermal_info,
8d74bf79	410	},
4eb39f79 YK	411	{
4eb39f79 YK	412	.compatible = "renesas,r8a77965-thermal",
fe3bfa75	413	.data = &rcar_gen3_thermal_info,
4eb39f79 YK	414	},
	415	{
	416	.compatible = "renesas,r8a77980-thermal",
fe3bfa75	417	.data = &rcar_gen3_thermal_info,
4eb39f79	418	},
e854da4f NS	419	{
e854da4f NS	420	.compatible = "renesas,r8a779a0-thermal",
fe3bfa75	421	.data = &rcar_gen3_thermal_info,
e854da4f	422	},
5b2ca9bc WS	423	{
5b2ca9bc WS	424	.compatible = "renesas,r8a779f0-thermal",
edeab75b	425	.data = &rcar_gen4_thermal_info,
5b2ca9bc	426	},
883d1552 GU	427	{
883d1552 GU	428	.compatible = "renesas,r8a779g0-thermal",
edeab75b	429	.data = &rcar_gen4_thermal_info,
883d1552	430	},
564e73d2 WS	431	{},
	432	};
	433	MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
	434
a07f4487	435	static void rcar_gen3_thermal_remove(struct platform_device *pdev)
564e73d2 WS	436	{
	437	struct device *dev = &pdev->dev;
	438
	439	pm_runtime_put(dev);
	440	pm_runtime_disable(dev);
564e73d2 WS	441	}
564e73d2 WS	442
6269e9f7 MV	443	static void rcar_gen3_hwmon_action(void *data)
	444	{
	445	struct thermal_zone_device *zone = data;
	446
	447	thermal_remove_hwmon_sysfs(zone);
	448	}
	449
47cf09e0 NS	450	static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv,
	451	struct platform_device *pdev)
	452	{
	453	struct device *dev = &pdev->dev;
	454	unsigned int i;
	455	char *irqname;
	456	int ret, irq;
	457
	458	for (i = 0; i < 2; i++) {
	459	irq = platform_get_irq_optional(pdev, i);
	460	if (irq < 0)
	461	return irq;
	462
	463	irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
	464	dev_name(dev), i);
	465	if (!irqname)
	466	return -ENOMEM;
	467
	468	ret = devm_request_threaded_irq(dev, irq, NULL,
	469	rcar_gen3_thermal_irq,
	470	IRQF_ONESHOT, irqname, priv);
	471	if (ret)
	472	return ret;
	473	}
	474
	475	return 0;
	476	}
	477
564e73d2 WS	478	static int rcar_gen3_thermal_probe(struct platform_device *pdev)
	479	{
	480	struct rcar_gen3_thermal_priv *priv;
	481	struct device *dev = &pdev->dev;
	482	struct resource *res;
	483	struct thermal_zone_device *zone;
d3a2328e NS	484	unsigned int i;
d3a2328e NS	485	int ret;
564e73d2	486
564e73d2 WS	487	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	488	if (!priv)
	489	return -ENOMEM;
	490
aef43e04	491	priv->ops = rcar_gen3_tz_of_ops;
cc4d072b	492
fe3bfa75	493	priv->info = of_device_get_match_data(dev);
564e73d2 WS	494	platform_set_drvdata(pdev, priv);
564e73d2 WS	495
47cf09e0	496	if (rcar_gen3_thermal_request_irqs(priv, pdev))
aef43e04	497	priv->ops.set_trips = NULL;
47cf09e0	498
564e73d2 WS	499	pm_runtime_enable(dev);
	500	pm_runtime_get_sync(dev);
	501
	502	for (i = 0; i < TSC_MAX_NUM; i++) {
	503	struct rcar_gen3_thermal_tsc *tsc;
	504
d51546c0 NS	505	res = platform_get_resource(pdev, IORESOURCE_MEM, i);
	506	if (!res)
	507	break;
	508
564e73d2 WS	509	tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
	510	if (!tsc) {
	511	ret = -ENOMEM;
	512	goto error_unregister;
	513	}
	514
564e73d2 WS	515	tsc->base = devm_ioremap_resource(dev, res);
	516	if (IS_ERR(tsc->base)) {
	517	ret = PTR_ERR(tsc->base);
	518	goto error_unregister;
	519	}
b8aaf141	520
564e73d2	521	priv->tscs[i] = tsc;
c3131bd5 NS	522	}
	523
	524	priv->num_tscs = i;
	525
	526	if (!rcar_gen3_thermal_read_fuses(priv))
	527	dev_info(dev, "No calibration values fused, fallback to driver values\n");
	528
	529	for (i = 0; i < priv->num_tscs; i++) {
	530	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
564e73d2	531
3f2f6895	532	rcar_gen3_thermal_init(priv, tsc);
fe3bfa75	533	rcar_gen3_thermal_calc_coefs(priv, tsc, priv->info->ths_tj_1);
47b2d3d2	534
aef43e04	535	zone = devm_thermal_of_zone_register(dev, i, tsc, &priv->ops);
564e73d2	536	if (IS_ERR(zone)) {
404dd7df	537	dev_err(dev, "Sensor %u: Can't register thermal zone\n", i);
564e73d2 WS	538	ret = PTR_ERR(zone);
	539	goto error_unregister;
	540	}
	541	tsc->zone = zone;
7d4b2697	542
6269e9f7 MV	543	ret = thermal_add_hwmon_sysfs(tsc->zone);
	544	if (ret)
	545	goto error_unregister;
	546
b9cd1663	547	ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
d543c842	548	if (ret)
6269e9f7	549	goto error_unregister;
6269e9f7	550
d5299c1b	551	ret = thermal_zone_get_num_trips(tsc->zone);
e380ea81 JW	552	if (ret < 0)
	553	goto error_unregister;
	554
404dd7df	555	dev_info(dev, "Sensor %u: Loaded %d trip points\n", i, ret);
564e73d2 WS	556	}
564e73d2 WS	557
97dad1f1 NS	558	if (!priv->num_tscs) {
	559	ret = -ENODEV;
	560	goto error_unregister;
	561	}
	562
564e73d2 WS	563	return 0;
	564
	565	error_unregister:
	566	rcar_gen3_thermal_remove(pdev);
	567
	568	return ret;
	569	}
	570
75f78d6d NS	571	static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
	572	{
	573	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	574	unsigned int i;
	575
	576	for (i = 0; i < priv->num_tscs; i++) {
	577	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	578
3f2f6895	579	rcar_gen3_thermal_init(priv, tsc);
75f78d6d NS	580	}
75f78d6d NS	581
75f78d6d NS	582	return 0;
	583	}
	584
1b57b959	585	static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
75f78d6d NS	586	rcar_gen3_thermal_resume);
75f78d6d NS	587
564e73d2 WS	588	static struct platform_driver rcar_gen3_thermal_driver = {
	589	.driver = {
	590	.name = "rcar_gen3_thermal",
75f78d6d	591	.pm = &rcar_gen3_thermal_pm_ops,
564e73d2 WS	592	.of_match_table = rcar_gen3_thermal_dt_ids,
	593	},
	594	.probe = rcar_gen3_thermal_probe,
a07f4487	595	.remove_new = rcar_gen3_thermal_remove,
564e73d2 WS	596	};
	597	module_platform_driver(rcar_gen3_thermal_driver);
	598
	599	MODULE_LICENSE("GPL v2");
	600	MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
	601	MODULE_AUTHOR("Wolfram Sang <[email protected]>");